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Add ARC support
This adds support for the ARC architecture to libffi. DesignWare ARC
is a family of processors from Synopsys, Inc.

This patch has been tested on a little-endian system and passes
the testsuite.

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
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mischajonker committed Jun 14, 2013
1 parent c3c40e0 commit b082e15
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9 changes: 9 additions & 0 deletions ChangeLog
@@ -1,3 +1,12 @@
2013-06-12 Mischa Jonker <mjonker@synopsys.com>

* configure.ac: Add support for ARC.
* Makefile.am: Likewise.
* README: Add ARC details.
* src/arc/arcompact.S: New.
* src/arc/ffi.c: Likewise.
* src/arc/ffitarget.h: Likewise.

2013-03-28 David Schneider <david.schneider@bivab.de>

* src/arm/ffi.c: Fix support for ARM hard-float calling convention.
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6 changes: 5 additions & 1 deletion Makefile.am
Expand Up @@ -9,7 +9,8 @@ SUBDIRS = include testsuite man
EXTRA_DIST = LICENSE ChangeLog.v1 ChangeLog.libgcj configure.host \
src/aarch64/ffi.c src/aarch64/ffitarget.h src/aarch64/sysv.S \
build-ios.sh src/alpha/ffi.c src/alpha/osf.S \
src/alpha/ffitarget.h src/arm/ffi.c src/arm/sysv.S \
src/alpha/ffitarget.h src/arc/ffi.c src/arc/arcompact.S \
src/arc/ffitarget.h src/arm/ffi.c src/arm/sysv.S \
src/arm/ffitarget.h src/avr32/ffi.c src/avr32/sysv.S \
src/avr32/ffitarget.h src/cris/ffi.c src/cris/sysv.S \
src/cris/ffitarget.h src/ia64/ffi.c src/ia64/ffitarget.h \
Expand Down Expand Up @@ -170,6 +171,9 @@ endif
if AARCH64
nodist_libffi_la_SOURCES += src/aarch64/sysv.S src/aarch64/ffi.c
endif
if ARC
nodist_libffi_la_SOURCES += src/arc/sysv.S src/arc/ffi.c
endif
if ARM
nodist_libffi_la_SOURCES += src/arm/sysv.S src/arm/ffi.c
if FFI_EXEC_TRAMPOLINE_TABLE
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1 change: 1 addition & 0 deletions README
Expand Up @@ -54,6 +54,7 @@ tested:
| AArch64 | Linux | GCC |
| Alpha | Linux | GCC |
| Alpha | Tru64 | GCC |
| ARC | Linux | GCC |
| ARM | Linux | GCC |
| ARM | iOS | GCC |
| AVR32 | Linux | GCC |
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5 changes: 5 additions & 0 deletions configure.ac
Expand Up @@ -77,6 +77,10 @@ case "$host" in
HAVE_LONG_DOUBLE='defined(__LONG_DOUBLE_128__)'
;;

arc*-*-*)
TARGET=ARC; TARGETDIR=arc
;;

arm*-*-*)
TARGET=ARM; TARGETDIR=arm
;;
Expand Down Expand Up @@ -289,6 +293,7 @@ AM_CONDITIONAL(POWERPC_AIX, test x$TARGET = xPOWERPC_AIX)
AM_CONDITIONAL(POWERPC_DARWIN, test x$TARGET = xPOWERPC_DARWIN)
AM_CONDITIONAL(POWERPC_FREEBSD, test x$TARGET = xPOWERPC_FREEBSD)
AM_CONDITIONAL(AARCH64, test x$TARGET = xAARCH64)
AM_CONDITIONAL(ARC, test x$TARGET = xARC)
AM_CONDITIONAL(ARM, test x$TARGET = xARM)
AM_CONDITIONAL(AVR32, test x$TARGET = xAVR32)
AM_CONDITIONAL(LIBFFI_CRIS, test x$TARGET = xLIBFFI_CRIS)
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135 changes: 135 additions & 0 deletions src/arc/arcompact.S
@@ -0,0 +1,135 @@
/* -----------------------------------------------------------------------
arcompact.S - Copyright (c) 2013 Synposys, Inc. (www.synopsys.com)
ARCompact Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL RENESAS TECHNOLOGY BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */

#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#ifdef HAVE_MACHINE_ASM_H
#include <machine/asm.h>
#else
#define CNAME(x) x
#define ENTRY(x) .globl CNAME(x)` .type CNAME(x),%function` CNAME(x):
#endif

.text

/* R0: ffi_prep_args */
/* R1: &ecif */
/* R2: cif->bytes */
/* R3: fig->flags */
/* R4: ecif.rvalue */
/* R5: fn */
ENTRY(ffi_call_ARCompact)
/* Save registers. */
st.a fp, [sp, -4] /* fp + 20, fp */
push_s blink /* fp + 16, blink */
st.a r4, [sp, -4] /* fp + 12, ecif.rvalue */
push_s r3 /* fp + 8, fig->flags */
st.a r5, [sp, -4] /* fp + 4, fn */
push_s r2 /* fp + 0, cif->bytes */
mov fp, sp

/* Make room for all of the new args. */
sub sp, sp, r2

/* Place all of the ffi_prep_args in position. */
/* ffi_prep_args(char *stack, extended_cif *ecif) */
/* R1 already set. */

/* And call. */
jl_s.d [r0]
mov_s r0, sp

ld.ab r12, [fp, 4] /* cif->bytes */
ld.ab r11, [fp, 4] /* fn */

/* Move first 8 parameters in registers... */
ld_s r0, [sp]
ld_s r1, [sp, 4]
ld_s r2, [sp, 8]
ld_s r3, [sp, 12]
ld r4, [sp, 16]
ld r5, [sp, 20]
ld r6, [sp, 24]
ld r7, [sp, 28]

/* ...and adjust the stack. */
min r12, r12, 32

/* Call the function. */
jl.d [r11]
add sp, sp, r12

mov sp, fp
pop_s r3 /* fig->flags, return type */
pop_s r2 /* ecif.rvalue, pointer for return value */

/* If the return value pointer is NULL, assume no return value. */
breq.d r2, 0, epilogue
pop_s blink

/* Return INT. */
brne r3, FFI_TYPE_INT, return_double
b.d epilogue
st_s r0, [r2]

return_double:
brne r3, FFI_TYPE_DOUBLE, epilogue
st_s r0, [r2]
st_s r1, [r2,4]

epilogue:
j_s.d [blink]
ld.ab fp, [sp, 4]

ENTRY(ffi_closure_ARCompact)
st.a r0, [sp, -32]
st_s r1, [sp, 4]
st_s r2, [sp, 8]
st_s r3, [sp, 12]
st r4, [sp, 16]
st r5, [sp, 20]
st r6, [sp, 24]
st r7, [sp, 28]

/* pointer to arguments */
mov_s r2, sp

/* return value goes here */
sub sp, sp, 8
mov_s r1, sp

push_s blink

bl.d ffi_closure_inner_ARCompact
mov_s r0, r8 /* codeloc, set by trampoline */

pop_s blink

/* set return value to r1:r0 */
pop_s r0
pop_s r1
j_s.d [blink]
add_s sp, sp, 32

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