Skip to content

libresilicon/process

master
Switch branches/tags

Name already in use

A tag already exists with the provided branch name. Many Git commands accept both tag and branch names, so creating this branch may cause unexpected behavior. Are you sure you want to create this branch?
1 branch 0 tags
Code
This branch is 3 commits behind leviathanch:master.

Latest commit

 

Git stats

Files

Permalink
Failed to load latest commit information.
Type
Name
Latest commit message
Commit time
circdia @ ef6b6d4
 
 
cmos_nutshell
 
 
magic
 
 
process_chemistry
 
 
process_datasheet/hightech
 
 
process_design
 
 
process_design_graphics
 
 
process_design_rules
 
 
process_implementations
 
 
process_steps
 
 
process_testing
 
 
semiconductor_physics
 
 
simulation
 
 
test_layouts
 
 
.gitignore
 
 
.gitmodules
 
 
README.md
 
 
global_color_scheme.tex
 
 
nmos_threshold.wxmx
 
 
process_abstract.tex
 
 

README.md

Libre Silicon v0.1

This is the LibreSilicon process specification (WIP) Please use XeLaTeX for rendering the documents

Features are:

  • 1 micron (1 um)
  • twin-well for cmos
  • pbase / nbase (optional) for bipolar
  • shallow trench isolation
  • sonos for flash (optional)
  • silicification

aiming higher voltages, higher speed and higher feasibilty for modern Analog and System-on-Chip design.

About

No description, website, or topics provided.

Resources

Readme

Stars

86 stars

Watchers

12 watching

Forks

14 forks
Report repository

Releases

No releases published

Packages

No packages published

Languages

  • TeX 97.5%
  • Python 2.1%
  • Other 0.4%