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Fixed SSE4 detection, and split it into SSE 4.1 and 4.2

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slouken committed Feb 12, 2011
1 parent 577c222 commit 7576029c83ace0f06b2b734b340ad5b5b2837700
Showing with 47 additions and 12 deletions.
  1. +7 −2 include/SDL_cpuinfo.h
  2. +38 −9 src/cpuinfo/SDL_cpuinfo.c
  3. +2 −1 test/testplatform.c
@@ -85,9 +85,14 @@ extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE2(void);
extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE3(void);

/**
* This function returns true if the CPU has SSE4 features.
* This function returns true if the CPU has SSE4.1 features.
*/
extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE4(void);
extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE41(void);

/**
* This function returns true if the CPU has SSE4.2 features.
*/
extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE42(void);


/* Ends C function definitions when using C++ */
@@ -41,7 +41,8 @@
#define CPU_HAS_SSE 0x00000010
#define CPU_HAS_SSE2 0x00000020
#define CPU_HAS_SSE3 0x00000040
#define CPU_HAS_SSE4 0x00000080
#define CPU_HAS_SSE41 0x00000080
#define CPU_HAS_SSE42 0x00000100


static __inline__ int
@@ -234,15 +235,30 @@ CPU_haveSSE3(void)
}

static __inline__ int
CPU_haveSSE4(void)
CPU_haveSSE41(void)
{
if (CPU_haveCPUID()) {
int a, b, c, d;

cpuid(0, a, b, c, d);
cpuid(1, a, b, c, d);
if (a >= 1) {
cpuid(1, a, b, c, d);
return (c & 0x00000100);
return (c & 0x00080000);
}
}
return 0;
}

static __inline__ int
CPU_haveSSE42(void)
{
if (CPU_haveCPUID()) {
int a, b, c, d;

cpuid(1, a, b, c, d);
if (a >= 1) {
cpuid(1, a, b, c, d);
return (c & 0x00100000);
}
}
return 0;
@@ -427,8 +443,11 @@ SDL_GetCPUFeatures(void)
if (CPU_haveSSE3()) {
SDL_CPUFeatures |= CPU_HAS_SSE3;
}
if (CPU_haveSSE4()) {
SDL_CPUFeatures |= CPU_HAS_SSE4;
if (CPU_haveSSE41()) {
SDL_CPUFeatures |= CPU_HAS_SSE41;
}
if (CPU_haveSSE42()) {
SDL_CPUFeatures |= CPU_HAS_SSE42;
}
}
return SDL_CPUFeatures;
@@ -480,9 +499,18 @@ SDL_HasSSE3(void)
}

SDL_bool
SDL_HasSSE4(void)
SDL_HasSSE41(void)
{
if (SDL_GetCPUFeatures() & CPU_HAS_SSE41) {
return SDL_TRUE;
}
return SDL_FALSE;
}

SDL_bool
SDL_HasSSE42(void)
{
if (SDL_GetCPUFeatures() & CPU_HAS_SSE4) {
if (SDL_GetCPUFeatures() & CPU_HAS_SSE42) {
return SDL_TRUE;
}
return SDL_FALSE;
@@ -504,7 +532,8 @@ main()
printf("SSE: %d\n", SDL_HasSSE());
printf("SSE2: %d\n", SDL_HasSSE2());
printf("SSE3: %d\n", SDL_HasSSE3());
printf("SSE4: %d\n", SDL_HasSSE4());
printf("SSE4.1: %d\n", SDL_HasSSE41());
printf("SSE4.2: %d\n", SDL_HasSSE42());
return 0;
}

@@ -146,7 +146,8 @@ TestCPUInfo(SDL_bool verbose)
printf("SSE %s\n", SDL_HasSSE()? "detected" : "not detected");
printf("SSE2 %s\n", SDL_HasSSE2()? "detected" : "not detected");
printf("SSE3 %s\n", SDL_HasSSE3()? "detected" : "not detected");
printf("SSE4 %s\n", SDL_HasSSE4()? "detected" : "not detected");
printf("SSE4.1 %s\n", SDL_HasSSE41()? "detected" : "not detected");
printf("SSE4.2 %s\n", SDL_HasSSE42()? "detected" : "not detected");
}
return (0);
}

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