Commits on Nov 30, 2017
  1. Merge pull request #108 from mripard/uboot-crc

    wens committed Nov 30, 2017
    Uboot crc
Commits on Nov 6, 2017
  1. fel: Check for the U-Boot header CRC

    mripard committed Nov 6, 2017
    A U-Boot image has two CRCs, one to cover the data and that we already
    check, and one to cover the header.
    Since we're not checking the latter, let's make sure it's the case.
    Tested-by: Frank Kunz <>
    Signed-off-by: Maxime Ripard <>
  2. fel: Check the U-Boot's CRC instead of its size

    mripard committed Nov 6, 2017
    The current code checks that the transferred size is matching the size
    reported in the image header.
    Unfortunately, the transferred image might be padded, which doesn't change
    anything at the functional level, but will make that check trigger since
    the actual image will be smaller than the transferred data.
    Change that logic to first check that the transferred size isn't less that
    the header image size, which will still be an error, and then check for the
    CRC of the image itself. This will prove to be an more robust integrity
    check than what we have right now anyway.
    The CRC used in the image header is the CRC32 algorithm, that is
    implemented in the zlib, which is installed on most devices on the planet,
    so we can just use that implementation instead of rolling our own.
    Tested-by: Frank Kunz <>
    Signed-off-by: Maxime Ripard <>
  3. fel: Use U-Boot's header structure

    mripard committed Nov 6, 2017
    The U-Boot image parsing code so far has been relying on hardcoded offsets
    directly into the image's buffer.
    While that works, it's a bit obscure and isn't practical to understand and
    Let's add the structure definition, and convert the code to use it.
    Signed-off-by: Maxime Ripard <>
Commits on Aug 15, 2017
  1. Merge pull request #102 from Icenowy/spl-v2

    wens committed Aug 15, 2017
    fel: enable support for v2 SPL
Commits on Apr 29, 2017
  1. fel: enable support for v2 SPL

    Icenowy committed Apr 29, 2017
    The version 2 of SPL added the possibility to add a device tree name in
    the header, with adding some pad and using a reserved word.
    As FEL boot currently doesn't need the device tree name, directly raise
    the maximum supported version number to 2.
    Signed-off-by: Icenowy Zheng <>
Commits on Mar 31, 2017
  1. Merge pull request #99 from ssvb/20170228-smc-workaround

    ssvb committed Mar 31, 2017
    fel: SMC workaround for the Allwinner SoCs with the secure bit set in eFUSE
Commits on Feb 28, 2017
  1. fel: Enable the SMC workaround for H3/H5/A64/H64

    ssvb committed Feb 28, 2017
    Use a hardwired L.NOP instruction from the OpenRISC reset
    vector as a way to check if the workaround is necessary.
    Because these L.NOP instructions are guaranteed to be there
    and are read-only, this is the most reliable non-invasive test.
    Reading SID would be less reliable because it is one-time
    programmable and theoretically may be set to zero on some boards.
    Signed-off-by: Siarhei Siamashka <>
  2. fel: SMC workaround to enter "secure boot" FEL mode on some SoCs

    apritzel authored and ssvb committed Feb 28, 2017
    If an SoC has the "secure boot" fuse burned, it will enter FEL mode in
    non-secure state, so with the SCR.NS bit set. Since in this mode the
    secure/non-secure state restrictions are actually observed, we suffer
    from several restrictions:
    - No access to the SID information (both via memory mapped and "register").
    - No access to secure SRAM (SRAM A2 on H3/A64/H5).
    - No access to the secure side of the GIC, so it can't be configured to
      be accessible from non-secure world.
    - No RMR trigger on ARMv8 cores to bring the core into AArch64.
    Those limitations make a board pretty useless for many applications.
    However it has been found out that a simple "smc" call will immediately
    return from monitor mode, but with the NS bit cleared, so access to all
    secure peripherals is suddenly possible.
    Add all the necessary support code for doing a runtime check and
    activating this workaround. Affected SoCs need to have the "smc"
    workaround enabled in their soc_info struct.
    Signed-off-by: Andre Przywara <>
    ["sunxi-fel smc" command changed to automatic detection by Siarhei]
    Signed-off-by: Siarhei Siamashka <>
Commits on Feb 13, 2017
  1. fel: Support "-h" and "--help" options

    n1tehawk committed Feb 13, 2017
    Closes #96
    Signed-off-by: Bernhard Nortmann <>
Commits on Feb 11, 2017
  1. fel: Safeguard against calling FEL read/write with zero bytes length

    n1tehawk committed Feb 11, 2017
    Signed-off-by: Bernhard Nortmann <>
  2. Makefile: Improve auto-detection of ARM cross compiler

    n1tehawk committed Feb 11, 2017
    This patch moves the scan for an ARM gcc into a separate shell
    script. To prevent against recursion issues, the new script adds
    "-maxdepth 1" to the find invocation; and it now also correctly
    handles directories in $PATH that contain spaces in their name.
    Signed-off-by: Bernhard Nortmann <>
  3. Make sure that awk patterns are not locale-specific.

    plaes authored and n1tehawk committed Feb 7, 2017
    Locales can influence conversion, so make sure we all use the same one.
    Signed-off-by: Priit Laes <>
  4. Hide error messages about nonexisting directories when scanning $PATH

    plaes authored and n1tehawk committed Feb 7, 2017
    $PATH can contains directories that do not exist, so hide error messages
    about those entries.
    Signed-off-by: Priit Laes <>
Commits on Feb 3, 2017
  1. Merge pull request #94 from n1tehawk/20170126_thunks

    n1tehawk committed Feb 3, 2017
    Move thunk code to a dedicated subdirectory, implement fel_clrsetbits_le32()
Commits on Jan 27, 2017
  1. fel: Implement fel_clrsetbits_le32() helper

    n1tehawk committed Jan 26, 2017
    This function provides bitwise clear/set operations on 32-bit words
    via FEL. It may help with implementing future functionality, where
    ARM register manipulations often involve such bit level access.
    Signed-off-by: Bernhard Nortmann <>
  2. thunks: Add assembly sources for some more thunks

    n1tehawk committed Jan 26, 2017
    These might be useful in case the code requires maintenance/changes.
    Signed-off-by: Bernhard Nortmann <>
  3. thunks: Adjust build system for ARM thunk .h

    n1tehawk committed Jan 25, 2017
    "make headers" (which in turn invokes "make -C thunks/" should now
    build the include files via awk, avoiding the need for ruby.
    Signed-off-by: Bernhard Nortmann <>
  4. Move thunk code / snippets to a dedicated subdirectory

    n1tehawk committed Jan 3, 2017
    Signed-off-by: Bernhard Nortmann <>
  5. Makefile: Improve auto-detection of ARM cross compiler

    n1tehawk committed Jan 25, 2017
    Try an 'educated guess' for a suitable toolchain if no explicit
    CROSS_COMPILE was set (but still default to "arm-none-eabi-").
    Signed-off-by: Bernhard Nortmann <>
Commits on Jan 21, 2017
  1. Merge pull request #88 from n1tehawk/20161109_copyl

    n1tehawk committed Jan 21, 2017
    fel: Implement memory copy operations and "memmove" command
Commits on Dec 30, 2016
  1. fel: Remove obsolete fel-pio (thunk) code

    n1tehawk committed Dec 30, 2016
    This functionality is now available via "sunxi-fel memmove", so
    change the fel-gpio script accordingly and remove the thunk code.
    Signed-off-by: Bernhard Nortmann <>
Commits on Dec 28, 2016
  1. fel: Add "memmove" command

    n1tehawk committed Nov 21, 2016
    This also obsoletes fel-copy.c - for details see issue #78.
    Signed-off-by: Bernhard Nortmann <>
  2. fel_lib: Add generic memcpy() functions and fel_memmove() wrapper

    n1tehawk committed Dec 17, 2016
    The functions represent ARM "thunk" code that can be invoked via
    FEL to execute arbitrary memory copy operations on the target
    device, i.e. they deal with overlap and unaligned access. Where
    possible, the copy operation will use (32-bit) word transfers,
    otherwise it falls back to bytewise copying.
    Signed-off-by: Bernhard Nortmann <>
  3. Makefile: Use `uname` for OS detection on *nix platforms

    n1tehawk committed Dec 20, 2016
    Signed-off-by: Bernhard Nortmann <>
  4. Merge pull request #91 from n1tehawk/20161220_sid-fix

    n1tehawk committed Dec 28, 2016
    SID fix / H3 workaround
  5. uart0-helloworld: Refactor SID fix

    n1tehawk committed Dec 28, 2016
    Also includes an updated uart0-helloworld-sdboot.sunxi binary.
    Signed-off-by: Bernhard Nortmann <>
  6. uart0-helloworld-sdboot: differ H2+ with H3

    Icenowy authored and n1tehawk committed Dec 19, 2016
    With fixed SID reading routine, it's now possible to differ H2+ with H3
    with SID.
    Tested on an Orange Pi One and an Orange Pi Zero.
    Signed-off-by: Icenowy Zheng <>
  7. fel: [Fixup] Use fel_get_sid_root_key() routine for SID retrieval

    n1tehawk committed Dec 20, 2016
    The patch also introduces a "sid-register" command for diagnostic
    purposes. It allows to use/enforce the workaround method for other
    SoCs, to check if there are any inconsistencies with the values
    read from memory.
    Signed-off-by: Bernhard Nortmann <>
  8. fel_lib: Implement thunk code for register-based retrieval of SID

    n1tehawk committed Dec 20, 2016
    The new function fel_get_sid_registers() uses ARM code for register
    access to the SID root key. This is necessary to retrieve correct
    values for certain SoCs, e.g. when not using this approach the H3
    has been observed to return 'mangled' values (when reading SID from
    The FEL library provides a uniform fel_get_sid_root_key() wrapper
    that will automatically use the workaround method for SoCs that
    are tagged accordingly - so the application program does not have
    to bother with selecting memory vs. register-based access.
    Signed-off-by: Bernhard Nortmann <>
  9. fel: workaround H3 SID issue

    Icenowy authored and n1tehawk committed Dec 19, 2016
    H3 SID controller has some bug, that makes the initial value at
    0x01c14200 wrong.
    This commit workarounds this bug by reading them with register access
    Signed-off-by: Icenowy Zheng <>
    Reviewed-by: Bernhard Nortmann <>
  10. soc_info: Split sid_addr into sid_base + sid_offset

    n1tehawk committed Dec 28, 2016
    This is a preparatory step. Instead of using memory-based access,
    we might want to retrieve SID keys (e-fuses) via SID registers.
    For this, it's convenient if the plain base address is available.
    Signed-off-by: Bernhard Nortmann <>
  11. Merge pull request #92 from Icenowy/v3s

    n1tehawk committed Dec 28, 2016
    Add support for Allwinner V3s, which is similar to A10/A13/A20 in terms of SRAM mapping and SID address.
  12. uart0-helloworld-sdboot: add support for V3s SoC

    Icenowy committed Dec 28, 2016
    Add the SoC ID and UART0 pinmux for V3s.
    Signed-off-by: Icenowy Zheng <>
  13. fel: Add SOC ID, SRAM info and SID address for V3s

    Icenowy committed Dec 28, 2016
    The V3s SoC looks like A10/13/20 in SRAM mapping and SID address.
    Add support for it.
    Signed-off-by: Icenowy Zheng <>