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mci_media/sdhc: fix the 8/4bit bus width BUSTEST_W testing
This fixes the MMC 8bit or 4bit bus width testing on eMMC. First, the eMMC needs a higher frequency, 52MHz, then, it needs a high speed bit set. Before we can set the bus speed to more than 1 bit, we need to set the BLOCKLEN to 512 bytes. This is done with initally sending a CMD16. To switch to 4 or 8 bits, we use a CMD6 SWITCH command. After that, the actual bus lines DAT[0:7] are being tested with a BUSTEST_W CMD19 command that send a pattern to the memory. with BUSTEST_R CMD14 we read back the data and check that it's the previously set pattern. Then we can conclude that the bus is OK or we need to default to 1bit bus width. There is an issue with BUSTEST_W. after sending the pattern, the SDMMC IP doesn't trigger a TRFC status. Thus, we use a sw workaround to reset the DAT and CMD lines by using the SRR software reset register. The pattern still gets sent correctly , because BUSTEST_R works fine on reading it back. After testing, it looks like speed is about 2x better than 1bit bus, on sama5d2_xplained board. Signed-off-by: Eugen Hristev <firstname.lastname@example.org> Tested-by: Tim Du <email@example.com>
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