diff --git a/.circleci/config.yml b/.circleci/config.yml index 3b706fb86..edc821f55 100644 --- a/.circleci/config.yml +++ b/.circleci/config.yml @@ -195,7 +195,7 @@ jobs: - build/ppc64/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c - build/x86/coreboot-4.11 - build/x86/coreboot-24.02.01 - - build/x86/coreboot-24.12 + - build/x86/coreboot-25.09 - build/x86/coreboot-dasharo - build/x86/coreboot-purism - build/x86/musl-cross-make-fd6be58297ee21fcba89216ccd0d4aca1e3f1c5c @@ -252,7 +252,7 @@ workflows: requires: - novacustom-nv4x_adl - # t480 is based on 24.12 coreboot release, not sharing any buildstack from now, depend on muscl-cross cache + # t480 is based on 25.09 coreboot release, not sharing any buildstack from now, depend on muscl-cross cache - build_and_persist: name: EOL_t480-hotp-maximized target: EOL_t480-hotp-maximized @@ -285,7 +285,7 @@ workflows: - EOL_t480-hotp-maximized # Those onboarding new boards should add their entries below. - # coreboot 24.12 boards + # coreboot 25.09 boards - build: name: EOL_x220-hotp-maximized target: EOL_x220-hotp-maximized @@ -526,7 +526,7 @@ workflows: requires: - librem_14 - # t480 is based on 24.12 coreboot release, not sharing any buildstack from now, depend on muscl-cross cache + # t480 is based on 25.09 coreboot release, not sharing any buildstack from now, depend on muscl-cross cache - build: name: EOL_t480-maximized target: EOL_t480-maximized diff --git a/blobs/xx80/README.md b/blobs/xx80/README.md index e081c276b..486e8a531 100644 --- a/blobs/xx80/README.md +++ b/blobs/xx80/README.md @@ -31,7 +31,7 @@ The GBE MAC address was forged to: `00:DE:AD:C0:FF:EE MAC` ## tb.bin This blob was extracted from https://download.lenovo.com/pccbbs/mobiles/n24th13w.exe -It is zero-padded to 1MB and should be flashed to the Thunderbolt SPI chip, which is not the same as the 16MB chip to which the heads rom is flashed. External flashing is recommended as the only way to reliably fix a bug in the original Thunderbolt software on the SPI chip. You can find a guide here: https://osresearch.net/T430-maximized-flashing/ +It is zero-padded to 1MB and should be flashed to the Thunderbolt SPI chip, which is not the same as the 16MB chip to which the heads rom is flashed. External flashing is recommended as the only way to reliably fix a bug in the original Thunderbolt software on the SPI chip. You can find a guide here: https://osresearch.net/T480-maximized-flashing/ ## Integrity @@ -50,4 +50,6 @@ See the board configs `boards/t480-[hotp-]maximized/t480-[hotp-]maximized.config # Documentation A guide on how to flash this board (both the Heads rom and the Thunderbolt `tb.bin` blob) can be found here: -https://osresearch.net/T430-maximized-flashing/ \ No newline at end of file +https://osresearch.net/T480-maximized-flashing/ + +The upstream documentation is available here. It includes a list of known issues: https://doc.coreboot.org/mainboard/lenovo/t480.html \ No newline at end of file diff --git a/boards/EOL_UNTESTED_t440p-hotp-maximized/EOL_UNTESTED_t440p-hotp-maximized.config b/boards/EOL_UNTESTED_t440p-hotp-maximized/EOL_UNTESTED_t440p-hotp-maximized.config index 5eff1a9cf..7350904c2 100644 --- a/boards/EOL_UNTESTED_t440p-hotp-maximized/EOL_UNTESTED_t440p-hotp-maximized.config +++ b/boards/EOL_UNTESTED_t440p-hotp-maximized/EOL_UNTESTED_t440p-hotp-maximized.config @@ -5,7 +5,7 @@ CONFIG_COREBOOT_CONFIG=config/coreboot-t440p.config CONFIG_LINUX_CONFIG=config/linux-t440p.config export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_CRYPTSETUP2=y diff --git a/boards/EOL_UNTESTED_t440p-maximized/EOL_UNTESTED_t440p-maximized.config b/boards/EOL_UNTESTED_t440p-maximized/EOL_UNTESTED_t440p-maximized.config index 5fd3a2ce7..0566a1332 100644 --- a/boards/EOL_UNTESTED_t440p-maximized/EOL_UNTESTED_t440p-maximized.config +++ b/boards/EOL_UNTESTED_t440p-maximized/EOL_UNTESTED_t440p-maximized.config @@ -5,7 +5,7 @@ CONFIG_COREBOOT_CONFIG=config/coreboot-t440p.config CONFIG_LINUX_CONFIG=config/linux-t440p.config export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_CRYPTSETUP2=y diff --git a/boards/EOL_UNTESTED_t530-hotp-maximized/EOL_UNTESTED_t530-hotp-maximized.config b/boards/EOL_UNTESTED_t530-hotp-maximized/EOL_UNTESTED_t530-hotp-maximized.config index e2c30d1ee..6d181b14f 100644 --- a/boards/EOL_UNTESTED_t530-hotp-maximized/EOL_UNTESTED_t530-hotp-maximized.config +++ b/boards/EOL_UNTESTED_t530-hotp-maximized/EOL_UNTESTED_t530-hotp-maximized.config @@ -9,7 +9,7 @@ # - Includes Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) # This board is designed for a t530 without a dGPU. It will work just fine for a board with a dGPU, except you will not be able to use an external monitor via the mini-displayport or the dock's displayport, though external monitors will work via VGA ports. To initialize the dGPU please use one of the dgpu boards. export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-t530-maximized.config diff --git a/boards/EOL_UNTESTED_t530-maximized/EOL_UNTESTED_t530-maximized.config b/boards/EOL_UNTESTED_t530-maximized/EOL_UNTESTED_t530-maximized.config index 6569574d4..ee1ee88f9 100644 --- a/boards/EOL_UNTESTED_t530-maximized/EOL_UNTESTED_t530-maximized.config +++ b/boards/EOL_UNTESTED_t530-maximized/EOL_UNTESTED_t530-maximized.config @@ -9,7 +9,7 @@ # - Includes Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) # This board is designed for a t530 without a dGPU. It will work just fine for a board with a dGPU, except you will not be able to use an external monitor via the mini-displayport or the dock's displayport, though external monitors will work via VGA ports. To initialize the dGPU please use one of the dgpu boards. export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-t530-maximized.config diff --git a/boards/EOL_UNTESTED_w541-hotp-maximized/EOL_UNTESTED_w541-hotp-maximized.config b/boards/EOL_UNTESTED_w541-hotp-maximized/EOL_UNTESTED_w541-hotp-maximized.config index 71c123772..fddd14818 100644 --- a/boards/EOL_UNTESTED_w541-hotp-maximized/EOL_UNTESTED_w541-hotp-maximized.config +++ b/boards/EOL_UNTESTED_w541-hotp-maximized/EOL_UNTESTED_w541-hotp-maximized.config @@ -5,7 +5,7 @@ CONFIG_COREBOOT_CONFIG=config/coreboot-w541.config CONFIG_LINUX_CONFIG=config/linux-w541.config export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_CRYPTSETUP2=y diff --git a/boards/EOL_UNTESTED_w541-maximized/EOL_UNTESTED_w541-maximized.config b/boards/EOL_UNTESTED_w541-maximized/EOL_UNTESTED_w541-maximized.config index bd6d11735..284380e05 100644 --- a/boards/EOL_UNTESTED_w541-maximized/EOL_UNTESTED_w541-maximized.config +++ b/boards/EOL_UNTESTED_w541-maximized/EOL_UNTESTED_w541-maximized.config @@ -5,7 +5,7 @@ CONFIG_COREBOOT_CONFIG=config/coreboot-w541.config CONFIG_LINUX_CONFIG=config/linux-w541.config export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_CRYPTSETUP2=y diff --git a/boards/EOL_UNTESTED_z220-cmt-hotp-maximized/EOL_UNTESTED_z220-cmt-hotp-maximized.config b/boards/EOL_UNTESTED_z220-cmt-hotp-maximized/EOL_UNTESTED_z220-cmt-hotp-maximized.config index a3f3b8f3c..533c51148 100644 --- a/boards/EOL_UNTESTED_z220-cmt-hotp-maximized/EOL_UNTESTED_z220-cmt-hotp-maximized.config +++ b/boards/EOL_UNTESTED_z220-cmt-hotp-maximized/EOL_UNTESTED_z220-cmt-hotp-maximized.config @@ -26,7 +26,7 @@ CONFIG_LINUX_CONFIG=config/linux-c216.config CONFIG_COREBOOT_CONFIG=config/coreboot-z220-cmt.config export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_CRYPTSETUP2=y diff --git a/boards/EOL_UNTESTED_z220-cmt-maximized/EOL_UNTESTED_z220-cmt-maximized.config b/boards/EOL_UNTESTED_z220-cmt-maximized/EOL_UNTESTED_z220-cmt-maximized.config index 1aaf80af1..8d24062e2 100644 --- a/boards/EOL_UNTESTED_z220-cmt-maximized/EOL_UNTESTED_z220-cmt-maximized.config +++ b/boards/EOL_UNTESTED_z220-cmt-maximized/EOL_UNTESTED_z220-cmt-maximized.config @@ -26,7 +26,7 @@ CONFIG_LINUX_CONFIG=config/linux-c216.config CONFIG_COREBOOT_CONFIG=config/coreboot-z220-cmt.config export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_CRYPTSETUP2=y diff --git a/boards/EOL_optiplex-7010_9010-hotp-maximized/EOL_optiplex-7010_9010-hotp-maximized.config b/boards/EOL_optiplex-7010_9010-hotp-maximized/EOL_optiplex-7010_9010-hotp-maximized.config index c2cfb00e4..144cf8d1f 100644 --- a/boards/EOL_optiplex-7010_9010-hotp-maximized/EOL_optiplex-7010_9010-hotp-maximized.config +++ b/boards/EOL_optiplex-7010_9010-hotp-maximized/EOL_optiplex-7010_9010-hotp-maximized.config @@ -8,7 +8,7 @@ # # - Includes: Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-optiplex-7019_9010-maximized.config diff --git a/boards/EOL_optiplex-7010_9010-maximized/EOL_optiplex-7010_9010-maximized.config b/boards/EOL_optiplex-7010_9010-maximized/EOL_optiplex-7010_9010-maximized.config index 866282350..c79999e02 100644 --- a/boards/EOL_optiplex-7010_9010-maximized/EOL_optiplex-7010_9010-maximized.config +++ b/boards/EOL_optiplex-7010_9010-maximized/EOL_optiplex-7010_9010-maximized.config @@ -8,7 +8,7 @@ # # - DOES NOT INCLUDE Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-optiplex-7019_9010-maximized.config diff --git a/boards/EOL_optiplex-7010_9010_TXT-hotp-maximized/EOL_optiplex-7010_9010_TXT-hotp-maximized.config b/boards/EOL_optiplex-7010_9010_TXT-hotp-maximized/EOL_optiplex-7010_9010_TXT-hotp-maximized.config index 67d904af2..1cd717725 100644 --- a/boards/EOL_optiplex-7010_9010_TXT-hotp-maximized/EOL_optiplex-7010_9010_TXT-hotp-maximized.config +++ b/boards/EOL_optiplex-7010_9010_TXT-hotp-maximized/EOL_optiplex-7010_9010_TXT-hotp-maximized.config @@ -8,7 +8,7 @@ # # - Includes: Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-optiplex-7019_9010_TXT-maximized.config diff --git a/boards/EOL_optiplex-7010_9010_TXT-maximized/EOL_optiplex-7010_9010_TXT-maximized.config b/boards/EOL_optiplex-7010_9010_TXT-maximized/EOL_optiplex-7010_9010_TXT-maximized.config index 300cf8476..1d7f08878 100644 --- a/boards/EOL_optiplex-7010_9010_TXT-maximized/EOL_optiplex-7010_9010_TXT-maximized.config +++ b/boards/EOL_optiplex-7010_9010_TXT-maximized/EOL_optiplex-7010_9010_TXT-maximized.config @@ -8,7 +8,7 @@ # # - DOES NOT INCLUDE Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-optiplex-7019_9010_TXT-maximized.config diff --git a/boards/EOL_t420-hotp-maximized/EOL_t420-hotp-maximized.config b/boards/EOL_t420-hotp-maximized/EOL_t420-hotp-maximized.config index 8655475e5..d7b7bd827 100644 --- a/boards/EOL_t420-hotp-maximized/EOL_t420-hotp-maximized.config +++ b/boards/EOL_t420-hotp-maximized/EOL_t420-hotp-maximized.config @@ -10,7 +10,7 @@ # - dropbear export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-t420-maximized.config diff --git a/boards/EOL_t420-maximized/EOL_t420-maximized.config b/boards/EOL_t420-maximized/EOL_t420-maximized.config index 9f8f247c2..267d0ebe0 100644 --- a/boards/EOL_t420-maximized/EOL_t420-maximized.config +++ b/boards/EOL_t420-maximized/EOL_t420-maximized.config @@ -9,7 +9,7 @@ # Doesn't include (to fit in 7mb image) # - dropbear export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-t420-maximized.config diff --git a/boards/EOL_t430-hotp-maximized/EOL_t430-hotp-maximized.config b/boards/EOL_t430-hotp-maximized/EOL_t430-hotp-maximized.config index f431ddfe8..96b64d526 100644 --- a/boards/EOL_t430-hotp-maximized/EOL_t430-hotp-maximized.config +++ b/boards/EOL_t430-hotp-maximized/EOL_t430-hotp-maximized.config @@ -8,7 +8,7 @@ # # - Includes Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-t430-maximized.config diff --git a/boards/EOL_t430-maximized/EOL_t430-maximized.config b/boards/EOL_t430-maximized/EOL_t430-maximized.config index 02207e6b8..3cb5d5707 100644 --- a/boards/EOL_t430-maximized/EOL_t430-maximized.config +++ b/boards/EOL_t430-maximized/EOL_t430-maximized.config @@ -8,7 +8,7 @@ # # - DOES NOT INCLUDE Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-t430-maximized.config diff --git a/boards/EOL_t480-hotp-maximized/EOL_t480-hotp-maximized.config b/boards/EOL_t480-hotp-maximized/EOL_t480-hotp-maximized.config index 725beee9b..8c27cf08d 100644 --- a/boards/EOL_t480-hotp-maximized/EOL_t480-hotp-maximized.config +++ b/boards/EOL_t480-hotp-maximized/EOL_t480-hotp-maximized.config @@ -16,12 +16,12 @@ # - It is zero-padded to 1MB and should be flashed to the Thunderbolt SPI chip, # which is not the same as the 16MB chip to which the heads rom is flashed. # External flashing is recommended as the only way to reliably fix a bug in the original Thunderbolt software on the SPI chip. -# You can find a guide here: https://osresearch.net/T430-maximized-flashing/ +# You can find a guide here: https://osresearch.net/T480-maximized-flashing/ # # - Includes Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-t480-maximized.config diff --git a/boards/EOL_t480-maximized/EOL_t480-maximized.config b/boards/EOL_t480-maximized/EOL_t480-maximized.config index 6c94f5850..602af39cc 100644 --- a/boards/EOL_t480-maximized/EOL_t480-maximized.config +++ b/boards/EOL_t480-maximized/EOL_t480-maximized.config @@ -16,12 +16,12 @@ # - It is zero-padded to 1MB and should be flashed to the Thunderbolt SPI chip, # which is not the same as the 16MB chip to which the heads rom is flashed. # External flashing is recommended as the only way to reliably fix a bug in the original Thunderbolt software on the SPI chip. -# You can find a guide here: https://osresearch.net/T430-maximized-flashing/ +# You can find a guide here: https://osresearch.net/T480-maximized-flashing/ # # - DOES NOT INCLUDE Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-t480-maximized.config diff --git a/boards/EOL_w530-hotp-maximized/EOL_w530-hotp-maximized.config b/boards/EOL_w530-hotp-maximized/EOL_w530-hotp-maximized.config index 5bf19acae..984e1176d 100644 --- a/boards/EOL_w530-hotp-maximized/EOL_w530-hotp-maximized.config +++ b/boards/EOL_w530-hotp-maximized/EOL_w530-hotp-maximized.config @@ -9,7 +9,7 @@ # - Includes Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) # This board ignores the in-built dGPU that comes with all w530's. In doing so the dGPU will not be initialized. This has some benefits in terms of reduced complexity in working with OS's with poor support for NVIDIA, better battery life and lower heat (making use of the thicker heatsink from a dGPU). Conversely, if you do not initialize the dGPU you will be unable to use an external monitor. To initialize the dGPU please use the dGPU boards that corresponds with the model of dGPU included with your device. export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-w530-maximized.config diff --git a/boards/EOL_w530-maximized/EOL_w530-maximized.config b/boards/EOL_w530-maximized/EOL_w530-maximized.config index d4b5aea3b..15fcd4d18 100644 --- a/boards/EOL_w530-maximized/EOL_w530-maximized.config +++ b/boards/EOL_w530-maximized/EOL_w530-maximized.config @@ -9,7 +9,7 @@ # - Includes Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) # This board ignores the in-built dGPU that comes with all w530's. In doing so the dGPU will not be initialized. This has some benefits in terms of reduced complexity in working with OS's with poor support for NVIDIA, better battery life and lower heat (making use of the thicker heatsink from a dGPU). Conversely, if you do not initialize the dGPU you will be unable to use an external monitor. To initialize the dGPU please use the dGPU boards that corresponds with the model of dGPU included with your device. export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-w530-maximized.config diff --git a/boards/EOL_x220-hotp-maximized/EOL_x220-hotp-maximized.config b/boards/EOL_x220-hotp-maximized/EOL_x220-hotp-maximized.config index e2d5ba7ab..78c4e7935 100644 --- a/boards/EOL_x220-hotp-maximized/EOL_x220-hotp-maximized.config +++ b/boards/EOL_x220-hotp-maximized/EOL_x220-hotp-maximized.config @@ -10,7 +10,7 @@ # - dropbear export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-x220-maximized.config diff --git a/boards/EOL_x220-maximized/EOL_x220-maximized.config b/boards/EOL_x220-maximized/EOL_x220-maximized.config index d25099cc8..f156f70e5 100644 --- a/boards/EOL_x220-maximized/EOL_x220-maximized.config +++ b/boards/EOL_x220-maximized/EOL_x220-maximized.config @@ -10,7 +10,7 @@ # - dropbear export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-x220-maximized.config diff --git a/boards/EOL_x230-hotp-maximized-fhd_edp/EOL_x230-hotp-maximized-fhd_edp.config b/boards/EOL_x230-hotp-maximized-fhd_edp/EOL_x230-hotp-maximized-fhd_edp.config index b43cdc086..af21cb0d2 100644 --- a/boards/EOL_x230-hotp-maximized-fhd_edp/EOL_x230-hotp-maximized-fhd_edp.config +++ b/boards/EOL_x230-hotp-maximized-fhd_edp/EOL_x230-hotp-maximized-fhd_edp.config @@ -20,7 +20,7 @@ # # - Includes: Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-x230-maximized-fhd_edp.config diff --git a/boards/EOL_x230-hotp-maximized/EOL_x230-hotp-maximized.config b/boards/EOL_x230-hotp-maximized/EOL_x230-hotp-maximized.config index fc9da7e85..4dbb958b2 100644 --- a/boards/EOL_x230-hotp-maximized/EOL_x230-hotp-maximized.config +++ b/boards/EOL_x230-hotp-maximized/EOL_x230-hotp-maximized.config @@ -8,7 +8,7 @@ # # - Includes: Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-x230-maximized.config diff --git a/boards/EOL_x230-hotp-maximized_usb-kb/EOL_x230-hotp-maximized_usb-kb.config b/boards/EOL_x230-hotp-maximized_usb-kb/EOL_x230-hotp-maximized_usb-kb.config index 08f87fd68..f4e3fa5de 100644 --- a/boards/EOL_x230-hotp-maximized_usb-kb/EOL_x230-hotp-maximized_usb-kb.config +++ b/boards/EOL_x230-hotp-maximized_usb-kb/EOL_x230-hotp-maximized_usb-kb.config @@ -10,7 +10,7 @@ # Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) # USB Keyboard support export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-x230-maximized.config diff --git a/boards/EOL_x230-maximized-fhd_edp/EOL_x230-maximized-fhd_edp.config b/boards/EOL_x230-maximized-fhd_edp/EOL_x230-maximized-fhd_edp.config index ca604af0c..df4f45a8a 100644 --- a/boards/EOL_x230-maximized-fhd_edp/EOL_x230-maximized-fhd_edp.config +++ b/boards/EOL_x230-maximized-fhd_edp/EOL_x230-maximized-fhd_edp.config @@ -20,7 +20,7 @@ # # - DOES NOT INCLUDE Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-x230-maximized-fhd_edp.config diff --git a/boards/EOL_x230-maximized/EOL_x230-maximized.config b/boards/EOL_x230-maximized/EOL_x230-maximized.config index 8b5916e40..b64af87ce 100644 --- a/boards/EOL_x230-maximized/EOL_x230-maximized.config +++ b/boards/EOL_x230-maximized/EOL_x230-maximized.config @@ -8,7 +8,7 @@ # # - DOES NOT INCLUDE Nitrokey/Librem Key HOTP Security dongle remote attestation (in addition to TOTP remote attestation through Qr Code) export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-x230-maximized.config diff --git a/boards/qemu-coreboot-fbwhiptail-tpm1-hotp-prod/qemu-coreboot-fbwhiptail-tpm1-hotp-prod.config b/boards/qemu-coreboot-fbwhiptail-tpm1-hotp-prod/qemu-coreboot-fbwhiptail-tpm1-hotp-prod.config index 23ea2052a..01873d98e 100644 --- a/boards/qemu-coreboot-fbwhiptail-tpm1-hotp-prod/qemu-coreboot-fbwhiptail-tpm1-hotp-prod.config +++ b/boards/qemu-coreboot-fbwhiptail-tpm1-hotp-prod/qemu-coreboot-fbwhiptail-tpm1-hotp-prod.config @@ -5,7 +5,7 @@ # Nitrokey Pro can also be used by forwarding the USB device from the host to # the VM. export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm1-prod.config diff --git a/boards/qemu-coreboot-fbwhiptail-tpm1-hotp-prod_quiet/qemu-coreboot-fbwhiptail-tpm1-hotp-prod_quiet.config b/boards/qemu-coreboot-fbwhiptail-tpm1-hotp-prod_quiet/qemu-coreboot-fbwhiptail-tpm1-hotp-prod_quiet.config index d9810e76e..28e96d0d3 100644 --- a/boards/qemu-coreboot-fbwhiptail-tpm1-hotp-prod_quiet/qemu-coreboot-fbwhiptail-tpm1-hotp-prod_quiet.config +++ b/boards/qemu-coreboot-fbwhiptail-tpm1-hotp-prod_quiet/qemu-coreboot-fbwhiptail-tpm1-hotp-prod_quiet.config @@ -5,7 +5,7 @@ # Nitrokey Pro can also be used by forwarding the USB device from the host to # the VM. export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm1-prod.config diff --git a/boards/qemu-coreboot-fbwhiptail-tpm1-hotp/qemu-coreboot-fbwhiptail-tpm1-hotp.config b/boards/qemu-coreboot-fbwhiptail-tpm1-hotp/qemu-coreboot-fbwhiptail-tpm1-hotp.config index 09e33dff2..29e360895 100644 --- a/boards/qemu-coreboot-fbwhiptail-tpm1-hotp/qemu-coreboot-fbwhiptail-tpm1-hotp.config +++ b/boards/qemu-coreboot-fbwhiptail-tpm1-hotp/qemu-coreboot-fbwhiptail-tpm1-hotp.config @@ -5,7 +5,7 @@ # Nitrokey Pro can also be used by forwarding the USB device from the host to # the VM. export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm1.config diff --git a/boards/qemu-coreboot-fbwhiptail-tpm1-prod/qemu-coreboot-fbwhiptail-tpm1-prod.config b/boards/qemu-coreboot-fbwhiptail-tpm1-prod/qemu-coreboot-fbwhiptail-tpm1-prod.config index 15f9352f8..99748401f 100644 --- a/boards/qemu-coreboot-fbwhiptail-tpm1-prod/qemu-coreboot-fbwhiptail-tpm1-prod.config +++ b/boards/qemu-coreboot-fbwhiptail-tpm1-prod/qemu-coreboot-fbwhiptail-tpm1-prod.config @@ -3,7 +3,7 @@ # # TPM can be used with a qemu software TPM (TIS, 1.2). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm1-prod.config diff --git a/boards/qemu-coreboot-fbwhiptail-tpm1/qemu-coreboot-fbwhiptail-tpm1.config b/boards/qemu-coreboot-fbwhiptail-tpm1/qemu-coreboot-fbwhiptail-tpm1.config index 884846e6a..a74402033 100644 --- a/boards/qemu-coreboot-fbwhiptail-tpm1/qemu-coreboot-fbwhiptail-tpm1.config +++ b/boards/qemu-coreboot-fbwhiptail-tpm1/qemu-coreboot-fbwhiptail-tpm1.config @@ -3,7 +3,7 @@ # # TPM can be used with a qemu software TPM (TIS, 1.2). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm1.config diff --git a/boards/qemu-coreboot-fbwhiptail-tpm2-hotp-prod/qemu-coreboot-fbwhiptail-tpm2-hotp-prod.config b/boards/qemu-coreboot-fbwhiptail-tpm2-hotp-prod/qemu-coreboot-fbwhiptail-tpm2-hotp-prod.config index d13065e18..2880edef0 100644 --- a/boards/qemu-coreboot-fbwhiptail-tpm2-hotp-prod/qemu-coreboot-fbwhiptail-tpm2-hotp-prod.config +++ b/boards/qemu-coreboot-fbwhiptail-tpm2-hotp-prod/qemu-coreboot-fbwhiptail-tpm2-hotp-prod.config @@ -4,7 +4,7 @@ # # TPM can be used with a qemu software TPM (TIS, 2.0). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm2-prod.config diff --git a/boards/qemu-coreboot-fbwhiptail-tpm2-hotp-prod_quiet/qemu-coreboot-fbwhiptail-tpm2-hotp-prod_quiet.config b/boards/qemu-coreboot-fbwhiptail-tpm2-hotp-prod_quiet/qemu-coreboot-fbwhiptail-tpm2-hotp-prod_quiet.config index 79eeb57f8..08026e5dd 100644 --- a/boards/qemu-coreboot-fbwhiptail-tpm2-hotp-prod_quiet/qemu-coreboot-fbwhiptail-tpm2-hotp-prod_quiet.config +++ b/boards/qemu-coreboot-fbwhiptail-tpm2-hotp-prod_quiet/qemu-coreboot-fbwhiptail-tpm2-hotp-prod_quiet.config @@ -4,7 +4,7 @@ # # TPM can be used with a qemu software TPM (TIS, 2.0). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm2-prod.config diff --git a/boards/qemu-coreboot-fbwhiptail-tpm2-hotp/qemu-coreboot-fbwhiptail-tpm2-hotp.config b/boards/qemu-coreboot-fbwhiptail-tpm2-hotp/qemu-coreboot-fbwhiptail-tpm2-hotp.config index 596027dca..f53968267 100644 --- a/boards/qemu-coreboot-fbwhiptail-tpm2-hotp/qemu-coreboot-fbwhiptail-tpm2-hotp.config +++ b/boards/qemu-coreboot-fbwhiptail-tpm2-hotp/qemu-coreboot-fbwhiptail-tpm2-hotp.config @@ -4,7 +4,7 @@ # # TPM can be used with a qemu software TPM (TIS, 2.0). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm2.config diff --git a/boards/qemu-coreboot-fbwhiptail-tpm2-prod/qemu-coreboot-fbwhiptail-tpm2-prod.config b/boards/qemu-coreboot-fbwhiptail-tpm2-prod/qemu-coreboot-fbwhiptail-tpm2-prod.config index 8b391bbe9..225816b94 100644 --- a/boards/qemu-coreboot-fbwhiptail-tpm2-prod/qemu-coreboot-fbwhiptail-tpm2-prod.config +++ b/boards/qemu-coreboot-fbwhiptail-tpm2-prod/qemu-coreboot-fbwhiptail-tpm2-prod.config @@ -3,7 +3,7 @@ # # TPM can be used with a qemu software TPM (TIS, 2.0). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm2-prod.config diff --git a/boards/qemu-coreboot-fbwhiptail-tpm2/qemu-coreboot-fbwhiptail-tpm2.config b/boards/qemu-coreboot-fbwhiptail-tpm2/qemu-coreboot-fbwhiptail-tpm2.config index 4f3ef49e3..c4839b6b1 100644 --- a/boards/qemu-coreboot-fbwhiptail-tpm2/qemu-coreboot-fbwhiptail-tpm2.config +++ b/boards/qemu-coreboot-fbwhiptail-tpm2/qemu-coreboot-fbwhiptail-tpm2.config @@ -3,7 +3,7 @@ # # TPM can be used with a qemu software TPM (TIS, 2.0). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm2.config diff --git a/boards/qemu-coreboot-whiptail-tpm1-hotp-prod/qemu-coreboot-whiptail-tpm1-hotp-prod.config b/boards/qemu-coreboot-whiptail-tpm1-hotp-prod/qemu-coreboot-whiptail-tpm1-hotp-prod.config index cd1a29767..fe1723d42 100644 --- a/boards/qemu-coreboot-whiptail-tpm1-hotp-prod/qemu-coreboot-whiptail-tpm1-hotp-prod.config +++ b/boards/qemu-coreboot-whiptail-tpm1-hotp-prod/qemu-coreboot-whiptail-tpm1-hotp-prod.config @@ -5,7 +5,7 @@ # Nitrokey Pro can also be used by forwarding the USB device from the host to # the VM. export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm1-prod.config diff --git a/boards/qemu-coreboot-whiptail-tpm1-hotp/qemu-coreboot-whiptail-tpm1-hotp.config b/boards/qemu-coreboot-whiptail-tpm1-hotp/qemu-coreboot-whiptail-tpm1-hotp.config index bdfdd2469..f0282194e 100644 --- a/boards/qemu-coreboot-whiptail-tpm1-hotp/qemu-coreboot-whiptail-tpm1-hotp.config +++ b/boards/qemu-coreboot-whiptail-tpm1-hotp/qemu-coreboot-whiptail-tpm1-hotp.config @@ -5,7 +5,7 @@ # Nitrokey Pro can also be used by forwarding the USB device from the host to # the VM. export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm1.config diff --git a/boards/qemu-coreboot-whiptail-tpm1-prod/qemu-coreboot-whiptail-tpm1-prod.config b/boards/qemu-coreboot-whiptail-tpm1-prod/qemu-coreboot-whiptail-tpm1-prod.config index 6964ff073..8e9684eaa 100644 --- a/boards/qemu-coreboot-whiptail-tpm1-prod/qemu-coreboot-whiptail-tpm1-prod.config +++ b/boards/qemu-coreboot-whiptail-tpm1-prod/qemu-coreboot-whiptail-tpm1-prod.config @@ -3,7 +3,7 @@ # # TPM can be used with a qemu software TPM (TIS, 1.2). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm1-prod.config diff --git a/boards/qemu-coreboot-whiptail-tpm1/qemu-coreboot-whiptail-tpm1.config b/boards/qemu-coreboot-whiptail-tpm1/qemu-coreboot-whiptail-tpm1.config index 7e2445331..edf85f21c 100644 --- a/boards/qemu-coreboot-whiptail-tpm1/qemu-coreboot-whiptail-tpm1.config +++ b/boards/qemu-coreboot-whiptail-tpm1/qemu-coreboot-whiptail-tpm1.config @@ -3,7 +3,7 @@ # # TPM can be used with a qemu software TPM (TIS, 1.2). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm1.config diff --git a/boards/qemu-coreboot-whiptail-tpm2-hotp-prod/qemu-coreboot-whiptail-tpm2-hotp-prod.config b/boards/qemu-coreboot-whiptail-tpm2-hotp-prod/qemu-coreboot-whiptail-tpm2-hotp-prod.config index 3a01257b4..48ee05d86 100644 --- a/boards/qemu-coreboot-whiptail-tpm2-hotp-prod/qemu-coreboot-whiptail-tpm2-hotp-prod.config +++ b/boards/qemu-coreboot-whiptail-tpm2-hotp-prod/qemu-coreboot-whiptail-tpm2-hotp-prod.config @@ -4,7 +4,7 @@ # # TPM can be used with a qemu software TPM (TIS, 2.0). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm2-prod.config diff --git a/boards/qemu-coreboot-whiptail-tpm2-hotp/qemu-coreboot-whiptail-tpm2-hotp.config b/boards/qemu-coreboot-whiptail-tpm2-hotp/qemu-coreboot-whiptail-tpm2-hotp.config index 2d5a23708..465b9decc 100644 --- a/boards/qemu-coreboot-whiptail-tpm2-hotp/qemu-coreboot-whiptail-tpm2-hotp.config +++ b/boards/qemu-coreboot-whiptail-tpm2-hotp/qemu-coreboot-whiptail-tpm2-hotp.config @@ -4,7 +4,7 @@ # # TPM can be used with a qemu software TPM (TIS, 2.0). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm2.config diff --git a/boards/qemu-coreboot-whiptail-tpm2-prod/qemu-coreboot-whiptail-tpm2-prod.config b/boards/qemu-coreboot-whiptail-tpm2-prod/qemu-coreboot-whiptail-tpm2-prod.config index 8325b46ac..1ab354e45 100644 --- a/boards/qemu-coreboot-whiptail-tpm2-prod/qemu-coreboot-whiptail-tpm2-prod.config +++ b/boards/qemu-coreboot-whiptail-tpm2-prod/qemu-coreboot-whiptail-tpm2-prod.config @@ -3,7 +3,7 @@ # # TPM can be used with a qemu software TPM (TIS, 2.0). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm2-prod.config diff --git a/boards/qemu-coreboot-whiptail-tpm2/qemu-coreboot-whiptail-tpm2.config b/boards/qemu-coreboot-whiptail-tpm2/qemu-coreboot-whiptail-tpm2.config index faf19d40b..37be676db 100644 --- a/boards/qemu-coreboot-whiptail-tpm2/qemu-coreboot-whiptail-tpm2.config +++ b/boards/qemu-coreboot-whiptail-tpm2/qemu-coreboot-whiptail-tpm2.config @@ -3,7 +3,7 @@ # # TPM can be used with a qemu software TPM (TIS, 2.0). export CONFIG_COREBOOT=y -export CONFIG_COREBOOT_VERSION=24.12 +export CONFIG_COREBOOT_VERSION=25.09 export CONFIG_LINUX_VERSION=6.1.8 CONFIG_COREBOOT_CONFIG=config/coreboot-qemu-tpm2.config diff --git a/config/coreboot-optiplex-7019_9010-maximized.config b/config/coreboot-optiplex-7019_9010-maximized.config index e19295b15..753a4f036 100644 --- a/config/coreboot-optiplex-7019_9010-maximized.config +++ b/config/coreboot-optiplex-7019_9010-maximized.config @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -93,6 +94,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -152,9 +154,9 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR) CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 9010" # CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 # CONFIG_BOARD_DELL_E6400 is not set @@ -254,8 +256,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 -# CONFIG_USE_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 @@ -275,8 +278,11 @@ CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -394,7 +400,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -454,13 +459,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -CONFIG_USE_DDR3=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -486,6 +493,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -541,6 +549,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM1=y # CONFIG_TPM_LOG_TPM2 is not set @@ -646,6 +655,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -703,9 +715,17 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-optiplex-7019_9010_TXT-maximized.config b/config/coreboot-optiplex-7019_9010_TXT-maximized.config index 79d2bd4da..bc35d35a3 100644 --- a/config/coreboot-optiplex-7019_9010_TXT-maximized.config +++ b/config/coreboot-optiplex-7019_9010_TXT-maximized.config @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -93,6 +94,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -152,9 +154,9 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR) CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 9010" # CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 # CONFIG_BOARD_DELL_E6400 is not set @@ -254,8 +256,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 -# CONFIG_USE_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 @@ -276,10 +279,13 @@ CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x20000 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_INTEL_TXT_SINIT_SIZE=0x20000 CONFIG_INTEL_TXT_HEAP_SIZE=0xe0000 CONFIG_FIXED_SMBUS_IO_BASE=0x400 -CONFIG_CBFS_CACHE_ALIGN=8 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -398,7 +404,6 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_AP_IN_SIPI_WAIT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -458,13 +463,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -CONFIG_USE_DDR3=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y @@ -489,6 +496,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -544,6 +552,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM1=y # CONFIG_TPM_LOG_TPM2 is not set @@ -660,6 +669,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -717,9 +729,17 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-qemu-tpm1-prod.config b/config/coreboot-qemu-tpm1-prod.config index 0742355a1..ead412d29 100644 --- a/config/coreboot-qemu-tpm1-prod.config +++ b/config/coreboot-qemu-tpm1-prod.config @@ -18,6 +18,7 @@ CONFIG_CCACHE=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -93,6 +94,7 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -148,9 +150,9 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86 q35/ich9" # CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_TPM_PIRQ=0x0 # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set @@ -224,6 +226,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 CONFIG_EHCI_BAR=0xfef00000 @@ -238,8 +241,11 @@ CONFIG_HPET_MIN_TICKS=0x80 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -315,7 +321,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -381,6 +386,8 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set # CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set @@ -396,6 +403,7 @@ CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y CONFIG_DRIVERS_EMULATION_QEMU_XRES=1024 CONFIG_DRIVERS_EMULATION_QEMU_YRES=768 +CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG=y # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -533,6 +541,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -581,9 +592,17 @@ CONFIG_HAVE_DEBUG_SMBUS=y CONFIG_DECOMPRESS_OFAST=y CONFIG_PROBE_RAM=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-qemu-tpm1.config b/config/coreboot-qemu-tpm1.config index 695e4eb4e..3431e265d 100644 --- a/config/coreboot-qemu-tpm1.config +++ b/config/coreboot-qemu-tpm1.config @@ -18,6 +18,7 @@ CONFIG_CCACHE=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -93,6 +94,7 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -148,9 +150,9 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86 q35/ich9" # CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_TPM_PIRQ=0x0 # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set @@ -224,6 +226,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 CONFIG_EHCI_BAR=0xfef00000 @@ -238,8 +241,11 @@ CONFIG_HPET_MIN_TICKS=0x80 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -315,7 +321,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -381,6 +386,8 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set # CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set @@ -396,6 +403,7 @@ CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y CONFIG_DRIVERS_EMULATION_QEMU_XRES=1024 CONFIG_DRIVERS_EMULATION_QEMU_YRES=768 +CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG=y # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -533,6 +541,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -581,9 +592,17 @@ CONFIG_HAVE_DEBUG_SMBUS=y CONFIG_DECOMPRESS_OFAST=y CONFIG_PROBE_RAM=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-qemu-tpm2-prod.config b/config/coreboot-qemu-tpm2-prod.config index c4b06ec5e..34fd4b6f7 100644 --- a/config/coreboot-qemu-tpm2-prod.config +++ b/config/coreboot-qemu-tpm2-prod.config @@ -18,6 +18,7 @@ CONFIG_CCACHE=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -93,6 +94,7 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -148,9 +150,9 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86 q35/ich9" # CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_TPM_PIRQ=0x0 # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set @@ -221,6 +223,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 CONFIG_EHCI_BAR=0xfef00000 @@ -235,8 +238,11 @@ CONFIG_HPET_MIN_TICKS=0x80 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -312,7 +318,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -375,6 +380,8 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set # CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set @@ -390,6 +397,7 @@ CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y CONFIG_DRIVERS_EMULATION_QEMU_XRES=1024 CONFIG_DRIVERS_EMULATION_QEMU_YRES=768 +CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG=y # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -525,6 +533,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -573,9 +584,17 @@ CONFIG_HAVE_DEBUG_SMBUS=y CONFIG_DECOMPRESS_OFAST=y CONFIG_PROBE_RAM=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-qemu-tpm2.config b/config/coreboot-qemu-tpm2.config index bb42ba01a..ba4d0c0cc 100644 --- a/config/coreboot-qemu-tpm2.config +++ b/config/coreboot-qemu-tpm2.config @@ -18,6 +18,7 @@ CONFIG_CCACHE=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -93,6 +94,7 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -148,9 +150,9 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86 q35/ich9" # CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_TPM_PIRQ=0x0 # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set @@ -221,6 +223,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 CONFIG_EHCI_BAR=0xfef00000 @@ -235,8 +238,11 @@ CONFIG_HPET_MIN_TICKS=0x80 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -312,7 +318,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -375,6 +380,8 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set # CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set @@ -390,6 +397,7 @@ CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y CONFIG_DRIVERS_EMULATION_QEMU_XRES=1024 CONFIG_DRIVERS_EMULATION_QEMU_YRES=768 +CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG=y # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -525,6 +533,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -573,9 +584,17 @@ CONFIG_HAVE_DEBUG_SMBUS=y CONFIG_DECOMPRESS_OFAST=y CONFIG_PROBE_RAM=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-t420-maximized.config b/config/coreboot-t420-maximized.config index be42a857a..73d720333 100644 --- a/config/coreboot-t420-maximized.config +++ b/config/coreboot-t420-maximized.config @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -94,6 +95,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -150,9 +152,9 @@ CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 CONFIG_VBOOT_SLOTS_RW_A=y @@ -181,6 +183,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -274,8 +277,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 -# CONFIG_USE_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 @@ -295,8 +299,11 @@ CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -394,6 +401,7 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -421,7 +429,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -481,13 +488,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -CONFIG_USE_DDR3=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -513,6 +522,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -571,6 +581,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM1=y # CONFIG_TPM_LOG_TPM2 is not set @@ -672,6 +683,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -728,9 +742,17 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-t430-maximized.config b/config/coreboot-t430-maximized.config index 194bcca40..1e66cdd79 100644 --- a/config/coreboot-t430-maximized.config +++ b/config/coreboot-t430-maximized.config @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -94,6 +95,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -150,9 +152,9 @@ CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T430" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 CONFIG_DCACHE_RAM_BASE=0xfefe0000 @@ -180,6 +182,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -274,8 +277,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 -# CONFIG_USE_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 @@ -295,8 +299,11 @@ CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -394,6 +401,8 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -421,7 +430,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -481,13 +489,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -CONFIG_USE_DDR3=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -513,6 +523,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -571,6 +582,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM1=y # CONFIG_TPM_LOG_TPM2 is not set @@ -672,6 +684,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -728,9 +743,17 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-t440p.config b/config/coreboot-t440p.config index e3f91d4c4..ee4f52ce3 100644 --- a/config/coreboot-t440p.config +++ b/config/coreboot-t440p.config @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -94,6 +95,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -149,9 +151,9 @@ CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 CONFIG_DCACHE_RAM_BASE=0xff7c0000 @@ -178,6 +180,7 @@ CONFIG_HAVE_IFD_BIN=y CONFIG_BOARD_LENOVO_THINKPAD_T440P=y # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -275,6 +278,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 CONFIG_SERIRQ_CONTINUOUS_MODE=y +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xe8000000 @@ -298,8 +302,11 @@ CONFIG_DISABLE_ME_PCI=y CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -414,7 +421,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -471,13 +477,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -CONFIG_USE_DDR3=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -504,6 +512,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -559,6 +568,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM1=y # CONFIG_TPM_LOG_TPM2 is not set @@ -661,6 +671,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -715,9 +728,17 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-t480-maximized.config b/config/coreboot-t480-maximized.config index 48b70fc5a..94856d3ca 100644 --- a/config/coreboot-t480-maximized.config +++ b/config/coreboot-t480-maximized.config @@ -17,6 +17,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -92,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -150,6 +152,7 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR) # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480" +CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 @@ -160,7 +163,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_IFD_BIN_PATH="@BLOB_DIR@/xx80/ifd.bin" @@ -170,6 +172,7 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +CONFIG_USE_LEGACY_8254_TIMER=y # CONFIG_DEBUG_SMI is not set # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set CONFIG_HAVE_IFD_BIN=y @@ -179,6 +182,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -217,11 +221,15 @@ CONFIG_BOARD_LENOVO_T480=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_PS2K_EISAID="PNP0303" -CONFIG_PS2M_EISAID="PNP0F13" -CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_PS2K_EISAID="LEN0071" +CONFIG_PS2M_EISAID="LEN0094" +CONFIG_THINKPADEC_HKEY_EISAID="LEN0268" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_EDK2_BOOT_MANAGER_ESCAPE=y +CONFIG_EDK2_FOLLOW_BGRT_SPEC=y +CONFIG_MEC1653_DEBUG_UNLOCK_KEY="7a41b149fe2101cf" +CONFIG_VARIANT_HAS_DGPU=y # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y @@ -280,6 +288,7 @@ CONFIG_SMM_RESERVED_SIZE=0x200000 CONFIG_SMM_MODULE_STACK_SIZE=0x800 CONFIG_ACPI_BERT_SIZE=0x0 CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 CONFIG_ACPI_CPU_STRING="CP%02X" @@ -297,7 +306,6 @@ CONFIG_SOC_INTEL_I2C_DEV_MAX=6 CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" -CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 CONFIG_INTEL_GMA_BCLV_WIDTH=16 @@ -315,12 +323,16 @@ CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y CONFIG_SOC_INTEL_KABYLAKE=y +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 -CONFIG_CBFS_CACHE_ALIGN=8 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 CONFIG_SOC_INTEL_COMMON=y # @@ -358,10 +370,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" CONFIG_SOC_INTEL_CSE_RW_FILE="" CONFIG_SOC_INTEL_CSE_RW_VERSION="" @@ -502,11 +511,14 @@ CONFIG_EC_ACPI=y CONFIG_EC_LENOVO_H8=y CONFIG_H8_BEEP_ON_DEATH=y CONFIG_H8_FLASH_LEDS_ON_DEATH=y -# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +CONFIG_H8_SUPPORT_BT_ON_WIFI=y # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y CONFIG_H8_HAS_PRIMARY_FN_KEYS=y CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_MEC1653=y +CONFIG_MEC1653_HAS_DEBUG_UNLOCK=y +# CONFIG_MEC1653_ENABLE_UART is not set CONFIG_EC_LENOVO_PMH7=y # @@ -542,7 +554,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_POSTCAR_STAGE=y CONFIG_BOOTBLOCK_SIMPLE=y @@ -607,6 +618,8 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +CONFIG_DRAM_SUPPORT_DDR4=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # @@ -630,6 +643,7 @@ CONFIG_TPM_INIT_RAMSTAGE=y CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -637,10 +651,10 @@ CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set CONFIG_DRIVERS_I2C_DESIGNWARE=y # CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_DRIVERS_INTEL_DTBT=y CONFIG_FSP_USE_REPO=y # CONFIG_DISPLAY_HOBS is not set # CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set CONFIG_PLATFORM_USES_FSP2_0=y CONFIG_PLATFORM_USES_FSP2_X86_32=y CONFIG_HAVE_INTEL_FSP_REPO=y @@ -650,7 +664,6 @@ CONFIG_FSP_M_CBFS="fspm.bin" CONFIG_FSP_FULL_FD=y CONFIG_FSP_T_RESERVED_SIZE=0x0 CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y CONFIG_FSP_COMPRESS_FSP_S_LZ4=y CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y @@ -658,7 +671,6 @@ CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set # CONFIG_BUILDING_WITH_DEBUG_FSP is not set -CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y CONFIG_VBT_CBFS_COMPRESSION_LZMA=y # CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set @@ -707,6 +719,7 @@ CONFIG_TPM2=y CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM2=y # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM2=y # CONFIG_TPM_HASH_SHA1 is not set @@ -813,6 +826,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -876,6 +892,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot-t530-maximized.config b/config/coreboot-t530-maximized.config index b0b9f1666..92ad7bc65 100644 --- a/config/coreboot-t530-maximized.config +++ b/config/coreboot-t530-maximized.config @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -93,6 +94,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -149,9 +151,9 @@ CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T530" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 CONFIG_DCACHE_RAM_BASE=0xfefe0000 @@ -179,6 +181,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -274,8 +277,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 -# CONFIG_USE_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 @@ -295,8 +299,11 @@ CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -394,6 +401,8 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -421,7 +430,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -479,13 +487,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -CONFIG_USE_DDR3=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -511,6 +521,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -568,6 +579,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM1=y # CONFIG_TPM_LOG_TPM2 is not set @@ -669,6 +681,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -725,9 +740,17 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-w530-maximized.config b/config/coreboot-w530-maximized.config index 29926b778..71d70e5a6 100644 --- a/config/coreboot-w530-maximized.config +++ b/config/coreboot-w530-maximized.config @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -94,6 +95,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -150,9 +152,9 @@ CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W530" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 CONFIG_DCACHE_RAM_BASE=0xfefe0000 @@ -180,6 +182,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -275,8 +278,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 -# CONFIG_USE_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 @@ -296,8 +300,11 @@ CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -395,6 +402,8 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -422,7 +431,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -482,13 +490,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -CONFIG_USE_DDR3=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -514,6 +524,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -572,6 +583,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM1=y # CONFIG_TPM_LOG_TPM2 is not set @@ -673,6 +685,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -729,9 +744,17 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-w541.config b/config/coreboot-w541.config index d9b307a33..33d52e1f8 100644 --- a/config/coreboot-w541.config +++ b/config/coreboot-w541.config @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -94,6 +95,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -149,9 +151,9 @@ CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 CONFIG_DCACHE_RAM_BASE=0xff7c0000 @@ -178,6 +180,7 @@ CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set CONFIG_BOARD_LENOVO_THINKPAD_W541=y # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -275,6 +278,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 CONFIG_SERIRQ_CONTINUOUS_MODE=y +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xe8000000 @@ -298,8 +302,11 @@ CONFIG_DISABLE_ME_PCI=y CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -414,7 +421,6 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -471,13 +477,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -CONFIG_USE_DDR3=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -504,6 +512,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -558,6 +567,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM1=y # CONFIG_TPM_LOG_TPM2 is not set @@ -660,6 +670,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -714,9 +727,17 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-x220-maximized.config b/config/coreboot-x220-maximized.config index 6eaaa9ed4..ae35e523c 100644 --- a/config/coreboot-x220-maximized.config +++ b/config/coreboot-x220-maximized.config @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -93,6 +94,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -150,9 +152,9 @@ CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 CONFIG_VBOOT_SLOTS_RW_A=y @@ -181,6 +183,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -274,8 +277,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 -# CONFIG_USE_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 @@ -295,8 +299,11 @@ CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -394,6 +401,7 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -421,7 +429,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -481,13 +488,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -CONFIG_USE_DDR3=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -513,6 +522,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -570,6 +580,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM1=y # CONFIG_TPM_LOG_TPM2 is not set @@ -671,6 +682,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -727,9 +741,17 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-x230-maximized-fhd_edp.config b/config/coreboot-x230-maximized-fhd_edp.config index 7c2453e77..02f03b778 100644 --- a/config/coreboot-x230-maximized-fhd_edp.config +++ b/config/coreboot-x230-maximized-fhd_edp.config @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -93,6 +94,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -150,9 +152,9 @@ CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/x230_edp/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 CONFIG_DCACHE_RAM_BASE=0xfefe0000 @@ -180,6 +182,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -275,8 +278,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 -# CONFIG_USE_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 @@ -296,8 +300,11 @@ CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -395,6 +402,7 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -422,7 +430,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -482,13 +489,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -CONFIG_USE_DDR3=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -514,6 +523,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -570,6 +580,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM1=y # CONFIG_TPM_LOG_TPM2 is not set @@ -671,6 +682,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -727,9 +741,17 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-x230-maximized.config b/config/coreboot-x230-maximized.config index ea9f5c9a1..adf15a49d 100644 --- a/config/coreboot-x230-maximized.config +++ b/config/coreboot-x230-maximized.config @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -93,6 +94,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -150,9 +152,9 @@ CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230" +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 CONFIG_DCACHE_RAM_BASE=0xfefe0000 @@ -180,6 +182,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -274,8 +277,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 -# CONFIG_USE_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 @@ -295,8 +299,11 @@ CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -394,6 +401,7 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -421,7 +429,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -479,13 +486,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -CONFIG_USE_DDR3=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -511,6 +520,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -568,6 +578,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set # CONFIG_TPM_LOG_CB is not set CONFIG_TPM_LOG_TPM1=y # CONFIG_TPM_LOG_TPM2 is not set @@ -669,6 +680,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -725,9 +739,17 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot-z220-cmt.config b/config/coreboot-z220-cmt.config index c21ed9e22..d0a9d8016 100644 --- a/config/coreboot-z220-cmt.config +++ b/config/coreboot-z220-cmt.config @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -93,6 +94,7 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -152,9 +154,9 @@ CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIA CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Hewlett-Packard Z220 CMT Workstation" # CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" -CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 CONFIG_DCACHE_RAM_BASE=0xfefe0000 @@ -175,10 +177,14 @@ CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=63 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_PRODESK_600_G1_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set # CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set @@ -255,8 +261,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 -# CONFIG_USE_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 @@ -276,8 +283,11 @@ CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y -CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_CBFS_CACHE_ALIGN=8 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_UART_BITBANG_TX_DELAY_MS=5 # # CPU @@ -396,7 +406,6 @@ CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -456,13 +465,15 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -CONFIG_USE_DDR3=y +CONFIG_DRAM_SUPPORT_DDR3=y # end of Devices # # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -488,6 +499,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -543,6 +555,7 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set +# CONFIG_TPM_MEASURE_MRC_CACHE is not set CONFIG_TPM_LOG_CB=y # CONFIG_TPM_LOG_TPM1 is not set # CONFIG_TPM_LOG_TPM2 is not set @@ -648,6 +661,9 @@ CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage" # CONFIG_PXE is not set CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz" +# CONFIG_COMPRESSED_PAYLOAD_NONE is not set +CONFIG_COMPRESSED_PAYLOAD_LZMA=y +# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # @@ -705,9 +721,17 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/modules/coreboot b/modules/coreboot index 84b9f5130..4adfe6d82 100644 --- a/modules/coreboot +++ b/modules/coreboot @@ -98,16 +98,15 @@ coreboot-dasharo_commit_hash := 94e5f5d5b808cf8d8fd5c70d4ef6a08a054f8986 $(eval $(call coreboot_module,dasharo,24.02.01)) #coreboot-dasharo_patch_version := unreleased -# T480 is based on coreboot ~24.12 release -# coreboot 24.12 doesn't include t480 support which is still under review at https://review.coreboot.org/c/coreboot/+/83274 +# T480 is based on coreboot ~25.09 release +# coreboot 25.09 doesn't include Thunderbolt support and support of the lower USB-C port which is still under review at https://review.coreboot.org/c/coreboot/+/75286 and https://review.coreboot.org/c/coreboot/+/88490 # TODO: track upstream WiP and switch to later upstream release containing patchset without relaying on libreboot downstream maintained patchset -# Therefore, patches/coreboot-2412 includes libreboot patches applied to 24.12 release -# patches/coreboot-2412 also includes PR0 patchset, minus xeon support which don't apply to 24.12 as per https://review.coreboot.org/c/coreboot/+/85278 +# Therefore, patches/coreboot-25.09 include upstream patches to provide Thunderbolt/full USB-C support for the T480 +# patches/coreboot-25.09 also includes PR0 patchset, minus xeon support which don't apply to 25.09 as per https://review.coreboot.org/c/coreboot/+/85278 # TODO: @miczyg1 rebase of patchset so that doenstream don't have to maintain, adapt work -coreboot-24.12_repo := https://github.com/coreboot/coreboot -coreboot-24.12_commit_hash := 2f1e4e5e8515dd350cc9d68b48d32a5b6b02ae6a -#Don't reuse any coreboot buildstack for now since nothing else is based on 24.12 -$(eval $(call coreboot_module,24.12,)) +coreboot-25.09_repo := https://github.com/coreboot/coreboot +coreboot-25.09_commit_hash := 07df08836eca9dd755cc32b6d78727760d201605 +$(eval $(call coreboot_module,25.09,)) # Check that the board configured the coreboot version correctly ifeq "$(CONFIG_COREBOOT_VERSION)" "" diff --git a/patches/coreboot-24.12/0001-soc-intel-skylake-configure-usb-acpi.patch b/patches/coreboot-24.12/0001-soc-intel-skylake-configure-usb-acpi.patch deleted file mode 100644 index 215a4e6de..000000000 --- a/patches/coreboot-24.12/0001-soc-intel-skylake-configure-usb-acpi.patch +++ /dev/null @@ -1,94 +0,0 @@ -From 0a28ea805e3dddfaa89e6c4255506a390bc7ce04 Mon Sep 17 00:00:00 2001 -From: Felix Singer -Date: Wed, 26 Jun 2024 04:24:31 +0200 -Subject: [PATCH 01/11] soc/intel/skylake: configure usb acpi - -Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d -Signed-off-by: Felix Singer ---- - src/soc/intel/skylake/Kconfig | 1 + - src/soc/intel/skylake/chipset.cb | 56 +++++++++++++++++++++++++++++++- - 2 files changed, 56 insertions(+), 1 deletion(-) - -diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig -index 22017c848b..c24df2ef75 100644 ---- a/src/soc/intel/skylake/Kconfig -+++ b/src/soc/intel/skylake/Kconfig -@@ -10,6 +10,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE - select CPU_INTEL_COMMON - select CPU_INTEL_FIRMWARE_INTERFACE_TABLE - select CPU_SUPPORTS_PM_TIMER_EMULATION -+ select DRIVERS_USB_ACPI - select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2 - select FSP_COMPRESS_FSP_S_LZ4 - select FSP_M_XIP -diff --git a/src/soc/intel/skylake/chipset.cb b/src/soc/intel/skylake/chipset.cb -index 6538a1475b..dfb81d496e 100644 ---- a/src/soc/intel/skylake/chipset.cb -+++ b/src/soc/intel/skylake/chipset.cb -@@ -13,7 +13,61 @@ chip soc/intel/skylake - device pci 07.0 alias chap off end - device pci 08.0 alias gmm off end # Gaussian Mixture Model - device pci 13.0 alias ish off end # SensorHub -- device pci 14.0 alias south_xhci off ops usb_xhci_ops end -+ device pci 14.0 alias south_xhci off ops usb_xhci_ops -+ chip drivers/usb/acpi -+ register "type" = "UPC_TYPE_HUB" -+ device usb 0.0 alias xhci_root_hub off -+ chip drivers/usb/acpi -+ device usb 2.0 alias usb2_port1 off end -+ end -+ chip drivers/usb/acpi -+ device usb 2.1 alias usb2_port2 off end -+ end -+ chip drivers/usb/acpi -+ device usb 2.2 alias usb2_port3 off end -+ end -+ chip drivers/usb/acpi -+ device usb 2.3 alias usb2_port4 off end -+ end -+ chip drivers/usb/acpi -+ device usb 2.4 alias usb2_port5 off end -+ end -+ chip drivers/usb/acpi -+ device usb 2.5 alias usb2_port6 off end -+ end -+ chip drivers/usb/acpi -+ device usb 2.6 alias usb2_port7 off end -+ end -+ chip drivers/usb/acpi -+ device usb 2.7 alias usb2_port8 off end -+ end -+ chip drivers/usb/acpi -+ device usb 2.8 alias usb2_port9 off end -+ end -+ chip drivers/usb/acpi -+ device usb 2.9 alias usb2_port10 off end -+ end -+ chip drivers/usb/acpi -+ device usb 3.0 alias usb3_port1 off end -+ end -+ chip drivers/usb/acpi -+ device usb 3.1 alias usb3_port2 off end -+ end -+ chip drivers/usb/acpi -+ device usb 3.2 alias usb3_port3 off end -+ end -+ chip drivers/usb/acpi -+ device usb 3.3 alias usb3_port4 off end -+ end -+ chip drivers/usb/acpi -+ device usb 3.4 alias usb3_port5 off end -+ end -+ chip drivers/usb/acpi -+ device usb 3.5 alias usb3_port6 off end -+ end -+ end -+ end -+ end - device pci 14.1 alias south_xdci off ops usb_xdci_ops end - device pci 14.2 alias thermal off end - device pci 14.3 alias cio off end --- -2.39.5 - diff --git a/patches/coreboot-24.12/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch b/patches/coreboot-24.12/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch deleted file mode 100644 index f60aa74a3..000000000 --- a/patches/coreboot-24.12/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch +++ /dev/null @@ -1,30 +0,0 @@ -From aa6dd7aa4693bd9ce1fe7f35b9532e5411fc1098 Mon Sep 17 00:00:00 2001 -From: Mate Kukri -Date: Fri, 22 Nov 2024 21:26:48 +0000 -Subject: [PATCH 02/11] soc/intel/skylake: Enable 4E/4F PNP I/O ports in - bootblock - -Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173 -Signed-off-by: Mate Kukri ---- - src/soc/intel/skylake/bootblock/pch.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c -index df00bb85a9..beaece960b 100644 ---- a/src/soc/intel/skylake/bootblock/pch.c -+++ b/src/soc/intel/skylake/bootblock/pch.c -@@ -100,8 +100,8 @@ static void soc_config_pwrmbase(void) - - void pch_early_iorange_init(void) - { -- uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 | -- LPC_IOE_EC_62_66; -+ uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F | -+ LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66; - - const config_t *config = config_of_soc(); - --- -2.39.5 - diff --git a/patches/coreboot-24.12/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch b/patches/coreboot-24.12/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch deleted file mode 100644 index 108f688db..000000000 --- a/patches/coreboot-24.12/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch +++ /dev/null @@ -1,2237 +0,0 @@ -From 1652c22825d3001e77159aa539dfa49d2389c775 Mon Sep 17 00:00:00 2001 -From: Mate Kukri -Date: Tue, 31 Dec 2024 22:49:15 +0000 -Subject: [PATCH 03/11] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s - -These machine have BootGuard fused and requires deguard to -boot coreboot. - -Known issues: -- Alpine Ridge Thunderbolt 3 controller does not work -- Some Fn+F{1-12} keys aren't handled correctly -- Nvidia dGPU is finicky - - Needs option ROM - - Power enable code is buggy - - Nouveau only works on linux 6.8-6.9 -- Headphone jack isn't detected as plugged in despite correct verbs - -Thanks to Leah Rowe for helping with the T480s. - -Signed-off-by: Mate Kukri -Change-Id: I19d421412c771c1f242f6ff39453f824fa866163 ---- - src/device/pci_rom.c | 4 +- - src/ec/lenovo/h8/acpi/ec.asl | 2 +- - src/ec/lenovo/h8/bluetooth.c | 6 +- - src/ec/lenovo/h8/wwan.c | 6 +- - src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 57 +++++ - .../lenovo/sklkbl_thinkpad/Kconfig.name | 7 + - .../lenovo/sklkbl_thinkpad/Makefile.mk | 73 +++++++ - .../lenovo/sklkbl_thinkpad/acpi/ec.asl | 12 ++ - .../lenovo/sklkbl_thinkpad/acpi/superio.asl | 3 + - .../lenovo/sklkbl_thinkpad/bootblock.c | 60 ++++++ - .../lenovo/sklkbl_thinkpad/devicetree.cb | 71 ++++++ - src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl | 33 +++ - src/mainboard/lenovo/sklkbl_thinkpad/ec.c | 153 +++++++++++++ - src/mainboard/lenovo/sklkbl_thinkpad/ec.h | 99 +++++++++ - src/mainboard/lenovo/sklkbl_thinkpad/gpio.h | 8 + - .../lenovo/sklkbl_thinkpad/ramstage.c | 105 +++++++++ - .../sklkbl_thinkpad/variants/t480/data.vbt | Bin 0 -> 4106 bytes - .../variants/t480/gma-mainboard.ads | 19 ++ - .../sklkbl_thinkpad/variants/t480/gpio.c | 203 ++++++++++++++++++ - .../sklkbl_thinkpad/variants/t480/hda_verb.c | 90 ++++++++ - .../variants/t480/memory_init_params.c | 20 ++ - .../variants/t480/overridetree.cb | 103 +++++++++ - .../sklkbl_thinkpad/variants/t480s/data.vbt | Bin 0 -> 4106 bytes - .../variants/t480s/gma-mainboard.ads | 19 ++ - .../sklkbl_thinkpad/variants/t480s/gpio.c | 199 +++++++++++++++++ - .../sklkbl_thinkpad/variants/t480s/hda_verb.c | 90 ++++++++ - .../variants/t480s/memory_init_params.c | 44 ++++ - .../variants/t480s/overridetree.cb | 103 +++++++++ - .../variants/t480s/spd/spd_0.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_1.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_10.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_11.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_12.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_13.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_14.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_15.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_16.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_17.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_18.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_19.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_2.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_20.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_3.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_4.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_5.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_6.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_7.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_8.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_9.bin | Bin 0 -> 512 bytes - 49 files changed, 1583 insertions(+), 6 deletions(-) - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.h - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/gpio.h - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_1.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_10.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_11.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_12.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_13.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_14.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_15.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_16.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_17.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_18.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_19.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_2.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_20.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_3.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_4.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_5.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin - -diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c -index d60720eb49..cc6b9b068a 100644 ---- a/src/device/pci_rom.c -+++ b/src/device/pci_rom.c -@@ -304,11 +304,13 @@ void pci_rom_ssdt(const struct device *device) - return; - } - -+#if 0 - const char *scope = acpi_device_path(device); - if (!scope) { - printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device)); - return; - } -+#endif - - /* Supports up to four devices. */ - if ((CBMEM_ID_ROM0 + ngfx) > CBMEM_ID_ROM3) { -@@ -336,7 +338,7 @@ void pci_rom_ssdt(const struct device *device) - memcpy(cbrom, rom, cbrom_length); - - /* write _ROM method */ -- acpigen_write_scope(scope); -+ acpigen_write_scope("\\_SB.PCI0.RP01.PEGP"); - acpigen_write_rom(cbrom, cbrom_length); - acpigen_pop_len(); /* pop scope */ - } -diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl -index bc54d3b422..8f4a8e1986 100644 ---- a/src/ec/lenovo/h8/acpi/ec.asl -+++ b/src/ec/lenovo/h8/acpi/ec.asl -@@ -331,7 +331,7 @@ Device(EC) - #include "sleepbutton.asl" - #include "lid.asl" - #include "beep.asl" --#include "thermal.asl" -+//#include "thermal.asl" - #include "systemstatus.asl" - #include "thinkpad.asl" - } -diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c -index 16fc8dce39..be71a24ced 100644 ---- a/src/ec/lenovo/h8/bluetooth.c -+++ b/src/ec/lenovo/h8/bluetooth.c -@@ -1,6 +1,6 @@ - /* SPDX-License-Identifier: GPL-2.0-only */ - --#include -+// #include - #include - #include - #include -@@ -28,16 +28,18 @@ bool h8_has_bdc(const struct device *dev) - { - struct ec_lenovo_h8_config *conf = dev->chip_info; - -- if (!conf->has_bdc_detection) { -+ if (1 || !conf->has_bdc_detection) { - printk(BIOS_INFO, "H8: BDC detection not implemented. " - "Assuming BDC installed\n"); - return true; - } - -+#if 0 - if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) { - printk(BIOS_INFO, "H8: BDC installed\n"); - return true; - } -+#endif - - printk(BIOS_INFO, "H8: BDC not installed\n"); - return false; -diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c -index 685886fcce..5cdcf77406 100644 ---- a/src/ec/lenovo/h8/wwan.c -+++ b/src/ec/lenovo/h8/wwan.c -@@ -1,6 +1,6 @@ - /* SPDX-License-Identifier: GPL-2.0-only */ - --#include -+// #include - #include - #include - #include -@@ -26,16 +26,18 @@ bool h8_has_wwan(const struct device *dev) - { - struct ec_lenovo_h8_config *conf = dev->chip_info; - -- if (!conf->has_wwan_detection) { -+ if (1 || !conf->has_wwan_detection) { - printk(BIOS_INFO, "H8: WWAN detection not implemented. " - "Assuming WWAN installed\n"); - return true; - } - -+#if 0 - if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) { - printk(BIOS_INFO, "H8: WWAN installed\n"); - return true; - } -+#endif - - printk(BIOS_INFO, "H8: WWAN not installed\n"); - return false; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig -new file mode 100644 -index 0000000000..4998672943 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig -@@ -0,0 +1,57 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ bool -+ select BOARD_ROMSIZE_KB_16384 -+ select EC_LENOVO_H8 -+ select EC_LENOVO_PMH7 -+ select H8_HAS_BAT_THRESHOLDS_IMPL -+ select H8_HAS_LEDLOGO -+ select H8_HAS_PRIMARY_FN_KEYS -+ select HAVE_ACPI_RESUME -+ select HAVE_ACPI_TABLES -+ select INTEL_GMA_HAVE_VBT -+ select INTEL_INT15 -+ select MAINBOARD_HAS_LIBGFXINIT -+ select MAINBOARD_HAS_TPM2 -+ select MAINBOARD_USES_IFD_GBE_REGION -+ select MEMORY_MAPPED_TPM -+ select SOC_INTEL_COMMON_BLOCK_HDA_VERB -+ select SOC_INTEL_KABYLAKE -+ select SPD_READ_BY_WORD -+ select SYSTEM_TYPE_LAPTOP -+ -+config BOARD_LENOVO_T480 -+ bool -+ select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ -+config BOARD_LENOVO_T480S -+ bool -+ select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ -+if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ -+config MAINBOARD_DIR -+ default "lenovo/sklkbl_thinkpad" -+ -+config VARIANT_DIR -+ default "t480" if BOARD_LENOVO_T480 -+ default "t480s" if BOARD_LENOVO_T480S -+ -+config OVERRIDE_DEVICETREE -+ default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" -+ -+config MAINBOARD_PART_NUMBER -+ default "T480" if BOARD_LENOVO_T480 -+ default "T480s" if BOARD_LENOVO_T480S -+ -+config CBFS_SIZE -+ default 0x900000 -+ -+config DIMM_MAX -+ default 2 -+ -+config DIMM_SPD_SIZE -+ default 512 # DDR4 -+ -+endif -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name -new file mode 100644 -index 0000000000..abc273f387 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name -@@ -0,0 +1,7 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+config BOARD_LENOVO_T480 -+ bool "ThinkPad T480" -+ -+config BOARD_LENOVO_T480S -+ bool "ThinkPad T480s" -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk -new file mode 100644 -index 0000000000..c308239177 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk -@@ -0,0 +1,73 @@ -+## SPDX-License-Identifier: GPL-2.0-only -+ -+bootblock-y += bootblock.c ec.c -+ -+romstage-y += variants/$(VARIANT_DIR)/memory_init_params.c -+ -+ramstage-y += ramstage.c ec.c -+ramstage-y += variants/$(VARIANT_DIR)/gpio.c variants/$(VARIANT_DIR)/hda_verb.c -+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads -+ -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_0.bin -+spd_0.bin-file := variants/$(VARIANT_DIR)/spd/spd_0.bin -+spd_0.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_1.bin -+spd_1.bin-file := variants/$(VARIANT_DIR)/spd/spd_1.bin -+spd_1.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_2.bin -+spd_2.bin-file := variants/$(VARIANT_DIR)/spd/spd_2.bin -+spd_2.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_3.bin -+spd_3.bin-file := variants/$(VARIANT_DIR)/spd/spd_3.bin -+spd_3.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_4.bin -+spd_4.bin-file := variants/$(VARIANT_DIR)/spd/spd_4.bin -+spd_4.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_5.bin -+spd_5.bin-file := variants/$(VARIANT_DIR)/spd/spd_5.bin -+spd_5.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_6.bin -+spd_6.bin-file := variants/$(VARIANT_DIR)/spd/spd_6.bin -+spd_6.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_7.bin -+spd_7.bin-file := variants/$(VARIANT_DIR)/spd/spd_7.bin -+spd_7.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_8.bin -+spd_8.bin-file := variants/$(VARIANT_DIR)/spd/spd_8.bin -+spd_8.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_9.bin -+spd_9.bin-file := variants/$(VARIANT_DIR)/spd/spd_9.bin -+spd_9.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_10.bin -+spd_10.bin-file := variants/$(VARIANT_DIR)/spd/spd_10.bin -+spd_10.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_11.bin -+spd_11.bin-file := variants/$(VARIANT_DIR)/spd/spd_11.bin -+spd_11.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_12.bin -+spd_12.bin-file := variants/$(VARIANT_DIR)/spd/spd_12.bin -+spd_12.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_13.bin -+spd_13.bin-file := variants/$(VARIANT_DIR)/spd/spd_13.bin -+spd_13.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_14.bin -+spd_14.bin-file := variants/$(VARIANT_DIR)/spd/spd_14.bin -+spd_14.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_15.bin -+spd_15.bin-file := variants/$(VARIANT_DIR)/spd/spd_15.bin -+spd_15.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_16.bin -+spd_16.bin-file := variants/$(VARIANT_DIR)/spd/spd_16.bin -+spd_16.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_17.bin -+spd_17.bin-file := variants/$(VARIANT_DIR)/spd/spd_17.bin -+spd_17.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_18.bin -+spd_18.bin-file := variants/$(VARIANT_DIR)/spd/spd_18.bin -+spd_18.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_19.bin -+spd_19.bin-file := variants/$(VARIANT_DIR)/spd/spd_19.bin -+spd_19.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_20.bin -+spd_20.bin-file := variants/$(VARIANT_DIR)/spd/spd_20.bin -+spd_20.bin-type := raw -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl -new file mode 100644 -index 0000000000..3a949a2fca ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl -@@ -0,0 +1,12 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB -+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB -+#define THINKPAD_EC_GPE 22 -+ -+Name(\TCRT, 100) -+Name(\TPSV, 90) -+Name(\FLVL, 0) -+ -+#include -+#include -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl -new file mode 100644 -index 0000000000..55b1db5b11 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl -@@ -0,0 +1,3 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c -new file mode 100644 -index 0000000000..fb660dbdfa ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c -@@ -0,0 +1,60 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include -+#include -+#include -+#include -+#include "ec.h" -+ -+static void configure_uart(uint16_t port, uint16_t iobase, uint8_t irqno) -+{ -+ microchip_pnp_enter_conf_state(port); -+ -+ // Select LPC I/F LDN -+ pnp_write(port, PNP_LDN_SELECT, LDN_LPCIF); -+ // Write UART BAR -+ pnp_write_le32(port, LPCIF_BAR_UART, (uint32_t) iobase << 16 | 0x8707); -+ // Set SIRQ4 to UART -+ pnp_write(port, LPCIF_SIRQ(irqno), LDN_UART); -+ -+ // Configure UART LDN -+ pnp_write(port, PNP_LDN_SELECT, LDN_UART); -+ pnp_write(port, UART_ACTIVATE, 0x01); -+ pnp_write(port, UART_CONFIG_SELECT, 0x00); -+ -+ microchip_pnp_exit_conf_state(port); -+ -+#ifdef CONFIG_BOARD_LENOVO_T480 -+ // Supply debug unlock key -+ debug_write_key(DEBUG_RW_KEY_IDX, debug_rw_key); -+ -+ // Use debug writes to set UART_TX and UART_RX GPIOs -+ debug_write_dword(0xf0c400 + 0x110, 0x00001000); -+ debug_write_dword(0xf0c400 + 0x114, 0x00001000); -+#endif -+} -+ -+ -+#define UART_PORT 0x3f8 -+#define UART_IRQ 4 -+ -+void bootblock_mainboard_early_init(void) -+{ -+ // Tell EC via BIOS Debug Port 1 that the world isn't on fire -+ -+ // Let the EC know that BIOS code is running -+ outb(0x11, 0x86); -+ outb(0x6e, 0x86); -+ -+ // Enable accesses to EC1 interface -+ ec0_write(0, ec0_read(0) | 0x20); -+ -+ // Reset LEDs to power on state -+ // (Without this warm reboot leaves LEDs off) -+ ec0_write(0x0c, 0x80); -+ ec0_write(0x0c, 0x07); -+ ec0_write(0x0c, 0x8a); -+ -+ // Setup debug UART -+ configure_uart(EC_CFG_PORT, UART_PORT, UART_IRQ); -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb -new file mode 100644 -index 0000000000..c07d4d53ca ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb -@@ -0,0 +1,71 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+chip soc/intel/skylake -+ # IGD Displays -+ register "gfx" = "GMA_STATIC_DISPLAYS(0)" -+ -+ register "panel_cfg" = "{ -+ .up_delay_ms = 200, -+ .down_delay_ms = 50, -+ .cycle_delay_ms = 600, -+ .backlight_on_delay_ms = 1, -+ .backlight_off_delay_ms = 200, -+ .backlight_pwm_hz = 200, -+ }" -+ -+ # Power -+ register "PmConfigSlpS3MinAssert" = "2" # 50ms -+ register "PmConfigSlpS4MinAssert" = "1" # 1s -+ register "PmConfigSlpSusMinAssert" = "3" # 500ms -+ register "PmConfigSlpAMinAssert" = "3" # 2s -+ -+ device domain 0 on -+ device ref igpu on end -+ device ref sa_thermal on end -+ device ref thermal on end -+ device ref south_xhci on end -+ device ref lpc_espi on -+ register "serirq_mode" = "SERIRQ_CONTINUOUS" -+ -+ register "gen1_dec" = "0x007c1601" -+ register "gen2_dec" = "0x000c15e1" -+ -+ chip ec/lenovo/pmh7 -+ register "backlight_enable" = "true" -+ register "dock_event_enable" = "true" -+ device pnp ff.1 on end # dummy -+ end -+ -+ chip ec/lenovo/h8 -+ register "beepmask0" = "0x00" -+ register "beepmask1" = "0x86" -+ register "config0" = "0xa6" -+ register "config1" = "0x0d" -+ register "config2" = "0xa8" -+ register "config3" = "0xc4" -+ register "has_keyboard_backlight" = "1" -+ register "event2_enable" = "0xff" -+ register "event3_enable" = "0xff" -+ register "event4_enable" = "0xd0" -+ register "event5_enable" = "0x3c" -+ register "event7_enable" = "0x01" -+ register "event8_enable" = "0x7b" -+ register "event9_enable" = "0xff" -+ register "eventc_enable" = "0xff" -+ register "eventd_enable" = "0xff" -+ register "evente_enable" = "0x9d" -+ device pnp ff.2 on # dummy -+ io 0x60 = 0x62 -+ io 0x62 = 0x66 -+ io 0x64 = 0x1600 -+ io 0x66 = 0x1604 -+ end -+ end -+ -+ chip drivers/pc80/tpm -+ device pnp 0c31.0 on end -+ end -+ end -+ device ref hda on end -+ end -+end -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl -new file mode 100644 -index 0000000000..aa4d4de2a6 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl -@@ -0,0 +1,33 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include -+DefinitionBlock( -+ "dsdt.aml", -+ "DSDT", -+ ACPI_DSDT_REV_2, -+ OEM_ID, -+ ACPI_TABLE_CREATOR, -+ 0x20110725 -+) -+{ -+ #include -+ #include -+ #include -+ -+ Device (\_SB.PCI0) -+ { -+ #include -+ #include -+ #include -+ } -+ -+ Scope (\_SB.PCI0.RP01) -+ { -+ Device (PEGP) -+ { -+ Name (_ADR, Zero) -+ } -+ } -+ -+ #include -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ec.c b/src/mainboard/lenovo/sklkbl_thinkpad/ec.c -new file mode 100644 -index 0000000000..adb6a60324 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/ec.c -@@ -0,0 +1,153 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include -+#include "ec.h" -+ -+#define MICROCHIP_CONFIGURATION_ENTRY_KEY 0x55 -+#define MICROCHIP_CONFIGURATION_EXIT_KEY 0xaa -+ -+void microchip_pnp_enter_conf_state(uint16_t port) -+{ -+ outb(MICROCHIP_CONFIGURATION_ENTRY_KEY, port); -+} -+ -+void microchip_pnp_exit_conf_state(uint16_t port) -+{ -+ outb(MICROCHIP_CONFIGURATION_EXIT_KEY, port); -+} -+ -+uint8_t pnp_read(uint16_t port, uint8_t index) -+{ -+ outb(index, port); -+ return inb(port + 1); -+} -+ -+uint32_t pnp_read_le32(uint16_t port, uint8_t index) -+{ -+ return (uint32_t) pnp_read(port, index) | -+ (uint32_t) pnp_read(port, index + 1) << 8 | -+ (uint32_t) pnp_read(port, index + 2) << 16 | -+ (uint32_t) pnp_read(port, index + 3) << 24; -+} -+ -+void pnp_write(uint16_t port, uint8_t index, uint8_t value) -+{ -+ outb(index, port); -+ outb(value, port + 1); -+} -+ -+void pnp_write_le32(uint16_t port, uint8_t index, uint32_t value) -+{ -+ pnp_write(port, index, value & 0xff); -+ pnp_write(port, index + 1, value >> 8 & 0xff); -+ pnp_write(port, index + 2, value >> 16 & 0xff); -+ pnp_write(port, index + 3, value >> 24 & 0xff); -+} -+ -+static void ecN_clear_out_queue(uint16_t cmd_port, uint16_t data_port) -+{ -+ while (inb(cmd_port) & EC_OBF) -+ inb(data_port); -+} -+ -+static void ecN_wait_to_send(uint16_t cmd_port, uint16_t data_port) -+{ -+ while (inb(cmd_port) & EC_IBF) -+ ; -+} -+ -+static void ecN_wait_to_recv(uint16_t cmd_port, uint16_t data_port) -+{ -+ while (!(inb(cmd_port) & EC_OBF)) -+ ; -+} -+ -+uint8_t ecN_read(uint16_t cmd_port, uint16_t data_port, uint8_t addr) -+{ -+ ecN_clear_out_queue(cmd_port, data_port); -+ ecN_wait_to_send(cmd_port, data_port); -+ outb(EC_READ, cmd_port); -+ ecN_wait_to_send(cmd_port, data_port); -+ outb(addr, data_port); -+ ecN_wait_to_recv(cmd_port, data_port); -+ return inb(data_port); -+} -+ -+void ecN_write(uint16_t cmd_port, uint16_t data_port, uint8_t addr, uint8_t val) -+{ -+ ecN_clear_out_queue(cmd_port, data_port); -+ ecN_wait_to_send(cmd_port, data_port); -+ outb(EC_WRITE, cmd_port); -+ ecN_wait_to_send(cmd_port, data_port); -+ outb(addr, data_port); -+ ecN_wait_to_send(cmd_port, data_port); -+ outb(val, data_port); -+} -+ -+uint8_t eeprom_read(uint16_t addr) -+{ -+ ecN_clear_out_queue(EC2_CMD, EC2_DATA); -+ ecN_wait_to_send(EC2_CMD, EC2_DATA); -+ outl(1, EC2_CMD); -+ ecN_wait_to_send(EC2_CMD, EC2_DATA); -+ outl(addr, EC2_DATA); -+ ecN_wait_to_recv(EC2_CMD, EC2_DATA); -+ return inl(EC2_DATA); -+} -+ -+void eeprom_write(uint16_t addr, uint8_t val) -+{ -+ ecN_clear_out_queue(EC2_CMD, EC2_DATA); -+ ecN_wait_to_send(EC2_CMD, EC2_DATA); -+ outl(2, EC2_CMD); -+ ecN_wait_to_send(EC2_CMD, EC2_DATA); -+ outl((uint32_t) addr | (uint32_t) val << 16, EC2_DATA); -+ ecN_wait_to_recv(EC2_CMD, EC2_DATA); -+ inl(EC2_DATA); -+} -+ -+uint16_t debug_loaded_keys(void) -+{ -+ return (uint16_t) ec0_read(0x87) << 8 | (uint16_t) ec0_read(0x86); -+} -+ -+static void debug_cmd(uint8_t cmd) -+{ -+ ec0_write(EC_DEBUG_CMD, cmd); -+ while (ec0_read(EC_DEBUG_CMD) & 0x80) -+ ; -+} -+ -+void debug_read_key(uint8_t i, uint8_t *key) -+{ -+ debug_cmd(0x80 | (i & 0xf)); -+ for (int j = 0; j < 8; ++j) -+ key[j] = ec0_read(0x3e + j); -+} -+ -+void debug_write_key(uint8_t i, const uint8_t *key) -+{ -+ for (int j = 0; j < 8; ++j) -+ ec0_write(0x3e + j, key[j]); -+ debug_cmd(0xc0 | (i & 0xf)); -+} -+ -+uint32_t debug_read_dword(uint32_t addr) -+{ -+ ecN_clear_out_queue(EC3_CMD, EC3_DATA); -+ ecN_wait_to_send(EC3_CMD, EC3_DATA); -+ outl(addr << 8 | 0xE2, EC3_DATA); -+ ecN_wait_to_recv(EC3_CMD, EC3_DATA); -+ return inl(EC3_DATA); -+} -+ -+void debug_write_dword(uint32_t addr, uint32_t val) -+{ -+ ecN_clear_out_queue(EC3_CMD, EC3_DATA); -+ ecN_wait_to_send(EC3_CMD, EC3_DATA); -+ outl(addr << 8 | 0xEA, EC3_DATA); -+ ecN_wait_to_send(EC3_CMD, EC3_DATA); -+ outl(val, EC3_DATA); -+} -+ -+const uint8_t debug_rw_key[8] = { 0x7a, 0x41, 0xb1, 0x49, 0xfe, 0x21, 0x01, 0xcf }; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ec.h b/src/mainboard/lenovo/sklkbl_thinkpad/ec.h -new file mode 100644 -index 0000000000..d2963c8962 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/ec.h -@@ -0,0 +1,99 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#ifndef SKLKBL_THINKPAD_EC_H -+#define SKLKBL_THINKPAD_EC_H -+ -+// EC configuration base address -+#define EC_CFG_PORT 0x4e -+ -+// Chip global registers -+#define PNP_LDN_SELECT 0x07 -+# define LDN_UART 0x07 -+# define LDN_LPCIF 0x0c -+#define EC_DEVICE_ID 0x20 -+#define EC_DEVICE_REV 0x21 -+ -+// LPC I/F registers -+#define LPCIF_SIRQ(i) (0x40 + (i)) -+ -+#define LPCIF_BAR_CFG 0x60 -+#define LPCIF_BAR_MAILBOX 0x64 -+#define LPCIF_BAR_8042 0x68 -+#define LPCIF_BAR_ACPI_EC0 0x6c -+#define LPCIF_BAR_ACPI_EC1 0x70 -+#define LPCIF_BAR_ACPI_EC2 0x74 -+#define LPCIF_BAR_ACPI_EC3 0x78 -+#define LPCIF_BAR_ACPI_PM0 0x7c -+#define LPCIF_BAR_UART 0x80 -+#define LPCIF_BAR_FAST_KYBD 0x84 -+#define LPCIF_BAR_EMBED_FLASH 0x88 -+#define LPCIF_BAR_GP_SPI 0x8c -+#define LPCIF_BAR_EMI 0x90 -+#define LPCIF_BAR_PMH7 0x94 -+#define LPCIF_BAR_PORT80_DBG0 0x98 -+#define LPCIF_BAR_PORT80_DBG1 0x9c -+#define LPCIF_BAR_RTC 0xa0 -+ -+// UART registers -+#define UART_ACTIVATE 0x30 -+#define UART_CONFIG_SELECT 0xf0 -+ -+void microchip_pnp_enter_conf_state(uint16_t port); -+void microchip_pnp_exit_conf_state(uint16_t port); -+uint8_t pnp_read(uint16_t port, uint8_t index); -+uint32_t pnp_read_le32(uint16_t port, uint8_t index); -+void pnp_write(uint16_t port, uint8_t index, uint8_t value); -+void pnp_write_le32(uint16_t port, uint8_t index, uint32_t value); -+ -+#define EC0_CMD 0x0066 -+#define EC0_DATA 0x0062 -+#define EC1_CMD 0x1604 -+#define EC1_DATA 0x1600 -+#define EC2_CMD 0x1634 -+#define EC2_DATA 0x1630 -+#define EC3_CMD 0x161c -+#define EC3_DATA 0x1618 -+ -+#define EC_OBF (1 << 0) -+#define EC_IBF (1 << 1) -+ -+#define EC_READ 0x80 -+#define EC_WRITE 0x81 -+ -+uint8_t ecN_read(uint16_t cmd_port, uint16_t data_port, uint8_t addr); -+ -+void ecN_write(uint16_t cmd_port, uint16_t data_port, uint8_t addr, uint8_t val); -+ -+// EC0 and EC1 mostly are useful with the READ/WRITE commands -+#define ec0_read(addr) ecN_read(EC0_CMD, EC0_DATA, addr) -+#define ec0_write(addr, val) ecN_write(EC0_CMD, EC0_DATA, addr, val) -+#define ec1_read(addr) ecN_read(EC1_CMD, EC1_DATA, addr) -+#define ec1_write(addr, val) ecN_write(EC1_CMD, EC1_DATA, addr, val) -+ -+// Read from the emulated EEPROM -+uint8_t eeprom_read(uint16_t addr); -+ -+// Write to the emulated EEPROM -+void eeprom_write(uint16_t addr, uint8_t val); -+ -+// Read loaded debug key mask -+uint16_t debug_loaded_keys(void); -+ -+// The following location (via either EC0 or EC1) can be used to interact with the debug interface -+#define EC_DEBUG_CMD 0x3d -+ -+void debug_read_key(uint8_t i, uint8_t *key); -+ -+void debug_write_key(uint8_t i, const uint8_t *key); -+ -+uint32_t debug_read_dword(uint32_t addr); -+ -+void debug_write_dword(uint32_t addr, uint32_t val); -+ -+// RW unlock key index -+#define DEBUG_RW_KEY_IDX 1 -+ -+// RW unlock key for EC version N24HT37W -+extern const uint8_t debug_rw_key[8]; -+ -+#endif -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h b/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h -new file mode 100644 -index 0000000000..d89ed712d4 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h -@@ -0,0 +1,8 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#ifndef GPIO_H -+#define GPIO_H -+ -+void variant_config_gpios(void); -+ -+#endif -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c -new file mode 100644 -index 0000000000..44c8578852 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c -@@ -0,0 +1,105 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include -+#include -+#include -+#include -+#include -+#include "ec.h" -+#include "gpio.h" -+ -+#define GPIO_GPU_RST GPP_E22 // active low -+#define GPIO_1R8VIDEO_AON_ON GPP_E23 -+ -+#define GPIO_DGFX_PWRGD GPP_F3 -+ -+#define GPIO_DISCRETE_PRESENCE GPP_D9 // active low -+#define GPIO_DGFX_VRAM_ID0 GPP_D11 -+#define GPIO_DGFX_VRAM_ID1 GPP_D12 -+ -+void mainboard_silicon_init_params(FSP_SIL_UPD *params) -+{ -+ static const char * const dgfx_vram_id_str[] = { "1GB", "2GB", "4GB", "N/A" }; -+ -+ int dgfx_vram_id; -+ -+ // Setup GPIOs -+ variant_config_gpios(); -+ -+ // Detect and enable dGPU -+ if (gpio_get(GPIO_DISCRETE_PRESENCE) == 0) { // active low -+ dgfx_vram_id = gpio_get(GPIO_DGFX_VRAM_ID0) | gpio_get(GPIO_DGFX_VRAM_ID1) << 1; -+ printk(BIOS_DEBUG, "Discrete GPU present with %s VRAM\n", dgfx_vram_id_str[dgfx_vram_id]); -+ -+ // NOTE: i pulled this GPU enable sequence from thin air -+ // it sometimes works but is buggy and the GPU disappears in some cases so disabling it by default. -+ // also unrelated to this enable sequence the nouveau driver only works on 6.8-6.9 kernels -+ if (get_uint_option("dgpu_enable", 0)) { -+ printk(BIOS_DEBUG, "Enabling discrete GPU\n"); -+ gpio_set(GPIO_1R8VIDEO_AON_ON, 1); // Enable GPU power rail -+ while (!gpio_get(GPIO_DGFX_PWRGD)) // Wait for power good signal from GPU -+ ; -+ gpio_set(GPIO_GPU_RST, 1); // Release GPU from reset -+ } else { -+ printk(BIOS_DEBUG, "Discrete GPU will remain disabled\n"); -+ } -+ -+ } else { -+ printk(BIOS_DEBUG, "Discrete GPU not present\n"); -+ } -+} -+ -+static void dump_ec_cfg(uint16_t port) -+{ -+ microchip_pnp_enter_conf_state(port); -+ -+ // Device info -+ printk(BIOS_DEBUG, "Device id %02x\n", pnp_read(port, EC_DEVICE_ID)); -+ printk(BIOS_DEBUG, "Device rev %02x\n", pnp_read(port, EC_DEVICE_REV)); -+ -+ // Switch to LPCIF LDN -+ pnp_write(port, PNP_LDN_SELECT, LDN_LPCIF); -+ -+ // Dump SIRQs -+ for (int i = 0; i <= 15; i += 1) -+ printk(BIOS_DEBUG, "SIRQ%d = %02x\n", i, pnp_read(port, LPCIF_SIRQ(i))); -+ -+ // Dump BARs -+ printk(BIOS_DEBUG, "BAR CFG = %08x\n", pnp_read_le32(port, LPCIF_BAR_CFG)); -+ printk(BIOS_DEBUG, "BAR MAILBOX = %08x\n", pnp_read_le32(port, LPCIF_BAR_MAILBOX)); -+ printk(BIOS_DEBUG, "BAR 8042 = %08x\n", pnp_read_le32(port, LPCIF_BAR_8042)); -+ printk(BIOS_DEBUG, "BAR ACPI_EC0 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC0)); -+ printk(BIOS_DEBUG, "BAR ACPI_EC1 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC1)); -+ printk(BIOS_DEBUG, "BAR ACPI_EC2 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC2)); -+ printk(BIOS_DEBUG, "BAR ACPI_EC3 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC3)); -+ printk(BIOS_DEBUG, "BAR ACPI_PM0 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_PM0)); -+ printk(BIOS_DEBUG, "BAR UART = %08x\n", pnp_read_le32(port, LPCIF_BAR_UART)); -+ printk(BIOS_DEBUG, "BAR FAST_KYBD = %08x\n", pnp_read_le32(port, LPCIF_BAR_FAST_KYBD)); -+ printk(BIOS_DEBUG, "BAR EMBED_FLASH = %08x\n", pnp_read_le32(port, LPCIF_BAR_EMBED_FLASH)); -+ printk(BIOS_DEBUG, "BAR GP_SPI = %08x\n", pnp_read_le32(port, LPCIF_BAR_GP_SPI)); -+ printk(BIOS_DEBUG, "BAR EMI = %08x\n", pnp_read_le32(port, LPCIF_BAR_EMI)); -+ printk(BIOS_DEBUG, "BAR PMH7 = %08x\n", pnp_read_le32(port, LPCIF_BAR_PMH7)); -+ printk(BIOS_DEBUG, "BAR PORT80_DBG0 = %08x\n", pnp_read_le32(port, LPCIF_BAR_PORT80_DBG0)); -+ printk(BIOS_DEBUG, "BAR PORT80_DBG1 = %08x\n", pnp_read_le32(port, LPCIF_BAR_PORT80_DBG1)); -+ printk(BIOS_DEBUG, "BAR RTC = %08x\n", pnp_read_le32(port, LPCIF_BAR_RTC)); -+ -+ microchip_pnp_exit_conf_state(port); -+} -+ -+static void mainboard_enable(struct device *dev) -+{ -+ if (CONFIG(VGA_ROM_RUN)) -+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, -+ GMA_INT15_PANEL_FIT_DEFAULT, -+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); -+} -+ -+static void mainboard_init(void *chip_info) -+{ -+ dump_ec_cfg(EC_CFG_PORT); -+} -+ -+struct chip_operations mainboard_ops = { -+ .enable_dev = mainboard_enable, -+ .init = mainboard_init, -+}; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..4db4202961d0be67b75f52b28f2111d5655595c3 -GIT binary patch -literal 4106 -zcmeHJU2GIp6h5=FKeKmc=rAo()>4l^U|XP_ZDGYy!|YE>mu}hZ4|PdQy1bV0gipVB&+pHzmFpc`=IXxii}qiqH*)7}PU+ -z?woV)x!<09?wNbfhQa6n_IK}3M!Gw&OgS)sY2Q$LJ4F+z{-JneATkt9refXr6+8sr -zR{e1eASVcGl#mf_O&p%I^1;3af=xDeN0ZnydT=;zHOH-q=O;(UFda)^LXW8| -z-Vsanq!Y==Kq9plQ+*gu^hf&pJ9?tY{h01cbtR&SfsVM!_*!D4W5>papLuo?gRur| -zF$`lX;f2t48Dpd4V@(*z=dq95OkkfiVU53N<(gE+=U)KHEdU4}@R=aMjTTTOcb8-a -zC9IXSxZB*|#u~SlHnpsY25L#Sxy6ljl16gI)H0f>for?qaszCX;ESpG=pqROFWR~Z -zTqQzcH(berra`9K(R~0OJ_eeA=> -z&R-)LYP^U3@%6h}+0)7m-mEOhOM92l32>zpvu-&@ZkPf<>~Bsv&Oy1O(`pbLUf3vt*0HIRk0U3EzI -zIeSaIE9*jps%6qP7$EQo8=K#f^K_mFpy5prkNNSOU;oI@KK0}Ge*G6eyWz+6OyADf -zE`}Db#-81u-uS=OJB*=`v}WPMs@ugdtLtbZo6OEUf}>!QL` -z1zQ!pLt!Zek0|;p3VTDrj}`q(g?+8yuZk|KY?X>TRlP@LPpbH`s-ITbSygS+Jq6cQ -zp|Em=T_#B53Y|R}mtw!K3mUyWRhytxx_wi^(}HurDkx@L%OlKIA%rq@7%bE{p{Wl~ -zJJ%lV6&>fxBjnbA8G(&P?a8o%P#c~Wo$7|%1UE-$r;6jwt1uejOfMLwF-BDgC-Q+N -za!Hx;1S&$9!rlNCTsI*IMZ0#Y5aEO7sjIz#jb`S|q7OpRYx`h&=PK}_YnN#poNF=7 -z3yTO|pc0N&G3cozl21Q6c)l0vjm~0uFL)%2_T5RYR1$~dO~u)4px!jFycZNnchPVA -z!0+Vc_afL{m>rv2PY8{Cma`W{yG~JNJu?;L!#fSLmwRW{8R@gD7Z5~{xvZGpN)U`j -z^I~=;XVmtVzgSv@Na@HC?lC8A1l2+CU Disabled); -+ -+end GMA.Mainboard; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c -new file mode 100644 -index 0000000000..f7c29e1f39 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c -@@ -0,0 +1,203 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include -+#include "../../gpio.h" -+ -+/* FIXME: There are multiple GPIOs here that should be locked to prevent "TPM GPIO fail" style -+ * attacks. Unfortunately SKL/KBL GPIO locking *does not* work currently. */ -+ -+static const struct pad_config gpio_table[] = { -+ -+ /* ------- GPIO Community 0 ------- */ -+ -+ /* ------- GPIO Group GPP_A ------- */ -+ PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1), /* -KBRC */ -+ PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1), /* LPC_AD0 */ -+ PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1), /* LPC_AD1 */ -+ PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1), /* LPC_AD2 */ -+ PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1), /* LPC_AD3 */ -+ PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1), /* -LPC_FRAME */ -+ PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), /* IRQSER */ -+ PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1), /* -TPM_IRQ */ -+ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), /* -CLKRUN */ -+ PAD_CFG_NF(GPP_A9, NATIVE, DEEP, NF1), /* LPCCLK_EC_24M */ -+ PAD_CFG_NF(GPP_A10, NATIVE, DEEP, NF1), /* LPCCLK_DEBUG_24M */ -+ PAD_NC(GPP_A11, NONE), -+ PAD_NC(GPP_A12, NONE), -+ PAD_CFG_NF(GPP_A13, NATIVE, DEEP, NF1), /* -SUSWARN */ -+ PAD_CFG_NF(GPP_A14, NATIVE, DEEP, NF1), /* -SUS_STAT */ -+ PAD_CFG_NF(GPP_A15, NATIVE, DEEP, NF1), /* -SUSWARN */ -+ PAD_NC(GPP_A16, NONE), -+ PAD_NC(GPP_A17, NONE), -+ PAD_NC(GPP_A18, NONE), -+ PAD_NC(GPP_A19, NONE), -+ PAD_NC(GPP_A20, NONE), -+ PAD_NC(GPP_A21, NONE), -+ PAD_NC(GPP_A22, NONE), -+ PAD_NC(GPP_A23, NONE), -+ -+ /* ------- GPIO Group GPP_B ------- */ -+ PAD_NC(GPP_B0, NONE), -+ PAD_NC(GPP_B1, NONE), -+ PAD_NC(GPP_B2, NONE), -+ PAD_NC(GPP_B3, NONE), -+ PAD_CFG_GPI_SCI(GPP_B4, NONE, DEEP, EDGE_SINGLE, INVERT), /* -TBT_PLUG_EVENT */ -+ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1), /* -CLKREQ_PCIE0 */ -+ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), /* -CLKREQ_PCIE4 */ -+ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), /* -CLKREQ_PCIE5 */ -+ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), /* -CLKREQ_PCIE6 */ -+ PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1), /* -CLKREQ_PCIE8 */ -+ PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1), /* -CLKREQ_PCIE10 */ -+ PAD_NC(GPP_B11, NONE), -+ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), /* -PCH_SLP_S0 */ -+ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* -PLTRST */ -+ PAD_CFG_NF(GPP_B14, NATIVE, DEEP, NF1), /* PCH_SPKR */ -+ PAD_CFG_GPO(GPP_B15, 1, DEEP), /* NFC_DLREQ */ -+ PAD_NC(GPP_B16, NONE), -+ PAD_NC(GPP_B17, NONE), -+ PAD_NC(GPP_B18, NONE), -+ PAD_NC(GPP_B19, NONE), -+ PAD_NC(GPP_B20, NONE), -+ PAD_NC(GPP_B21, NONE), -+ PAD_NC(GPP_B22, NONE), -+ PAD_NC(GPP_B23, NONE), -+ -+ /* ------- GPIO Community 1 ------- */ -+ -+ /* ------- GPIO Group GPP_C ------- */ -+ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* SMB_CLK */ -+ PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* SMB_DATA */ -+ PAD_NC(GPP_C2, NONE), -+ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* SML0_CLK */ -+ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* SML0_DATA */ -+ PAD_NC(GPP_C5, NONE), -+ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* EC_SCL2 */ -+ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* EC_SDA2 */ -+ PAD_NC(GPP_C8, NONE), -+ PAD_NC(GPP_C9, NONE), -+ PAD_NC(GPP_C10, NONE), -+ PAD_NC(GPP_C11, NONE), -+ PAD_NC(GPP_C12, NONE), -+ PAD_NC(GPP_C13, NONE), -+ PAD_NC(GPP_C14, NONE), -+ PAD_NC(GPP_C15, NONE), -+ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* I2C0_DATA */ -+ PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), /* I2C0_CLK */ -+ PAD_NC(GPP_C18, NONE), -+ PAD_NC(GPP_C19, NONE), -+ PAD_CFG_GPO(GPP_C20, 0, DEEP), /* EPRIVACY_ON */ -+ PAD_CFG_GPO(GPP_C21, 0, DEEP), /* TBT_FORCE_PWR */ -+ PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_SCI */ -+ PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_WAKE */ -+ -+ /* ------- GPIO Group GPP_D ------- */ -+ PAD_NC(GPP_D0, NONE), -+ PAD_NC(GPP_D1, NONE), -+ PAD_NC(GPP_D2, NONE), -+ PAD_NC(GPP_D3, NONE), -+ PAD_NC(GPP_D4, NONE), -+ PAD_NC(GPP_D5, NONE), -+ PAD_NC(GPP_D6, NONE), -+ PAD_NC(GPP_D7, NONE), -+ PAD_NC(GPP_D8, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_D9, UP_20K, DEEP, OFF, ACPI), /* -DISCRETE_PRESENCE */ -+ PAD_NC(GPP_D10, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_D11, UP_20K, DEEP, OFF, ACPI), /* DGFX_VRAM_ID0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_D12, UP_20K, DEEP, OFF, ACPI), /* DGFX_VRAM_ID1 */ -+ PAD_NC(GPP_D13, NONE), -+ PAD_NC(GPP_D14, NONE), -+ PAD_NC(GPP_D15, NONE), -+ PAD_NC(GPP_D16, NONE), -+ PAD_CFG_GPO(GPP_D17, 0, DEEP), /* DDI_PRIORITY1 */ -+ PAD_NC(GPP_D18, NONE), -+ PAD_NC(GPP_D19, NONE), -+ PAD_NC(GPP_D20, NONE), -+ PAD_NC(GPP_D21, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_D22, UP_20K, DEEP, OFF, ACPI), /* -NFC_DTCT */ -+ PAD_NC(GPP_D23, NONE), -+ -+ /* ------- GPIO Group GPP_E ------- */ -+ PAD_NC(GPP_E0, NONE), -+ PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1), /* -WWAN_SATA_DTCT (always HIGH) */ -+ PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1), /* -PE_DTCT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_E3, NONE, DEEP, EDGE_SINGLE, ACPI), /* -TBT_PLUG_EVENT */ -+ PAD_CFG_GPO(GPP_E4, 1, DEEP), /* NFC_ON */ -+ PAD_NC(GPP_E5, NONE), -+ PAD_CFG_NF(GPP_E6, NONE, RSMRST, NF1), /* SATA2_DEVSLP */ -+ PAD_NC(GPP_E7, NONE), -+ PAD_NC(GPP_E8, NONE), -+ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* -USB_PORT0_OC0 (AON port) */ -+ PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), /* -USB_PORT1_OC1 (regular port) */ -+ PAD_NC(GPP_E11, NONE), -+ PAD_CFG_GPI_APIC_HIGH(GPP_E12, NONE, DEEP), /* NFC_INT */ -+ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), /* DDIP1_HPD */ -+ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* DDIP2_HPD */ -+ PAD_NC(GPP_E15, NONE), -+ PAD_NC(GPP_E16, NONE), -+ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), /* EDP_HPD */ -+ PAD_NC(GPP_E18, NONE), -+ PAD_NC(GPP_E19, NONE), -+ PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1), /* DDIP2_CTRLCLK */ -+ PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1), /* DDIP2_CTRLDATA */ -+ PAD_CFG_TERM_GPO(GPP_E22, 0, UP_20K, RSMRST), /* -GPU_RST */ -+ PAD_CFG_TERM_GPO(GPP_E23, 0, UP_20K, RSMRST), /* 1R8VIDEO_AON_ON */ -+ -+ /* ------- GPIO Community 2 ------- */ -+ -+ /* -------- GPIO Group GPD -------- */ -+ PAD_CFG_NF(GPD0, NONE, PWROK, NF1), /* -BATLOW */ -+ PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), /* AC_PRESENT */ -+ PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1), /* -LANWAKE */ -+ PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), /* -PWRSW_EC */ -+ PAD_CFG_NF(GPD4, NONE, PWROK, NF1), /* -PCH_SLP_S3 */ -+ PAD_CFG_NF(GPD5, NONE, PWROK, NF1), /* -PCH_SLP_S4 */ -+ PAD_CFG_NF(GPD6, NONE, PWROK, NF1), /* -PCH_SLP_M */ -+ PAD_NC(GPD7, NONE), -+ PAD_CFG_NF(GPD8, NONE, PWROK, NF1), /* SUSCLK_32K */ -+ PAD_CFG_NF(GPD9, NONE, PWROK, NF1), /* -PCH_SLP_WLAN */ -+ PAD_CFG_NF(GPD10, NONE, PWROK, NF1), /* -PCH_SLP_S5 */ -+ PAD_CFG_NF(GPD11, NONE, PWROK, NF1), /* LANPHYPC */ -+ -+ /* ------- GPIO Community 3 ------- */ -+ -+ /* ------- GPIO Group GPP_F ------- */ -+ PAD_NC(GPP_F0, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_F1, NONE, DEEP, OFF, ACPI), /* GC6_FB_EN */ -+ PAD_CFG_GPO(GPP_F2, 1, DEEP), /* -GPU_EVENT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F3, NONE, DEEP, OFF, ACPI), /* DGFX_PWRGD */ -+ PAD_CFG_GPO(GPP_F4, 1, DEEP), /* -WWAN_RESET */ -+ PAD_NC(GPP_F5, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_F6, UP_20K, DEEP, OFF, ACPI), /* -MIC_HW_EN (R961 to GND) */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F7, UP_20K, DEEP, OFF, ACPI), /* -INT_MIC_DTCT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F8, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F9, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG1 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F10, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG2 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F11, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG3 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F12, UP_20K, DEEP, OFF, ACPI), /* PLANARID0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F13, UP_20K, DEEP, OFF, ACPI), /* PLANARID1 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F14, UP_20K, DEEP, OFF, ACPI), /* PLANARID2 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F15, UP_20K, DEEP, OFF, ACPI), /* PLANARID3 */ -+ PAD_NC(GPP_F16, NONE), -+ PAD_NC(GPP_F17, NONE), -+ PAD_NC(GPP_F18, NONE), -+ PAD_NC(GPP_F19, NONE), -+ PAD_NC(GPP_F20, NONE), -+ PAD_NC(GPP_F21, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_F22, UP_20K, DEEP, OFF, ACPI), /* -INTRUDER_PCH */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F23, UP_20K, DEEP, OFF, ACPI), /* -SC_DTCT */ -+ -+ /* ------- GPIO Group GPP_G ------- */ -+ PAD_NC(GPP_G0, NONE), -+ PAD_NC(GPP_G1, NONE), -+ PAD_NC(GPP_G2, NONE), -+ PAD_NC(GPP_G3, NONE), -+ PAD_CFG_GPO(GPP_G4, 0, DEEP), /* TBT_RTD3_PWR_EN */ -+ PAD_CFG_GPO(GPP_G5, 0, DEEP), /* TBT_FORCE_USB_PWR */ -+ PAD_CFG_GPO(GPP_G6, 0, DEEP), /* -TBT_PERST */ -+ PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT), /* -TBT_PCIE_WAKE */ -+}; -+ -+void variant_config_gpios(void) -+{ -+ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c -new file mode 100644 -index 0000000000..3a951ce0da ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c -@@ -0,0 +1,90 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include -+ -+const u32 cim_verb_data[] = { -+ 0x10ec0257, // Vendor/Device ID: Realtek ALC257 -+ 0x17aa225d, // Subsystem ID -+ 11, -+ AZALIA_SUBVENDOR(0, 0x17aa225d), -+ -+ AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_DESC( -+ AZALIA_INTEGRATED, -+ AZALIA_INTERNAL, -+ AZALIA_MIC_IN, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_NO_JACK_PRESENCE_DETECT, -+ 2, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x13, 0x40000000), // does not describe a jack or internal device -+ AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC( -+ AZALIA_INTEGRATED, -+ AZALIA_INTERNAL, -+ AZALIA_SPEAKER, -+ AZALIA_OTHER_ANALOG, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_NO_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, -+ AZALIA_MIC_IN, -+ AZALIA_STEREO_MONO_1_8, -+ AZALIA_BLACK, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 3, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x1d, 0x40661b45), // does not describe a jack or internal device -+ AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, -+ AZALIA_HP_OUT, -+ AZALIA_STEREO_MONO_1_8, -+ AZALIA_BLACK, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 15 -+ )), -+ -+ 0x8086280b, // Vendor/Device ID: Intel Kabylake HDMI -+ 0x80860101, // Subsystem ID -+ 4, -+ AZALIA_SUBVENDOR(2, 0x80860101), -+ -+ AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+ AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 2, 0 -+ )), -+ AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 3, 0 -+ )), -+}; -+ -+const u32 pc_beep_verbs[] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c -new file mode 100644 -index 0000000000..5252a402f9 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c -@@ -0,0 +1,20 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include -+#include -+ -+void mainboard_memory_init_params(FSPM_UPD *mupd) -+{ -+ FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; -+ mem_cfg->DqPinsInterleaved = true; /* DDR_DQ in interleave mode */ -+ mem_cfg->CaVrefConfig = 2; /* VREF_CA to CH_A and VREF_DQ_B to CH_B */ -+ mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE; -+ -+ /* Get SPD for memory slots */ -+ struct spd_block blk = { .addr_map = { 0x50, 0x51, } }; -+ get_spd_smbus(&blk); -+ dump_spd_info(&blk); -+ -+ mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0]; -+ mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1]; -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb -new file mode 100644 -index 0000000000..bf66bd3a69 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb -@@ -0,0 +1,103 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+chip soc/intel/skylake -+ device domain 0 on -+ device ref south_xhci on -+ register "usb2_ports" = "{ -+ [0] = USB2_PORT_MID(OC1), // USB-A -+ [1] = USB2_PORT_MID(OC0), // USB-A (always on) -+ [2] = USB2_PORT_MID(OC_SKIP), // JSC-1 (smartcard slot) -+ [3] = USB2_PORT_MID(OC_SKIP), // USB-C (charging port) -+ [4] = USB2_PORT_MID(OC_SKIP), // JCAM1 (IR camera) -+ [5] = USB2_PORT_MID(OC_SKIP), // JWWAN1 (M.2 WWAN USB) -+ [6] = USB2_PORT_MID(OC_SKIP), // JWLAN1 (M.2 WLAN USB) -+ [7] = USB2_PORT_MID(OC_SKIP), // JCAM1 (webcam) -+ [8] = USB2_PORT_MID(OC_SKIP), // JFPR1 (fingerprint reader) -+ [9] = USB2_PORT_MID(OC_SKIP), // JLCD1 (touch panel) -+ }" -+ register "usb3_ports" = "{ -+ [0] = USB3_PORT_DEFAULT(OC1), // USB-A -+ [1] = USB3_PORT_DEFAULT(OC0), // USB-A (always on) -+ [2] = USB3_PORT_DEFAULT(OC_SKIP), // RTS5344S (SD card reader) -+ [3] = USB3_PORT_DEFAULT(OC_SKIP), // USB-C (charging port) -+ }" -+ end -+ -+ device ref sata on -+ # SATA_2 - JHDD1 SATA SSD -+ register "SataPortsEnable[2]" = "1" -+ register "SataPortsDevSlp[2]" = "1" -+ end -+ -+ # PCIe controller 1 - 1x4 -+ # PCIE 1-4 - RP1 - dGPU - CLKOUT0 - CLKREQ0 -+ # -+ # PCIe controller 2 - 2x1+1x2 (lane reversal) -+ # PCIE 5 - GBE - GBE - CLKOUT1 - CLKREQ1 (clobbers RP8) -+ # PCIE 6 - RP7 - WLAN - CLKOUT2 - CLKREQ2 -+ # PCIE 7-8 - RP5 - WWAN - CLKOUT3 - CLKREQ3 -+ # -+ # PCIe controller 3 - 2x2 -+ # PCIE 9-10 - RP9 - TB3 - CLKOUT4 - CLKREQ4 -+ # PCIE 11-12 - RP11 - SSD - CLKOUT5 - CLKREQ5 -+ -+ # dGPU - x4 -+ device ref pcie_rp1 on -+ register "PcieRpEnable[0]" = "1" -+ register "PcieRpClkReqSupport[0]" = "1" -+ register "PcieRpClkReqNumber[0]" = "0" -+ register "PcieRpClkSrcNumber[0]" = "0" -+ register "PcieRpAdvancedErrorReporting[0]" = "1" -+ register "PcieRpLtrEnable[0]" = "1" -+ end -+ -+ # Ethernet (clobbers RP8) -+ device ref gbe on -+ register "LanClkReqSupported" = "1" -+ register "LanClkReqNumber" = "1" -+ register "EnableLanLtr" = "1" -+ register "EnableLanK1Off" = "1" -+ end -+ -+ # M.2 WLAN - x1 -+ device ref pcie_rp7 on -+ register "PcieRpEnable[6]" = "1" -+ register "PcieRpClkReqSupport[6]" = "1" -+ register "PcieRpClkReqNumber[6]" = "2" -+ register "PcieRpClkSrcNumber[6]" = "2" -+ register "PcieRpAdvancedErrorReporting[6]" = "1" -+ register "PcieRpLtrEnable[6]" = "1" -+ end -+ -+ # M.2 WWAN - x2 -+ device ref pcie_rp5 on -+ register "PcieRpEnable[4]" = "1" -+ register "PcieRpClkReqSupport[4]" = "1" -+ register "PcieRpClkReqNumber[4]" = "3" -+ register "PcieRpClkSrcNumber[4]" = "3" -+ register "PcieRpAdvancedErrorReporting[4]" = "1" -+ register "PcieRpLtrEnable[4]" = "1" -+ end -+ -+ # TB3 (Alpine Ridge LP) - x2 -+ device ref pcie_rp9 on -+ register "PcieRpEnable[8]" = "1" -+ register "PcieRpClkReqSupport[8]" = "1" -+ register "PcieRpClkReqNumber[8]" = "4" -+ register "PcieRpClkSrcNumber[8]" = "4" -+ register "PcieRpAdvancedErrorReporting[8]" = "1" -+ register "PcieRpLtrEnable[8]" = "1" -+ register "PcieRpHotPlug[8]" = "1" -+ end -+ -+ # M.2 2280 caddy - x2 -+ device ref pcie_rp11 on -+ register "PcieRpEnable[10]" = "1" -+ register "PcieRpClkReqSupport[10]" = "1" -+ register "PcieRpClkReqNumber[10]" = "5" -+ register "PcieRpClkSrcNumber[10]" = "5" -+ register "PcieRpAdvancedErrorReporting[10]" = "1" -+ register "PcieRpLtrEnable[10]" = "1" -+ end -+ end -+end -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..47732e37d5b2bad4e674fd10eafa605d26f97840 -GIT binary patch -literal 4106 -zcmeHJUu+a*5TCu>yW9JAmoD2P9tqx`iFWXCLD09RaS&4j$?kY0KGYdgn6;MZ*!anbk!PNr!a%eU -zTXkLEL3ly5L&oUX#CS7?b2%Kad?s-#@;mhg8>>>#S&)d2I -zmP&-g0$k02szSQj(Y*j}YYtQnDH0;2ui{mPhI!flfFgv9nqI4Wr~5_?s`k0kALiCvcP -zCrRUFrpVYPYn?Jn%6MGXUXj_GGJYa!U&-tn8Gn&ANnz_0+@olH3VTw)mlf@-!p8{!e#p0ct5}M(h16D>p?OGjSz6v3juERjS -z#z{?mXvVqrXs_rvUmYR40gNzg(QD6y9E94?4DWO|6eb83LI-smcVC6x1n2reH}rAp -zLM);f=tWDCr``UF5T>!;PYu^H1g>EBP8A}2*fM>s-@nC3pDV|}6+CtfhG(II7`pcw -z`jLfJ!?;*R@Bp=Nw2EPOC7FEs(cugIP_K6tN_$~tvS8nx6iOv|IMrO3&-m*N9ZP#b -znG^~>I|l1cUVSeD9r^k3h0TP}WWD9=MZxY<Z3B2yU!k71#YRpThOJtVheMDA50rV#s@U -z+nKbA{O(olYR}icuzQD*-cjBQ9;%!eMDVP>7mWsF@=%>o)wSgq=n%DHNOYwRr4Ao6 -zbNdgEn*RdDS>Rud+fIY0N8JkP3q6;>8o%R(CE2n3?Xg%qP+U%~6|{XFyxv7Y#;J2Z -XK$lk*wsY^m4}9|iz?mg_AjCfat$CyH - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads -new file mode 100644 -index 0000000000..fcfbd75a92 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads -@@ -0,0 +1,19 @@ -+-- SPDX-License-Identifier: GPL-2.0-or-later -+ -+with HW.GFX.GMA; -+with HW.GFX.GMA.Display_Probing; -+ -+use HW.GFX.GMA; -+use HW.GFX.GMA.Display_Probing; -+ -+private package GMA.Mainboard is -+ -+ ports : constant Port_List := -+ (eDP, -+ DP1, -+ DP2, -+ HDMI1, -+ HDMI2, -+ others => Disabled); -+ -+end GMA.Mainboard; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c -new file mode 100644 -index 0000000000..a98dd2bc4e ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c -@@ -0,0 +1,199 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include -+#include "../../gpio.h" -+ -+static const struct pad_config gpio_table[] = { -+ /* ------- GPIO Community 0 ------- */ -+ -+ /* ------- GPIO Group GPP_A ------- */ -+ PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1), /* -KBRC */ -+ PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1), /* LPC_AD0 */ -+ PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1), /* LPC_AD1 */ -+ PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1), /* LPC_AD2 */ -+ PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1), /* LPC_AD3 */ -+ PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1), /* -LPC_FRAME */ -+ PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), /* IRQSER */ -+ PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1), /* -TPM_IRQ */ -+ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), /* -CLKRUN */ -+ PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1), /* LPCCLK_EC_24M */ -+ PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1), /* LPCCLK_DEBUG_24M */ -+ PAD_NC(GPP_A11, NONE), -+ PAD_NC(GPP_A12, NONE), -+ PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1), /* -SUSWARN */ -+ PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1), /* -SUS_STAT */ -+ PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1), /* -SUSWARN */ -+ PAD_NC(GPP_A16, NONE), -+ PAD_NC(GPP_A17, NONE), -+ PAD_NC(GPP_A18, NONE), -+ PAD_NC(GPP_A19, NONE), -+ PAD_NC(GPP_A20, NONE), -+ PAD_NC(GPP_A21, NONE), -+ PAD_NC(GPP_A22, NONE), -+ PAD_NC(GPP_A23, NONE), -+ -+ /* ------- GPIO Group GPP_B ------- */ -+ PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), -+ PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), -+ PAD_NC(GPP_B2, NONE), -+ PAD_NC(GPP_B3, NONE), -+ PAD_CFG_GPI_SCI(GPP_B4, NONE, DEEP, EDGE_SINGLE, INVERT), /* -TBT_PLUG_EVENT */ -+ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1), /* -CLKREQ_PCIE0 (dGPU) */ -+ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), /* -CLKREQ_PCIE3 (WWAN) */ -+ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), /* -CLKREQ_PCIE4 (GBE) */ -+ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), /* -CLKREQ_PCIE5 (WLAN) */ -+ PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1), /* -CLKREQ_PCIE6 (TB3) */ -+ PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1), /* -CLKREQ_PCIE8 (SSD) */ -+ PAD_NC(GPP_B11, NONE), -+ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), /* -PCH_SLP_S0 */ -+ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* -PLTRST */ -+ PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), /* PCH_SPKR */ -+ PAD_CFG_GPO(GPP_B15, 0, DEEP), /* NFC_DLREQ */ -+ PAD_NC(GPP_B16, NONE), -+ PAD_NC(GPP_B17, NONE), -+ PAD_NC(GPP_B18, NONE), -+ PAD_NC(GPP_B19, NONE), -+ PAD_NC(GPP_B20, NONE), -+ PAD_NC(GPP_B21, NONE), -+ PAD_NC(GPP_B22, NONE), -+ PAD_NC(GPP_B23, NONE), -+ -+ /* ------- GPIO Community 1 ------- */ -+ -+ /* ------- GPIO Group GPP_C ------- */ -+ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* SMB_CLK */ -+ PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* SMB_DATA */ -+ PAD_CFG_GPO(GPP_C2, 1, DEEP), -+ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* SML0_CLK */ -+ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* SML0_DATA */ -+ PAD_NC(GPP_C5, NONE), -+ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* EC_SCL2 */ -+ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* EC_SDA2 */ -+ PAD_NC(GPP_C8, NONE), -+ PAD_NC(GPP_C9, NONE), -+ PAD_NC(GPP_C10, NONE), -+ PAD_NC(GPP_C11, NONE), -+ PAD_NC(GPP_C12, NONE), -+ PAD_NC(GPP_C13, NONE), -+ PAD_NC(GPP_C14, NONE), -+ PAD_NC(GPP_C15, NONE), -+ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* I2C0_DATA */ -+ PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), /* I2C0_CLK */ -+ PAD_NC(GPP_C18, NONE), -+ PAD_NC(GPP_C19, NONE), -+ PAD_CFG_GPO(GPP_C20, 0, DEEP), /* EPRIVACY_ON */ -+ PAD_CFG_GPO(GPP_C21, 0, DEEP), /* TBT_FORCE_PWR */ -+ PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_SCI */ -+ PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_WAKE */ -+ -+ /* ------- GPIO Group GPP_D ------- */ -+ PAD_NC(GPP_D0, NONE), -+ PAD_NC(GPP_D1, NONE), -+ PAD_NC(GPP_D2, NONE), -+ PAD_NC(GPP_D3, NONE), -+ PAD_NC(GPP_D4, NONE), -+ PAD_NC(GPP_D5, NONE), -+ PAD_NC(GPP_D6, NONE), -+ PAD_NC(GPP_D7, NONE), -+ PAD_NC(GPP_D8, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_D9, UP_20K, DEEP, OFF, ACPI), /* -DISCRETE_PRESENCE */ -+ PAD_NC(GPP_D10, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_D11, UP_20K, DEEP, OFF, ACPI), /* DGFX_VRAM_ID0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_D12, UP_20K, DEEP, OFF, ACPI), /* DGFX_VRAM_ID1 */ -+ PAD_NC(GPP_D13, NONE), -+ PAD_NC(GPP_D14, NONE), -+ PAD_NC(GPP_D15, NONE), -+ PAD_NC(GPP_D16, NONE), -+ PAD_CFG_GPO(GPP_D17, 0, DEEP), /* DDI_PRIORITY */ -+ PAD_NC(GPP_D18, NONE), -+ PAD_NC(GPP_D19, NONE), -+ PAD_NC(GPP_D20, NONE), -+ PAD_NC(GPP_D21, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_D22, UP_20K, DEEP, OFF, ACPI), /* -NFC_DTCT */ -+ PAD_NC(GPP_D23, NONE), -+ -+ /* ------- GPIO Group GPP_E ------- */ -+ PAD_CFG_GPO(GPP_E0, 1, DEEP), /* BDC_ON */ -+ PAD_NC(GPP_E1, NONE), -+ PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1), /* -SATA2_DTCT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_E3, NONE, DEEP, EDGE_SINGLE, ACPI), /* -TBT_PLUG_EVENT */ -+ PAD_CFG_GPO(GPP_E4, 1, DEEP), /* NFC_ON */ -+ PAD_NC(GPP_E5, NONE), -+ PAD_CFG_NF(GPP_E6, NONE, RSMRST, NF1), /* SATA2_DEVSLP */ -+ PAD_NC(GPP_E7, NONE), -+ PAD_NC(GPP_E8, NONE), -+ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* -USB_PORT0_OC0 */ -+ PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), /* -USB_PORT1_OC1 */ -+ PAD_NC(GPP_E11, NONE), -+ PAD_CFG_GPI_APIC_HIGH(GPP_E12, NONE, DEEP), /* NFC_INT */ -+ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), /* DDIP1_HPD */ -+ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* DDIP2_HPD */ -+ PAD_NC(GPP_E15, NONE), -+ PAD_NC(GPP_E16, NONE), -+ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), /* EDP_HPD */ -+ PAD_NC(GPP_E18, NONE), -+ PAD_CFG_GPO(GPP_E19, 0, DEEP), -+ PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1), /* DDIP2_CTRLCLK */ -+ PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1), /* DDIP2_CTRLDATA */ -+ PAD_CFG_TERM_GPO(GPP_E22, 0, UP_20K, RSMRST), /* -GPU_RST */ -+ PAD_CFG_TERM_GPO(GPP_E23, 0, UP_20K, RSMRST), /* 1R8VIDEO_AON_ON */ -+ -+ /* ------- GPIO Community 2 ------- */ -+ -+ /* -------- GPIO Group GPD -------- */ -+ PAD_CFG_NF(GPD0, NONE, PWROK, NF1), /* -BATLOW */ -+ PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), /* AC_PRESENT */ -+ PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1), /* -LANWAKE */ -+ PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), /* -PWRSW_EC */ -+ PAD_CFG_NF(GPD4, NONE, PWROK, NF1), /* -PCH_SLP_S3 */ -+ PAD_CFG_NF(GPD5, NONE, PWROK, NF1), /* -PCH_SLP_S4 */ -+ PAD_CFG_NF(GPD6, NONE, PWROK, NF1), /* -PCH_SLP_M */ -+ PAD_NC(GPD7, NONE), -+ PAD_CFG_NF(GPD8, NONE, PWROK, NF1), /* SUSCLK_32K */ -+ PAD_CFG_NF(GPD9, NONE, PWROK, NF1), /* -PCH_SLP_WLAN */ -+ PAD_CFG_NF(GPD10, NONE, PWROK, NF1), /* -PCH_SLP_S5 */ -+ PAD_CFG_NF(GPD11, NONE, PWROK, NF1), /* LANPHYPC */ -+ -+ /* ------- GPIO Community 3 ------- */ -+ -+ /* ------- GPIO Group GPP_F ------- */ -+ PAD_CFG_GPO(GPP_F0, 0, DEEP), -+ PAD_CFG_GPI_TRIG_OWN(GPP_F1, NONE, DEEP, OFF, ACPI), /* GC6_FB_EN */ -+ PAD_CFG_GPO(GPP_F2, 1, DEEP), /* -GPU_EVENT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F3, NONE, PLTRST, OFF, ACPI), /* DGFX_PWRGD */ -+ PAD_NC(GPP_F4, NONE), /* -WWAN_RESET */ -+ PAD_NC(GPP_F5, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_F6, UP_20K, DEEP, OFF, ACPI), /* -MIC_HW_EN (R37 to GND) */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F7, UP_20K, DEEP, OFF, ACPI), /* -INT_MIC_DTCT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F8, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F9, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG1 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F10, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG2 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F11, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG3 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F12, UP_20K, DEEP, OFF, ACPI), /* PLANARID0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F13, UP_20K, DEEP, OFF, ACPI), /* PLANARID1 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F14, UP_20K, DEEP, OFF, ACPI), /* PLANARID2 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F15, UP_20K, DEEP, OFF, ACPI), /* PLANARID3 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F16, UP_20K, DEEP, OFF, ACPI), /* MEMORYID0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F17, UP_20K, DEEP, OFF, ACPI), /* MEMORYID1 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F18, UP_20K, DEEP, OFF, ACPI), /* MEMORYID2 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F19, UP_20K, DEEP, OFF, ACPI), /* MEMORYID3 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F20, UP_20K, DEEP, OFF, ACPI), /* MEMORYID4 */ -+ PAD_NC(GPP_F21, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_F22, UP_20K, DEEP, OFF, ACPI), /* -TAMPER_SW_DTCT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F23, UP_20K, DEEP, OFF, ACPI), /* -SC_DTCT */ -+ -+ /* ------- GPIO Group GPP_G ------- */ -+ PAD_NC(GPP_G0, NONE), -+ PAD_NC(GPP_G1, NONE), -+ PAD_NC(GPP_G2, NONE), -+ PAD_NC(GPP_G3, NONE), -+ PAD_CFG_GPO(GPP_G4, 0, DEEP), /* TBT_RTD3_PWR_EN */ -+ PAD_CFG_GPO(GPP_G5, 0, DEEP), /* TBT_FORCE_USB_PWR */ -+ PAD_CFG_GPO(GPP_G6, 0, DEEP), /* -TBT_PERST */ -+ PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT), /* -TBT_PCIE_WAKE */ -+}; -+ -+void variant_config_gpios(void) -+{ -+ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c -new file mode 100644 -index 0000000000..b1d96c5a76 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c -@@ -0,0 +1,90 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include -+ -+const u32 cim_verb_data[] = { -+ 0x10ec0257, // Vendor/Device ID: Realtek ALC257 -+ 0x17aa2258, // Subsystem ID -+ 11, -+ AZALIA_SUBVENDOR(0, 0x17aa2258), -+ -+ AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_DESC( -+ AZALIA_INTEGRATED, -+ AZALIA_INTERNAL, -+ AZALIA_MIC_IN, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_NO_JACK_PRESENCE_DETECT, -+ 2, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x13, 0x40000000), // does not describe a jack or internal device -+ AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC( -+ AZALIA_INTEGRATED, -+ AZALIA_INTERNAL, -+ AZALIA_SPEAKER, -+ AZALIA_OTHER_ANALOG, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_NO_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, -+ AZALIA_MIC_IN, -+ AZALIA_STEREO_MONO_1_8, -+ AZALIA_BLACK, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 3, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x1d, 0x40661b45), // does not describe a jack or internal device -+ AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, -+ AZALIA_HP_OUT, -+ AZALIA_STEREO_MONO_1_8, -+ AZALIA_BLACK, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 15 -+ )), -+ -+ 0x8086280b, // Vendor/Device ID: Intel Kabylake HDMI -+ 0x80860101, // Subsystem ID -+ 4, -+ AZALIA_SUBVENDOR(2, 0x80860101), -+ -+ AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+ AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+ AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+}; -+ -+const u32 pc_beep_verbs[] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c -new file mode 100644 -index 0000000000..001e934b3a ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c -@@ -0,0 +1,44 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static const struct pad_config memory_id_gpio_table[] = { -+ PAD_CFG_GPI_TRIG_OWN(GPP_F16, UP_20K, DEEP, OFF, ACPI), /* MEMORYID0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F17, UP_20K, DEEP, OFF, ACPI), /* MEMORYID1 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F18, UP_20K, DEEP, OFF, ACPI), /* MEMORYID2 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F19, UP_20K, DEEP, OFF, ACPI), /* MEMORYID3 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F20, UP_20K, DEEP, OFF, ACPI), /* MEMORYID4 */ -+}; -+ -+void mainboard_memory_init_params(FSPM_UPD *mupd) -+{ -+ int spd_idx; -+ char spd_name[20]; -+ size_t spd_size; -+ -+ FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; -+ mem_cfg->DqPinsInterleaved = true; /* DDR_DQ in interleave mode */ -+ mem_cfg->CaVrefConfig = 2; /* VREF_CA to CH_A and VREF_DQ_B to CH_B */ -+ mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE; -+ -+ /* Get SPD for soldered RAM SPD (CH A) */ -+ gpio_configure_pads(memory_id_gpio_table, ARRAY_SIZE(memory_id_gpio_table)); -+ -+ spd_idx = gpio_get(GPP_F16) | gpio_get(GPP_F17) << 1 | gpio_get(GPP_F18) << 2 | -+ gpio_get(GPP_F19) << 3 | gpio_get(GPP_F20) << 4; -+ printk(BIOS_DEBUG, "Detected MEMORY_ID = %d\n", spd_idx); -+ snprintf(spd_name, sizeof(spd_name), "spd_%d.bin", spd_idx); -+ mem_cfg->MemorySpdPtr00 = (uintptr_t)cbfs_map(spd_name, &spd_size); -+ -+ /* Get SPD for memory slot (CH B) */ -+ struct spd_block blk = { .addr_map = { [1] = 0x51, } }; -+ get_spd_smbus(&blk); -+ dump_spd_info(&blk); -+ -+ mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1]; -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb -new file mode 100644 -index 0000000000..d4afca20c4 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb -@@ -0,0 +1,103 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+chip soc/intel/skylake -+ device domain 0 on -+ device ref south_xhci on -+ register "usb2_ports" = "{ -+ [0] = USB2_PORT_MID(OC0), // JUSB1 (USB-A always on) -+ [1] = USB2_PORT_MID(OC1), // JUSB2 (USB-A) -+ [2] = USB2_PORT_MID(OC_SKIP), // JFPR (smartcard slot) -+ [3] = USB2_PORT_MID(OC_SKIP), // JUSBC (USB-C) -+ [4] = USB2_PORT_MID(OC_SKIP), // JCAM (IR camera) -+ [5] = USB2_PORT_MID(OC_SKIP), // JWWAN (M.2 WWAN USB) -+ [6] = USB2_PORT_MID(OC_SKIP), // JWLAN (M.2 WLAN USB) -+ [7] = USB2_PORT_MID(OC_SKIP), // JCAM (webcam) -+ [8] = USB2_PORT_MID(OC_SKIP), // JFPR (fingerprint reader) -+ [9] = USB2_PORT_MID(OC_SKIP), // JLCD (touch panel) -+ }" -+ register "usb3_ports" = "{ -+ [0] = USB3_PORT_DEFAULT(OC0), // JUSB1 (USB-A always on) -+ [1] = USB3_PORT_DEFAULT(OC1), // JUSB2 (USB-A) -+ [2] = USB3_PORT_DEFAULT(OC_SKIP), // JSD (SD card reader) -+ [3] = USB3_PORT_DEFAULT(OC_SKIP), // JUSBC (USB-C) -+ }" -+ end -+ -+ device ref sata on -+ # SATA_2 - Main M.2 SATA SSD -+ register "SataPortsEnable[2]" = "1" -+ register "SataPortsDevSlp[2]" = "1" -+ end -+ -+ # PCIe controller 1 - 1x2+2x1 -+ # PCIE 1-2 - RP1 - dGPU - CLKOUT0 - CLKREQ0 -+ # PCIE 4 - RP4 - WWAN - CLKOUT1 - CLKREQ1 -+ # -+ # PCIe controller 2 - 2x1+1x2 (lane reversal) -+ # PCIE 5 - GBE - GBE - CLKOUT2 - CLKREQ2 (clobbers RP8) -+ # PCIE 6 - RP7 - WLAN - CLKOUT3 - CLKREQ3 -+ # PCIE 7-8 - RP5 - TB3 - CLKOUT4 - CLKREQ4 -+ # -+ # PCIe controller 3 - 1x4 (lane reversal) -+ # PCIE 9-12 - RP9 - SSD - CLKOUT5 - CLKREQ5 -+ -+ # dGPU - x2 -+ device ref pcie_rp1 on -+ register "PcieRpEnable[0]" = "1" -+ register "PcieRpClkReqSupport[0]" = "1" -+ register "PcieRpClkReqNumber[0]" = "0" -+ register "PcieRpClkSrcNumber[0]" = "0" -+ register "PcieRpAdvancedErrorReporting[0]" = "1" -+ register "PcieRpLtrEnable[0]" = "1" -+ end -+ -+ # M.2 WWAN - x1 -+ device ref pcie_rp4 on -+ register "PcieRpEnable[3]" = "1" -+ register "PcieRpClkReqSupport[3]" = "1" -+ register "PcieRpClkReqNumber[3]" = "1" -+ register "PcieRpClkSrcNumber[3]" = "1" -+ register "PcieRpAdvancedErrorReporting[3]" = "1" -+ register "PcieRpLtrEnable[3]" = "1" -+ end -+ -+ # Ethernet (clobbers RP8) -+ device ref gbe on -+ register "LanClkReqSupported" = "1" -+ register "LanClkReqNumber" = "2" -+ register "EnableLanLtr" = "1" -+ register "EnableLanK1Off" = "1" -+ end -+ -+ # M.2 WLAN - x1 -+ device ref pcie_rp7 on -+ register "PcieRpEnable[6]" = "1" -+ register "PcieRpClkReqSupport[6]" = "1" -+ register "PcieRpClkReqNumber[6]" = "3" -+ register "PcieRpClkSrcNumber[6]" = "3" -+ register "PcieRpAdvancedErrorReporting[6]" = "1" -+ register "PcieRpLtrEnable[6]" = "1" -+ end -+ -+ # TB3 (Alpine Ridge LP) - x2 -+ device ref pcie_rp5 on -+ register "PcieRpEnable[4]" = "1" -+ register "PcieRpClkReqSupport[4]" = "1" -+ register "PcieRpClkReqNumber[4]" = "4" -+ register "PcieRpClkSrcNumber[4]" = "4" -+ register "PcieRpAdvancedErrorReporting[4]" = "1" -+ register "PcieRpLtrEnable[4]" = "1" -+ register "PcieRpHotPlug[4]" = "1" -+ end -+ -+ # M.2 2280 SSD - x2 -+ device ref pcie_rp9 on -+ register "PcieRpEnable[8]" = "1" -+ register "PcieRpClkReqSupport[8]" = "1" -+ register "PcieRpClkReqNumber[8]" = "5" -+ register "PcieRpClkSrcNumber[8]" = "5" -+ register "PcieRpAdvancedErrorReporting[8]" = "1" -+ register "PcieRpLtrEnable[8]" = "1" -+ end -+ end -+end -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin -new file mode 100644 -index 0000000000000000000000000000000000000000..86f39ddb55ea9fb58d5e5699637636ef597c734e -GIT binary patch -literal 512 -zcmY!u;9+)EWZ+<6U|?oq29gXMJYRrxPEL*>N67~+1r7#Qh7a1t+8`-(puhlu3{YAD -YT>%dM8_BI;nL`dsaHtp+rc($20I8n}l>h($ - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_1.bin 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0000000000000000000000000000000000000000..940f1e3cd8e5bd9ea32a82a14edcdcbc8132d8c7 -GIT binary patch -literal 512 -zcmY!u<-XH%N8S?V-1R3%^a4B#wurjQW(9mG0U=XnZ$x{Q& -z0UPq1A)%L_QJxwGl4(Y*BAFWD+8T7AOcTeDU_*B^6OSleBX=`bLy)jxgN`d)<=|uh -E020*^DF6Tf - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin -new file mode 100644 -index 0000000000000000000000000000000000000000..30c84410d417ef7afa8705c93cdb64a9f4e915a0 -GIT binary patch -literal 512 -zcmY!uW!enxp}7)YiWinU~FgllWifig`TLxK(6%}hL^bdB7N9Ss$Lz^FmT39fQ* -FG5`?&65ap+ - -literal 0 -HcmV?d00001 - --- -2.39.5 - diff --git a/patches/coreboot-24.12/0004-do-not-break-building-other-thinkpads-with-the-hacks.patch b/patches/coreboot-24.12/0004-do-not-break-building-other-thinkpads-with-the-hacks.patch deleted file mode 100644 index 81517093a..000000000 --- a/patches/coreboot-24.12/0004-do-not-break-building-other-thinkpads-with-the-hacks.patch +++ /dev/null @@ -1,157 +0,0 @@ -From d2188ab8134a6a9c67e64dda643b770221dba648 Mon Sep 17 00:00:00 2001 -From: gaspar-ilom -Date: Thu, 6 Mar 2025 23:00:00 +0000 -Subject: [PATCH] do not break building other thinkpads with the hacks for the - t480/s made Mate Kukri - -still not fixing things properly but at least it should now be possible to build older thinkpads without regressions. -prior, some code was just commented or unreachable. now we make this explicit with preprocessor directives. -heads should build all boards on this coreboot version from the same coreboot tree. - -Signed-off-by: gaspar-ilom ---- - src/device/pci_rom.c | 8 +++++--- - src/ec/lenovo/h8/acpi/ec.asl | 4 +++- - src/ec/lenovo/h8/bluetooth.c | 15 ++++++++++----- - src/ec/lenovo/h8/wwan.c | 14 ++++++++++---- - 4 files changed, 28 insertions(+), 13 deletions(-) - -diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c -index cc6b9b068a..7d4b52ba30 100644 ---- a/src/device/pci_rom.c -+++ b/src/device/pci_rom.c -@@ -304,13 +304,15 @@ void pci_rom_ssdt(const struct device *device) - return; - } - --#if 0 -+ #if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON) -+ const char *scope = "\\_SB.PCI0.RP01.PEGP"; -+ #else - const char *scope = acpi_device_path(device); -+ #endif - if (!scope) { - printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device)); - return; - } --#endif - - /* Supports up to four devices. */ - if ((CBMEM_ID_ROM0 + ngfx) > CBMEM_ID_ROM3) { -@@ -338,7 +340,7 @@ void pci_rom_ssdt(const struct device *device) - memcpy(cbrom, rom, cbrom_length); - - /* write _ROM method */ -- acpigen_write_scope("\\_SB.PCI0.RP01.PEGP"); -+ acpigen_write_scope(scope); - acpigen_write_rom(cbrom, cbrom_length); - acpigen_pop_len(); /* pop scope */ - } -diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl -index 8f4a8e1986..f80c15106c 100644 ---- a/src/ec/lenovo/h8/acpi/ec.asl -+++ b/src/ec/lenovo/h8/acpi/ec.asl -@@ -331,7 +331,9 @@ Device(EC) - #include "sleepbutton.asl" - #include "lid.asl" - #include "beep.asl" --//#include "thermal.asl" -+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON) -+#include "thermal.asl" -+#endif - #include "systemstatus.asl" - #include "thinkpad.asl" - } -diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c -index be71a24ced..0b729bd819 100644 ---- a/src/ec/lenovo/h8/bluetooth.c -+++ b/src/ec/lenovo/h8/bluetooth.c -@@ -1,6 +1,7 @@ - /* SPDX-License-Identifier: GPL-2.0-only */ -- --// #include -+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON) -+#include -+#endif - #include - #include - #include -@@ -26,23 +27,27 @@ void h8_bluetooth_enable(int on) - */ - bool h8_has_bdc(const struct device *dev) - { -+ #if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON) -+ printk(BIOS_INFO, "H8: BDC detection not implemented. " -+ "Assuming BDC installed\n"); -+ return true; -+ #else - struct ec_lenovo_h8_config *conf = dev->chip_info; - -- if (1 || !conf->has_bdc_detection) { -+ if (!conf->has_bdc_detection) { - printk(BIOS_INFO, "H8: BDC detection not implemented. " - "Assuming BDC installed\n"); - return true; - } - --#if 0 - if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) { - printk(BIOS_INFO, "H8: BDC installed\n"); - return true; - } --#endif - - printk(BIOS_INFO, "H8: BDC not installed\n"); - return false; -+ #endif - } - - /* -diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c -index 5cdcf77406..0a62583c56 100644 ---- a/src/ec/lenovo/h8/wwan.c -+++ b/src/ec/lenovo/h8/wwan.c -@@ -1,6 +1,8 @@ - /* SPDX-License-Identifier: GPL-2.0-only */ - --// #include -+#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON) -+#include -+#endif - #include - #include - #include -@@ -24,23 +26,27 @@ void h8_wwan_enable(int on) - */ - bool h8_has_wwan(const struct device *dev) - { -+ #if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON) -+ printk(BIOS_INFO, "H8: WWAN detection not implemented. " -+ "Assuming WWAN installed\n"); -+ return true; -+ #else - struct ec_lenovo_h8_config *conf = dev->chip_info; - -- if (1 || !conf->has_wwan_detection) { -+ if (!conf->has_wwan_detection) { - printk(BIOS_INFO, "H8: WWAN detection not implemented. " - "Assuming WWAN installed\n"); - return true; - } - --#if 0 - if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) { - printk(BIOS_INFO, "H8: WWAN installed\n"); - return true; - } --#endif - - printk(BIOS_INFO, "H8: WWAN not installed\n"); - return false; -+ #endif - } - - /* --- -2.39.5 - diff --git a/patches/coreboot-24.12/0005-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch b/patches/coreboot-24.12/0005-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch deleted file mode 100644 index 7dae2d6ad..000000000 --- a/patches/coreboot-24.12/0005-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 12ff6e798d1cefc5b888e6035e52bf6d70c9ca47 Mon Sep 17 00:00:00 2001 -From: Leah Rowe -Date: Tue, 31 Dec 2024 01:40:42 +0000 -Subject: [PATCH 11/11] soc/intel/pmc: Hardcoded poweroff after power fail - -Coreboot can set the power state for power on after previous -power failure, based on the option table. On the ThinkPad T480, -we have no nvram and, due to coreboot's design, we therefore -have no option table, so the default setting is enabled. - -In my testing, this seems to be that the system will turn on -after a power failure. If your ThinkPad was previously in a state -where it wouldn't turn on when plugging in the power, it'd be fine. - -If your battery ran out later on, this would be triggered and -your ThinkPad would permanently turn on, when plugging in a charger, -and there is currently no way to configure this behaviour. - -We currently only use the common SoC PMC code on the ThinkPad -T480, T480s and the Dell OptiPlex 3050 Micro, at the time of -this patch, and it is desirable that the system be set to power -off after power fail anyway. - -In some cases, you might want the opposite, for example if you're -running a server. This will be documented on the website, for that -reason. - -Signed-off-by: Leah Rowe ---- - src/soc/intel/common/block/pmc/pmclib.c | 36 +++---------------------- - 1 file changed, 4 insertions(+), 32 deletions(-) - -diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c -index 0fadd6e409..843581b285 100644 ---- a/src/soc/intel/common/block/pmc/pmclib.c -+++ b/src/soc/intel/common/block/pmc/pmclib.c -@@ -760,38 +760,10 @@ void pmc_clear_pmcon_sts(void) - - void pmc_set_power_failure_state(const bool target_on) - { -- const unsigned int state = get_uint_option("power_on_after_fail", -- CONFIG_MAINBOARD_POWER_FAILURE_STATE); -- -- /* -- * On the shutdown path (target_on == false), we only need to -- * update the register for MAINBOARD_POWER_STATE_PREVIOUS. For -- * all other cases, we don't write the register to avoid clob- -- * bering the value set on the boot path. This is necessary, -- * for instance, when we can't access the option backend in SMM. -- */ -- -- switch (state) { -- case MAINBOARD_POWER_STATE_OFF: -- if (!target_on) -- break; -- printk(BIOS_INFO, "Set power off after power failure.\n"); -- pmc_soc_set_afterg3_en(false); -- break; -- case MAINBOARD_POWER_STATE_ON: -- if (!target_on) -- break; -- printk(BIOS_INFO, "Set power on after power failure.\n"); -- pmc_soc_set_afterg3_en(true); -- break; -- case MAINBOARD_POWER_STATE_PREVIOUS: -- printk(BIOS_INFO, "Keep power state after power failure.\n"); -- pmc_soc_set_afterg3_en(target_on); -- break; -- default: -- printk(BIOS_WARNING, "Unknown power-failure state: %d\n", state); -- break; -- } -+ if (!target_on) -+ return; -+ printk(BIOS_INFO, "Set power off after power failure.\n"); -+ pmc_soc_set_afterg3_en(false); - } - - /* This function returns the highest assertion duration of the SLP_Sx assertion widths */ --- -2.39.5 - diff --git a/patches/coreboot-24.12/0006-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch b/patches/coreboot-24.12/0006-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch deleted file mode 100644 index 5e4e6edb3..000000000 --- a/patches/coreboot-24.12/0006-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 916c7b027faba625b922e74e45e50f9ceab64a64 Mon Sep 17 00:00:00 2001 -From: Leah Rowe -Date: Mon, 6 Jan 2025 01:16:01 +0000 -Subject: [PATCH 1/1] ec/dasharo: Comment EC_DASHARO_EC_FLASH_SIZE - -We don't use anything dasharo in Libreboot. - -This patch prevents the following config item appearing -in T480 and 3050 Micro configs: - -CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x20000 - -Otherwise, make-oldconfig adds it automatically. - -Signed-off-by: Leah Rowe ---- - src/ec/dasharo/ec/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/src/ec/dasharo/ec/Kconfig b/src/ec/dasharo/ec/Kconfig -index 901d3ce514..071e37f95e 100644 ---- a/src/ec/dasharo/ec/Kconfig -+++ b/src/ec/dasharo/ec/Kconfig -@@ -28,4 +28,4 @@ config EC_DASHARO_EC_UPDATE_FILE - - config EC_DASHARO_EC_FLASH_SIZE - hex -- default 0x20000 -+ # default 0x20000 --- -2.39.5 - diff --git a/patches/coreboot-24.12/0007-src-intel-skylake-Disable-stack-overflow-debug-optio.patch b/patches/coreboot-24.12/0007-src-intel-skylake-Disable-stack-overflow-debug-optio.patch deleted file mode 100644 index 843700894..000000000 --- a/patches/coreboot-24.12/0007-src-intel-skylake-Disable-stack-overflow-debug-optio.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 00b6459a9b360b16529036d9b1e10c977228a7ff Mon Sep 17 00:00:00 2001 -From: Leah Rowe -Date: Mon, 6 Jan 2025 01:36:23 +0000 -Subject: [PATCH 1/1] src/intel/skylake: Disable stack overflow debug options - -The option was appearing in T480/3050micro configs of lbmk, -after updating on the coreboot/next uprev for 20241206 rev8: - -CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y - -I did some digging. See coreboot commit: - -commit 51cc2bacb6b07279b97e9934d079060475481fb6 -Author: Subrata Banik -Date: Fri Dec 13 13:07:28 2024 +0530 - - soc/intel/pantherlake: Disable stack overflow debug options - -Well now: - -I'm disabling this behaviour on Skylake, for the same -behaviour, because I want as few behaviour changes in general, -as possible, for the rev8 release. - -According to Subrata's patch, which was for Pantherlake, -without this change, stack corruption can occur on verstage -and romstage early on. Please look at that coreboot patch, -referenced above, for clarity. - -I see no harm in disabling this option for Skylake, since -the behaviour that it otherwise enables was not present -before. - -Signed-off-by: Leah Rowe ---- - src/soc/intel/skylake/Kconfig | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig -index 8e25f796ed..7d324e15ea 100644 ---- a/src/soc/intel/skylake/Kconfig -+++ b/src/soc/intel/skylake/Kconfig -@@ -130,6 +130,15 @@ config DCACHE_RAM_SIZE - The size of the cache-as-ram region required during bootblock - and/or romstage. - -+# Override DEBUG Kconfig to avoid false alarm about stack overflow. -+config DEBUG_STACK_OVERFLOW_BREAKPOINTS -+ bool -+ default n -+ -+config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES -+ bool -+ default n -+ - config DCACHE_BSP_STACK_SIZE - hex - default 0x20400 if FSP_USES_CB_STACK --- -2.39.5 - diff --git a/patches/coreboot-24.12/0008-src-intel-x4x-Disable-stack-overflow-debug.patch b/patches/coreboot-24.12/0008-src-intel-x4x-Disable-stack-overflow-debug.patch deleted file mode 100644 index e2eae2a93..000000000 --- a/patches/coreboot-24.12/0008-src-intel-x4x-Disable-stack-overflow-debug.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 5671d54d347b110ffade5b8b6e2d052612a8716c Mon Sep 17 00:00:00 2001 -From: Leah Rowe -Date: Mon, 6 Jan 2025 01:53:53 +0000 -Subject: [PATCH 1/1] src/intel/x4x: Disable stack overflow debug - -Signed-off-by: Leah Rowe ---- - src/northbridge/intel/x4x/Kconfig | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig -index 097e11126c..7e4e14cf94 100644 ---- a/src/northbridge/intel/x4x/Kconfig -+++ b/src/northbridge/intel/x4x/Kconfig -@@ -28,6 +28,15 @@ config ECAM_MMCONF_BUS_NUMBER - int - default 256 - -+# Override DEBUG Kconfig to avoid false alarm about stack overflow. -+config DEBUG_STACK_OVERFLOW_BREAKPOINTS -+ bool -+ default n -+ -+config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES -+ bool -+ default n -+ - # This number must be equal or lower than what's reported in ACPI PCI _CRS - config DOMAIN_RESOURCE_32BIT_LIMIT - default 0xfec00000 --- -2.39.5 - diff --git a/patches/coreboot-25.09/0001-drivers-intel-dtbt-Add-discrete-Thunderbolt-driver.patch b/patches/coreboot-25.09/0001-drivers-intel-dtbt-Add-discrete-Thunderbolt-driver.patch new file mode 100644 index 000000000..957f77ebc --- /dev/null +++ b/patches/coreboot-25.09/0001-drivers-intel-dtbt-Add-discrete-Thunderbolt-driver.patch @@ -0,0 +1,358 @@ +From 8fa2db22db51dd5cde80b0be37cf0af59145cae7 Mon Sep 17 00:00:00 2001 +From: Jeremy Soller +Date: Fri, 31 May 2024 13:58:00 -0600 +Subject: [PATCH 1/5] drivers/intel/dtbt: Add discrete Thunderbolt driver + +Add a new driver which enables basic TBT support for the Alpine Ridge, +Titan Ridge, and Maple Ridge discrete Thunderbolt controllers. + +This driver will initially be used on the Lenovo T480/T480s and +System76 RPL-HX platform boards. It currently only supports a single +dTBT controller. + +Ref: edk2-platforms KabylakeOpenBoardPkg reference implementation +Ref: Titan Ridge BIOS Implementation Guide v1.4 +Ref: Maple Ridge BIOS Implementation Guide v1.6 (#632472) + +Change-Id: Ib78ce43740956fa2c93b9ebddb0eeb319dcc0364 +Signed-off-by: Jeremy Soller +Signed-off-by: Tim Crawford +Signed-off-by: Matt DeVillier +--- + src/drivers/intel/dtbt/Kconfig | 6 + + src/drivers/intel/dtbt/Makefile.mk | 3 + + src/drivers/intel/dtbt/chip.h | 8 ++ + src/drivers/intel/dtbt/dtbt.c | 202 +++++++++++++++++++++++++++++ + src/drivers/intel/dtbt/dtbt.h | 73 +++++++++++ + 5 files changed, 292 insertions(+) + create mode 100644 src/drivers/intel/dtbt/Kconfig + create mode 100644 src/drivers/intel/dtbt/Makefile.mk + create mode 100644 src/drivers/intel/dtbt/chip.h + create mode 100644 src/drivers/intel/dtbt/dtbt.c + create mode 100644 src/drivers/intel/dtbt/dtbt.h + +diff --git a/src/drivers/intel/dtbt/Kconfig b/src/drivers/intel/dtbt/Kconfig +new file mode 100644 +index 0000000000..d895dbd288 +--- /dev/null ++++ b/src/drivers/intel/dtbt/Kconfig +@@ -0,0 +1,6 @@ ++config DRIVERS_INTEL_DTBT ++ def_bool n ++ help ++ Support for discrete Thunderbolt controllers. ++ Currently only supports a single dTBT controller from the ++ Alpine Ridge, Titan Ridge, and Maple Ridge families. +diff --git a/src/drivers/intel/dtbt/Makefile.mk b/src/drivers/intel/dtbt/Makefile.mk +new file mode 100644 +index 0000000000..1b5252dda0 +--- /dev/null ++++ b/src/drivers/intel/dtbt/Makefile.mk +@@ -0,0 +1,3 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++ ++ramstage-$(CONFIG_DRIVERS_INTEL_DTBT) += dtbt.c +diff --git a/src/drivers/intel/dtbt/chip.h b/src/drivers/intel/dtbt/chip.h +new file mode 100644 +index 0000000000..2b1dfa70a5 +--- /dev/null ++++ b/src/drivers/intel/dtbt/chip.h +@@ -0,0 +1,8 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#ifndef _DRIVERS_INTEL_DTBT_CHIP_H_ ++#define _DRIVERS_INTEL_DTBT_CHIP_H_ ++ ++struct drivers_intel_dtbt_config {}; ++ ++#endif /* _DRIVERS_INTEL_DTBT_CHIP_H_ */ +diff --git a/src/drivers/intel/dtbt/dtbt.c b/src/drivers/intel/dtbt/dtbt.c +new file mode 100644 +index 0000000000..8613eee5e0 +--- /dev/null ++++ b/src/drivers/intel/dtbt/dtbt.c +@@ -0,0 +1,202 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "chip.h" ++#include "dtbt.h" ++ ++ ++/* ++ * We only want to enable the first/primary bridge device, ++ * as sending mailbox commands to secondary ones will fail, ++ * and we only want to create a single ACPI device in the SSDT. ++ */ ++static bool enable_done; ++static bool ssdt_done; ++ ++static void dtbt_cmd(struct device *dev, u32 command, u32 data, u32 timeout) ++{ ++ u32 reg = (data << 8) | (command << 1) | PCIE2TBT_VALID; ++ u32 status; ++ ++ printk(BIOS_SPEW, "dTBT send command 0x%x\n", command); ++ /* Send command */ ++ pci_write_config32(dev, PCIE2TBT, reg); ++ /* Wait for done bit to be cleared */ ++ if (!wait_ms(timeout, (status = pci_read_config32(dev, TBT2PCIE)) & TBT2PCIE_DONE)) ++ printk(BIOS_ERR, "dTBT command 0x%x send timeout, status 0x%x\n", command, status); ++ /* Clear valid bit */ ++ pci_write_config32(dev, PCIE2TBT, 0); ++ /* Wait for done bit to be cleared */ ++ if (!wait_ms(timeout, (status = pci_read_config32(dev, TBT2PCIE)) & TBT2PCIE_DONE)) ++ printk(BIOS_ERR, "dTBT command 0x%x clear valid bit timeout, status 0x%x\n", command, status); ++} ++ ++static void dtbt_write_dsd(void) ++{ ++ struct acpi_dp *dsd = acpi_dp_new_table("_DSD"); ++ ++ acpi_device_add_hotplug_support_in_d3(dsd); ++ acpi_device_add_external_facing_port(dsd); ++ acpi_dp_write(dsd); ++} ++ ++static void dtbt_write_opregion(const struct bus *bus) ++{ ++ uintptr_t mmconf_base = (uintptr_t)CONFIG_ECAM_MMCONF_BASE_ADDRESS ++ + (((uintptr_t)(bus->secondary)) << 20); ++ const struct opregion opregion = OPREGION("PXCS", SYSTEMMEMORY, mmconf_base, 0x1000); ++ const struct fieldlist fieldlist[] = { ++ FIELDLIST_OFFSET(TBT2PCIE), ++ FIELDLIST_NAMESTR("TB2P", 32), ++ FIELDLIST_OFFSET(PCIE2TBT), ++ FIELDLIST_NAMESTR("P2TB", 32), ++ }; ++ ++ acpigen_write_opregion(&opregion); ++ acpigen_write_field("PXCS", fieldlist, ARRAY_SIZE(fieldlist), ++ FIELD_DWORDACC | FIELD_NOLOCK | FIELD_PRESERVE); ++} ++ ++static void dtbt_fill_ssdt(const struct device *dev) ++{ ++ struct bus *bus; ++ struct device *parent; ++ const char *parent_scope; ++ const char *dev_name = acpi_device_name(dev); ++ ++ if (ssdt_done) ++ return; ++ ++ bus = dev->upstream; ++ if (!bus) { ++ printk(BIOS_ERR, "dTBT bus invalid\n"); ++ return; ++ } ++ ++ parent = bus->dev; ++ if (!parent || !is_pci(parent)) { ++ printk(BIOS_ERR, "dTBT parent invalid\n"); ++ return; ++ } ++ ++ parent_scope = acpi_device_path(parent); ++ if (!parent_scope) { ++ printk(BIOS_ERR, "dTBT parent scope not valid\n"); ++ return; ++ } ++ ++ /* Scope */ ++ acpigen_write_scope(parent_scope); ++ dtbt_write_dsd(); ++ ++ /* Device */ ++ acpigen_write_device(dev_name); ++ acpigen_write_name_integer("_ADR", 0); ++ dtbt_write_opregion(bus); ++ ++ /* PTS Method */ ++ acpigen_write_method_serialized("PTS", 0); ++ ++ acpigen_write_debug_string("dTBT prepare to sleep"); ++ acpigen_write_store_int_to_namestr(PCIE2TBT_GO2SX_NO_WAKE << 1, "P2TB"); ++ acpigen_write_delay_until_namestr_int(GO2SX_TIMEOUT_MS, "TB2P", PCIE2TBT_GO2SX_NO_WAKE << 1); ++ ++ acpigen_write_debug_namestr("TB2P"); ++ acpigen_write_store_int_to_namestr(0, "P2TB"); ++ acpigen_write_delay_until_namestr_int(GO2SX_TIMEOUT_MS, "TB2P", 0); ++ acpigen_write_debug_namestr("TB2P"); ++ ++ acpigen_write_method_end(); ++ acpigen_write_device_end(); ++ acpigen_write_scope_end(); ++ ++ // \.TBTS Method ++ acpigen_write_scope("\\"); ++ acpigen_write_method("TBTS", 0); ++ acpigen_emit_namestring(acpi_device_path_join(dev, "PTS")); ++ acpigen_write_method_end(); ++ acpigen_write_scope_end(); ++ ++ printk(BIOS_INFO, "%s.%s %s\n", parent_scope, dev_name, dev_path(dev)); ++ ssdt_done = true; ++} ++ ++static const char *dtbt_acpi_name(const struct device *dev) ++{ ++ return "DTBT"; ++} ++ ++static void dtbt_enable(struct device *dev) ++{ ++ if (!is_dev_enabled(dev) || enable_done) ++ return; ++ ++ printk(BIOS_INFO, "dTBT controller found at %s\n", dev_path(dev)); ++ ++ // XXX: Recommendation is to set SL1 ("User Authorization") ++ printk(BIOS_DEBUG, "dTBT set security level SL0\n"); ++ /* Set security level */ ++ dtbt_cmd(dev, PCIE2TBT_SET_SECURITY_LEVEL, SEC_LEVEL_NONE, MBOX_TIMEOUT_MS); ++ ++ if (acpi_is_wakeup_s3()) { ++ printk(BIOS_DEBUG, "dTBT SX exit\n"); ++ dtbt_cmd(dev, PCIE2TBT_SX_EXIT_TBT_CONNECTED, 0, MBOX_TIMEOUT_MS); ++ /* Read TBT2PCIE register, verify not invalid */ ++ if (pci_read_config32(dev, TBT2PCIE) == 0xffffffff) ++ printk(BIOS_ERR, "dTBT S3 resume failure.\n"); ++ } else { ++ printk(BIOS_DEBUG, "dTBT set boot on\n"); ++ dtbt_cmd(dev, PCIE2TBT_BOOT_ON, 0, MBOX_TIMEOUT_MS); ++ printk(BIOS_DEBUG, "dTBT set USB on\n"); ++ dtbt_cmd(dev, PCIE2TBT_USB_ON, 0, MBOX_TIMEOUT_MS); ++ } ++ enable_done = true; ++} ++ ++static struct pci_operations dtbt_device_ops_pci = { ++ .set_subsystem = 0, ++}; ++ ++static struct device_operations dtbt_device_ops = { ++ .read_resources = pci_bus_read_resources, ++ .set_resources = pci_dev_set_resources, ++ .enable_resources = pci_bus_enable_resources, ++ .acpi_fill_ssdt = dtbt_fill_ssdt, ++ .acpi_name = dtbt_acpi_name, ++ .scan_bus = pciexp_scan_bridge, ++ .reset_bus = pci_bus_reset, ++ .ops_pci = &dtbt_device_ops_pci, ++ .enable = dtbt_enable ++}; ++ ++/* We only want to match the (first) bridge device */ ++static const unsigned short pci_device_ids[] = { ++ AR_2C_BRG, ++ AR_4C_BRG, ++ AR_LP_BRG, ++ AR_4C_C0_BRG, ++ AR_2C_C0_BRG, ++ TR_2C_BRG, ++ TR_4C_BRG, ++ TR_DD_BRG, ++ MR_2C_BRG, ++ MR_4C_BRG, ++ 0 ++}; ++ ++static const struct pci_driver intel_dtbt_driver __pci_driver = { ++ .ops = &dtbt_device_ops, ++ .vendor = PCI_VID_INTEL, ++ .devices = pci_device_ids, ++}; ++ ++struct chip_operations drivers_intel_dtbt_ops = { ++ .name = "Intel Discrete Thunderbolt", ++}; +diff --git a/src/drivers/intel/dtbt/dtbt.h b/src/drivers/intel/dtbt/dtbt.h +new file mode 100644 +index 0000000000..d01d3a35ef +--- /dev/null ++++ b/src/drivers/intel/dtbt/dtbt.h +@@ -0,0 +1,73 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#ifndef _DRIVERS_INTEL_DTBT_H_ ++#define _DRIVERS_INTEL_DTBT_H_ ++ ++/* Alpine Ridge device IDs */ ++#define AR_2C_NHI 0x1575 ++#define AR_2C_BRG 0x1576 ++#define AR_2C_USB 0x15B5 ++#define AR_4C_NHI 0x1577 ++#define AR_4C_BRG 0x1578 ++#define AR_4C_USB 0x15B6 ++#define AR_LP_NHI 0x15BF ++#define AR_LP_BRG 0x15C0 ++#define AR_LP_USB 0x15C1 ++#define AR_4C_C0_NHI 0x15D2 ++#define AR_4C_C0_BRG 0x15D3 ++#define AR_4C_C0_USB 0x15D4 ++#define AR_2C_C0_NHI 0x15D9 ++#define AR_2C_C0_BRG 0x15DA ++#define AR_2C_C0_USB 0x15DB ++ ++/* Titan Ridge device IDs */ ++#define TR_2C_BRG 0x15E7 ++#define TR_2C_NHI 0x15E8 ++#define TR_2C_USB 0x15E9 ++#define TR_4C_BRG 0x15EA ++#define TR_4C_NHI 0x15EB ++#define TR_4C_USB 0x15EC ++#define TR_DD_BRG 0x15EF ++#define TR_DD_USB 0x15F0 ++ ++/* Maple Ridge device IDs */ ++#define MR_2C_BRG 0x1133 ++#define MR_2C_NHI 0x1134 ++#define MR_2C_USB 0x1135 ++#define MR_4C_BRG 0x1136 ++#define MR_4C_NHI 0x1137 ++#define MR_4C_USB 0x1138 ++ ++/* Security Levels */ ++#define SEC_LEVEL_NONE 0 ++#define SEC_LEVEL_USER 1 ++#define SEC_LEVEL_AUTH 2 ++#define SEC_LEVEL_DP_ONLY 3 ++ ++#define PCIE2TBT 0x54C ++#define PCIE2TBT_VALID BIT(0) ++#define PCIE2TBT_GO2SX 2 ++#define PCIE2TBT_GO2SX_NO_WAKE 3 ++#define PCIE2TBT_SX_EXIT_TBT_CONNECTED 4 ++#define PCIE2TBT_OS_UP 6 ++#define PCIE2TBT_SET_SECURITY_LEVEL 8 ++#define PCIE2TBT_GET_SECURITY_LEVEL 9 ++#define PCIE2TBT_BOOT_ON 24 ++#define PCIE2TBT_USB_ON 25 ++#define PCIE2TBT_GET_ENUMERATION_METHOD 26 ++#define PCIE2TBT_SET_ENUMERATION_METHOD 27 ++#define PCIE2TBT_POWER_CYCLE 28 ++#define PCIE2TBT_SX_START 29 ++#define PCIE2TBT_ACL_BOOT 30 ++#define PCIE2TBT_CONNECT_TOPOLOGY 31 ++ ++#define TBT2PCIE 0x548 ++#define TBT2PCIE_DONE BIT(0) ++ ++// Timeout for mailbox commands unless otherwise specified. ++#define MBOX_TIMEOUT_MS 5000 ++ ++// Timeout for controller to ack GO2SX/GO2SX_NO_WAKE mailbox command. ++#define GO2SX_TIMEOUT_MS 600 ++ ++#endif /* _DRIVERS_INTEL_DTBT_H_ */ +-- +2.39.5 + diff --git a/patches/coreboot-25.09/0002-mb-lenovo-t480-s-Enable-TBT-support.patch b/patches/coreboot-25.09/0002-mb-lenovo-t480-s-Enable-TBT-support.patch new file mode 100644 index 000000000..b96bd917d --- /dev/null +++ b/patches/coreboot-25.09/0002-mb-lenovo-t480-s-Enable-TBT-support.patch @@ -0,0 +1,123 @@ +From ebcbb7cdae80f3bc91e90229a84646133b481c4f Mon Sep 17 00:00:00 2001 +From: Matt DeVillier +Date: Fri, 18 Jul 2025 14:24:05 -0500 +Subject: [PATCH 2/5] mb/lenovo/t480(s): Enable TBT support + +Select the discrete TBT controller driver, and configure the necessary +GPIOs for the Alpine Ridge TBT controller to be fully functional. +Update the documentation w/r/t TBT functionality. + +TEST=build/boot Lenovo T480, boot Linux, verify all TBT-related PCI +devices populated, lower USB-C port works for USB data and PCIe. + +Change-Id: Ie5586fa72ed6819b9d1c37373c21605d39bad7b4 +Signed-off-by: Matt DeVillier +--- + Documentation/mainboard/lenovo/t480.md | 5 ++--- + src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 2 ++ + src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c | 8 ++++---- + .../lenovo/sklkbl_thinkpad/variants/t480s/gpio.c | 8 ++++---- + 4 files changed, 12 insertions(+), 11 deletions(-) + +diff --git a/Documentation/mainboard/lenovo/t480.md b/Documentation/mainboard/lenovo/t480.md +index 9ebce8ff7d..4c3408c4aa 100644 +--- a/Documentation/mainboard/lenovo/t480.md ++++ b/Documentation/mainboard/lenovo/t480.md +@@ -162,8 +162,6 @@ binaries if only flashing the `bios` region. + + ## Known Issues + +-- Alpine Ridge Thunderbolt 3 controller does not work +- - Lower (right) USB-C port only works for charging/DP alt mode, not USB/PCIe data + - Some Fn+F{1-12} keys aren't handled correctly + - Nvidia dGPU is finicky + - Needs option ROM +@@ -175,6 +173,7 @@ binaries if only flashing the `bios` region. + + ## Verified Working + ++- Alpine Ridge Thunderbolt 3 controller + - Integrated graphics init with libgfxinit + - video output: internal (eDP), miniDP + - ACPI support +@@ -196,4 +195,4 @@ binaries if only flashing the `bios` region. + [from Lenovo's site]: https://pcsupport.lenovo.com/gb/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480s-type-20l7-20l8/solutions/ht508988-critical-intel-thunderbolt-software-and-firmware-updates-thinkpad + [how to externally flash the TB3 firmware]: https://libreboot.org/docs/install/t480.html#thunderbolt-issue-read-this-before-flashing + [Dell firmware updater]: https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe +-[Dell_PFS_Extract.py]: https://github.com/vuquangtrong/Dell-PFS-BIOS-Assembler/blob/master/Dell_PFS_Extract.py +\ No newline at end of file ++[Dell_PFS_Extract.py]: https://github.com/vuquangtrong/Dell-PFS-BIOS-Assembler/blob/master/Dell_PFS_Extract.py +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig +index 6036ceb06d..e6fb950d66 100644 +--- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig +@@ -26,12 +26,14 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON + config BOARD_LENOVO_T480 + bool + select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON ++ select DRIVERS_INTEL_DTBT + select MEC1653_HAS_DEBUG_UNLOCK + select VARIANT_HAS_DGPU + + config BOARD_LENOVO_T480S + bool + select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON ++ select DRIVERS_INTEL_DTBT + select VARIANT_HAS_DGPU + + if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c +index f337843fd9..ffd2841e49 100644 +--- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c +@@ -86,7 +86,7 @@ static const struct pad_config gpio_table[] = { + PAD_NC(GPP_C18, NONE), + PAD_NC(GPP_C19, NONE), + PAD_CFG_GPO(GPP_C20, 0, DEEP), /* EPRIVACY_ON */ +- PAD_CFG_GPO(GPP_C21, 0, DEEP), /* TBT_FORCE_PWR */ ++ PAD_CFG_GPO(GPP_C21, 1, PLTRST), /* TBT_FORCE_PWR */ + PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_SCI */ + PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_WAKE */ + +@@ -191,9 +191,9 @@ static const struct pad_config gpio_table[] = { + PAD_NC(GPP_G1, NONE), + PAD_NC(GPP_G2, NONE), + PAD_NC(GPP_G3, NONE), +- PAD_CFG_GPO(GPP_G4, 0, DEEP), /* TBT_RTD3_PWR_EN */ +- PAD_CFG_GPO(GPP_G5, 0, DEEP), /* TBT_FORCE_USB_PWR */ +- PAD_CFG_GPO(GPP_G6, 0, DEEP), /* -TBT_PERST */ ++ PAD_CFG_GPO(GPP_G4, 1, PLTRST), /* TBT_RTD3_PWR_EN */ ++ PAD_CFG_GPO(GPP_G5, 1, PLTRST), /* TBT_FORCE_USB_PWR */ ++ PAD_CFG_GPO(GPP_G6, 1, PLTRST), /* -TBT_PERST */ + PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT), /* -TBT_PCIE_WAKE */ + }; + +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c +index 4f1c57390d..c24c1abb07 100644 +--- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c +@@ -82,7 +82,7 @@ static const struct pad_config gpio_table[] = { + PAD_NC(GPP_C18, NONE), + PAD_NC(GPP_C19, NONE), + PAD_CFG_GPO(GPP_C20, 0, DEEP), /* EPRIVACY_ON */ +- PAD_CFG_GPO(GPP_C21, 0, DEEP), /* TBT_FORCE_PWR */ ++ PAD_CFG_GPO(GPP_C21, 1, PLTRST), /* TBT_FORCE_PWR */ + PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_SCI */ + PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_WAKE */ + +@@ -187,9 +187,9 @@ static const struct pad_config gpio_table[] = { + PAD_NC(GPP_G1, NONE), + PAD_NC(GPP_G2, NONE), + PAD_NC(GPP_G3, NONE), +- PAD_CFG_GPO(GPP_G4, 0, DEEP), /* TBT_RTD3_PWR_EN */ +- PAD_CFG_GPO(GPP_G5, 0, DEEP), /* TBT_FORCE_USB_PWR */ +- PAD_CFG_GPO(GPP_G6, 0, DEEP), /* -TBT_PERST */ ++ PAD_CFG_GPO(GPP_G4, 1, PLTRST), /* TBT_RTD3_PWR_EN */ ++ PAD_CFG_GPO(GPP_G5, 1, PLTRST), /* TBT_FORCE_USB_PWR */ ++ PAD_CFG_GPO(GPP_G6, 1, PLTRST), /* -TBT_PERST */ + PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT), /* -TBT_PCIE_WAKE */ + }; + +-- +2.39.5 + diff --git a/patches/coreboot-24.12/0009-post-skylake-pr0.patch b/patches/coreboot-25.09/0003-soc-intel-lockdown-Allow-locking-down-SPI-and-LPC-in.patch similarity index 98% rename from patches/coreboot-24.12/0009-post-skylake-pr0.patch rename to patches/coreboot-25.09/0003-soc-intel-lockdown-Allow-locking-down-SPI-and-LPC-in.patch index 0f63b133c..b5f7aa404 100644 --- a/patches/coreboot-24.12/0009-post-skylake-pr0.patch +++ b/patches/coreboot-25.09/0003-soc-intel-lockdown-Allow-locking-down-SPI-and-LPC-in.patch @@ -1,7 +1,7 @@ -From f9f309190246c66e92db5408c183dd8b617987f3 Mon Sep 17 00:00:00 2001 +From d8ee9def7fe87b647cdeb951485efc679d119d86 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Sat, 23 Nov 2024 22:43:10 +0100 -Subject: [PATCH] soc/intel/lockdown: Allow locking down SPI and LPC in SMM +Subject: [PATCH 3/5] soc/intel/lockdown: Allow locking down SPI and LPC in SMM MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -47,9 +47,7 @@ Signed-off-by: Michał Żygowski src/soc/intel/pantherlake/finalize.c | 4 +- src/soc/intel/skylake/finalize.c | 3 +- src/soc/intel/tigerlake/finalize.c | 4 +- - src/soc/intel/xeon_sp/finalize.c | 3 +- - src/soc/intel/xeon_sp/lockdown.c | 18 ++----- - 19 files changed, 127 insertions(+), 67 deletions(-) + 17 files changed, 121 insertions(+), 52 deletions(-) create mode 100644 src/soc/intel/common/pch/lockdown/lockdown_lpc.c create mode 100644 src/soc/intel/common/pch/lockdown/lockdown_spi.c diff --git a/patches/coreboot-24.12/0010-cbmem_tpm-clear_whole_log_on_creation.patch b/patches/coreboot-25.09/0004-security-tpm-tspi-log-tpm1.c-Clear-whole-log-area-on.patch similarity index 89% rename from patches/coreboot-24.12/0010-cbmem_tpm-clear_whole_log_on_creation.patch rename to patches/coreboot-25.09/0004-security-tpm-tspi-log-tpm1.c-Clear-whole-log-area-on.patch index adb939789..7a4a2bc73 100644 --- a/patches/coreboot-24.12/0010-cbmem_tpm-clear_whole_log_on_creation.patch +++ b/patches/coreboot-25.09/0004-security-tpm-tspi-log-tpm1.c-Clear-whole-log-area-on.patch @@ -1,7 +1,7 @@ -From b83a7607203d285b76e94ffd2013c55b184f5d42 Mon Sep 17 00:00:00 2001 +From 75fd76064b2c4a9319c4e63301b04eed5627b292 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Wed, 30 Oct 2024 10:50:37 +0100 -Subject: [PATCH] security/tpm/tspi/log-tpm1.c: Clear whole log area on +Subject: [PATCH 4/5] security/tpm/tspi/log-tpm1.c: Clear whole log area on creation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 diff --git a/patches/coreboot-25.09/0005-Fix-local-build-issues.patch b/patches/coreboot-25.09/0005-Fix-local-build-issues.patch new file mode 100644 index 000000000..d30039136 --- /dev/null +++ b/patches/coreboot-25.09/0005-Fix-local-build-issues.patch @@ -0,0 +1,26 @@ +From e0b2d04a00f727a8e468dbb2fe29235680f58ce6 Mon Sep 17 00:00:00 2001 +From: gaspar-ilom +Date: Sat, 18 Oct 2025 00:47:38 +0200 +Subject: [PATCH 5/5] Fix local build issues + +Change-Id: I31e570e742f64850ef5bfba2c8b859cb1efbff6c +Signed-off-by: gaspar-ilom +--- + util/cbmem/cbmem.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c +index 018ea871f9..dcdc3aab6a 100644 +--- a/util/cbmem/cbmem.c ++++ b/util/cbmem/cbmem.c +@@ -3,6 +3,7 @@ + #include + #include + #include ++#include + #include + #include + #include +-- +2.39.5 +