vhdl homework
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Makefile
PS2_Keyboard.vhdl added key output; add clk to sensitivity list Nov 2, 2012
README.md
alu.vhdl
alu_wrapper.vhdl change alu_wrapper to output w/f regs; add regrotate to rotate displa… Oct 9, 2012
android_tools.vhdl
androids.vhdl
basys2.vhdl
basys2_mux.vhdl
bcd.vhdl
bcd_test.vhdl
board.vhdl
clocksync.vhdl
coin_counter.vhdl
counter.vhdl
d_ff.vhdl add generic param to d_ff for data size Nov 24, 2012
dbg.vhdl
digits_to_7seg.vhdl remove some dead code Oct 28, 2012
divider.vhdl
edge_to_pulse.vhdl
fifo.vhdl remove many, many latches and lo! I have a working RS232 serial trans… Dec 3, 2012
fifo_file.vhdl
fifo_top.vhdl
filetst.vhdl
hello.vhdl
hex_to_7seg.vhdl
memory8bit.vhdl fix goof around hardwired numbers; hardwire to 8-bit Nov 18, 2012
money_to_7seg.vhdl
opcodes.vhdl
puter.vhdl
random.vhdl
reg.vhdl
register.vhdl
register_test.vhdl
regrotate.vhdl
rs232.vhdl
rs232_rx.vhdl
sevenseg.vhdl
ssegmuxor.vhdl
stub_hex_to_7seg.vhdl
subway_tickets.vhdl
switch_to_7seg.vhdl
switch_to_led.vhdl
tb_Edge_to_Pulse.vhdl
test_alu.vhdl
test_alu_wrapper.vhdl
test_basys2.vhdl
test_bcd.vhdl
test_coin_counter.vhdl clear the button before pressing a new button Nov 1, 2012
test_counter.vhdl VHDL homework Oct 6, 2012
test_digits_to_7seg.vhdl
test_divider.vhdl VHDL homework Oct 6, 2012
test_fifo.vhdl
test_hex_to_7seg.vhdl
test_memory8bit.vhdl
test_money_to_7seg.vhdl
test_random.vhdl
test_register.vhdl
test_regrotate.vhdl
test_rs232.vhdl
test_sseg.vhdl
test_ssegmuxor.vhdl
test_switch_to_7seg.vhdl
test_ticket_counter.vhdl
test_ticket_dispense.vhdl
test_ticket_display.vhdl
test_write_string.vhdl
ticket_counter.vhdl
ticket_dispense.vhdl remove synthesis clock Nov 1, 2012
ticket_display.vhdl
ticketzones.vhdl
top_money.vhdl
top_rs232.vhdl IT WORKS! added game over state; added board update RAM; add RAM init… Dec 17, 2012
top_ticket_counter.vhdl
top_ticket_dispense.vhdl
top_zone_choose.vhdl
write_string.vhdl add more comments Dec 16, 2012

README.md

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