{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":3058456,"defaultBranch":"master","name":"lk","ownerLogin":"littlekernel","currentUserCanPush":false,"isFork":false,"isEmpty":false,"createdAt":"2011-12-27T19:19:36.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/15386632?v=4","public":true,"private":false,"isOrgOwned":true},"refInfo":{"name":"","listCacheKey":"v0:1716530177.0","currentOid":""},"activityList":{"items":[{"before":"954d6291c73d007afc37b19ba4f577f30ad9e946","after":"07ab2785fb4d421384cb5429225b15ccd99a8946","ref":"refs/heads/wip/virtio-pci","pushedAt":"2024-06-03T20:17:36.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"WIP virtio working on getting MSI-x working","shortMessageHtmlLink":"WIP virtio working on getting MSI-x working"}},{"before":"ad5f5297895e0b1ada8478098373ba1699ffadb9","after":"954d6291c73d007afc37b19ba4f577f30ad9e946","ref":"refs/heads/wip/virtio-pci","pushedAt":"2024-06-03T08:04:26.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"WIP virtio working on getting MSI-x working","shortMessageHtmlLink":"WIP virtio working on getting MSI-x working"}},{"before":"b9c3603c5908d953bc4b4fd8c90b1e9dbdd5bea2","after":"14bd7728a658cd424cb05ef84ef76b88e4da2cc9","ref":"refs/heads/master","pushedAt":"2024-06-02T22:38:23.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[arch][riscv][feature] add a few more feature bits\n\nThese may be useful in the future.","shortMessageHtmlLink":"[arch][riscv][feature] add a few more feature bits"}},{"before":"59f97195d47fbc3b067467c0ae85894f898599db","after":"b9c3603c5908d953bc4b4fd8c90b1e9dbdd5bea2","ref":"refs/heads/master","pushedAt":"2024-06-02T21:52:16.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[arch][riscv] fix typo matching against the zifencei feature","shortMessageHtmlLink":"[arch][riscv] fix typo matching against the zifencei feature"}},{"before":"566b25d1ec77dc60c0b2b8ee11b65e98369e7890","after":"59f97195d47fbc3b067467c0ae85894f898599db","ref":"refs/heads/master","pushedAt":"2024-06-02T00:45:56.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[vscode] add a new (mostly empty) code workspace and a clang tidy file\n\nThe clang tidy file is mostly a copy of the fuchsia one, with a few\ntweaks here and there.","shortMessageHtmlLink":"[vscode] add a new (mostly empty) code workspace and a clang tidy file"}},{"before":"479f7fb9b7d23434a6cfc03111cd76caab1a200a","after":"566b25d1ec77dc60c0b2b8ee11b65e98369e7890","ref":"refs/heads/master","pushedAt":"2024-06-02T00:30:26.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[arch][riscv] read the riscv feature string out of device tree\n\nAlso added initial implementation of a way to query run time features of\nthe cpu.","shortMessageHtmlLink":"[arch][riscv] read the riscv feature string out of device tree"}},{"before":"0e25214ed829ded348ed766f39694c33469ab6d4","after":"479f7fb9b7d23434a6cfc03111cd76caab1a200a","ref":"refs/heads/master","pushedAt":"2024-06-01T22:01:27.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"Revert \"[arch][arm64][mmio] add 'Z' to the mmio write accessor inline asm\"\n\nSadly this doesn't really work in all situations and only happens to\nwork with gcc + binutils for 32bit accesses, presumably because gnu as\nreplaces a literal 0 with wzr.\n\nClang doesn't understand it at all.\n\nThis reverts commit 6c14941decb4b032f2c75ae78fbca0c1340d93bb.","shortMessageHtmlLink":"Revert \"[arch][arm64][mmio] add 'Z' to the mmio write accessor inline…"}},{"before":"e705034a48661c80af25dc76f2a0201a7e7eced9","after":"ad5f5297895e0b1ada8478098373ba1699ffadb9","ref":"refs/heads/wip/virtio-pci","pushedAt":"2024-05-29T05:29:57.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[dev][virtio][pci] PCI based virtio\n\nFirst pass at PCI based virtio.\nAdded a PCI based virtio-bus layer that abstracts the details from the\ndevice layer.\nOnly wired up for virtio-blk at the moment.\nIRQs are wired up in legacy mode (no MSI-X support in PCI yet).","shortMessageHtmlLink":"[dev][virtio][pci] PCI based virtio"}},{"before":"f99cc0f58451e0faebf7aa2aedb32a831446186b","after":"0e25214ed829ded348ed766f39694c33469ab6d4","ref":"refs/heads/master","pushedAt":"2024-05-29T05:07:05.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[README] update link to gcc 14.1","shortMessageHtmlLink":"[README] update link to gcc 14.1"}},{"before":"4c17353a805774f99c7534b49d495ad35fc947fa","after":"e705034a48661c80af25dc76f2a0201a7e7eced9","ref":"refs/heads/wip/virtio-pci","pushedAt":"2024-05-28T08:48:33.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"WIP [dev][virtio][pci] PCI based virtio\n\nMostly wired up at this point for virtio-block.\nInterrupts are wired up (non MSI-X) but not seeing any results after\nsubmitting a block transfer. Unclear if kick is not working.","shortMessageHtmlLink":"WIP [dev][virtio][pci] PCI based virtio"}},{"before":"6c14941decb4b032f2c75ae78fbca0c1340d93bb","after":"f99cc0f58451e0faebf7aa2aedb32a831446186b","ref":"refs/heads/master","pushedAt":"2024-05-25T23:50:32.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[project][fs] add partition sniffing code to the default fs virtual project","shortMessageHtmlLink":"[project][fs] add partition sniffing code to the default fs virtual p…"}},{"before":"7791ec047cf0b17461ddcabcdb711d20f0fd513b","after":"6c14941decb4b032f2c75ae78fbca0c1340d93bb","ref":"refs/heads/master","pushedAt":"2024-05-25T05:34:43.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[arch][arm64][mmio] add 'Z' to the mmio write accessor inline asm\n\nThis allows the compiler to use the xzr register if writing a zero\nvalue, instead of uselessly moving 0 into a register first.","shortMessageHtmlLink":"[arch][arm64][mmio] add 'Z' to the mmio write accessor inline asm"}},{"before":"00e0cfff53e0282ac3579de3036dd0938f3bc990","after":"94bce26b6fe05f4b8e8b9a01f33f44bd4e131b7f","ref":"refs/heads/wip/riscv32-supervisor","pushedAt":"2024-05-24T06:06:03.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"WIP riscv32 supervisor mode\n\nKinda a fatal flaw with the way riscv assumes physmap starts at address\n0, so will require some rethinking, probably","shortMessageHtmlLink":"WIP riscv32 supervisor mode"}},{"before":"79ab47ca727ad9536b35388d92a7e5d796ca1353","after":"4c17353a805774f99c7534b49d495ad35fc947fa","ref":"refs/heads/wip/virtio-pci","pushedAt":"2024-05-24T06:04:08.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"WIP virtio-pci","shortMessageHtmlLink":"WIP virtio-pci"}},{"before":null,"after":"00e0cfff53e0282ac3579de3036dd0938f3bc990","ref":"refs/heads/wip/riscv32-supervisor","pushedAt":"2024-05-24T05:56:17.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"WIP riscv32 supervisor mode\n\nKinda a fatal flaw with the way riscv assumes physmap starts at address\n0, so will require some rethinking, probably","shortMessageHtmlLink":"WIP riscv32 supervisor mode"}},{"before":"035739433ec664b1fa991ffa62f29da677a16e21","after":"7791ec047cf0b17461ddcabcdb711d20f0fd513b","ref":"refs/heads/master","pushedAt":"2024-05-24T03:47:21.000Z","pushType":"push","commitsCount":3,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[gitignore] ignore .cache directory\n\nSeems to be where some clangd stuff is tossed.","shortMessageHtmlLink":"[gitignore] ignore .cache directory"}},{"before":"1a761abb83fafd4dc6203ed4ffc9b61c4eb362a0","after":"035739433ec664b1fa991ffa62f29da677a16e21","ref":"refs/heads/master","pushedAt":"2024-05-14T08:34:42.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[arch][arm] avoid using -mgeneral-regs-only for arm32\n\nFor older compilers (gcc 7.5.0 in particular) avoid using\n-mgeneral-regs-only to override the floating point switches, since it\ndoesn't seem to understand that switch.\n\nInstead more properly add the floating point switches for a module or\nsource file compiled with float. More compatible with all compilers.","shortMessageHtmlLink":"[arch][arm] avoid using -mgeneral-regs-only for arm32"}},{"before":"356e9adc0109d24d1163c27a3238e219dfbfe38d","after":"1a761abb83fafd4dc6203ed4ffc9b61c4eb362a0","ref":"refs/heads/master","pushedAt":"2024-05-14T07:57:25.000Z","pushType":"push","commitsCount":6,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[arch][arm] Add support for float/nofloat compile options\n\nWas already added to arm64, but arch/arm hadn't picked up this feature\nyet. Uncovered a few places here or there that wasn't marking code as\nfloat/no-float, but this fixes a problem where newer compilers are\nstarting to sneak in vector code because they can.\n\nIssue #406","shortMessageHtmlLink":"[arch][arm] Add support for float/nofloat compile options"}},{"before":null,"after":"e8486608e80aebca05fd65a7c0c0a6261542f978","ref":"refs/heads/wip/mmio","pushedAt":"2024-05-13T07:40:34.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[platform][qemu-virt-arm] update the uart driver to use the new mmio routines\n\nThis was the driver that triggered the whole thing, since GCC 14.1 was\nstarting to use more fancier addressing modes that was causing QEMU to\nbomb out when using KVM.","shortMessageHtmlLink":"[platform][qemu-virt-arm] update the uart driver to use the new mmio …"}},{"before":"3c71b665f6c30317bdc2e32571eaf45fbfc036b8","after":"356e9adc0109d24d1163c27a3238e219dfbfe38d","ref":"refs/heads/master","pushedAt":"2024-05-10T23:16:54.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[make] remove an undefine, unsupported on older gnu makes\n\nIt wasn't really that important anyway, was just a general nicety in the\nriscv rules.mk","shortMessageHtmlLink":"[make] remove an undefine, unsupported on older gnu makes"}},{"before":"d54735cf5d48c1f0d2c31feb084e7bd7a9fe230a","after":"3c71b665f6c30317bdc2e32571eaf45fbfc036b8","ref":"refs/heads/master","pushedAt":"2024-05-10T07:44:08.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[platform][arm-qemu] fix issue with uart driver on KVM\n\nThe accessing method the compiler is emitting for the *REG32 macros on\narm32 and arm64 is occasionally generating load/stores with writeback.\nThough this has worked before, it seems to be rejected with whatever\ncombination of qemu + linux + hardware on this Raspberry Pi 5.\n\nConvert the register accessors to inline asm that uses basic load/store\ninstructions, which is really the only correct thing to do now and in\nthe long run. Add a TODO to move this to reg.h and start to revamp how\nregisters are accessed across LK, but for now keep it just here to fix\nthings.","shortMessageHtmlLink":"[platform][arm-qemu] fix issue with uart driver on KVM"}},{"before":"2f98fbf772dc5a01d06bce8ca65511c86eb4c4f5","after":"d54735cf5d48c1f0d2c31feb084e7bd7a9fe230a","ref":"refs/heads/master","pushedAt":"2024-05-10T06:12:32.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[scripts][do-qemuarm] add switch to try to use KVM","shortMessageHtmlLink":"[scripts][do-qemuarm] add switch to try to use KVM"}},{"before":"d2ef1ffff87852d58ccb7336ca38ee2a1c583190","after":"79ab47ca727ad9536b35388d92a7e5d796ca1353","ref":"refs/heads/wip/virtio-pci","pushedAt":"2024-05-10T05:32:31.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"WIP virtio-pci","shortMessageHtmlLink":"WIP virtio-pci"}},{"before":"5d8dd9c36ae811f72b9aade36f5900beb7533599","after":"2f98fbf772dc5a01d06bce8ca65511c86eb4c4f5","ref":"refs/heads/master","pushedAt":"2024-05-10T05:18:33.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[pci][fdt] do not attempt to configure PCI with 64bit bars on a 32bit system\n\nEspecially in the case where the 32bit system doesn't have an MMU, avoid\nusing any high addresses for BARs.","shortMessageHtmlLink":"[pci][fdt] do not attempt to configure PCI with 64bit bars on a 32bit…"}},{"before":"fbcbd6491cfa697658226e1fa91c4975c0943c92","after":"d2ef1ffff87852d58ccb7336ca38ee2a1c583190","ref":"refs/heads/wip/virtio-pci","pushedAt":"2024-05-10T03:47:04.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"WIP virtio-pci","shortMessageHtmlLink":"WIP virtio-pci"}},{"before":"339ff8995a8fdd33c5ef1ac492e627c22fee941c","after":"5d8dd9c36ae811f72b9aade36f5900beb7533599","ref":"refs/heads/master","pushedAt":"2024-05-10T03:29:26.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[make] add 'make tags'\n\nTries to generate a curated ctags file for the current project and\nconfiguration.","shortMessageHtmlLink":"[make] add 'make tags'"}},{"before":"6a3db09e554655e6d1150d827b987abb644d56e8","after":"339ff8995a8fdd33c5ef1ac492e627c22fee941c","ref":"refs/heads/master","pushedAt":"2024-05-10T02:52:55.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[arch][barriers] add default memory barriers for all of the architectures\n\nMost are pretty straightforward, but a few of the more esoteric\narchitectures just defaults are implemented.","shortMessageHtmlLink":"[arch][barriers] add default memory barriers for all of the architect…"}},{"before":"ac5cd774a6721d35e22e6349b96379cf6cab2376","after":"6a3db09e554655e6d1150d827b987abb644d56e8","ref":"refs/heads/master","pushedAt":"2024-05-10T01:58:11.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[compiler] GCC 14.1 supports __has_feature\n\nEnable it if not present, not just if its clang.","shortMessageHtmlLink":"[compiler] GCC 14.1 supports __has_feature"}},{"before":"b68b3b42fec96a9182c7ee10f239e8dfc9c7135d","after":"fbcbd6491cfa697658226e1fa91c4975c0943c92","ref":"refs/heads/wip/virtio-pci","pushedAt":"2024-04-25T07:43:05.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"WIP virtio-pci","shortMessageHtmlLink":"WIP virtio-pci"}},{"before":"7cda17edfcc20680e0b184207193a10521a01e66","after":"ac5cd774a6721d35e22e6349b96379cf6cab2376","ref":"refs/heads/master","pushedAt":"2024-04-25T07:26:45.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"travisg","name":"Travis Geiselbrecht","path":"/travisg","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/97708?s=80&v=4"},"commit":{"message":"[lib][fs][9p] fail mount gracefully if bdev isn't passed","shortMessageHtmlLink":"[lib][fs][9p] fail mount gracefully if bdev isn't passed"}}],"hasNextPage":true,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"djE6ks8AAAAEW1c_TwA","startCursor":null,"endCursor":null}},"title":"Activity · littlekernel/lk"}