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[AArch64] Split the neon.addp intrinsic into integer and fp variants.
aemerson committedMar 21, 2019 This is the result of discussions on the list about how to deal with intrinsics which require codegen to disambiguate them via only the integer/fp overloads. It causes problems for GlobalISel as some of that information is lost during translation, while with other operations like IR instructions the information is encoded into the instruction opcode. This patch changes clang to emit the new faddp intrinsic if the vector operands to the builtin have FP element types. LLVM IR AutoUpgrade has been taught to upgrade existing calls to aarch64.neon.addp with fp vector arguments, and we remove the workarounds introduced for GlobalISel in r355865. This is a more permanent solution to PR40968. Differential Revision: https://reviews.llvm.org/D59655 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356722 91177308-0d34-0410-b5e6-96231b3b80d8
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[Bitcode] Fix bitcode compatibility issue with clang.arc.use intrinsic
cachemeifyoucan committedMar 8, 2019 Summary: In r349534, objc arc implementation is switched to use intrinsics and at the same time, clang.arc.use is renamed to llvm.objc.clang.arc.use to make the naming more consistent. The side-effect of that is llvm no longer recognize it as intrinsics and codegen external references to it instead. Rather than upgrade the old intrinsics name to the new one and wait for the arc-contract pass to remove it, simply remove it in the bitcode upgrader. rdar://problem/48607063 Reviewers: pete, ahatanak, erik.pilkington, dexonsmith Reviewed By: pete, dexonsmith Subscribers: jkorous, jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59112 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355663 91177308-0d34-0410-b5e6-96231b3b80d8
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Fix auto-upgrade for the new parameter to llvm.objectsize
epilk committedFeb 12, 2019 r352664 added a 'dynamic' parameter to objectsize, but the AutoUpgrade changes were incomplete. Also, fix an off-by-one error I made in the upgrade logic that is now no longer unreachable. Differential revision: https://reviews.llvm.org/D58071 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353884 91177308-0d34-0410-b5e6-96231b3b80d8
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[AutoUpgrade] Fix AutoUpgrade for x86.seh.recoverfp
mgrang committedFeb 2, 2019 Summary: This fixes the bug in https://reviews.llvm.org/D56747#inline-502711. Reviewers: efriedma Reviewed By: efriedma Subscribers: javed.absar, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57614 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352945 91177308-0d34-0410-b5e6-96231b3b80d8
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[opaque pointer types] Pass value type to LoadInst creation.
jyknight committedFeb 1, 2019 This cleans up all LoadInst creation in LLVM to explicitly pass the value type rather than deriving it from the pointer's element-type. Differential Revision: https://reviews.llvm.org/D57172 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352911 91177308-0d34-0410-b5e6-96231b3b80d8
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Add a 'dynamic' parameter to the objectsize intrinsic
epilk committedJan 30, 2019 This is meant to be used with clang's __builtin_dynamic_object_size. When 'true' is passed to this parameter, the intrinsic has the potential to be folded into instructions that will be evaluated at run time. When 'false', the objectsize intrinsic behaviour is unchanged. rdar://32212419 Differential revision: https://reviews.llvm.org/D56761 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352664 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Add new variadic avx512 compress/expand intrinsics that use vXi…
topperc committedJan 28, 2019 …1 types for the mask argument. Remove and autoupgrade the old intrinsics git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352343 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Remove and autoupgrade vpconflict intrinsics that take a mask a…
topperc committedJan 26, 2019 …nd passthru argument. We have unmasked versions as of r352172 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352270 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Remove GCCBuiltins from 512-bit cvt(u)qqtops, cvt(u)qqtopd, and…
topperc committedJan 26, 2019 … cvt(u)dqtops intrinsics. Add new variadic uitofp/sitofp with rounding mode intrinsics. Summary: See clang patch D56998 for a full description. Reviewers: RKSimon, spatel Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D56999 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352266 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Remove and autoupgrade vpmovqd/vpmovwb intrinsics using trunc+s…
topperc committedJan 21, 2019 …elect. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351729 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Auto upgrade VPCOM/VPCOMU intrinsics to generic integer compari…
RKSimon committedJan 20, 2019 …sons This causes a couple of changes in the upgrade tests as signed/unsigned eq/ne are equivalent and we constant fold true/false codes, these changes are the same as what we already do for avx512 cmp/ucmp. Noticed while cleaning up vector integer comparison costs for PR40376. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351697 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Auto upgrade old style VPCOM/VPCOMU intrinsics to generic integ…
RKSimon committedJan 20, 2019 …er comparisons We were upgrading these to the new style VPCOM/VPCOMU intrinsics (which includes the condition code immediate), but we'll be getting rid of those shortly, so convert these to generics first. This causes a couple of changes in the upgrade tests as signed/unsigned eq/ne are equivalent and we constant fold true/false codes, these changes are the same as what we already do for avx512 cmp/ucmp. Noticed while cleaning up vector integer comparison costs for PR40376. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351690 91177308-0d34-0410-b5e6-96231b3b80d8
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Update the file headers across all of the LLVM projects in the monorepo
chandlerc committedJan 19, 2019 to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351636 91177308-0d34-0410-b5e6-96231b3b80d8
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[EH] Rename llvm.x86.seh.recoverfp intrinsic to llvm.eh.recoverfp
mgrang committedJan 16, 2019 Summary: Make recoverfp intrinsic target-independent so that it can be implemented for AArch64, etc. Refer D53541 for the context. Clang counterpart D56748. Reviewers: rnk, efriedma Reviewed By: rnk, efriedma Subscribers: javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D56747 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351281 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Remove mask parameter from avx512 pmultishiftqb intrinsics. Use…
topperc committedJan 14, 2019 … select in IR instead. Fixes PR40259 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351035 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Remove mask parameter from vpshufbitqmb intrinsics. Change resu…
topperc committedJan 14, 2019 …lt to a vXi1 vector. The input mask can be represented with an AND in IR. Fixes PR40258 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351028 91177308-0d34-0410-b5e6-96231b3b80d8
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Recommit r350554 "[X86] Remove AVX512VBMI2 concat and shift intrinsic…
topperc committedJan 7, 2019 …s. Replace with target independent funnel shift intrinsics." The MSVC limit we hit on AutoUpgrade.cpp has been worked around for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350567 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86][AutoUpgrade] Make some tweaks to reduce the number of nested if…
topperc committedJan 7, 2019 …/else in the intrinsic upgrade code to avoid an MSVC compiler limit. MSVC has a nesting limit of around 110-130. An if/else if/else if counts against this next level. The autoupgrade code consists a long chain of these checking matches against strings. This commit moves some code to a helper function to move out a large if/else chain that was inside of one of the blocks into a separate function. There are more of these we could move or we could change some to lookup tables. I've also merged together a few similar blocks in the outer chain. This should buy us some margin for a little bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350564 91177308-0d34-0410-b5e6-96231b3b80d8
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Revert r350554 "[X86] Remove AVX512VBMI2 concat and shift intrinsics.…
topperc committedJan 7, 2019 … Replace with target independent funnel shift intrinsics." The AutoUpgrade.cpp if/else cascade hit an MSVC limit again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350562 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Remove AVX512VBMI2 concat and shift intrinsics. Replace with ta…
topperc committedJan 7, 2019 …rget independent funnel shift intrinsics. Differential Revision: https://reviews.llvm.org/D56377 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350554 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86][SSE] Auto upgrade PADDS/PSUBS intrinsics to SADD_SAT/SSUB_SAT g…
RKSimon committedDec 21, 2018 …eneric intrinsics (llvm) This auto upgrades the signed SSE saturated math intrinsics to SADD_SAT/SSUB_SAT generic intrinsics. Clang counterpart: https://reviews.llvm.org/D55890 Differential Revision: https://reviews.llvm.org/D55894 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349892 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Auto upgrade XOP/AVX512 rotation intrinsics to generic funnel s…
RKSimon committedDec 20, 2018 …hift intrinsics (llvm) This emits FSHL/FSHR generic intrinsics for the XOP VPROT and AVX512 VPROL/VPROR rotation intrinsics. Clang counterpart: https://reviews.llvm.org/D55937 Differential Revision: https://reviews.llvm.org/D55938 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349795 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86][SSE] Auto upgrade PADDUS/PSUBUS intrinsics to UADD_SAT/USUB_SAT…
RKSimon committedDec 19, 2018 … generic intrinsics (llvm) Now that we use the generic ISD opcodes, we can use the generic intrinsics directly as well. This fixes the poor fast-isel codegen by not expanding to an easily broken IR code sequence. I'm intending to deal with the signed saturation equivalents as well. Clang counterpart: https://reviews.llvm.org/D55879 Differential Revision: https://reviews.llvm.org/D55855 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349630 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Merge addcarryx/addcarry intrinsic into a single addcarry intri…
topperc committedDec 10, 2018 …nsic. Both intrinsics do the exact same thing so we really only need one. Earlier in the 8.0 cycle we changed the signature of this intrinsic without renaming it. But it looks difficult to get the autoupgrade code to allow me to merge the intrinsics and change the signature at the same time. So I've renamed the intrinsic slightly for the new merged intrinsic. I'm skipping autoupgrading from the previous new to 8.0 signature. I've also renamed the subborrow for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348737 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Add some comments about when some X86 intrinsic autoupgrade cod…
topperc committedDec 9, 2018 …e was added. Someday we'd like to remove old autoupgrade code so it helps to annotate how long its been there so we don't have to go digging through commit history. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348728 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Modify the the rdtscp intrinsic to return values instead of tak…
topperc committedSep 7, 2018 …ing a pointer argument Similar to what was recently done for addcarry/subborrow and has been done for rdrand/rdseed for a while. It's better to use two results and an explicit store in IR when the store isn't part of the semantics of the instruction. This allows store->load forwarding to happen in the middle end. Or the store to be removed if its never loaded. Differential Revision: https://reviews.llvm.org/D51803 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341698 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Change the addcarry and subborrow intrinsics to return 2 result…
topperc committedSep 7, 2018 …s and remove the pointer argument. We should represent the store directly in IR instead. This gives the middle end a chance to remove it if it can see a load from the same address. Differential Revision: https://reviews.llvm.org/D51769 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341677 91177308-0d34-0410-b5e6-96231b3b80d8
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Allow creating llvm::Function in non-zero address spaces
arichardson committedAug 23, 2018 Most users won't have to worry about this as all of the 'getOrInsertFunction' functions on Module will default to the program address space. An overload has been added to Function::Create to abstract away the details for most callers. This is based on https://reviews.llvm.org/D37054 but without the changes to make passing a Module to Function::Create() mandatory. I have also added some more tests and fixed the LLParser to accept call instructions for types in the program address space. Reviewed By: bjope Differential Revision: https://reviews.llvm.org/D47541 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340519 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Remove masking from the 512-bit padds and psubs intrinsics. Use…
topperc committedAug 16, 2018 … select in IR instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339842 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Remove the unused masked 128 and 256-bit masked padds/psubs int…
topperc committedAug 16, 2018 …rinsics. Still need to remove masking from the 512-bit versions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339841 91177308-0d34-0410-b5e6-96231b3b80d8
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Fix MSVC "compiler limit: blocks nested too deeply" error. NFCI.
RKSimon committedAug 14, 2018 MSVC only accepts if-else chains up to 127 blocks long. I've had to merge a number of intrinsic cases together to get back below this limit, resulting in some duplication of string matches; this shouldn't cause any notable increase in runtime (and even then only for old IR, nothing that clang currently emits). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339666 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Lowering addus/subus intrinsics to native IR
Tomasz Krupa committedAug 14, 2018 Summary: This revision improves previous version (rL330322) which has been reverted due to crashes. This is the patch that lowers x86 intrinsics to native IR in order to enable optimizations. The patch also includes folding of previously missing saturation patterns so that IR emits the same machine instructions as the intrinsics. Reviewers: craig.topper, spatel, RKSimon Reviewed By: craig.topper Subscribers: mike.dvoretsky, DavidKreitzer, sroland, llvm-commits Differential Revision: https://reviews.llvm.org/D46179 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339650 91177308-0d34-0410-b5e6-96231b3b80d8
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MaskRay committed
Jul 30, 2018 sed -Ei 's/[[:space:]]+$//' include/**/*.{def,h,td} lib/**/*.{cpp,h} git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338293 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Remove and autoupgrade the scalar fma intrinsics with masking.
topperc committedJul 12, 2018 This converts them to what clang is now using for codegen. Unfortunately, there seem to be a few kinks to work out still. I'll try to address with follow up patches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336871 91177308-0d34-0410-b5e6-96231b3b80d8
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[X86] Remove FMA4 scalar intrinsics. Use llvm.fma intrinsic instead.
topperc committedJul 6, 2018 The intrinsics can be implemented with a f32/f64 llvm.fma intrinsic and an insert into a zero vector. There are a couple regressions here due to SelectionDAG not being able to pull an fneg through an extract_vector_elt. I'm not super worried about this though as InstCombine should be able to do it before we get to SelectionDAG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336416 91177308-0d34-0410-b5e6-96231b3b80d8