Permalink
Commits on Dec 15, 2017
  1. Revert "[DWARFv5] Dump an MD5 checksum in the line-table header."

    Paul Robinson committed Dec 15, 2017
    Unit test fails on some bots.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320857 91177308-0d34-0410-b5e6-96231b3b80d8
  2. [llvm-objcopy] Reformat everything using clang-format -i

    Jake Ehrlich committed Dec 15, 2017
    Overtime some non-clang formatted code has creeped into llvm-objcopy. This
    patch fixes all of that.
    
    Differential Revision: https://reviews.llvm.org/D41262
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320856 91177308-0d34-0410-b5e6-96231b3b80d8
  3. [Hexagon] Fix operand-swapping PatFrag for atomic stores

    Krzysztof Parzyszek committed Dec 15, 2017
    PatFrag now has the atomicity information stored as bit fields. They
    need to be copied to the new PatFrag.
    
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320855 91177308-0d34-0410-b5e6-96231b3b80d8
  4. [DWARFv5] Dump an MD5 checksum in the line-table header.

    Paul Robinson committed Dec 15, 2017
    Adds missing support for DW_FORM_data16.
    
    Differential Revision: https://reviews.llvm.org/D41090
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320852 91177308-0d34-0410-b5e6-96231b3b80d8
  5. [X86] Remove assert in X86MCCodeEmitter.cpp that was added in r320830.

    topperc committed Dec 15, 2017
    It seems to be failing real code which is concerning, but we were silently getting away with it. I'll investigate further.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320850 91177308-0d34-0410-b5e6-96231b3b80d8
  6. [SelectionDAG][X86] Fix insert_vector_elt lowering for v32i1/v64i1 wi…

    topperc committed Dec 15, 2017
    …th non-constant index
    
    Summary:
    Currently we don't handle v32i1/v64i1 insert_vector_elt correctly as we fail to look at the number of elements closely and assume it can only be v16i1 or v8i1.
    
    We also can't type legalize v64i1 insert_vector_elt correctly on KNL due to the type not being byte addressable as required by the legalizing through memory accesses path requires.
    
    For the first issue, the patch now tries to pick a 512-bit register with the correct number of elements and promotes to that.
    
    For the second issue, we now extend the vector to a byte addressable type, do the stores to memory, load the two halves, and then truncate the halves back to the original type. Technically since we changed the type, we may not need two loads, but actually checking that is more work and for the v64i1 case we do need them.
    
    Reviewers: RKSimon, delena, spatel, zvi
    
    Reviewed By: RKSimon
    
    Subscribers: llvm-commits
    
    Differential Revision: https://reviews.llvm.org/D40942
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320849 91177308-0d34-0410-b5e6-96231b3b80d8
  7. [Memcpy Loop Lowering] Insert loop BB inbetween the split BB.

    Sean Fertile committed Dec 15, 2017
    The original memcpy expansion inserted the loop basic block inbetween
    the 2 new basic blocks created by splitting the original block the memcpy
    call was in. This commit makes the new memcpy expansion do the same to keep the
    layout of the IR matching between the old and new implementations.
    
    Differential Review: https://reviews.llvm.org/D41197
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320848 91177308-0d34-0410-b5e6-96231b3b80d8
  8. [X86] Add 'Requires<[In64BitMode]>' to a bunch of instructions that o…

    topperc committed Dec 15, 2017
    …nly have memory and immediate operands.
    
    The asm parser wasn't preventing these from being accepted in 32-bit mode. Instructions that use a GR64 register are protected by the parser rejecting the register in 32-bit mode.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320846 91177308-0d34-0410-b5e6-96231b3b80d8
  9. [X86] Change BNDLDX to use anymem instead of i64mem for itsmemory ope…

    topperc committed Dec 15, 2017
    …rand.
    
    This instruction doesn't access memory. It juse use a similar looking memory encoding. Don't require Intel syntax to put "qword ptr" in front of it.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320845 91177308-0d34-0410-b5e6-96231b3b80d8
  10. [X86] Remove the 'Requires' In64BitMode/Not64BitMode from the LWP ins…

    topperc committed Dec 15, 2017
    …tructions.
    
    These aren't doing anything due to a top level "let Predicates =". I think the GR32/GR64 register class protects these anyway.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320844 91177308-0d34-0410-b5e6-96231b3b80d8
  11. [X86] Remove the 'Requires<[In64BitMode]>' from SHSTK instructions.

    topperc committed Dec 15, 2017
    This has no effect due to a top level "let Predicates =" around the instructions. But its also not required because the GR64 usage in the instruction guarantees it can never match.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320843 91177308-0d34-0410-b5e6-96231b3b80d8
  12. [TargetLibraryInfo] fix documentation comment; NFC

    rotateright committed Dec 15, 2017
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320842 91177308-0d34-0410-b5e6-96231b3b80d8
  13. [CodeGen] fix documentation comments; NFC

    rotateright committed Dec 15, 2017
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320840 91177308-0d34-0410-b5e6-96231b3b80d8
  14. [AArch64] Fix typo in the ASIMD instruction optimization pass

    Evandro Menezes committed Dec 15, 2017
    Fix typo in the representative instruction replacement.
    
    Also, fix formatting and reword some comments.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320839 91177308-0d34-0410-b5e6-96231b3b80d8
  15. fix typo in comment and remove inaccurate comment; NFC

    rotateright committed Dec 15, 2017
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320838 91177308-0d34-0410-b5e6-96231b3b80d8
  16. Fix for bug PR35549 - Repeated schedule comments.

    avt77 committed Dec 15, 2017
    Differential Revision: https://reviews.llvm.org/D40960
    
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320837 91177308-0d34-0410-b5e6-96231b3b80d8
  17. Revert "Re-commit : [LICM] Allow sinking when foldable in loop"

    Jun Bum Lim committed Dec 15, 2017
    This reverts commit r320833.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320836 91177308-0d34-0410-b5e6-96231b3b80d8
  18. [CodeGen] fix documentation comments; NFC

    rotateright committed Dec 15, 2017
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320835 91177308-0d34-0410-b5e6-96231b3b80d8
  19. Re-commit : [LICM] Allow sinking when foldable in loop

    Jun Bum Lim committed Dec 15, 2017
     This recommit r320823 after fixing a test failure.
    
     Original commit message:
    
        Continue trying to sink an instruction if its users in the loop is foldable.
        This will allow the instruction to be folded in the loop by decoupling it from
        the user outside of the loop.
    
        Reviewers: hfinkel, majnemer, davidxl, efriedma, danielcdh, bmakam, mcrosier
    
        Reviewed By: hfinkel
    
        Subscribers: javed.absar, bmakam, mcrosier, llvm-commits
    
        Differential Revision: https://reviews.llvm.org/D37076
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320833 91177308-0d34-0410-b5e6-96231b3b80d8
  20. Updated llvm-objdump to display local relocations in Mach-O binaries

    Michael Trent committed Dec 15, 2017
    Summary:
    llvm-objdump's Mach-O parser was updated in r306037 to display external
    relocations for MH_KEXT_BUNDLE file types. This change extends the Macho-O
    parser to display local relocations for MH_PRELOAD files. When used with
    the -macho option relocations will be displayed in a historical format.
    
    All tests are passing for llvm, clang, and lld. llvm-objdump builds without
    compiler warnings.
    
    rdar://35778019
    
    Reviewers: enderby
    
    Reviewed By: enderby
    
    Subscribers: llvm-commits
    
    Differential Revision: https://reviews.llvm.org/D41199
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320832 91177308-0d34-0410-b5e6-96231b3b80d8
  21. [X86] Fix XSAVE64 and similar instructions to not be allowed by the a…

    topperc committed Dec 15, 2017
    …ssembler in 32-bit mode.
    
    There was a top level "let Predicates =" in the .td file that was overriding the Requires on each instruction.
    
    I've added an assert to the code emitter to catch more cases like this. I'm sure this isn't the only place where the right predicates aren't being applied. This assert already found that we don't block btq/btsq/btrq in 32-bit mode.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320830 91177308-0d34-0410-b5e6-96231b3b80d8
  22. Revert "[LICM] Allow sinking when foldable in loop"

    Jun Bum Lim committed Dec 15, 2017
    This reverts commit r320823.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320828 91177308-0d34-0410-b5e6-96231b3b80d8
  23. [CodeGen] Print stack object references as %(fixed-)stack.0 in both M…

    thegameg committed Dec 15, 2017
    …IR and debug output
    
    Work towards the unification of MIR and debug output by printing
    `%stack.0` instead of `<fi#0>`, and `%fixed-stack.0` instead of
    `<fi#-4>` (supposing there are 4 fixed stack objects).
    
    Only debug syntax is affected.
    
    Differential Revision: https://reviews.llvm.org/D41027
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320827 91177308-0d34-0410-b5e6-96231b3b80d8
  24. [ThinLTO] Disallow multiple prevailing defs

    Eugene Leviant committed Dec 15, 2017
  25. [X86] Widen (v2i32 (fp_to_uint v2f64)) to (v8i32 (fp_to_uint v8f64)) …

    topperc committed Dec 15, 2017
    …during legalization if we have AVX512F, but not VLX. NFC
    
    Previously we widened it using isel patterns.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320824 91177308-0d34-0410-b5e6-96231b3b80d8
  26. [LICM] Allow sinking when foldable in loop

    Jun Bum Lim committed Dec 15, 2017
    Summary:
    Continue trying to sink an instruction if its users in the loop is foldable.
    This will allow the instruction to be folded in the loop by decoupling it from
    the user outside of the loop.
    
    Reviewers: hfinkel, majnemer, davidxl, efriedma, danielcdh, bmakam, mcrosier
    
    Reviewed By: hfinkel
    
    Subscribers: javed.absar, bmakam, mcrosier, llvm-commits
    
    Differential Revision: https://reviews.llvm.org/D37076
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320823 91177308-0d34-0410-b5e6-96231b3b80d8
  27. [ARM] Some DAG combine tests

    sparker-arm committed Dec 15, 2017
    Add some more and and shift load combine tests.
    
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320822 91177308-0d34-0410-b5e6-96231b3b80d8
  28. [MIR] Add support for missing CFI directives

    thegameg committed Dec 15, 2017
    The following CFI directives are suported by MC but not by MIR:
    
    * .cfi_rel_offset
    * .cfi_adjust_cfa_offset
    * .cfi_escape
    * .cfi_remember_state
    * .cfi_restore_state
    * .cfi_undefined
    * .cfi_register
    * .cfi_window_save
    
    Add support for printing, parsing and update tests.
    
    Differential Revision: https://reviews.llvm.org/D41230
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320819 91177308-0d34-0410-b5e6-96231b3b80d8
  29. [X86] Add RTM schedule tests

    Simon Pilgrim committed Dec 15, 2017
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320815 91177308-0d34-0410-b5e6-96231b3b80d8
  30. [InlineCost] Find repeated loads in the callee

    Haicheng Wu committed Dec 15, 2017
    SROA analysis of InlineCost can figure out that some stores can be removed
    after inlining and then the repeated loads clobbered by these stores are also
    free.  This patch finds these clobbered loads and adjust the inline cost
    accordingly.
    
    Differential Revision: https://reviews.llvm.org/D33946
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320814 91177308-0d34-0410-b5e6-96231b3b80d8
  31. [X86] Add MWAITX/MONITORX schedule tests

    Simon Pilgrim committed Dec 15, 2017
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320812 91177308-0d34-0410-b5e6-96231b3b80d8
  32. Fix the second build bot break introduced by r320791.

    nemanjai committed Dec 15, 2017
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320811 91177308-0d34-0410-b5e6-96231b3b80d8
  33. [X86] Add XOP schedule tests

    Simon Pilgrim committed Dec 15, 2017
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320810 91177308-0d34-0410-b5e6-96231b3b80d8
  34. Fix code causing fallthrough warnings in the PPC back end.

    nemanjai committed Dec 15, 2017
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320806 91177308-0d34-0410-b5e6-96231b3b80d8
  35. [X86] Add AVX512 VPOPCNTDQ schedule tests

    Simon Pilgrim committed Dec 15, 2017
    Demonstrates how to perform full coverage avx512 schedule tests
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320805 91177308-0d34-0410-b5e6-96231b3b80d8