diff --git a/llvm/lib/MC/XCOFFObjectWriter.cpp b/llvm/lib/MC/XCOFFObjectWriter.cpp index 4b426604c0957..9baf0b35593c9 100644 --- a/llvm/lib/MC/XCOFFObjectWriter.cpp +++ b/llvm/lib/MC/XCOFFObjectWriter.cpp @@ -618,6 +618,12 @@ void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm, assert(SectionMap.contains(SymASec) && "Expected containing csect to exist in map."); + assert((Fixup.getOffset() <= + MaxRawDataSize - Layout.getFragmentOffset(Fragment)) && + "Fragment offset + fixup offset is overflowed."); + uint32_t FixupOffsetInCsect = + Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); + const uint32_t Index = getIndex(SymA, SymASec); if (Type == XCOFF::RelocationType::R_POS || Type == XCOFF::RelocationType::R_TLS) @@ -656,23 +662,18 @@ void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm, // The address of the branch instruction should be the sum of section // address, fragment offset and Fixup offset. - uint64_t BRInstrAddress = SectionMap[ParentSec]->Address + - Layout.getFragmentOffset(Fragment) + - Fixup.getOffset(); + uint64_t BRInstrAddress = + SectionMap[ParentSec]->Address + FixupOffsetInCsect; // The FixedValue should be the difference between SymA csect address and BR // instr address plus any constant value. FixedValue = SectionMap[SymASec]->Address - BRInstrAddress + Target.getConstant(); - } else if (Type == XCOFF::RelocationType::R_REF) - // The FixedValue should always be 0 since it specifies a nonrelocating - // reference. + } else if (Type == XCOFF::RelocationType::R_REF) { + // The FixedValue and FixupOffsetInCsect should always be 0 since it + // specifies a nonrelocating reference. FixedValue = 0; - - assert((Fixup.getOffset() <= - MaxRawDataSize - Layout.getFragmentOffset(Fragment)) && - "Fragment offset + fixup offset is overflowed."); - uint32_t FixupOffsetInCsect = - Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); + FixupOffsetInCsect = 0; + } XCOFFRelocation Reloc = {Index, FixupOffsetInCsect, SignAndSize, Type}; MCSectionXCOFF *RelocationSec = cast(Fragment->getParent()); diff --git a/llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll b/llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll index 201af2f949618..dd421dfe63d02 100644 --- a/llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll +++ b/llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll @@ -73,8 +73,8 @@ entry: ; NOVNDS-NEXT: .ref __llvm_prf_names[RO] ; NOVNDS-NOT: .ref __llvm_prf_vnds -; NOVNDS-OBJ: 00000008 R_REF __llvm_prf_data -; NOVNDS-OBJ: 00000008 R_REF __llvm_prf_names +; NOVNDS-OBJ: 00000000 R_REF __llvm_prf_data +; NOVNDS-OBJ: 00000000 R_REF __llvm_prf_names ; NOVNDS-OBJ-NOT: R_REF __llvm_prf_vnds ;--- with-vnds.ll @@ -115,8 +115,8 @@ entry: ; WITHVNDS-OBJ: RELOCATION RECORDS FOR [.data]: ; WITHVNDS-OBJ-NEXT: OFFSET TYPE VALUE -; WITHVNDS-OBJ-NEXT: 00000008 R_REF __llvm_prf_data -; WITHVNDS-OBJ-NEXT: 00000008 R_REF __llvm_prf_names -; WITHVNDS-OBJ-NEXT: 00000008 R_REF __llvm_prf_vnds +; WITHVNDS-OBJ-NEXT: 00000000 R_REF __llvm_prf_data +; WITHVNDS-OBJ-NEXT: 00000000 R_REF __llvm_prf_names +; WITHVNDS-OBJ-NEXT: 00000000 R_REF __llvm_prf_vnds ; WITHVNDS-OBJ-NEXT: 00000100 R_POS .main ; WITHVNDS-OBJ-NEXT: 00000104 R_POS TOC