diff --git a/llvm/test/CodeGen/AArch64/insert-subvector.ll b/llvm/test/CodeGen/AArch64/insert-subvector.ll new file mode 100644 index 0000000000000..f5ae348c161f5 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/insert-subvector.ll @@ -0,0 +1,570 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=aarch64--linux-gnu | FileCheck %s + + +; i8 + +define <16 x i8> @insert_v16i8_2_1(float %tmp, <16 x i8> %b, <16 x i8> %a) { +; CHECK-LABEL: insert_v16i8_2_1: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.h[0], v2.h[0] +; CHECK-NEXT: ret + %s2 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @insert_v16i8_2_2(float %tmp, <16 x i8> %b, <16 x i8> %a) { +; CHECK-LABEL: insert_v16i8_2_2: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.h[1], v2.h[0] +; CHECK-NEXT: ret + %s2 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @insert_v16i8_2_6(float %tmp, <16 x i8> %b, <16 x i8> %a) { +; CHECK-LABEL: insert_v16i8_2_6: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.h[6], v2.h[0] +; CHECK-NEXT: ret + %s2 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @insert_v16i8_4_1(float %tmp, <16 x i8> %b, <16 x i8> %a) { +; CHECK-LABEL: insert_v16i8_4_1: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[0], v2.s[0] +; CHECK-NEXT: ret + %s2 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @insert_v16i8_4_15(float %tmp, <16 x i8> %b, <16 x i8> %a) { +; CHECK-LABEL: insert_v16i8_4_15: +; CHECK: // %bb.0: +; CHECK-NEXT: adrp x8, .LCPI4_0 +; CHECK-NEXT: // kill: def $q2 killed $q2 def $q2_q3 +; CHECK-NEXT: mov v3.16b, v1.16b +; CHECK-NEXT: ldr q0, [x8, :lo12:.LCPI4_0] +; CHECK-NEXT: tbl v0.16b, { v2.16b, v3.16b }, v0.16b +; CHECK-NEXT: ret + %s2 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @insert_v16i8_4_2(float %tmp, <16 x i8> %b, <16 x i8> %a) { +; CHECK-LABEL: insert_v16i8_4_2: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[1], v2.s[0] +; CHECK-NEXT: ret + %s2 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @insert_v16i8_4_3(float %tmp, <16 x i8> %b, <16 x i8> %a) { +; CHECK-LABEL: insert_v16i8_4_3: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[2], v2.s[0] +; CHECK-NEXT: ret + %s2 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @insert_v16i8_4_4(float %tmp, <16 x i8> %b, <16 x i8> %a) { +; CHECK-LABEL: insert_v16i8_4_4: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[3], v2.s[0] +; CHECK-NEXT: ret + %s2 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <8 x i8> @insert_v8i8_4_1(float %tmp, <8 x i8> %b, <8 x i8> %a) { +; CHECK-LABEL: insert_v8i8_4_1: +; CHECK: // %bb.0: +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-NEXT: mov v0.s[1], v1.s[1] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret + %s2 = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> + ret <8 x i8> %s2 +} + +define <8 x i8> @insert_v8i8_4_2(float %tmp, <8 x i8> %b, <8 x i8> %a) { +; CHECK-LABEL: insert_v8i8_4_2: +; CHECK: // %bb.0: +; CHECK-NEXT: fmov d0, d1 +; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2 +; CHECK-NEXT: mov v0.s[1], v2.s[0] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret + %s2 = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> + ret <8 x i8> %s2 +} + +define <16 x i8> @insert_v16i8_8_1(float %tmp, <16 x i8> %b, <16 x i8> %a) { +; CHECK-LABEL: insert_v16i8_8_1: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: mov v0.d[1], v1.d[1] +; CHECK-NEXT: ret + %s2 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @insert_v16i8_8_2(float %tmp, <16 x i8> %b, <16 x i8> %a) { +; CHECK-LABEL: insert_v16i8_8_2: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.d[1], v2.d[0] +; CHECK-NEXT: ret + %s2 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +; i16 + +define <8 x i16> @insert_v8i16_2_1(float %tmp, <8 x i16> %b, <8 x i16> %a) { +; CHECK-LABEL: insert_v8i16_2_1: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[0], v2.s[0] +; CHECK-NEXT: ret + %s2 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +define <8 x i16> @insert_v8i16_2_15(float %tmp, <8 x i16> %b, <8 x i16> %a) { +; CHECK-LABEL: insert_v8i16_2_15: +; CHECK: // %bb.0: +; CHECK-NEXT: adrp x8, .LCPI13_0 +; CHECK-NEXT: // kill: def $q2 killed $q2 def $q2_q3 +; CHECK-NEXT: mov v3.16b, v1.16b +; CHECK-NEXT: ldr q0, [x8, :lo12:.LCPI13_0] +; CHECK-NEXT: tbl v0.16b, { v2.16b, v3.16b }, v0.16b +; CHECK-NEXT: ret + %s2 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +define <8 x i16> @insert_v8i16_2_2(float %tmp, <8 x i16> %b, <8 x i16> %a) { +; CHECK-LABEL: insert_v8i16_2_2: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[1], v2.s[0] +; CHECK-NEXT: ret + %s2 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +define <8 x i16> @insert_v8i16_2_3(float %tmp, <8 x i16> %b, <8 x i16> %a) { +; CHECK-LABEL: insert_v8i16_2_3: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[2], v2.s[0] +; CHECK-NEXT: ret + %s2 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +define <8 x i16> @insert_v8i16_2_4(float %tmp, <8 x i16> %b, <8 x i16> %a) { +; CHECK-LABEL: insert_v8i16_2_4: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[3], v2.s[0] +; CHECK-NEXT: ret + %s2 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +define <4 x i16> @insert_v4i16_2_1(float %tmp, <4 x i16> %b, <4 x i16> %a) { +; CHECK-LABEL: insert_v4i16_2_1: +; CHECK: // %bb.0: +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-NEXT: mov v0.s[1], v1.s[1] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret + %s2 = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> + ret <4 x i16> %s2 +} + +define <4 x i16> @insert_v4i16_2_2(float %tmp, <4 x i16> %b, <4 x i16> %a) { +; CHECK-LABEL: insert_v4i16_2_2: +; CHECK: // %bb.0: +; CHECK-NEXT: fmov d0, d1 +; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2 +; CHECK-NEXT: mov v0.s[1], v2.s[0] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret + %s2 = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> + ret <4 x i16> %s2 +} + +define <8 x i16> @insert_v8i16_4_1(float %tmp, <8 x i16> %b, <8 x i16> %a) { +; CHECK-LABEL: insert_v8i16_4_1: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: mov v0.d[1], v1.d[1] +; CHECK-NEXT: ret + %s2 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +define <8 x i16> @insert_v8i16_4_2(float %tmp, <8 x i16> %b, <8 x i16> %a) { +; CHECK-LABEL: insert_v8i16_4_2: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.d[1], v2.d[0] +; CHECK-NEXT: ret + %s2 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +; i32 + +define <4 x i32> @insert_v4i32_2_1(float %tmp, <4 x i32> %b, <4 x i32> %a) { +; CHECK-LABEL: insert_v4i32_2_1: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: mov v0.d[1], v1.d[1] +; CHECK-NEXT: ret + %s2 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> + ret <4 x i32> %s2 +} + +define <4 x i32> @insert_v4i32_2_2(float %tmp, <4 x i32> %b, <4 x i32> %a) { +; CHECK-LABEL: insert_v4i32_2_2: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.d[1], v2.d[0] +; CHECK-NEXT: ret + %s2 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> + ret <4 x i32> %s2 +} + + + + +; i8 + +define <16 x i8> @load_v16i8_4_1(float %tmp, <16 x i8> %b, <4 x i8> *%a) { +; CHECK-LABEL: load_v16i8_4_1: +; CHECK: // %bb.0: +; CHECK-NEXT: ldr s0, [x0] +; CHECK-NEXT: ushll v0.8h, v0.8b, #0 +; CHECK-NEXT: uzp1 v2.16b, v0.16b, v0.16b +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[0], v2.s[0] +; CHECK-NEXT: ret + %l = load <4 x i8>, <4 x i8> *%a + %s1 = shufflevector <4 x i8> %l, <4 x i8> poison, <16 x i32> + %s2 = shufflevector <16 x i8> %s1, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @load_v16i8_4_15(float %tmp, <16 x i8> %b, <4 x i8> *%a) { +; CHECK-LABEL: load_v16i8_4_15: +; CHECK: // %bb.0: +; CHECK-NEXT: ldr s0, [x0] +; CHECK-NEXT: adrp x8, .LCPI24_0 +; CHECK-NEXT: ushll v2.8h, v0.8b, #0 +; CHECK-NEXT: // kill: def $q1 killed $q1 def $q0_q1 +; CHECK-NEXT: uzp1 v0.16b, v2.16b, v0.16b +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI24_0] +; CHECK-NEXT: tbl v0.16b, { v0.16b, v1.16b }, v2.16b +; CHECK-NEXT: ret + %l = load <4 x i8>, <4 x i8> *%a + %s1 = shufflevector <4 x i8> %l, <4 x i8> poison, <16 x i32> + %s2 = shufflevector <16 x i8> %s1, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @load_v16i8_4_2(float %tmp, <16 x i8> %b, <4 x i8> *%a) { +; CHECK-LABEL: load_v16i8_4_2: +; CHECK: // %bb.0: +; CHECK-NEXT: ldr s0, [x0] +; CHECK-NEXT: ushll v0.8h, v0.8b, #0 +; CHECK-NEXT: uzp1 v2.16b, v0.16b, v0.16b +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[1], v2.s[0] +; CHECK-NEXT: ret + %l = load <4 x i8>, <4 x i8> *%a + %s1 = shufflevector <4 x i8> %l, <4 x i8> poison, <16 x i32> + %s2 = shufflevector <16 x i8> %s1, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @load_v16i8_4_3(float %tmp, <16 x i8> %b, <4 x i8> *%a) { +; CHECK-LABEL: load_v16i8_4_3: +; CHECK: // %bb.0: +; CHECK-NEXT: ldr s0, [x0] +; CHECK-NEXT: ushll v0.8h, v0.8b, #0 +; CHECK-NEXT: uzp1 v2.16b, v0.16b, v0.16b +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[2], v2.s[0] +; CHECK-NEXT: ret + %l = load <4 x i8>, <4 x i8> *%a + %s1 = shufflevector <4 x i8> %l, <4 x i8> poison, <16 x i32> + %s2 = shufflevector <16 x i8> %s1, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @load_v16i8_4_4(float %tmp, <16 x i8> %b, <4 x i8> *%a) { +; CHECK-LABEL: load_v16i8_4_4: +; CHECK: // %bb.0: +; CHECK-NEXT: ldr s0, [x0] +; CHECK-NEXT: ushll v0.8h, v0.8b, #0 +; CHECK-NEXT: uzp1 v2.16b, v0.16b, v0.16b +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[3], v2.s[0] +; CHECK-NEXT: ret + %l = load <4 x i8>, <4 x i8> *%a + %s1 = shufflevector <4 x i8> %l, <4 x i8> poison, <16 x i32> + %s2 = shufflevector <16 x i8> %s1, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <8 x i8> @load_v8i8_4_1(float %tmp, <8 x i8> %b, <4 x i8> *%a) { +; CHECK-LABEL: load_v8i8_4_1: +; CHECK: // %bb.0: +; CHECK-NEXT: ldr s0, [x0] +; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-NEXT: ushll v0.8h, v0.8b, #0 +; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: mov v0.s[1], v1.s[1] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret + %l = load <4 x i8>, <4 x i8> *%a + %s1 = shufflevector <4 x i8> %l, <4 x i8> poison, <8 x i32> + %s2 = shufflevector <8 x i8> %s1, <8 x i8> %b, <8 x i32> + ret <8 x i8> %s2 +} + +define <8 x i8> @load_v8i8_4_2(float %tmp, <8 x i8> %b, <4 x i8> *%a) { +; CHECK-LABEL: load_v8i8_4_2: +; CHECK: // %bb.0: +; CHECK-NEXT: ldr s0, [x0] +; CHECK-NEXT: ushll v0.8h, v0.8b, #0 +; CHECK-NEXT: uzp1 v2.8b, v0.8b, v0.8b +; CHECK-NEXT: fmov d0, d1 +; CHECK-NEXT: mov v0.s[1], v2.s[0] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret + %l = load <4 x i8>, <4 x i8> *%a + %s1 = shufflevector <4 x i8> %l, <4 x i8> poison, <8 x i32> + %s2 = shufflevector <8 x i8> %s1, <8 x i8> %b, <8 x i32> + ret <8 x i8> %s2 +} + +define <16 x i8> @load_v16i8_8_1(float %tmp, <16 x i8> %b, <8 x i8> *%a) { +; CHECK-LABEL: load_v16i8_8_1: +; CHECK: // %bb.0: +; CHECK-NEXT: ext v1.16b, v1.16b, v1.16b, #8 +; CHECK-NEXT: ldr d0, [x0] +; CHECK-NEXT: mov v0.d[1], v1.d[0] +; CHECK-NEXT: ret + %l = load <8 x i8>, <8 x i8> *%a + %s1 = shufflevector <8 x i8> %l, <8 x i8> poison, <16 x i32> + %s2 = shufflevector <16 x i8> %s1, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +define <16 x i8> @load_v16i8_8_2(float %tmp, <16 x i8> %b, <8 x i8> *%a) { +; CHECK-LABEL: load_v16i8_8_2: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: ldr d1, [x0] +; CHECK-NEXT: mov v0.d[1], v1.d[0] +; CHECK-NEXT: ret + %l = load <8 x i8>, <8 x i8> *%a + %s1 = shufflevector <8 x i8> %l, <8 x i8> poison, <16 x i32> + %s2 = shufflevector <16 x i8> %s1, <16 x i8> %b, <16 x i32> + ret <16 x i8> %s2 +} + +; i16 + +define <8 x i16> @load_v8i16_2_1(float %tmp, <8 x i16> %b, <2 x i16> *%a) { +; CHECK-LABEL: load_v8i16_2_1: +; CHECK: // %bb.0: +; CHECK-NEXT: ldrh w9, [x0] +; CHECK-NEXT: add x8, x0, #2 +; CHECK-NEXT: fmov s0, w9 +; CHECK-NEXT: ld1 { v0.h }[2], [x8] +; CHECK-NEXT: uzp1 v2.8h, v0.8h, v0.8h +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[0], v2.s[0] +; CHECK-NEXT: ret + %l = load <2 x i16>, <2 x i16> *%a + %s1 = shufflevector <2 x i16> %l, <2 x i16> poison, <8 x i32> + %s2 = shufflevector <8 x i16> %s1, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +define <8 x i16> @load_v8i16_2_15(float %tmp, <8 x i16> %b, <2 x i16> *%a) { +; CHECK-LABEL: load_v8i16_2_15: +; CHECK: // %bb.0: +; CHECK-NEXT: ldrh w9, [x0] +; CHECK-NEXT: add x8, x0, #2 +; CHECK-NEXT: // kill: def $q1 killed $q1 def $q0_q1 +; CHECK-NEXT: fmov s2, w9 +; CHECK-NEXT: ld1 { v2.h }[2], [x8] +; CHECK-NEXT: adrp x8, .LCPI33_0 +; CHECK-NEXT: uzp1 v0.8h, v2.8h, v0.8h +; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI33_0] +; CHECK-NEXT: tbl v0.16b, { v0.16b, v1.16b }, v2.16b +; CHECK-NEXT: ret + %l = load <2 x i16>, <2 x i16> *%a + %s1 = shufflevector <2 x i16> %l, <2 x i16> poison, <8 x i32> + %s2 = shufflevector <8 x i16> %s1, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +define <8 x i16> @load_v8i16_2_2(float %tmp, <8 x i16> %b, <2 x i16> *%a) { +; CHECK-LABEL: load_v8i16_2_2: +; CHECK: // %bb.0: +; CHECK-NEXT: ldrh w9, [x0] +; CHECK-NEXT: add x8, x0, #2 +; CHECK-NEXT: fmov s0, w9 +; CHECK-NEXT: ld1 { v0.h }[2], [x8] +; CHECK-NEXT: uzp1 v2.8h, v0.8h, v0.8h +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[1], v2.s[0] +; CHECK-NEXT: ret + %l = load <2 x i16>, <2 x i16> *%a + %s1 = shufflevector <2 x i16> %l, <2 x i16> poison, <8 x i32> + %s2 = shufflevector <8 x i16> %s1, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +define <8 x i16> @load_v8i16_2_3(float %tmp, <8 x i16> %b, <2 x i16> *%a) { +; CHECK-LABEL: load_v8i16_2_3: +; CHECK: // %bb.0: +; CHECK-NEXT: ldrh w9, [x0] +; CHECK-NEXT: add x8, x0, #2 +; CHECK-NEXT: fmov s0, w9 +; CHECK-NEXT: ld1 { v0.h }[2], [x8] +; CHECK-NEXT: uzp1 v2.8h, v0.8h, v0.8h +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[2], v2.s[0] +; CHECK-NEXT: ret + %l = load <2 x i16>, <2 x i16> *%a + %s1 = shufflevector <2 x i16> %l, <2 x i16> poison, <8 x i32> + %s2 = shufflevector <8 x i16> %s1, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +define <8 x i16> @load_v8i16_2_4(float %tmp, <8 x i16> %b, <2 x i16> *%a) { +; CHECK-LABEL: load_v8i16_2_4: +; CHECK: // %bb.0: +; CHECK-NEXT: ldrh w9, [x0] +; CHECK-NEXT: add x8, x0, #2 +; CHECK-NEXT: fmov s0, w9 +; CHECK-NEXT: ld1 { v0.h }[2], [x8] +; CHECK-NEXT: uzp1 v2.8h, v0.8h, v0.8h +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: mov v0.s[3], v2.s[0] +; CHECK-NEXT: ret + %l = load <2 x i16>, <2 x i16> *%a + %s1 = shufflevector <2 x i16> %l, <2 x i16> poison, <8 x i32> + %s2 = shufflevector <8 x i16> %s1, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +define <4 x i16> @load_v4i16_2_1(float %tmp, <4 x i16> %b, <2 x i16> *%a) { +; CHECK-LABEL: load_v4i16_2_1: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1 { v0.h }[0], [x0] +; CHECK-NEXT: add x8, x0, #2 +; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-NEXT: ld1 { v0.h }[2], [x8] +; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: mov v0.s[1], v1.s[1] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret + %l = load <2 x i16>, <2 x i16> *%a + %s1 = shufflevector <2 x i16> %l, <2 x i16> poison, <4 x i32> + %s2 = shufflevector <4 x i16> %s1, <4 x i16> %b, <4 x i32> + ret <4 x i16> %s2 +} + +define <4 x i16> @load_v4i16_2_2(float %tmp, <4 x i16> %b, <2 x i16> *%a) { +; CHECK-LABEL: load_v4i16_2_2: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1 { v0.h }[0], [x0] +; CHECK-NEXT: add x8, x0, #2 +; CHECK-NEXT: ld1 { v0.h }[2], [x8] +; CHECK-NEXT: uzp1 v2.4h, v0.4h, v0.4h +; CHECK-NEXT: fmov d0, d1 +; CHECK-NEXT: mov v0.s[1], v2.s[0] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret + %l = load <2 x i16>, <2 x i16> *%a + %s1 = shufflevector <2 x i16> %l, <2 x i16> poison, <4 x i32> + %s2 = shufflevector <4 x i16> %s1, <4 x i16> %b, <4 x i32> + ret <4 x i16> %s2 +} + +define <8 x i16> @load_v8i16_4_1(float %tmp, <8 x i16> %b, <4 x i16> *%a) { +; CHECK-LABEL: load_v8i16_4_1: +; CHECK: // %bb.0: +; CHECK-NEXT: ext v1.16b, v1.16b, v1.16b, #8 +; CHECK-NEXT: ldr d0, [x0] +; CHECK-NEXT: mov v0.d[1], v1.d[0] +; CHECK-NEXT: ret + %l = load <4 x i16>, <4 x i16> *%a + %s1 = shufflevector <4 x i16> %l, <4 x i16> poison, <8 x i32> + %s2 = shufflevector <8 x i16> %s1, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +define <8 x i16> @load_v8i16_4_2(float %tmp, <8 x i16> %b, <4 x i16> *%a) { +; CHECK-LABEL: load_v8i16_4_2: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: ldr d1, [x0] +; CHECK-NEXT: mov v0.d[1], v1.d[0] +; CHECK-NEXT: ret + %l = load <4 x i16>, <4 x i16> *%a + %s1 = shufflevector <4 x i16> %l, <4 x i16> poison, <8 x i32> + %s2 = shufflevector <8 x i16> %s1, <8 x i16> %b, <8 x i32> + ret <8 x i16> %s2 +} + +; i32 + +define <4 x i32> @load_v4i32_2_1(float %tmp, <4 x i32> %b, <2 x i32> *%a) { +; CHECK-LABEL: load_v4i32_2_1: +; CHECK: // %bb.0: +; CHECK-NEXT: ext v1.16b, v1.16b, v1.16b, #8 +; CHECK-NEXT: ldr d0, [x0] +; CHECK-NEXT: mov v0.d[1], v1.d[0] +; CHECK-NEXT: ret + %l = load <2 x i32>, <2 x i32> *%a + %s1 = shufflevector <2 x i32> %l, <2 x i32> poison, <4 x i32> + %s2 = shufflevector <4 x i32> %s1, <4 x i32> %b, <4 x i32> + ret <4 x i32> %s2 +} + +define <4 x i32> @load_v4i32_2_2(float %tmp, <4 x i32> %b, <2 x i32> *%a) { +; CHECK-LABEL: load_v4i32_2_2: +; CHECK: // %bb.0: +; CHECK-NEXT: mov v0.16b, v1.16b +; CHECK-NEXT: ldr d1, [x0] +; CHECK-NEXT: mov v0.d[1], v1.d[0] +; CHECK-NEXT: ret + %l = load <2 x i32>, <2 x i32> *%a + %s1 = shufflevector <2 x i32> %l, <2 x i32> poison, <4 x i32> + %s2 = shufflevector <4 x i32> %s1, <4 x i32> %b, <4 x i32> + ret <4 x i32> %s2 +} diff --git a/llvm/test/CodeGen/AArch64/neon-perm.ll b/llvm/test/CodeGen/AArch64/neon-perm.ll index b9914356f301c..3b2030ea65329 100644 --- a/llvm/test/CodeGen/AArch64/neon-perm.ll +++ b/llvm/test/CodeGen/AArch64/neon-perm.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s %struct.int8x8x2_t = type { [2 x <8 x i8>] } @@ -21,7 +22,9 @@ define <8 x i8> @test_vuzp1_s8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vuzp1_s8: -; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -29,7 +32,9 @@ entry: define <16 x i8> @test_vuzp1q_s8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vuzp1q_s8: -; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -37,7 +42,9 @@ entry: define <4 x i16> @test_vuzp1_s16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vuzp1_s16: -; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -45,7 +52,9 @@ entry: define <8 x i16> @test_vuzp1q_s16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vuzp1q_s16: -; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -53,7 +62,9 @@ entry: define <2 x i32> @test_vuzp1_s32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vuzp1_s32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %shuffle.i @@ -61,7 +72,9 @@ entry: define <4 x i32> @test_vuzp1q_s32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vuzp1q_s32: -; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %shuffle.i @@ -69,7 +82,9 @@ entry: define <2 x i64> @test_vuzp1q_s64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: test_vuzp1q_s64: -; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %shuffle.i @@ -77,7 +92,9 @@ entry: define <8 x i8> @test_vuzp1_u8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vuzp1_u8: -; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -85,7 +102,9 @@ entry: define <16 x i8> @test_vuzp1q_u8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vuzp1q_u8: -; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -93,7 +112,9 @@ entry: define <4 x i16> @test_vuzp1_u16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vuzp1_u16: -; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -101,7 +122,9 @@ entry: define <8 x i16> @test_vuzp1q_u16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vuzp1q_u16: -; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -109,7 +132,9 @@ entry: define <2 x i32> @test_vuzp1_u32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vuzp1_u32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %shuffle.i @@ -117,7 +142,9 @@ entry: define <4 x i32> @test_vuzp1q_u32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vuzp1q_u32: -; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %shuffle.i @@ -125,7 +152,9 @@ entry: define <2 x i64> @test_vuzp1q_u64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: test_vuzp1q_u64: -; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %shuffle.i @@ -133,7 +162,9 @@ entry: define <2 x float> @test_vuzp1_f32(<2 x float> %a, <2 x float> %b) { ; CHECK-LABEL: test_vuzp1_f32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> ret <2 x float> %shuffle.i @@ -141,7 +172,9 @@ entry: define <4 x float> @test_vuzp1q_f32(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: test_vuzp1q_f32: -; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> ret <4 x float> %shuffle.i @@ -149,7 +182,9 @@ entry: define <2 x double> @test_vuzp1q_f64(<2 x double> %a, <2 x double> %b) { ; CHECK-LABEL: test_vuzp1q_f64: -; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> ret <2 x double> %shuffle.i @@ -157,7 +192,9 @@ entry: define <8 x i8> @test_vuzp1_p8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vuzp1_p8: -; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -165,7 +202,9 @@ entry: define <16 x i8> @test_vuzp1q_p8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vuzp1q_p8: -; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -173,7 +212,9 @@ entry: define <4 x i16> @test_vuzp1_p16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vuzp1_p16: -; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -181,7 +222,9 @@ entry: define <8 x i16> @test_vuzp1q_p16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vuzp1q_p16: -; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -189,7 +232,9 @@ entry: define <8 x i8> @test_vuzp2_s8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vuzp2_s8: -; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -197,7 +242,9 @@ entry: define <16 x i8> @test_vuzp2q_s8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vuzp2q_s8: -; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -205,7 +252,9 @@ entry: define <4 x i16> @test_vuzp2_s16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vuzp2_s16: -; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -213,7 +262,9 @@ entry: define <8 x i16> @test_vuzp2q_s16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vuzp2q_s16: -; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -221,7 +272,9 @@ entry: define <2 x i32> @test_vuzp2_s32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vuzp2_s32: -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %shuffle.i @@ -229,7 +282,9 @@ entry: define <4 x i32> @test_vuzp2q_s32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vuzp2q_s32: -; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %shuffle.i @@ -237,7 +292,9 @@ entry: define <2 x i64> @test_vuzp2q_s64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: test_vuzp2q_s64: -; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %shuffle.i @@ -245,7 +302,9 @@ entry: define <8 x i8> @test_vuzp2_u8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vuzp2_u8: -; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -253,7 +312,9 @@ entry: define <16 x i8> @test_vuzp2q_u8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vuzp2q_u8: -; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -261,7 +322,9 @@ entry: define <4 x i16> @test_vuzp2_u16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vuzp2_u16: -; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -269,7 +332,9 @@ entry: define <8 x i16> @test_vuzp2q_u16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vuzp2q_u16: -; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -277,7 +342,9 @@ entry: define <2 x i32> @test_vuzp2_u32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vuzp2_u32: -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %shuffle.i @@ -285,7 +352,9 @@ entry: define <4 x i32> @test_vuzp2q_u32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vuzp2q_u32: -; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %shuffle.i @@ -293,7 +362,9 @@ entry: define <2 x i64> @test_vuzp2q_u64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: test_vuzp2q_u64: -; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %shuffle.i @@ -301,7 +372,9 @@ entry: define <2 x float> @test_vuzp2_f32(<2 x float> %a, <2 x float> %b) { ; CHECK-LABEL: test_vuzp2_f32: -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> ret <2 x float> %shuffle.i @@ -309,7 +382,9 @@ entry: define <4 x float> @test_vuzp2q_f32(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: test_vuzp2q_f32: -; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> ret <4 x float> %shuffle.i @@ -317,7 +392,9 @@ entry: define <2 x double> @test_vuzp2q_f64(<2 x double> %a, <2 x double> %b) { ; CHECK-LABEL: test_vuzp2q_f64: -; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> ret <2 x double> %shuffle.i @@ -325,7 +402,9 @@ entry: define <8 x i8> @test_vuzp2_p8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vuzp2_p8: -; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -333,7 +412,9 @@ entry: define <16 x i8> @test_vuzp2q_p8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vuzp2q_p8: -; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -341,7 +422,9 @@ entry: define <4 x i16> @test_vuzp2_p16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vuzp2_p16: -; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -349,7 +432,9 @@ entry: define <8 x i16> @test_vuzp2q_p16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vuzp2q_p16: -; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -357,7 +442,9 @@ entry: define <8 x i8> @test_vzip1_s8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vzip1_s8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -365,7 +452,9 @@ entry: define <16 x i8> @test_vzip1q_s8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vzip1q_s8: -; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -373,7 +462,9 @@ entry: define <4 x i16> @test_vzip1_s16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vzip1_s16: -; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -381,7 +472,9 @@ entry: define <8 x i16> @test_vzip1q_s16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vzip1q_s16: -; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -389,7 +482,9 @@ entry: define <2 x i32> @test_vzip1_s32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vzip1_s32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %shuffle.i @@ -397,7 +492,9 @@ entry: define <4 x i32> @test_vzip1q_s32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vzip1q_s32: -; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %shuffle.i @@ -405,7 +502,9 @@ entry: define <2 x i64> @test_vzip1q_s64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: test_vzip1q_s64: -; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %shuffle.i @@ -413,7 +512,9 @@ entry: define <8 x i8> @test_vzip1_u8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vzip1_u8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -421,7 +522,9 @@ entry: define <16 x i8> @test_vzip1q_u8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vzip1q_u8: -; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -429,7 +532,9 @@ entry: define <4 x i16> @test_vzip1_u16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vzip1_u16: -; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -437,7 +542,9 @@ entry: define <8 x i16> @test_vzip1q_u16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vzip1q_u16: -; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -445,7 +552,9 @@ entry: define <2 x i32> @test_vzip1_u32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vzip1_u32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %shuffle.i @@ -453,7 +562,9 @@ entry: define <4 x i32> @test_vzip1q_u32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vzip1q_u32: -; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %shuffle.i @@ -461,7 +572,9 @@ entry: define <2 x i64> @test_vzip1q_u64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: test_vzip1q_u64: -; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %shuffle.i @@ -469,7 +582,9 @@ entry: define <2 x float> @test_vzip1_f32(<2 x float> %a, <2 x float> %b) { ; CHECK-LABEL: test_vzip1_f32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> ret <2 x float> %shuffle.i @@ -477,7 +592,9 @@ entry: define <4 x float> @test_vzip1q_f32(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: test_vzip1q_f32: -; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> ret <4 x float> %shuffle.i @@ -485,7 +602,9 @@ entry: define <2 x double> @test_vzip1q_f64(<2 x double> %a, <2 x double> %b) { ; CHECK-LABEL: test_vzip1q_f64: -; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> ret <2 x double> %shuffle.i @@ -493,7 +612,9 @@ entry: define <8 x i8> @test_vzip1_p8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vzip1_p8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -501,7 +622,9 @@ entry: define <16 x i8> @test_vzip1q_p8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vzip1q_p8: -; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -509,7 +632,9 @@ entry: define <4 x i16> @test_vzip1_p16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vzip1_p16: -; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -517,7 +642,9 @@ entry: define <8 x i16> @test_vzip1q_p16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vzip1q_p16: -; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -525,7 +652,9 @@ entry: define <8 x i8> @test_vzip2_s8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vzip2_s8: -; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -533,7 +662,9 @@ entry: define <16 x i8> @test_vzip2q_s8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vzip2q_s8: -; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -541,7 +672,9 @@ entry: define <4 x i16> @test_vzip2_s16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vzip2_s16: -; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -549,7 +682,9 @@ entry: define <8 x i16> @test_vzip2q_s16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vzip2q_s16: -; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -557,7 +692,9 @@ entry: define <2 x i32> @test_vzip2_s32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vzip2_s32: -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %shuffle.i @@ -565,7 +702,9 @@ entry: define <4 x i32> @test_vzip2q_s32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vzip2q_s32: -; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %shuffle.i @@ -573,7 +712,9 @@ entry: define <2 x i64> @test_vzip2q_s64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: test_vzip2q_s64: -; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %shuffle.i @@ -581,7 +722,9 @@ entry: define <8 x i8> @test_vzip2_u8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vzip2_u8: -; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -589,7 +732,9 @@ entry: define <16 x i8> @test_vzip2q_u8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vzip2q_u8: -; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -597,7 +742,9 @@ entry: define <4 x i16> @test_vzip2_u16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vzip2_u16: -; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -605,7 +752,9 @@ entry: define <8 x i16> @test_vzip2q_u16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vzip2q_u16: -; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -613,7 +762,9 @@ entry: define <2 x i32> @test_vzip2_u32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vzip2_u32: -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %shuffle.i @@ -621,7 +772,9 @@ entry: define <4 x i32> @test_vzip2q_u32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vzip2q_u32: -; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %shuffle.i @@ -629,7 +782,9 @@ entry: define <2 x i64> @test_vzip2q_u64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: test_vzip2q_u64: -; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %shuffle.i @@ -637,7 +792,9 @@ entry: define <2 x float> @test_vzip2_f32(<2 x float> %a, <2 x float> %b) { ; CHECK-LABEL: test_vzip2_f32: -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> ret <2 x float> %shuffle.i @@ -645,7 +802,9 @@ entry: define <4 x float> @test_vzip2q_f32(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: test_vzip2q_f32: -; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> ret <4 x float> %shuffle.i @@ -653,7 +812,9 @@ entry: define <2 x double> @test_vzip2q_f64(<2 x double> %a, <2 x double> %b) { ; CHECK-LABEL: test_vzip2q_f64: -; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> ret <2 x double> %shuffle.i @@ -661,7 +822,9 @@ entry: define <8 x i8> @test_vzip2_p8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vzip2_p8: -; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -669,7 +832,9 @@ entry: define <16 x i8> @test_vzip2q_p8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vzip2q_p8: -; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -677,7 +842,9 @@ entry: define <4 x i16> @test_vzip2_p16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vzip2_p16: -; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -685,7 +852,9 @@ entry: define <8 x i16> @test_vzip2q_p16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vzip2q_p16: -; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -693,7 +862,9 @@ entry: define <8 x i8> @test_vtrn1_s8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vtrn1_s8: -; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -701,7 +872,9 @@ entry: define <16 x i8> @test_vtrn1q_s8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vtrn1q_s8: -; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -709,7 +882,9 @@ entry: define <4 x i16> @test_vtrn1_s16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vtrn1_s16: -; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -717,7 +892,9 @@ entry: define <8 x i16> @test_vtrn1q_s16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vtrn1q_s16: -; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -725,7 +902,9 @@ entry: define <2 x i32> @test_vtrn1_s32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vtrn1_s32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %shuffle.i @@ -733,7 +912,9 @@ entry: define <4 x i32> @test_vtrn1q_s32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vtrn1q_s32: -; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %shuffle.i @@ -741,7 +922,9 @@ entry: define <2 x i64> @test_vtrn1q_s64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: test_vtrn1q_s64: -; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %shuffle.i @@ -749,7 +932,9 @@ entry: define <8 x i8> @test_vtrn1_u8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vtrn1_u8: -; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -757,7 +942,9 @@ entry: define <16 x i8> @test_vtrn1q_u8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vtrn1q_u8: -; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -765,7 +952,9 @@ entry: define <4 x i16> @test_vtrn1_u16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vtrn1_u16: -; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -773,7 +962,9 @@ entry: define <8 x i16> @test_vtrn1q_u16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vtrn1q_u16: -; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -781,7 +972,9 @@ entry: define <2 x i32> @test_vtrn1_u32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vtrn1_u32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %shuffle.i @@ -789,7 +982,9 @@ entry: define <4 x i32> @test_vtrn1q_u32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vtrn1q_u32: -; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %shuffle.i @@ -797,7 +992,9 @@ entry: define <2 x i64> @test_vtrn1q_u64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: test_vtrn1q_u64: -; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %shuffle.i @@ -805,7 +1002,9 @@ entry: define <2 x float> @test_vtrn1_f32(<2 x float> %a, <2 x float> %b) { ; CHECK-LABEL: test_vtrn1_f32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> ret <2 x float> %shuffle.i @@ -813,7 +1012,9 @@ entry: define <4 x float> @test_vtrn1q_f32(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: test_vtrn1q_f32: -; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> ret <4 x float> %shuffle.i @@ -821,7 +1022,9 @@ entry: define <2 x double> @test_vtrn1q_f64(<2 x double> %a, <2 x double> %b) { ; CHECK-LABEL: test_vtrn1q_f64: -; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> ret <2 x double> %shuffle.i @@ -829,7 +1032,9 @@ entry: define <8 x i8> @test_vtrn1_p8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vtrn1_p8: -; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -837,7 +1042,9 @@ entry: define <16 x i8> @test_vtrn1q_p8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vtrn1q_p8: -; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -845,7 +1052,9 @@ entry: define <4 x i16> @test_vtrn1_p16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vtrn1_p16: -; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -853,7 +1062,9 @@ entry: define <8 x i16> @test_vtrn1q_p16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vtrn1q_p16: -; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -861,7 +1072,9 @@ entry: define <8 x i8> @test_vtrn2_s8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vtrn2_s8: -; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -869,7 +1082,9 @@ entry: define <16 x i8> @test_vtrn2q_s8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vtrn2q_s8: -; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -877,7 +1092,9 @@ entry: define <4 x i16> @test_vtrn2_s16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vtrn2_s16: -; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -885,7 +1102,9 @@ entry: define <8 x i16> @test_vtrn2q_s16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vtrn2q_s16: -; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -893,7 +1112,9 @@ entry: define <2 x i32> @test_vtrn2_s32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vtrn2_s32: -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %shuffle.i @@ -901,7 +1122,9 @@ entry: define <4 x i32> @test_vtrn2q_s32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vtrn2q_s32: -; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %shuffle.i @@ -909,7 +1132,9 @@ entry: define <2 x i64> @test_vtrn2q_s64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: test_vtrn2q_s64: -; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %shuffle.i @@ -917,7 +1142,9 @@ entry: define <8 x i8> @test_vtrn2_u8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vtrn2_u8: -; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -925,7 +1152,9 @@ entry: define <16 x i8> @test_vtrn2q_u8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vtrn2q_u8: -; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -933,7 +1162,9 @@ entry: define <4 x i16> @test_vtrn2_u16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vtrn2_u16: -; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -941,7 +1172,9 @@ entry: define <8 x i16> @test_vtrn2q_u16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vtrn2q_u16: -; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -949,7 +1182,9 @@ entry: define <2 x i32> @test_vtrn2_u32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vtrn2_u32: -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %shuffle.i @@ -957,7 +1192,9 @@ entry: define <4 x i32> @test_vtrn2q_u32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vtrn2q_u32: -; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %shuffle.i @@ -965,7 +1202,9 @@ entry: define <2 x i64> @test_vtrn2q_u64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: test_vtrn2q_u64: -; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %shuffle.i @@ -973,7 +1212,9 @@ entry: define <2 x float> @test_vtrn2_f32(<2 x float> %a, <2 x float> %b) { ; CHECK-LABEL: test_vtrn2_f32: -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> ret <2 x float> %shuffle.i @@ -981,7 +1222,9 @@ entry: define <4 x float> @test_vtrn2q_f32(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: test_vtrn2q_f32: -; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.4s, v0.4s, v1.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> ret <4 x float> %shuffle.i @@ -989,7 +1232,9 @@ entry: define <2 x double> @test_vtrn2q_f64(<2 x double> %a, <2 x double> %b) { ; CHECK-LABEL: test_vtrn2q_f64: -; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> ret <2 x double> %shuffle.i @@ -997,7 +1242,9 @@ entry: define <8 x i8> @test_vtrn2_p8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vtrn2_p8: -; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.8b, v0.8b, v1.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> ret <8 x i8> %shuffle.i @@ -1005,7 +1252,9 @@ entry: define <16 x i8> @test_vtrn2q_p8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vtrn2q_p8: -; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.16b, v0.16b, v1.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %shuffle.i @@ -1013,7 +1262,9 @@ entry: define <4 x i16> @test_vtrn2_p16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vtrn2_p16: -; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.4h, v0.4h, v1.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> ret <4 x i16> %shuffle.i @@ -1021,7 +1272,9 @@ entry: define <8 x i16> @test_vtrn2q_p16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vtrn2q_p16: -; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.8h, v0.8h, v1.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %shuffle.i @@ -1029,7 +1282,9 @@ entry: define <8 x i8> @test_same_vuzp1_s8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vuzp1_s8: -; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1037,7 +1292,9 @@ entry: define <16 x i8> @test_same_vuzp1q_s8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vuzp1q_s8: -; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1045,7 +1302,9 @@ entry: define <4 x i16> @test_same_vuzp1_s16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vuzp1_s16: -; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1053,7 +1312,9 @@ entry: define <8 x i16> @test_same_vuzp1q_s16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vuzp1q_s16: -; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1061,7 +1322,9 @@ entry: define <4 x i32> @test_same_vuzp1q_s32(<4 x i32> %a) { ; CHECK-LABEL: test_same_vuzp1q_s32: -; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> ret <4 x i32> %shuffle.i @@ -1069,7 +1332,9 @@ entry: define <8 x i8> @test_same_vuzp1_u8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vuzp1_u8: -; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1077,7 +1342,9 @@ entry: define <16 x i8> @test_same_vuzp1q_u8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vuzp1q_u8: -; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1085,7 +1352,9 @@ entry: define <4 x i16> @test_same_vuzp1_u16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vuzp1_u16: -; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1093,7 +1362,9 @@ entry: define <8 x i16> @test_same_vuzp1q_u16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vuzp1q_u16: -; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1101,7 +1372,9 @@ entry: define <4 x i32> @test_same_vuzp1q_u32(<4 x i32> %a) { ; CHECK-LABEL: test_same_vuzp1q_u32: -; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> ret <4 x i32> %shuffle.i @@ -1109,7 +1382,9 @@ entry: define <4 x float> @test_same_vuzp1q_f32(<4 x float> %a) { ; CHECK-LABEL: test_same_vuzp1q_f32: -; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> ret <4 x float> %shuffle.i @@ -1117,7 +1392,9 @@ entry: define <8 x i8> @test_same_vuzp1_p8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vuzp1_p8: -; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1125,7 +1402,9 @@ entry: define <16 x i8> @test_same_vuzp1q_p8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vuzp1q_p8: -; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1133,7 +1412,9 @@ entry: define <4 x i16> @test_same_vuzp1_p16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vuzp1_p16: -; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1141,7 +1422,9 @@ entry: define <8 x i16> @test_same_vuzp1q_p16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vuzp1q_p16: -; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1149,7 +1432,9 @@ entry: define <8 x i8> @test_same_vuzp2_s8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vuzp2_s8: -; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1157,7 +1442,9 @@ entry: define <16 x i8> @test_same_vuzp2q_s8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vuzp2q_s8: -; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1165,7 +1452,9 @@ entry: define <4 x i16> @test_same_vuzp2_s16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vuzp2_s16: -; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1173,7 +1462,9 @@ entry: define <8 x i16> @test_same_vuzp2q_s16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vuzp2q_s16: -; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1181,7 +1472,9 @@ entry: define <4 x i32> @test_same_vuzp2q_s32(<4 x i32> %a) { ; CHECK-LABEL: test_same_vuzp2q_s32: -; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> ret <4 x i32> %shuffle.i @@ -1189,7 +1482,9 @@ entry: define <8 x i8> @test_same_vuzp2_u8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vuzp2_u8: -; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1197,7 +1492,9 @@ entry: define <16 x i8> @test_same_vuzp2q_u8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vuzp2q_u8: -; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1205,7 +1502,9 @@ entry: define <4 x i16> @test_same_vuzp2_u16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vuzp2_u16: -; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1213,7 +1512,9 @@ entry: define <8 x i16> @test_same_vuzp2q_u16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vuzp2q_u16: -; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1221,7 +1522,9 @@ entry: define <4 x i32> @test_same_vuzp2q_u32(<4 x i32> %a) { ; CHECK-LABEL: test_same_vuzp2q_u32: -; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> ret <4 x i32> %shuffle.i @@ -1229,7 +1532,9 @@ entry: define <4 x float> @test_same_vuzp2q_f32(<4 x float> %a) { ; CHECK-LABEL: test_same_vuzp2q_f32: -; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> ret <4 x float> %shuffle.i @@ -1237,7 +1542,9 @@ entry: define <8 x i8> @test_same_vuzp2_p8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vuzp2_p8: -; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1245,7 +1552,9 @@ entry: define <16 x i8> @test_same_vuzp2q_p8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vuzp2q_p8: -; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1253,7 +1562,9 @@ entry: define <4 x i16> @test_same_vuzp2_p16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vuzp2_p16: -; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1261,7 +1572,9 @@ entry: define <8 x i16> @test_same_vuzp2q_p16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vuzp2q_p16: -; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1269,7 +1582,9 @@ entry: define <8 x i8> @test_same_vzip1_s8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vzip1_s8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1277,7 +1592,9 @@ entry: define <16 x i8> @test_same_vzip1q_s8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vzip1q_s8: -; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1285,7 +1602,9 @@ entry: define <4 x i16> @test_same_vzip1_s16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vzip1_s16: -; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1293,7 +1612,9 @@ entry: define <8 x i16> @test_same_vzip1q_s16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vzip1q_s16: -; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1301,7 +1622,9 @@ entry: define <4 x i32> @test_same_vzip1q_s32(<4 x i32> %a) { ; CHECK-LABEL: test_same_vzip1q_s32: -; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> ret <4 x i32> %shuffle.i @@ -1309,7 +1632,9 @@ entry: define <8 x i8> @test_same_vzip1_u8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vzip1_u8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1317,7 +1642,9 @@ entry: define <16 x i8> @test_same_vzip1q_u8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vzip1q_u8: -; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1325,7 +1652,9 @@ entry: define <4 x i16> @test_same_vzip1_u16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vzip1_u16: -; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1333,7 +1662,9 @@ entry: define <8 x i16> @test_same_vzip1q_u16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vzip1q_u16: -; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1341,7 +1672,9 @@ entry: define <4 x i32> @test_same_vzip1q_u32(<4 x i32> %a) { ; CHECK-LABEL: test_same_vzip1q_u32: -; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> ret <4 x i32> %shuffle.i @@ -1349,7 +1682,9 @@ entry: define <4 x float> @test_same_vzip1q_f32(<4 x float> %a) { ; CHECK-LABEL: test_same_vzip1q_f32: -; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> ret <4 x float> %shuffle.i @@ -1357,7 +1692,9 @@ entry: define <8 x i8> @test_same_vzip1_p8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vzip1_p8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1365,7 +1702,9 @@ entry: define <16 x i8> @test_same_vzip1q_p8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vzip1q_p8: -; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1373,7 +1712,9 @@ entry: define <4 x i16> @test_same_vzip1_p16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vzip1_p16: -; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1381,7 +1722,9 @@ entry: define <8 x i16> @test_same_vzip1q_p16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vzip1q_p16: -; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1389,14 +1732,18 @@ entry: define <4 x i8> @test_vzip1_v4i8(<8 x i8> %p) { ; CHECK-LABEL: test_vzip1_v4i8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: +; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret %lo = shufflevector <8 x i8> %p, <8 x i8> undef, <4 x i32> ret <4 x i8> %lo } define <8 x i8> @test_same_vzip2_s8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vzip2_s8: -; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1404,7 +1751,9 @@ entry: define <16 x i8> @test_same_vzip2q_s8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vzip2q_s8: -; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1412,7 +1761,9 @@ entry: define <4 x i16> @test_same_vzip2_s16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vzip2_s16: -; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1420,7 +1771,9 @@ entry: define <8 x i16> @test_same_vzip2q_s16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vzip2q_s16: -; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1428,7 +1781,9 @@ entry: define <4 x i32> @test_same_vzip2q_s32(<4 x i32> %a) { ; CHECK-LABEL: test_same_vzip2q_s32: -; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> ret <4 x i32> %shuffle.i @@ -1436,7 +1791,9 @@ entry: define <8 x i8> @test_same_vzip2_u8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vzip2_u8: -; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1444,7 +1801,9 @@ entry: define <16 x i8> @test_same_vzip2q_u8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vzip2q_u8: -; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1452,7 +1811,9 @@ entry: define <4 x i16> @test_same_vzip2_u16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vzip2_u16: -; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1460,7 +1821,9 @@ entry: define <8 x i16> @test_same_vzip2q_u16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vzip2q_u16: -; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1468,7 +1831,9 @@ entry: define <4 x i32> @test_same_vzip2q_u32(<4 x i32> %a) { ; CHECK-LABEL: test_same_vzip2q_u32: -; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> ret <4 x i32> %shuffle.i @@ -1476,7 +1841,9 @@ entry: define <4 x float> @test_same_vzip2q_f32(<4 x float> %a) { ; CHECK-LABEL: test_same_vzip2q_f32: -; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> ret <4 x float> %shuffle.i @@ -1484,7 +1851,9 @@ entry: define <8 x i8> @test_same_vzip2_p8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vzip2_p8: -; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1492,7 +1861,9 @@ entry: define <16 x i8> @test_same_vzip2q_p8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vzip2q_p8: -; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1500,7 +1871,9 @@ entry: define <4 x i16> @test_same_vzip2_p16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vzip2_p16: -; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1508,7 +1881,9 @@ entry: define <8 x i16> @test_same_vzip2q_p16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vzip2q_p16: -; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1516,7 +1891,9 @@ entry: define <8 x i8> @test_same_vtrn1_s8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vtrn1_s8: -; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1524,7 +1901,9 @@ entry: define <16 x i8> @test_same_vtrn1q_s8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vtrn1q_s8: -; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1532,7 +1911,9 @@ entry: define <4 x i16> @test_same_vtrn1_s16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vtrn1_s16: -; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1540,7 +1921,9 @@ entry: define <8 x i16> @test_same_vtrn1q_s16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vtrn1q_s16: -; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1548,7 +1931,9 @@ entry: define <4 x i32> @test_same_vtrn1q_s32(<4 x i32> %a) { ; CHECK-LABEL: test_same_vtrn1q_s32: -; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> ret <4 x i32> %shuffle.i @@ -1556,7 +1941,9 @@ entry: define <8 x i8> @test_same_vtrn1_u8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vtrn1_u8: -; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1564,7 +1951,9 @@ entry: define <16 x i8> @test_same_vtrn1q_u8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vtrn1q_u8: -; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1572,7 +1961,9 @@ entry: define <4 x i16> @test_same_vtrn1_u16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vtrn1_u16: -; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1580,7 +1971,9 @@ entry: define <8 x i16> @test_same_vtrn1q_u16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vtrn1q_u16: -; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1588,7 +1981,9 @@ entry: define <4 x i32> @test_same_vtrn1q_u32(<4 x i32> %a) { ; CHECK-LABEL: test_same_vtrn1q_u32: -; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> ret <4 x i32> %shuffle.i @@ -1596,7 +1991,9 @@ entry: define <4 x float> @test_same_vtrn1q_f32(<4 x float> %a) { ; CHECK-LABEL: test_same_vtrn1q_f32: -; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> ret <4 x float> %shuffle.i @@ -1604,7 +2001,9 @@ entry: define <8 x i8> @test_same_vtrn1_p8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vtrn1_p8: -; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1612,7 +2011,9 @@ entry: define <16 x i8> @test_same_vtrn1q_p8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vtrn1q_p8: -; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1620,7 +2021,9 @@ entry: define <4 x i16> @test_same_vtrn1_p16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vtrn1_p16: -; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1628,7 +2031,9 @@ entry: define <8 x i16> @test_same_vtrn1q_p16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vtrn1q_p16: -; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1636,7 +2041,9 @@ entry: define <8 x i8> @test_same_vtrn2_s8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vtrn2_s8: -; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1644,7 +2051,9 @@ entry: define <16 x i8> @test_same_vtrn2q_s8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vtrn2q_s8: -; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1652,7 +2061,9 @@ entry: define <4 x i16> @test_same_vtrn2_s16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vtrn2_s16: -; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1660,7 +2071,9 @@ entry: define <8 x i16> @test_same_vtrn2q_s16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vtrn2q_s16: -; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1668,7 +2081,9 @@ entry: define <4 x i32> @test_same_vtrn2q_s32(<4 x i32> %a) { ; CHECK-LABEL: test_same_vtrn2q_s32: -; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> ret <4 x i32> %shuffle.i @@ -1676,7 +2091,9 @@ entry: define <8 x i8> @test_same_vtrn2_u8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vtrn2_u8: -; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1684,7 +2101,9 @@ entry: define <16 x i8> @test_same_vtrn2q_u8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vtrn2q_u8: -; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1692,7 +2111,9 @@ entry: define <4 x i16> @test_same_vtrn2_u16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vtrn2_u16: -; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1700,7 +2121,9 @@ entry: define <8 x i16> @test_same_vtrn2q_u16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vtrn2q_u16: -; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1708,7 +2131,9 @@ entry: define <4 x i32> @test_same_vtrn2q_u32(<4 x i32> %a) { ; CHECK-LABEL: test_same_vtrn2q_u32: -; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> ret <4 x i32> %shuffle.i @@ -1716,7 +2141,9 @@ entry: define <4 x float> @test_same_vtrn2q_f32(<4 x float> %a) { ; CHECK-LABEL: test_same_vtrn2q_f32: -; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> ret <4 x float> %shuffle.i @@ -1724,7 +2151,9 @@ entry: define <8 x i8> @test_same_vtrn2_p8(<8 x i8> %a) { ; CHECK-LABEL: test_same_vtrn2_p8: -; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> ret <8 x i8> %shuffle.i @@ -1732,7 +2161,9 @@ entry: define <16 x i8> @test_same_vtrn2q_p8(<16 x i8> %a) { ; CHECK-LABEL: test_same_vtrn2q_p8: -; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> ret <16 x i8> %shuffle.i @@ -1740,7 +2171,9 @@ entry: define <4 x i16> @test_same_vtrn2_p16(<4 x i16> %a) { ; CHECK-LABEL: test_same_vtrn2_p16: -; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> ret <4 x i16> %shuffle.i @@ -1748,7 +2181,9 @@ entry: define <8 x i16> @test_same_vtrn2q_p16(<8 x i16> %a) { ; CHECK-LABEL: test_same_vtrn2q_p16: -; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> ret <8 x i16> %shuffle.i @@ -1757,7 +2192,9 @@ entry: define <8 x i8> @test_undef_vuzp1_s8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vuzp1_s8: -; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -1765,7 +2202,9 @@ entry: define <16 x i8> @test_undef_vuzp1q_s8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vuzp1q_s8: -; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -1773,7 +2212,9 @@ entry: define <4 x i16> @test_undef_vuzp1_s16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vuzp1_s16: -; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -1781,7 +2222,9 @@ entry: define <8 x i16> @test_undef_vuzp1q_s16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vuzp1q_s16: -; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -1789,7 +2232,9 @@ entry: define <4 x i32> @test_undef_vuzp1q_s32(<4 x i32> %a) { ; CHECK-LABEL: test_undef_vuzp1q_s32: -; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> ret <4 x i32> %shuffle.i @@ -1797,7 +2242,9 @@ entry: define <8 x i8> @test_undef_vuzp1_u8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vuzp1_u8: -; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -1805,7 +2252,9 @@ entry: define <16 x i8> @test_undef_vuzp1q_u8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vuzp1q_u8: -; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -1813,7 +2262,9 @@ entry: define <4 x i16> @test_undef_vuzp1_u16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vuzp1_u16: -; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -1821,7 +2272,9 @@ entry: define <8 x i16> @test_undef_vuzp1q_u16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vuzp1q_u16: -; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -1829,7 +2282,9 @@ entry: define <4 x i32> @test_undef_vuzp1q_u32(<4 x i32> %a) { ; CHECK-LABEL: test_undef_vuzp1q_u32: -; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> ret <4 x i32> %shuffle.i @@ -1837,7 +2292,9 @@ entry: define <4 x float> @test_undef_vuzp1q_f32(<4 x float> %a) { ; CHECK-LABEL: test_undef_vuzp1q_f32: -; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> ret <4 x float> %shuffle.i @@ -1845,7 +2302,9 @@ entry: define <8 x i8> @test_undef_vuzp1_p8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vuzp1_p8: -; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -1853,7 +2312,9 @@ entry: define <16 x i8> @test_undef_vuzp1q_p8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vuzp1q_p8: -; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -1861,7 +2322,9 @@ entry: define <4 x i16> @test_undef_vuzp1_p16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vuzp1_p16: -; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -1869,7 +2332,9 @@ entry: define <8 x i16> @test_undef_vuzp1q_p16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vuzp1q_p16: -; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -1877,7 +2342,9 @@ entry: define <8 x i8> @test_undef_vuzp2_s8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vuzp2_s8: -; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -1885,7 +2352,9 @@ entry: define <16 x i8> @test_undef_vuzp2q_s8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vuzp2q_s8: -; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -1893,7 +2362,9 @@ entry: define <4 x i16> @test_undef_vuzp2_s16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vuzp2_s16: -; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -1901,7 +2372,9 @@ entry: define <8 x i16> @test_undef_vuzp2q_s16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vuzp2q_s16: -; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -1909,7 +2382,9 @@ entry: define <4 x i32> @test_undef_vuzp2q_s32(<4 x i32> %a) { ; CHECK-LABEL: test_undef_vuzp2q_s32: -; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> ret <4 x i32> %shuffle.i @@ -1917,7 +2392,9 @@ entry: define <8 x i8> @test_undef_vuzp2_u8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vuzp2_u8: -; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -1925,7 +2402,9 @@ entry: define <16 x i8> @test_undef_vuzp2q_u8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vuzp2q_u8: -; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -1933,7 +2412,9 @@ entry: define <4 x i16> @test_undef_vuzp2_u16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vuzp2_u16: -; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -1941,7 +2422,9 @@ entry: define <8 x i16> @test_undef_vuzp2q_u16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vuzp2q_u16: -; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -1949,7 +2432,9 @@ entry: define <4 x i32> @test_undef_vuzp2q_u32(<4 x i32> %a) { ; CHECK-LABEL: test_undef_vuzp2q_u32: -; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> ret <4 x i32> %shuffle.i @@ -1957,7 +2442,9 @@ entry: define <4 x float> @test_undef_vuzp2q_f32(<4 x float> %a) { ; CHECK-LABEL: test_undef_vuzp2q_f32: -; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> ret <4 x float> %shuffle.i @@ -1965,7 +2452,9 @@ entry: define <8 x i8> @test_undef_vuzp2_p8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vuzp2_p8: -; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -1973,7 +2462,9 @@ entry: define <16 x i8> @test_undef_vuzp2q_p8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vuzp2q_p8: -; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -1981,7 +2472,9 @@ entry: define <4 x i16> @test_undef_vuzp2_p16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vuzp2_p16: -; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -1989,7 +2482,9 @@ entry: define <8 x i16> @test_undef_vuzp2q_p16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vuzp2q_p16: -; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -1997,7 +2492,9 @@ entry: define <8 x i8> @test_undef_vzip1_s8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vzip1_s8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -2005,7 +2502,9 @@ entry: define <16 x i8> @test_undef_vzip1q_s8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vzip1q_s8: -; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -2013,7 +2512,9 @@ entry: define <4 x i16> @test_undef_vzip1_s16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vzip1_s16: -; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -2021,7 +2522,9 @@ entry: define <8 x i16> @test_undef_vzip1q_s16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vzip1q_s16: -; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -2029,7 +2532,9 @@ entry: define <4 x i32> @test_undef_vzip1q_s32(<4 x i32> %a) { ; CHECK-LABEL: test_undef_vzip1q_s32: -; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> ret <4 x i32> %shuffle.i @@ -2037,7 +2542,9 @@ entry: define <8 x i8> @test_undef_vzip1_u8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vzip1_u8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -2045,7 +2552,9 @@ entry: define <16 x i8> @test_undef_vzip1q_u8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vzip1q_u8: -; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -2053,7 +2562,9 @@ entry: define <4 x i16> @test_undef_vzip1_u16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vzip1_u16: -; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -2061,7 +2572,9 @@ entry: define <8 x i16> @test_undef_vzip1q_u16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vzip1q_u16: -; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -2069,7 +2582,9 @@ entry: define <4 x i32> @test_undef_vzip1q_u32(<4 x i32> %a) { ; CHECK-LABEL: test_undef_vzip1q_u32: -; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> ret <4 x i32> %shuffle.i @@ -2077,7 +2592,9 @@ entry: define <4 x float> @test_undef_vzip1q_f32(<4 x float> %a) { ; CHECK-LABEL: test_undef_vzip1q_f32: -; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> ret <4 x float> %shuffle.i @@ -2085,7 +2602,9 @@ entry: define <8 x i8> @test_undef_vzip1_p8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vzip1_p8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -2093,7 +2612,9 @@ entry: define <16 x i8> @test_undef_vzip1q_p8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vzip1q_p8: -; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -2101,7 +2622,9 @@ entry: define <4 x i16> @test_undef_vzip1_p16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vzip1_p16: -; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -2109,7 +2632,9 @@ entry: define <8 x i16> @test_undef_vzip1q_p16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vzip1q_p16: -; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -2117,7 +2642,9 @@ entry: define <8 x i8> @test_undef_vzip2_s8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vzip2_s8: -; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -2125,7 +2652,9 @@ entry: define <16 x i8> @test_undef_vzip2q_s8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vzip2q_s8: -; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -2133,7 +2662,9 @@ entry: define <4 x i16> @test_undef_vzip2_s16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vzip2_s16: -; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -2141,7 +2672,9 @@ entry: define <8 x i16> @test_undef_vzip2q_s16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vzip2q_s16: -; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -2149,7 +2682,9 @@ entry: define <4 x i32> @test_undef_vzip2q_s32(<4 x i32> %a) { ; CHECK-LABEL: test_undef_vzip2q_s32: -; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> ret <4 x i32> %shuffle.i @@ -2157,7 +2692,9 @@ entry: define <8 x i8> @test_undef_vzip2_u8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vzip2_u8: -; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -2165,7 +2702,9 @@ entry: define <16 x i8> @test_undef_vzip2q_u8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vzip2q_u8: -; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -2173,7 +2712,9 @@ entry: define <4 x i16> @test_undef_vzip2_u16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vzip2_u16: -; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -2181,7 +2722,9 @@ entry: define <8 x i16> @test_undef_vzip2q_u16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vzip2q_u16: -; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -2189,7 +2732,9 @@ entry: define <4 x i32> @test_undef_vzip2q_u32(<4 x i32> %a) { ; CHECK-LABEL: test_undef_vzip2q_u32: -; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> ret <4 x i32> %shuffle.i @@ -2197,7 +2742,9 @@ entry: define <4 x float> @test_undef_vzip2q_f32(<4 x float> %a) { ; CHECK-LABEL: test_undef_vzip2q_f32: -; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> ret <4 x float> %shuffle.i @@ -2205,7 +2752,9 @@ entry: define <8 x i8> @test_undef_vzip2_p8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vzip2_p8: -; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -2213,7 +2762,9 @@ entry: define <16 x i8> @test_undef_vzip2q_p8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vzip2q_p8: -; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -2221,7 +2772,9 @@ entry: define <4 x i16> @test_undef_vzip2_p16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vzip2_p16: -; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -2229,7 +2782,9 @@ entry: define <8 x i16> @test_undef_vzip2q_p16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vzip2q_p16: -; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -2237,7 +2792,8 @@ entry: define <8 x i8> @test_undef_vtrn1_s8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vtrn1_s8: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -2245,7 +2801,8 @@ entry: define <16 x i8> @test_undef_vtrn1q_s8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vtrn1q_s8: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -2253,7 +2810,8 @@ entry: define <4 x i16> @test_undef_vtrn1_s16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vtrn1_s16: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -2261,7 +2819,8 @@ entry: define <8 x i16> @test_undef_vtrn1q_s16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vtrn1q_s16: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -2269,7 +2828,8 @@ entry: define <4 x i32> @test_undef_vtrn1q_s32(<4 x i32> %a) { ; CHECK-LABEL: test_undef_vtrn1q_s32: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> ret <4 x i32> %shuffle.i @@ -2277,7 +2837,8 @@ entry: define <8 x i8> @test_undef_vtrn1_u8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vtrn1_u8: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -2285,7 +2846,8 @@ entry: define <16 x i8> @test_undef_vtrn1q_u8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vtrn1q_u8: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -2293,7 +2855,8 @@ entry: define <4 x i16> @test_undef_vtrn1_u16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vtrn1_u16: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -2301,7 +2864,8 @@ entry: define <8 x i16> @test_undef_vtrn1q_u16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vtrn1q_u16: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -2309,7 +2873,8 @@ entry: define <4 x i32> @test_undef_vtrn1q_u32(<4 x i32> %a) { ; CHECK-LABEL: test_undef_vtrn1q_u32: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> ret <4 x i32> %shuffle.i @@ -2317,7 +2882,8 @@ entry: define <4 x float> @test_undef_vtrn1q_f32(<4 x float> %a) { ; CHECK-LABEL: test_undef_vtrn1q_f32: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> ret <4 x float> %shuffle.i @@ -2325,7 +2891,8 @@ entry: define <8 x i8> @test_undef_vtrn1_p8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vtrn1_p8: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -2333,7 +2900,8 @@ entry: define <16 x i8> @test_undef_vtrn1q_p8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vtrn1q_p8: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -2341,7 +2909,8 @@ entry: define <4 x i16> @test_undef_vtrn1_p16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vtrn1_p16: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -2349,7 +2918,8 @@ entry: define <8 x i16> @test_undef_vtrn1q_p16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vtrn1q_p16: -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -2357,7 +2927,9 @@ entry: define <8 x i8> @test_undef_vtrn2_s8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vtrn2_s8: -; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev16 v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -2365,7 +2937,9 @@ entry: define <16 x i8> @test_undef_vtrn2q_s8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vtrn2q_s8: -; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev16 v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -2373,7 +2947,9 @@ entry: define <4 x i16> @test_undef_vtrn2_s16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vtrn2_s16: -; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev32 v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -2381,7 +2957,9 @@ entry: define <8 x i16> @test_undef_vtrn2q_s16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vtrn2q_s16: -; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev32 v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -2389,7 +2967,9 @@ entry: define <4 x i32> @test_undef_vtrn2q_s32(<4 x i32> %a) { ; CHECK-LABEL: test_undef_vtrn2q_s32: -; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev64 v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> ret <4 x i32> %shuffle.i @@ -2397,7 +2977,9 @@ entry: define <8 x i8> @test_undef_vtrn2_u8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vtrn2_u8: -; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev16 v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -2405,7 +2987,9 @@ entry: define <16 x i8> @test_undef_vtrn2q_u8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vtrn2q_u8: -; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev16 v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -2413,7 +2997,9 @@ entry: define <4 x i16> @test_undef_vtrn2_u16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vtrn2_u16: -; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev32 v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -2421,7 +3007,9 @@ entry: define <8 x i16> @test_undef_vtrn2q_u16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vtrn2q_u16: -; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev32 v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -2429,7 +3017,9 @@ entry: define <4 x i32> @test_undef_vtrn2q_u32(<4 x i32> %a) { ; CHECK-LABEL: test_undef_vtrn2q_u32: -; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev64 v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> ret <4 x i32> %shuffle.i @@ -2437,7 +3027,9 @@ entry: define <4 x float> @test_undef_vtrn2q_f32(<4 x float> %a) { ; CHECK-LABEL: test_undef_vtrn2q_f32: -; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev64 v0.4s, v0.4s +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> ret <4 x float> %shuffle.i @@ -2445,7 +3037,9 @@ entry: define <8 x i8> @test_undef_vtrn2_p8(<8 x i8> %a) { ; CHECK-LABEL: test_undef_vtrn2_p8: -; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev16 v0.8b, v0.8b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> ret <8 x i8> %shuffle.i @@ -2453,7 +3047,9 @@ entry: define <16 x i8> @test_undef_vtrn2q_p8(<16 x i8> %a) { ; CHECK-LABEL: test_undef_vtrn2q_p8: -; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev16 v0.16b, v0.16b +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> ret <16 x i8> %shuffle.i @@ -2461,7 +3057,9 @@ entry: define <4 x i16> @test_undef_vtrn2_p16(<4 x i16> %a) { ; CHECK-LABEL: test_undef_vtrn2_p16: -; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev32 v0.4h, v0.4h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> ret <4 x i16> %shuffle.i @@ -2469,7 +3067,9 @@ entry: define <8 x i16> @test_undef_vtrn2q_p16(<8 x i16> %a) { ; CHECK-LABEL: test_undef_vtrn2q_p16: -; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: rev32 v0.8h, v0.8h +; CHECK-NEXT: ret entry: %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> ret <8 x i16> %shuffle.i @@ -2477,8 +3077,11 @@ entry: define %struct.int8x8x2_t @test_vuzp_s8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vuzp_s8: -; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b -; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.8b, v0.8b, v1.8b +; CHECK-NEXT: uzp2 v1.8b, v0.8b, v1.8b +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> @@ -2489,8 +3092,11 @@ entry: define %struct.int16x4x2_t @test_vuzp_s16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vuzp_s16: -; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h -; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.4h, v0.4h, v1.4h +; CHECK-NEXT: uzp2 v1.4h, v0.4h, v1.4h +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> @@ -2501,8 +3107,11 @@ entry: define %struct.int32x2x2_t @test_vuzp_s32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vuzp_s32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s +; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> @@ -2513,8 +3122,11 @@ entry: define %struct.uint8x8x2_t @test_vuzp_u8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vuzp_u8: -; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b -; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.8b, v0.8b, v1.8b +; CHECK-NEXT: uzp2 v1.8b, v0.8b, v1.8b +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> @@ -2525,8 +3137,11 @@ entry: define %struct.uint16x4x2_t @test_vuzp_u16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vuzp_u16: -; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h -; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.4h, v0.4h, v1.4h +; CHECK-NEXT: uzp2 v1.4h, v0.4h, v1.4h +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> @@ -2537,8 +3152,11 @@ entry: define %struct.uint32x2x2_t @test_vuzp_u32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vuzp_u32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s +; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> @@ -2549,8 +3167,11 @@ entry: define %struct.float32x2x2_t @test_vuzp_f32(<2 x float> %a, <2 x float> %b) { ; CHECK-LABEL: test_vuzp_f32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s +; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> %vuzp1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> @@ -2561,8 +3182,11 @@ entry: define %struct.poly8x8x2_t @test_vuzp_p8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vuzp_p8: -; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b -; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.8b, v0.8b, v1.8b +; CHECK-NEXT: uzp2 v1.8b, v0.8b, v1.8b +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> @@ -2573,8 +3197,11 @@ entry: define %struct.poly16x4x2_t @test_vuzp_p16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vuzp_p16: -; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h -; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.4h, v0.4h, v1.4h +; CHECK-NEXT: uzp2 v1.4h, v0.4h, v1.4h +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> @@ -2585,8 +3212,11 @@ entry: define %struct.int8x16x2_t @test_vuzpq_s8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vuzpq_s8: -; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b -; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.16b, v0.16b, v1.16b +; CHECK-NEXT: uzp2 v1.16b, v0.16b, v1.16b +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> @@ -2597,8 +3227,11 @@ entry: define %struct.int16x8x2_t @test_vuzpq_s16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vuzpq_s16: -; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h -; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.8h, v0.8h, v1.8h +; CHECK-NEXT: uzp2 v1.8h, v0.8h, v1.8h +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> @@ -2609,8 +3242,11 @@ entry: define %struct.int32x4x2_t @test_vuzpq_s32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vuzpq_s32: -; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s -; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.4s, v0.4s, v1.4s +; CHECK-NEXT: uzp2 v1.4s, v0.4s, v1.4s +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> @@ -2621,8 +3257,11 @@ entry: define %struct.uint8x16x2_t @test_vuzpq_u8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vuzpq_u8: -; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b -; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.16b, v0.16b, v1.16b +; CHECK-NEXT: uzp2 v1.16b, v0.16b, v1.16b +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> @@ -2633,8 +3272,11 @@ entry: define %struct.uint16x8x2_t @test_vuzpq_u16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vuzpq_u16: -; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h -; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.8h, v0.8h, v1.8h +; CHECK-NEXT: uzp2 v1.8h, v0.8h, v1.8h +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> @@ -2645,8 +3287,11 @@ entry: define %struct.uint32x4x2_t @test_vuzpq_u32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vuzpq_u32: -; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s -; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.4s, v0.4s, v1.4s +; CHECK-NEXT: uzp2 v1.4s, v0.4s, v1.4s +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> @@ -2657,8 +3302,11 @@ entry: define %struct.float32x4x2_t @test_vuzpq_f32(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: test_vuzpq_f32: -; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s -; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.4s, v0.4s, v1.4s +; CHECK-NEXT: uzp2 v1.4s, v0.4s, v1.4s +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> %vuzp1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> @@ -2669,8 +3317,11 @@ entry: define %struct.poly8x16x2_t @test_vuzpq_p8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vuzpq_p8: -; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b -; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.16b, v0.16b, v1.16b +; CHECK-NEXT: uzp2 v1.16b, v0.16b, v1.16b +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> @@ -2681,8 +3332,11 @@ entry: define %struct.poly16x8x2_t @test_vuzpq_p16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vuzpq_p16: -; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h -; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: uzp1 v2.8h, v0.8h, v1.8h +; CHECK-NEXT: uzp2 v1.8h, v0.8h, v1.8h +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> @@ -2693,8 +3347,11 @@ entry: define %struct.int8x8x2_t @test_vzip_s8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vzip_s8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b -; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.8b, v0.8b, v1.8b +; CHECK-NEXT: zip2 v1.8b, v0.8b, v1.8b +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> @@ -2705,8 +3362,11 @@ entry: define %struct.int16x4x2_t @test_vzip_s16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vzip_s16: -; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h -; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.4h, v0.4h, v1.4h +; CHECK-NEXT: zip2 v1.4h, v0.4h, v1.4h +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> @@ -2717,8 +3377,11 @@ entry: define %struct.int32x2x2_t @test_vzip_s32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vzip_s32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s +; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> @@ -2729,8 +3392,11 @@ entry: define %struct.uint8x8x2_t @test_vzip_u8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vzip_u8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b -; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.8b, v0.8b, v1.8b +; CHECK-NEXT: zip2 v1.8b, v0.8b, v1.8b +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> @@ -2741,8 +3407,11 @@ entry: define %struct.uint16x4x2_t @test_vzip_u16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vzip_u16: -; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h -; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.4h, v0.4h, v1.4h +; CHECK-NEXT: zip2 v1.4h, v0.4h, v1.4h +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> @@ -2753,8 +3422,11 @@ entry: define %struct.uint32x2x2_t @test_vzip_u32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vzip_u32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s +; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> @@ -2765,8 +3437,11 @@ entry: define %struct.float32x2x2_t @test_vzip_f32(<2 x float> %a, <2 x float> %b) { ; CHECK-LABEL: test_vzip_f32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s +; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> %vzip1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> @@ -2777,8 +3452,11 @@ entry: define %struct.poly8x8x2_t @test_vzip_p8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vzip_p8: -; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b -; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.8b, v0.8b, v1.8b +; CHECK-NEXT: zip2 v1.8b, v0.8b, v1.8b +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> @@ -2789,8 +3467,11 @@ entry: define %struct.poly16x4x2_t @test_vzip_p16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vzip_p16: -; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h -; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.4h, v0.4h, v1.4h +; CHECK-NEXT: zip2 v1.4h, v0.4h, v1.4h +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> @@ -2801,8 +3482,11 @@ entry: define %struct.int8x16x2_t @test_vzipq_s8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vzipq_s8: -; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b -; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.16b, v0.16b, v1.16b +; CHECK-NEXT: zip2 v1.16b, v0.16b, v1.16b +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> @@ -2813,8 +3497,11 @@ entry: define %struct.int16x8x2_t @test_vzipq_s16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vzipq_s16: -; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h -; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.8h, v0.8h, v1.8h +; CHECK-NEXT: zip2 v1.8h, v0.8h, v1.8h +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> @@ -2825,8 +3512,11 @@ entry: define %struct.int32x4x2_t @test_vzipq_s32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vzipq_s32: -; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s -; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.4s, v0.4s, v1.4s +; CHECK-NEXT: zip2 v1.4s, v0.4s, v1.4s +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> @@ -2837,8 +3527,11 @@ entry: define %struct.uint8x16x2_t @test_vzipq_u8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vzipq_u8: -; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b -; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.16b, v0.16b, v1.16b +; CHECK-NEXT: zip2 v1.16b, v0.16b, v1.16b +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> @@ -2849,8 +3542,11 @@ entry: define %struct.uint16x8x2_t @test_vzipq_u16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vzipq_u16: -; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h -; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.8h, v0.8h, v1.8h +; CHECK-NEXT: zip2 v1.8h, v0.8h, v1.8h +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> @@ -2861,8 +3557,11 @@ entry: define %struct.uint32x4x2_t @test_vzipq_u32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vzipq_u32: -; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s -; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.4s, v0.4s, v1.4s +; CHECK-NEXT: zip2 v1.4s, v0.4s, v1.4s +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> @@ -2873,8 +3572,11 @@ entry: define %struct.float32x4x2_t @test_vzipq_f32(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: test_vzipq_f32: -; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s -; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.4s, v0.4s, v1.4s +; CHECK-NEXT: zip2 v1.4s, v0.4s, v1.4s +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> %vzip1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> @@ -2885,8 +3587,11 @@ entry: define %struct.poly8x16x2_t @test_vzipq_p8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vzipq_p8: -; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b -; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.16b, v0.16b, v1.16b +; CHECK-NEXT: zip2 v1.16b, v0.16b, v1.16b +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> @@ -2897,8 +3602,11 @@ entry: define %struct.poly16x8x2_t @test_vzipq_p16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vzipq_p16: -; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h -; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.8h, v0.8h, v1.8h +; CHECK-NEXT: zip2 v1.8h, v0.8h, v1.8h +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> @@ -2909,8 +3617,11 @@ entry: define %struct.int8x8x2_t @test_vtrn_s8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vtrn_s8: -; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b -; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.8b, v0.8b, v1.8b +; CHECK-NEXT: trn2 v1.8b, v0.8b, v1.8b +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> @@ -2921,8 +3632,11 @@ entry: define %struct.int16x4x2_t @test_vtrn_s16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vtrn_s16: -; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h -; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.4h, v0.4h, v1.4h +; CHECK-NEXT: trn2 v1.4h, v0.4h, v1.4h +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> @@ -2933,8 +3647,11 @@ entry: define %struct.int32x2x2_t @test_vtrn_s32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vtrn_s32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s +; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> @@ -2945,8 +3662,11 @@ entry: define %struct.uint8x8x2_t @test_vtrn_u8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vtrn_u8: -; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b -; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.8b, v0.8b, v1.8b +; CHECK-NEXT: trn2 v1.8b, v0.8b, v1.8b +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> @@ -2957,8 +3677,11 @@ entry: define %struct.uint16x4x2_t @test_vtrn_u16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vtrn_u16: -; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h -; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.4h, v0.4h, v1.4h +; CHECK-NEXT: trn2 v1.4h, v0.4h, v1.4h +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> @@ -2969,8 +3692,11 @@ entry: define %struct.uint32x2x2_t @test_vtrn_u32(<2 x i32> %a, <2 x i32> %b) { ; CHECK-LABEL: test_vtrn_u32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s +; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> @@ -2981,8 +3707,11 @@ entry: define %struct.float32x2x2_t @test_vtrn_f32(<2 x float> %a, <2 x float> %b) { ; CHECK-LABEL: test_vtrn_f32: -; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s -; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s +; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> %vtrn1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> @@ -2993,8 +3722,11 @@ entry: define %struct.poly8x8x2_t @test_vtrn_p8(<8 x i8> %a, <8 x i8> %b) { ; CHECK-LABEL: test_vtrn_p8: -; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b -; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.8b, v0.8b, v1.8b +; CHECK-NEXT: trn2 v1.8b, v0.8b, v1.8b +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> @@ -3005,8 +3737,11 @@ entry: define %struct.poly16x4x2_t @test_vtrn_p16(<4 x i16> %a, <4 x i16> %b) { ; CHECK-LABEL: test_vtrn_p16: -; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h -; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.4h, v0.4h, v1.4h +; CHECK-NEXT: trn2 v1.4h, v0.4h, v1.4h +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> @@ -3017,8 +3752,11 @@ entry: define %struct.int8x16x2_t @test_vtrnq_s8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vtrnq_s8: -; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b -; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.16b, v0.16b, v1.16b +; CHECK-NEXT: trn2 v1.16b, v0.16b, v1.16b +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> @@ -3029,8 +3767,11 @@ entry: define %struct.int16x8x2_t @test_vtrnq_s16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vtrnq_s16: -; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h -; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.8h, v0.8h, v1.8h +; CHECK-NEXT: trn2 v1.8h, v0.8h, v1.8h +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> @@ -3041,8 +3782,11 @@ entry: define %struct.int32x4x2_t @test_vtrnq_s32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vtrnq_s32: -; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s -; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.4s, v0.4s, v1.4s +; CHECK-NEXT: trn2 v1.4s, v0.4s, v1.4s +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> @@ -3053,8 +3797,11 @@ entry: define %struct.uint8x16x2_t @test_vtrnq_u8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vtrnq_u8: -; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b -; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.16b, v0.16b, v1.16b +; CHECK-NEXT: trn2 v1.16b, v0.16b, v1.16b +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> @@ -3065,8 +3812,11 @@ entry: define %struct.uint16x8x2_t @test_vtrnq_u16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vtrnq_u16: -; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h -; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.8h, v0.8h, v1.8h +; CHECK-NEXT: trn2 v1.8h, v0.8h, v1.8h +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> @@ -3077,8 +3827,11 @@ entry: define %struct.uint32x4x2_t @test_vtrnq_u32(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: test_vtrnq_u32: -; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s -; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.4s, v0.4s, v1.4s +; CHECK-NEXT: trn2 v1.4s, v0.4s, v1.4s +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> @@ -3089,8 +3842,11 @@ entry: define %struct.float32x4x2_t @test_vtrnq_f32(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: test_vtrnq_f32: -; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s -; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.4s, v0.4s, v1.4s +; CHECK-NEXT: trn2 v1.4s, v0.4s, v1.4s +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> %vtrn1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> @@ -3101,8 +3857,11 @@ entry: define %struct.poly8x16x2_t @test_vtrnq_p8(<16 x i8> %a, <16 x i8> %b) { ; CHECK-LABEL: test_vtrnq_p8: -; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b -; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.16b, v0.16b, v1.16b +; CHECK-NEXT: trn2 v1.16b, v0.16b, v1.16b +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> @@ -3113,8 +3872,11 @@ entry: define %struct.poly16x8x2_t @test_vtrnq_p16(<8 x i16> %a, <8 x i16> %b) { ; CHECK-LABEL: test_vtrnq_p16: -; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h -; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: trn1 v2.8h, v0.8h, v1.8h +; CHECK-NEXT: trn2 v1.8h, v0.8h, v1.8h +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: ret entry: %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> @@ -3125,6 +3887,12 @@ entry: define %struct.uint8x8x2_t @test_uzp(<16 x i8> %y) { ; CHECK-LABEL: test_uzp: +; CHECK: // %bb.0: +; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8 +; CHECK-NEXT: uzp1 v2.8b, v0.8b, v1.8b +; CHECK-NEXT: uzp2 v1.8b, v0.8b, v1.8b +; CHECK-NEXT: fmov d0, d2 +; CHECK-NEXT: ret %vuzp.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> %vuzp1.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32>