diff --git a/clang/include/clang/Basic/BuiltinsPPC.def b/clang/include/clang/Basic/BuiltinsPPC.def
index 1e52d351780c1..18a1186053481 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -151,6 +151,7 @@ TARGET_BUILTIN(__builtin_ppc_extract_exp, "Uid", "", "power9-vector")
 TARGET_BUILTIN(__builtin_ppc_extract_sig, "ULLid", "", "power9-vector")
 BUILTIN(__builtin_ppc_mtfsb0, "vUIi", "")
 BUILTIN(__builtin_ppc_mtfsb1, "vUIi", "")
+TARGET_BUILTIN(__builtin_ppc_mffsl, "d", "", "isa-v30-instructions")
 BUILTIN(__builtin_ppc_mtfsf, "vUIiUi", "")
 BUILTIN(__builtin_ppc_mtfsfi, "vUIiUIi", "")
 TARGET_BUILTIN(__builtin_ppc_insert_exp, "ddULLi", "", "power9-vector")
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc.c b/clang/test/CodeGen/PowerPC/builtins-ppc.c
index adfbf27b4c8d4..ccc91b6560845 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc.c
@@ -35,6 +35,11 @@ void test_builtin_ppc_flm() {
 
   // CHECK: call double @llvm.ppc.setflm(double %1)
   res = __builtin_setflm(res);
+
+#ifdef _ARCH_PWR9
+  // P9: call double @llvm.ppc.mffsl()
+  res = __builtin_ppc_mffsl();
+#endif
 }
 
 double test_builtin_unpack_ldbl(long double x) {
diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index 58822059b9ac2..3ede2a3736bf3 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -33,6 +33,10 @@ let TargetPrefix = "ppc" in {  // All intrinsics start with "llvm.ppc.".
   def int_ppc_readflm : ClangBuiltin<"__builtin_readflm">,
                         DefaultAttrsIntrinsic<[llvm_double_ty], [],
                                               [IntrNoMerge, IntrHasSideEffects]>;
+  def int_ppc_mffsl : ClangBuiltin<"__builtin_ppc_mffsl">,
+                      DefaultAttrsIntrinsic<[llvm_double_ty], [],
+                                            [IntrNoMerge, IntrHasSideEffects]>;
+
   // Set FPSCR register, and return previous content
   def int_ppc_setflm : ClangBuiltin<"__builtin_setflm">,
                        DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty],
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index a71cd9efb8b5f..e1c513dc52dce 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -3180,6 +3180,7 @@ def : Pat<(PPCtc_return CTRRC:$dst, imm:$imm),
           (TCRETURNri CTRRC:$dst, imm:$imm)>;
 
 def : Pat<(int_ppc_readflm), (MFFS)>;
+def : Pat<(int_ppc_mffsl), (MFFSL)>;
 
 // Hi and Lo for Darwin Global Addresses.
 def : Pat<(PPChi tglobaladdr:$in, 0), (LIS tglobaladdr:$in)>;
diff --git a/llvm/test/CodeGen/PowerPC/read-set-flm.ll b/llvm/test/CodeGen/PowerPC/read-set-flm.ll
index 981dcb25ef96a..d9f3924745552 100644
--- a/llvm/test/CodeGen/PowerPC/read-set-flm.ll
+++ b/llvm/test/CodeGen/PowerPC/read-set-flm.ll
@@ -148,8 +148,19 @@ entry:
   ret void
 }
 
+define double @mffsl() {
+; CHECK-LABEL: mffsl:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    mffsl 1
+; CHECK-NEXT:    blr
+entry:
+  %x = call double @llvm.ppc.mffsl()
+  ret double %x
+}
+
 declare void @effect_func()
 declare void @readonly_func() #1
+declare double @llvm.ppc.mffsl()
 declare double @llvm.ppc.readflm()
 declare double @llvm.ppc.setflm(double)
 declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)