diff --git a/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp b/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
index 54aec79d24773..d71fff36e5613 100644
--- a/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
+++ b/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
@@ -970,13 +970,13 @@ bool EmulateInstructionARM::EmulatePUSH(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextPushRegisterOnStack;
-    RegisterInfo reg_info;
-    RegisterInfo sp_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_sp, sp_reg);
+    llvm::Optional<RegisterInfo> sp_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_sp);
     for (i = 0; i < 15; ++i) {
       if (BitIsSet(registers, i)) {
-        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + i, reg_info);
-        context.SetRegisterToRegisterPlusOffset(reg_info, sp_reg, addr - sp);
+        llvm::Optional<RegisterInfo> reg_info =
+            GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + i);
+        context.SetRegisterToRegisterPlusOffset(*reg_info, *sp_reg, addr - sp);
         uint32_t reg_value = ReadCoreReg(i, &success);
         if (!success)
           return false;
@@ -987,8 +987,9 @@ bool EmulateInstructionARM::EmulatePUSH(const uint32_t opcode,
     }
 
     if (BitIsSet(registers, 15)) {
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_pc, reg_info);
-      context.SetRegisterToRegisterPlusOffset(reg_info, sp_reg, addr - sp);
+      llvm::Optional<RegisterInfo> reg_info =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_pc);
+      context.SetRegisterToRegisterPlusOffset(*reg_info, *sp_reg, addr - sp);
       const uint32_t pc = ReadCoreReg(PC_REG, &success);
       if (!success)
         return false;
@@ -1098,8 +1099,8 @@ bool EmulateInstructionARM::EmulatePOP(const uint32_t opcode,
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextPopRegisterOffStack;
 
-    RegisterInfo sp_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_sp, sp_reg);
+    llvm::Optional<RegisterInfo> sp_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_sp);
 
     for (i = 0; i < 15; ++i) {
       if (BitIsSet(registers, i)) {
@@ -1115,7 +1116,7 @@ bool EmulateInstructionARM::EmulatePOP(const uint32_t opcode,
     }
 
     if (BitIsSet(registers, 15)) {
-      context.SetRegisterPlusOffset(sp_reg, addr - sp);
+      context.SetRegisterPlusOffset(*sp_reg, addr - sp);
       data = MemARead(context, addr, 4, 0, &success);
       if (!success)
         return false;
@@ -1185,9 +1186,9 @@ bool EmulateInstructionARM::EmulateADDRdSPImm(const uint32_t opcode,
       context.type = eContextSetFramePointer;
     else
       context.type = EmulateInstruction::eContextRegisterPlusOffset;
-    RegisterInfo sp_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_sp, sp_reg);
-    context.SetRegisterPlusOffset(sp_reg, sp_offset);
+    llvm::Optional<RegisterInfo> sp_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_sp);
+    context.SetRegisterPlusOffset(*sp_reg, sp_offset);
 
     if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + Rd,
                                addr))
@@ -1241,9 +1242,9 @@ bool EmulateInstructionARM::EmulateMOVRdSP(const uint32_t opcode,
       context.type = EmulateInstruction::eContextSetFramePointer;
     else
       context.type = EmulateInstruction::eContextRegisterPlusOffset;
-    RegisterInfo sp_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_sp, sp_reg);
-    context.SetRegisterPlusOffset(sp_reg, 0);
+    llvm::Optional<RegisterInfo> sp_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_sp);
+    context.SetRegisterPlusOffset(*sp_reg, 0);
 
     if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + Rd, sp))
       return false;
@@ -1338,9 +1339,9 @@ bool EmulateInstructionARM::EmulateMOVRdRm(const uint32_t opcode,
       context.type = EmulateInstruction::eContextSetFramePointer;
     else
       context.type = EmulateInstruction::eContextRegisterPlusOffset;
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm, dwarf_reg);
-    context.SetRegisterPlusOffset(dwarf_reg, 0);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm);
+    context.SetRegisterPlusOffset(*dwarf_reg, 0);
 
     if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags))
       return false;
@@ -1557,14 +1558,14 @@ bool EmulateInstructionARM::EmulateMUL(const uint32_t opcode,
     uint64_t result = operand1 * operand2;
 
     // R[d] = result<31:0>;
-    RegisterInfo op1_reg;
-    RegisterInfo op2_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, op1_reg);
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, op2_reg);
+    llvm::Optional<RegisterInfo> op1_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> op2_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
 
     EmulateInstruction::Context context;
     context.type = eContextArithmetic;
-    context.SetRegisterRegisterOperands(op1_reg, op2_reg);
+    context.SetRegisterRegisterOperands(*op1_reg, *op2_reg);
 
     if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + d,
                                (0x0000ffff & result)))
@@ -1765,9 +1766,9 @@ bool EmulateInstructionARM::EmulateLDRRtPCRelative(const uint32_t opcode,
     // PC relative immediate load context
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextRegisterPlusOffset;
-    RegisterInfo pc_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_pc, pc_reg);
-    context.SetRegisterPlusOffset(pc_reg, 0);
+    llvm::Optional<RegisterInfo> pc_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_pc);
+    context.SetRegisterPlusOffset(*pc_reg, 0);
 
     uint32_t Rt;    // the destination register
     uint32_t imm32; // immediate offset from the PC
@@ -1798,7 +1799,7 @@ bool EmulateInstructionARM::EmulateLDRRtPCRelative(const uint32_t opcode,
     else
       address = base - imm32;
 
-    context.SetRegisterPlusOffset(pc_reg, address - base);
+    context.SetRegisterPlusOffset(*pc_reg, address - base);
     data = MemURead(context, address, 4, 0, &success);
     if (!success)
       return false;
@@ -1909,9 +1910,9 @@ bool EmulateInstructionARM::EmulateADDSPImm(const uint32_t opcode,
     else
       context.type = EmulateInstruction::eContextRegisterPlusOffset;
 
-    RegisterInfo sp_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_sp, sp_reg);
-    context.SetRegisterPlusOffset(sp_reg, res.result - sp);
+    llvm::Optional<RegisterInfo> sp_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_sp);
+    context.SetRegisterPlusOffset(*sp_reg, res.result - sp);
 
     if (d == 15) {
       if (!ALUWritePC(context, res.result))
@@ -1976,12 +1977,11 @@ bool EmulateInstructionARM::EmulateADDSPRm(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = eContextArithmetic;
-    RegisterInfo sp_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_sp, sp_reg);
-
-    RegisterInfo other_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm, other_reg);
-    context.SetRegisterRegisterOperands(sp_reg, other_reg);
+    llvm::Optional<RegisterInfo> sp_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_sp);
+    llvm::Optional<RegisterInfo> other_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm);
+    context.SetRegisterRegisterOperands(*sp_reg, *other_reg);
 
     if (!WriteRegisterUnsigned(context, eRegisterKindGeneric,
                                LLDB_REGNUM_GENERIC_SP, addr))
@@ -2149,9 +2149,9 @@ bool EmulateInstructionARM::EmulateBLXRm(const uint32_t opcode,
     addr_t target = ReadCoreReg(Rm, &success);
     if (!success)
       return false;
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm, dwarf_reg);
-    context.SetRegister(dwarf_reg);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm);
+    context.SetRegister(*dwarf_reg);
     if (!WriteRegisterUnsigned(context, eRegisterKindGeneric,
                                LLDB_REGNUM_GENERIC_RA, lr))
       return false;
@@ -2195,9 +2195,9 @@ bool EmulateInstructionARM::EmulateBXRm(const uint32_t opcode,
     if (!success)
       return false;
 
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm, dwarf_reg);
-    context.SetRegister(dwarf_reg);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm);
+    context.SetRegister(*dwarf_reg);
     if (!BXWritePC(context, target))
       return false;
   }
@@ -2253,9 +2253,9 @@ bool EmulateInstructionARM::EmulateBXJRm(const uint32_t opcode,
     if (!success)
       return false;
 
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm, dwarf_reg);
-    context.SetRegister(dwarf_reg);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm);
+    context.SetRegister(*dwarf_reg);
     if (!BXWritePC(context, target))
       return false;
   }
@@ -2302,9 +2302,9 @@ bool EmulateInstructionARM::EmulateSUBR7IPImm(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextRegisterPlusOffset;
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r12, dwarf_reg);
-    context.SetRegisterPlusOffset(dwarf_reg, -ip_offset);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r12);
+    context.SetRegisterPlusOffset(*dwarf_reg, -ip_offset);
 
     if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r7, addr))
       return false;
@@ -2352,9 +2352,9 @@ bool EmulateInstructionARM::EmulateSUBIPSPImm(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextRegisterPlusOffset;
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP, dwarf_reg);
-    context.SetRegisterPlusOffset(dwarf_reg, -sp_offset);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP);
+    context.SetRegisterPlusOffset(*dwarf_reg, -sp_offset);
 
     if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r12, addr))
       return false;
@@ -2514,12 +2514,12 @@ bool EmulateInstructionARM::EmulateSTRRtSP(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextPushRegisterOnStack;
-    RegisterInfo sp_reg;
-    RegisterInfo dwarf_reg;
+    llvm::Optional<RegisterInfo> sp_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_sp);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rt);
 
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_sp, sp_reg);
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rt, dwarf_reg);
-    context.SetRegisterToRegisterPlusOffset(dwarf_reg, sp_reg, addr - sp);
+    context.SetRegisterToRegisterPlusOffset(*dwarf_reg, *sp_reg, addr - sp);
     if (Rt != 15) {
       uint32_t reg_value = ReadCoreReg(Rt, &success);
       if (!success)
@@ -2613,14 +2613,14 @@ bool EmulateInstructionARM::EmulateVPUSH(const uint32_t opcode,
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextPushRegisterOnStack;
 
-    RegisterInfo dwarf_reg;
-    RegisterInfo sp_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_sp, sp_reg);
+    llvm::Optional<RegisterInfo> sp_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_sp);
     for (i = 0; i < regs; ++i) {
-      GetRegisterInfo(eRegisterKindDWARF, start_reg + d + i, dwarf_reg);
-      context.SetRegisterToRegisterPlusOffset(dwarf_reg, sp_reg, addr - sp);
+      llvm::Optional<RegisterInfo> dwarf_reg =
+          GetRegisterInfo(eRegisterKindDWARF, start_reg + d + i);
+      context.SetRegisterToRegisterPlusOffset(*dwarf_reg, *sp_reg, addr - sp);
       // uint64_t to accommodate 64-bit registers.
-      uint64_t reg_value = ReadRegisterUnsigned(&dwarf_reg, 0, &success);
+      uint64_t reg_value = ReadRegisterUnsigned(&(*dwarf_reg), 0, &success);
       if (!success)
         return false;
       if (!MemAWrite(context, addr, reg_value, reg_byte_size))
@@ -2706,16 +2706,14 @@ bool EmulateInstructionARM::EmulateVPOP(const uint32_t opcode,
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextPopRegisterOffStack;
 
-    RegisterInfo dwarf_reg;
-    RegisterInfo sp_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_sp, sp_reg);
     for (i = 0; i < regs; ++i) {
-      GetRegisterInfo(eRegisterKindDWARF, start_reg + d + i, dwarf_reg);
+      llvm::Optional<RegisterInfo> dwarf_reg =
+          GetRegisterInfo(eRegisterKindDWARF, start_reg + d + i);
       context.SetAddress(addr);
       data = MemARead(context, addr, reg_byte_size, 0, &success);
       if (!success)
         return false;
-      if (!WriteRegisterUnsigned(context, &dwarf_reg, data))
+      if (!WriteRegisterUnsigned(context, &(*dwarf_reg), data))
         return false;
       addr += reg_byte_size;
     }
@@ -3107,12 +3105,11 @@ bool EmulateInstructionARM::EmulateADDImmThumb(const uint32_t opcode,
     //(result, carry, overflow) = AddWithCarry(R[n], imm32, '0');
     AddWithCarryResult res = AddWithCarry(Rn, imm32, 0);
 
-    RegisterInfo reg_n;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, reg_n);
-
+    llvm::Optional<RegisterInfo> reg_n =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
     EmulateInstruction::Context context;
     context.type = eContextArithmetic;
-    context.SetRegisterPlusOffset(reg_n, imm32);
+    context.SetRegisterPlusOffset(*reg_n, imm32);
 
     // R[d] = result;
     // if setflags then
@@ -3181,9 +3178,9 @@ bool EmulateInstructionARM::EmulateADDImmARM(const uint32_t opcode,
     else
       context.type = EmulateInstruction::eContextRegisterPlusOffset;
 
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindDWARF, Rn, dwarf_reg);
-    context.SetRegisterPlusOffset(dwarf_reg, imm32);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, Rn);
+    context.SetRegisterPlusOffset(*dwarf_reg, imm32);
 
     if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
                                    res.carry_out, res.overflow))
@@ -3269,11 +3266,11 @@ bool EmulateInstructionARM::EmulateADDReg(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = eContextArithmetic;
-    RegisterInfo op1_reg;
-    RegisterInfo op2_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn, op1_reg);
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm, op2_reg);
-    context.SetRegisterRegisterOperands(op1_reg, op2_reg);
+    llvm::Optional<RegisterInfo> op1_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn);
+    llvm::Optional<RegisterInfo> op2_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rm);
+    context.SetRegisterRegisterOperands(*op1_reg, *op2_reg);
 
     if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
                                    res.carry_out, res.overflow))
@@ -3980,14 +3977,14 @@ bool EmulateInstructionARM::EmulateLDM(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextRegisterPlusOffset;
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, dwarf_reg);
-    context.SetRegisterPlusOffset(dwarf_reg, offset);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    context.SetRegisterPlusOffset(*dwarf_reg, offset);
 
     for (int i = 0; i < 14; ++i) {
       if (BitIsSet(registers, i)) {
         context.type = EmulateInstruction::eContextRegisterPlusOffset;
-        context.SetRegisterPlusOffset(dwarf_reg, offset);
+        context.SetRegisterPlusOffset(*dwarf_reg, offset);
         if (wback && (n == 13)) // Pop Instruction
         {
           context.type = EmulateInstruction::eContextPopRegisterOffStack;
@@ -4011,7 +4008,7 @@ bool EmulateInstructionARM::EmulateLDM(const uint32_t opcode,
     if (BitIsSet(registers, 15)) {
       // LoadWritePC (MemA [address, 4]);
       context.type = EmulateInstruction::eContextRegisterPlusOffset;
-      context.SetRegisterPlusOffset(dwarf_reg, offset);
+      context.SetRegisterPlusOffset(*dwarf_reg, offset);
       uint32_t data =
           MemARead(context, base_address + offset, addr_byte_size, 0, &success);
       if (!success)
@@ -4025,7 +4022,7 @@ bool EmulateInstructionARM::EmulateLDM(const uint32_t opcode,
       // R[n] = R[n] + 4 * BitCount (registers)
       int32_t offset = addr_byte_size * BitCount(registers);
       context.type = EmulateInstruction::eContextAdjustBaseRegister;
-      context.SetRegisterPlusOffset(dwarf_reg, offset);
+      context.SetRegisterPlusOffset(*dwarf_reg, offset);
 
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + n,
                                  base_address + offset))
@@ -4100,16 +4097,16 @@ bool EmulateInstructionARM::EmulateLDMDA(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextRegisterPlusOffset;
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, dwarf_reg);
-    context.SetRegisterPlusOffset(dwarf_reg, offset);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    context.SetRegisterPlusOffset(*dwarf_reg, offset);
 
     // for i = 0 to 14
     for (int i = 0; i < 14; ++i) {
       // if registers<i> == '1' then
       if (BitIsSet(registers, i)) {
         // R[i] = MemA[address,4]; address = address + 4;
-        context.SetRegisterPlusOffset(dwarf_reg, Rn - (address + offset));
+        context.SetRegisterPlusOffset(*dwarf_reg, Rn - (address + offset));
         uint32_t data =
             MemARead(context, address + offset, addr_byte_size, 0, &success);
         if (!success)
@@ -4124,7 +4121,7 @@ bool EmulateInstructionARM::EmulateLDMDA(const uint32_t opcode,
     // if registers<15> == '1' then
     //     LoadWritePC(MemA[address,4]);
     if (BitIsSet(registers, 15)) {
-      context.SetRegisterPlusOffset(dwarf_reg, offset);
+      context.SetRegisterPlusOffset(*dwarf_reg, offset);
       uint32_t data =
           MemARead(context, address + offset, addr_byte_size, 0, &success);
       if (!success)
@@ -4236,14 +4233,14 @@ bool EmulateInstructionARM::EmulateLDMDB(const uint32_t opcode,
     addr_t address = Rn - (addr_byte_size * BitCount(registers));
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextRegisterPlusOffset;
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, dwarf_reg);
-    context.SetRegisterPlusOffset(dwarf_reg, Rn - address);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    context.SetRegisterPlusOffset(*dwarf_reg, Rn - address);
 
     for (int i = 0; i < 14; ++i) {
       if (BitIsSet(registers, i)) {
         // R[i] = MemA[address,4]; address = address + 4;
-        context.SetRegisterPlusOffset(dwarf_reg, Rn - (address + offset));
+        context.SetRegisterPlusOffset(*dwarf_reg, Rn - (address + offset));
         uint32_t data =
             MemARead(context, address + offset, addr_byte_size, 0, &success);
         if (!success)
@@ -4260,7 +4257,7 @@ bool EmulateInstructionARM::EmulateLDMDB(const uint32_t opcode,
     // if registers<15> == '1' then
     //     LoadWritePC(MemA[address,4]);
     if (BitIsSet(registers, 15)) {
-      context.SetRegisterPlusOffset(dwarf_reg, offset);
+      context.SetRegisterPlusOffset(*dwarf_reg, offset);
       uint32_t data =
           MemARead(context, address + offset, addr_byte_size, 0, &success);
       if (!success)
@@ -4347,15 +4344,15 @@ bool EmulateInstructionARM::EmulateLDMIB(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextRegisterPlusOffset;
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, dwarf_reg);
-    context.SetRegisterPlusOffset(dwarf_reg, offset);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    context.SetRegisterPlusOffset(*dwarf_reg, offset);
 
     for (int i = 0; i < 14; ++i) {
       if (BitIsSet(registers, i)) {
         // R[i] = MemA[address,4]; address = address + 4;
 
-        context.SetRegisterPlusOffset(dwarf_reg, offset + addr_byte_size);
+        context.SetRegisterPlusOffset(*dwarf_reg, offset + addr_byte_size);
         uint32_t data =
             MemARead(context, address + offset, addr_byte_size, 0, &success);
         if (!success)
@@ -4372,7 +4369,7 @@ bool EmulateInstructionARM::EmulateLDMIB(const uint32_t opcode,
     // if registers<15> == '1' then
     //     LoadWritePC(MemA[address,4]);
     if (BitIsSet(registers, 15)) {
-      context.SetRegisterPlusOffset(dwarf_reg, offset);
+      context.SetRegisterPlusOffset(*dwarf_reg, offset);
       uint32_t data =
           MemARead(context, address + offset, addr_byte_size, 0, &success);
       if (!success)
@@ -4517,8 +4514,8 @@ bool EmulateInstructionARM::EmulateLDRRtRnImm(const uint32_t opcode,
 
     address = (index ? offset_addr : base);
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn);
     if (wback) {
       EmulateInstruction::Context ctx;
       if (Rn == 13) {
@@ -4526,10 +4523,10 @@ bool EmulateInstructionARM::EmulateLDRRtRnImm(const uint32_t opcode,
         ctx.SetImmediateSigned((int32_t)(offset_addr - base));
       } else if (Rn == GetFramePointerRegisterNumber()) {
         ctx.type = eContextSetFramePointer;
-        ctx.SetRegisterPlusOffset(base_reg, (int32_t)(offset_addr - base));
+        ctx.SetRegisterPlusOffset(*base_reg, (int32_t)(offset_addr - base));
       } else {
         ctx.type = EmulateInstruction::eContextAdjustBaseRegister;
-        ctx.SetRegisterPlusOffset(base_reg, (int32_t)(offset_addr - base));
+        ctx.SetRegisterPlusOffset(*base_reg, (int32_t)(offset_addr - base));
       }
 
       if (!WriteRegisterUnsigned(ctx, eRegisterKindDWARF, dwarf_r0 + Rn,
@@ -4540,7 +4537,7 @@ bool EmulateInstructionARM::EmulateLDRRtRnImm(const uint32_t opcode,
     // Prepare to write to the Rt register.
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextRegisterLoad;
-    context.SetRegisterPlusOffset(base_reg, (int32_t)(offset_addr - base));
+    context.SetRegisterPlusOffset(*base_reg, (int32_t)(offset_addr - base));
 
     // Read memory from the address.
     data = MemURead(context, address, 4, 0, &success);
@@ -4653,8 +4650,8 @@ bool EmulateInstructionARM::EmulateSTM(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextRegisterStore;
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     // for i = 0 to 14
     uint32_t lowest_set_bit = 14;
@@ -4675,9 +4672,9 @@ bool EmulateInstructionARM::EmulateSTM(const uint32_t opcode,
           if (!success)
             return false;
 
-          RegisterInfo data_reg;
-          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + i, data_reg);
-          context.SetRegisterToRegisterPlusOffset(data_reg, base_reg, offset);
+          llvm::Optional<RegisterInfo> data_reg =
+              GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + i);
+          context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg, offset);
           if (!MemAWrite(context, address + offset, data, addr_byte_size))
             return false;
         }
@@ -4690,9 +4687,9 @@ bool EmulateInstructionARM::EmulateSTM(const uint32_t opcode,
     // if registers<15> == '1' then // Only possible for encoding A1
     //     MemA[address,4] = PCStoreValue();
     if (BitIsSet(registers, 15)) {
-      RegisterInfo pc_reg;
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_pc, pc_reg);
-      context.SetRegisterPlusOffset(pc_reg, 8);
+      llvm::Optional<RegisterInfo> pc_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_pc);
+      context.SetRegisterPlusOffset(*pc_reg, 8);
       const uint32_t pc = ReadCoreReg(PC_REG, &success);
       if (!success)
         return false;
@@ -4775,8 +4772,8 @@ bool EmulateInstructionARM::EmulateSTMDA(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextRegisterStore;
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     // for i = 0 to 14
     uint32_t lowest_bit_set = 14;
@@ -4796,9 +4793,9 @@ bool EmulateInstructionARM::EmulateSTMDA(const uint32_t opcode,
           if (!success)
             return false;
 
-          RegisterInfo data_reg;
-          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + i, data_reg);
-          context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+          llvm::Optional<RegisterInfo> data_reg =
+              GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + i);
+          context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                                   Rn - (address + offset));
           if (!MemAWrite(context, address + offset, data, addr_byte_size))
             return false;
@@ -4812,9 +4809,9 @@ bool EmulateInstructionARM::EmulateSTMDA(const uint32_t opcode,
     // if registers<15> == '1' then
     //    MemA[address,4] = PCStoreValue();
     if (BitIsSet(registers, 15)) {
-      RegisterInfo pc_reg;
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_pc, pc_reg);
-      context.SetRegisterPlusOffset(pc_reg, 8);
+      llvm::Optional<RegisterInfo> pc_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_pc);
+      context.SetRegisterPlusOffset(*pc_reg, 8);
       const uint32_t pc = ReadCoreReg(PC_REG, &success);
       if (!success)
         return false;
@@ -4923,8 +4920,8 @@ bool EmulateInstructionARM::EmulateSTMDB(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextRegisterStore;
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     // for i = 0 to 14
     uint32_t lowest_set_bit = 14;
@@ -4945,9 +4942,9 @@ bool EmulateInstructionARM::EmulateSTMDB(const uint32_t opcode,
           if (!success)
             return false;
 
-          RegisterInfo data_reg;
-          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + i, data_reg);
-          context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+          llvm::Optional<RegisterInfo> data_reg =
+              GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + i);
+          context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                                   Rn - (address + offset));
           if (!MemAWrite(context, address + offset, data, addr_byte_size))
             return false;
@@ -4961,9 +4958,9 @@ bool EmulateInstructionARM::EmulateSTMDB(const uint32_t opcode,
     // if registers<15> == '1' then // Only possible for encoding A1
     //     MemA[address,4] = PCStoreValue();
     if (BitIsSet(registers, 15)) {
-      RegisterInfo pc_reg;
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_pc, pc_reg);
-      context.SetRegisterPlusOffset(pc_reg, 8);
+      llvm::Optional<RegisterInfo> pc_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_pc);
+      context.SetRegisterPlusOffset(*pc_reg, 8);
       const uint32_t pc = ReadCoreReg(PC_REG, &success);
       if (!success)
         return false;
@@ -5046,8 +5043,8 @@ bool EmulateInstructionARM::EmulateSTMIB(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = EmulateInstruction::eContextRegisterStore;
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     uint32_t lowest_set_bit = 14;
     // for i = 0 to 14
@@ -5068,9 +5065,9 @@ bool EmulateInstructionARM::EmulateSTMIB(const uint32_t opcode,
           if (!success)
             return false;
 
-          RegisterInfo data_reg;
-          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + i, data_reg);
-          context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+          llvm::Optional<RegisterInfo> data_reg =
+              GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + i);
+          context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                                   offset + addr_byte_size);
           if (!MemAWrite(context, address + offset, data, addr_byte_size))
             return false;
@@ -5084,9 +5081,9 @@ bool EmulateInstructionARM::EmulateSTMIB(const uint32_t opcode,
     // if registers<15> == '1' then
     // MemA[address,4] = PCStoreValue();
     if (BitIsSet(registers, 15)) {
-      RegisterInfo pc_reg;
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_pc, pc_reg);
-      context.SetRegisterPlusOffset(pc_reg, 8);
+      llvm::Optional<RegisterInfo> pc_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_pc);
+      context.SetRegisterPlusOffset(*pc_reg, 8);
       const uint32_t pc = ReadCoreReg(PC_REG, &success);
       if (!success)
         return false;
@@ -5237,8 +5234,8 @@ bool EmulateInstructionARM::EmulateSTRThumb(const uint32_t opcode,
     else
       context.type = eContextRegisterStore;
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     // if UnalignedSupport() || address<1:0> == '00' then
     if (UnalignedSupport() ||
@@ -5249,10 +5246,10 @@ bool EmulateInstructionARM::EmulateSTRThumb(const uint32_t opcode,
       if (!success)
         return false;
 
-      RegisterInfo data_reg;
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t, data_reg);
+      llvm::Optional<RegisterInfo> data_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t);
       int32_t offset = address - base_address;
-      context.SetRegisterToRegisterPlusOffset(data_reg, base_reg, offset);
+      context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg, offset);
       if (!MemUWrite(context, address, data, addr_byte_size))
         return false;
     } else {
@@ -5443,13 +5440,12 @@ bool EmulateInstructionARM::EmulateSTRRegister(const uint32_t opcode,
         CurrentInstrSet() == eModeARM) {
       // MemU[address,4] = data;
 
-      RegisterInfo base_reg;
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+      llvm::Optional<RegisterInfo> base_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+      llvm::Optional<RegisterInfo> data_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t);
 
-      RegisterInfo data_reg;
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t, data_reg);
-
-      context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+      context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                               address - base_address);
       if (!MemUWrite(context, address, data, addr_byte_size))
         return false;
@@ -5569,15 +5565,14 @@ bool EmulateInstructionARM::EmulateSTRBThumb(const uint32_t opcode,
       address = base_address;
 
     // MemU[address,1] = R[t]<7:0>
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-
-    RegisterInfo data_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t, data_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> data_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterStore;
-    context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+    context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                             address - base_address);
 
     uint32_t data =
@@ -5739,10 +5734,6 @@ bool EmulateInstructionARM::EmulateSTRHRegister(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterStore;
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-    RegisterInfo offset_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, offset_reg);
 
     // if UnalignedSupport() || address<0> == '0' then
     if (UnalignedSupport() || BitIsClear(address, 0)) {
@@ -5753,14 +5744,14 @@ bool EmulateInstructionARM::EmulateSTRHRegister(const uint32_t opcode,
 
       EmulateInstruction::Context context;
       context.type = eContextRegisterStore;
-      RegisterInfo base_reg;
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-      RegisterInfo offset_reg;
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, offset_reg);
-      RegisterInfo data_reg;
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t, data_reg);
-      context.SetRegisterToRegisterPlusIndirectOffset(base_reg, offset_reg,
-                                                      data_reg);
+      llvm::Optional<RegisterInfo> base_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+      llvm::Optional<RegisterInfo> offset_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
+      llvm::Optional<RegisterInfo> data_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t);
+      context.SetRegisterToRegisterPlusIndirectOffset(*base_reg, *offset_reg,
+                                                      *data_reg);
 
       if (!MemUWrite(context, address, Bits32(Rt, 15, 0), 2))
         return false;
@@ -6407,12 +6398,11 @@ bool EmulateInstructionARM::EmulateLDRImmediateARM(const uint32_t opcode,
 
     // data = MemU[address,4];
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusOffset(base_reg, address - base_address);
+    context.SetRegisterPlusOffset(*base_reg, address - base_address);
 
     uint64_t data = MemURead(context, address, addr_byte_size, 0, &success);
     if (!success)
@@ -6433,7 +6423,7 @@ bool EmulateInstructionARM::EmulateLDRImmediateARM(const uint32_t opcode,
       if (BitIsClear(address, 1) && BitIsClear(address, 0)) {
         // LoadWritePC (data);
         context.type = eContextRegisterLoad;
-        context.SetRegisterPlusOffset(base_reg, address - base_address);
+        context.SetRegisterPlusOffset(*base_reg, address - base_address);
         LoadWritePC(context, data);
       } else
         return false;
@@ -6443,7 +6433,7 @@ bool EmulateInstructionARM::EmulateLDRImmediateARM(const uint32_t opcode,
              (BitIsClear(address, 1) && BitIsClear(address, 0))) {
       // R[t] = data;
       context.type = eContextRegisterLoad;
-      context.SetRegisterPlusOffset(base_reg, address - base_address);
+      context.SetRegisterPlusOffset(*base_reg, address - base_address);
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + t,
                                  data))
         return false;
@@ -6613,12 +6603,11 @@ bool EmulateInstructionARM::EmulateLDRRegister(const uint32_t opcode,
       address = Rn;
 
     // data = MemU[address,4];
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusOffset(base_reg, address - Rn);
+    context.SetRegisterPlusOffset(*base_reg, address - Rn);
 
     uint64_t data = MemURead(context, address, addr_byte_size, 0, &success);
     if (!success)
@@ -6638,7 +6627,7 @@ bool EmulateInstructionARM::EmulateLDRRegister(const uint32_t opcode,
       // if address<1:0> == '00' then LoadWritePC(data); else UNPREDICTABLE;
       if (BitIsClear(address, 1) && BitIsClear(address, 0)) {
         context.type = eContextRegisterLoad;
-        context.SetRegisterPlusOffset(base_reg, address - Rn);
+        context.SetRegisterPlusOffset(*base_reg, address - Rn);
         LoadWritePC(context, data);
       } else
         return false;
@@ -6648,7 +6637,7 @@ bool EmulateInstructionARM::EmulateLDRRegister(const uint32_t opcode,
              (BitIsClear(address, 1) && BitIsClear(address, 0))) {
       // R[t] = data;
       context.type = eContextRegisterLoad;
-      context.SetRegisterPlusOffset(base_reg, address - Rn);
+      context.SetRegisterPlusOffset(*base_reg, address - Rn);
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + t,
                                  data))
         return false;
@@ -6791,14 +6780,14 @@ bool EmulateInstructionARM::EmulateLDRBImmediate(const uint32_t opcode,
       address = Rn;
 
     // R[t] = ZeroExtend(MemU[address,1], 32);
-    RegisterInfo base_reg;
-    RegisterInfo data_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t, data_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> data_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterToRegisterPlusOffset(data_reg, base_reg, address - Rn);
+    context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg, address - Rn);
 
     uint64_t data = MemURead(context, address, 1, 0, &success);
     if (!success)
@@ -7035,12 +7024,12 @@ bool EmulateInstructionARM::EmulateLDRBRegister(const uint32_t opcode,
       address = Rn;
 
     // R[t] = ZeroExtend(MemU[address,1],32);
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusOffset(base_reg, address - Rn);
+    context.SetRegisterPlusOffset(*base_reg, address - Rn);
 
     uint64_t data = MemURead(context, address, 1, 0, &success);
     if (!success)
@@ -7172,12 +7161,12 @@ bool EmulateInstructionARM::EmulateLDRHImmediate(const uint32_t opcode,
       address = Rn;
 
     // data = MemU[address,2];
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusOffset(base_reg, address - Rn);
+    context.SetRegisterPlusOffset(*base_reg, address - Rn);
 
     uint64_t data = MemURead(context, address, 2, 0, &success);
     if (!success)
@@ -7196,7 +7185,7 @@ bool EmulateInstructionARM::EmulateLDRHImmediate(const uint32_t opcode,
     if (UnalignedSupport() || BitIsClear(address, 0)) {
       // R[t] = ZeroExtend(data, 32);
       context.type = eContextRegisterLoad;
-      context.SetRegisterPlusOffset(base_reg, address - Rn);
+      context.SetRegisterPlusOffset(*base_reg, address - Rn);
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + t,
                                  data))
         return false;
@@ -7282,12 +7271,12 @@ bool EmulateInstructionARM::EmulateLDRHLiteral(const uint32_t opcode,
       address = base - imm32;
 
     // data = MemU[address,2];
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusOffset(base_reg, address - base);
+    context.SetRegisterPlusOffset(*base_reg, address - base);
 
     uint64_t data = MemURead(context, address, 2, 0, &success);
     if (!success)
@@ -7297,7 +7286,7 @@ bool EmulateInstructionARM::EmulateLDRHLiteral(const uint32_t opcode,
     if (UnalignedSupport() || BitIsClear(address, 0)) {
       // R[t] = ZeroExtend(data, 32);
       context.type = eContextRegisterLoad;
-      context.SetRegisterPlusOffset(base_reg, address - base);
+      context.SetRegisterPlusOffset(*base_reg, address - base);
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + t,
                                  data))
         return false;
@@ -7450,14 +7439,14 @@ bool EmulateInstructionARM::EmulateLDRHRegister(const uint32_t opcode,
       address = Rn;
 
     // data = MemU[address,2];
-    RegisterInfo base_reg;
-    RegisterInfo offset_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, offset_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> offset_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusIndirectOffset(base_reg, offset_reg);
+    context.SetRegisterPlusIndirectOffset(*base_reg, *offset_reg);
     uint64_t data = MemURead(context, address, 2, 0, &success);
     if (!success)
       return false;
@@ -7475,7 +7464,7 @@ bool EmulateInstructionARM::EmulateLDRHRegister(const uint32_t opcode,
     if (UnalignedSupport() || BitIsClear(address, 0)) {
       // R[t] = ZeroExtend(data, 32);
       context.type = eContextRegisterLoad;
-      context.SetRegisterPlusIndirectOffset(base_reg, offset_reg);
+      context.SetRegisterPlusIndirectOffset(*base_reg, *offset_reg);
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + t,
                                  data))
         return false;
@@ -7609,12 +7598,12 @@ bool EmulateInstructionARM::EmulateLDRSBImmediate(const uint32_t opcode,
       address = Rn;
 
     // R[t] = SignExtend(MemU[address,1], 32);
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusOffset(base_reg, address - Rn);
+    context.SetRegisterPlusOffset(*base_reg, address - Rn);
 
     uint64_t unsigned_data = MemURead(context, address, 1, 0, &success);
     if (!success)
@@ -7706,12 +7695,12 @@ bool EmulateInstructionARM::EmulateLDRSBLiteral(const uint32_t opcode,
       address = base - imm32;
 
     // R[t] = SignExtend(MemU[address,1], 32);
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusOffset(base_reg, address - base);
+    context.SetRegisterPlusOffset(*base_reg, address - base);
 
     uint64_t unsigned_data = MemURead(context, address, 1, 0, &success);
     if (!success)
@@ -7855,14 +7844,14 @@ bool EmulateInstructionARM::EmulateLDRSBRegister(const uint32_t opcode,
       address = Rn;
 
     // R[t] = SignExtend(MemU[address,1], 32);
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-    RegisterInfo offset_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, offset_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> offset_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusIndirectOffset(base_reg, offset_reg);
+    context.SetRegisterPlusIndirectOffset(*base_reg, *offset_reg);
 
     uint64_t unsigned_data = MemURead(context, address, 1, 0, &success);
     if (!success)
@@ -8007,12 +7996,12 @@ bool EmulateInstructionARM::EmulateLDRSHImmediate(const uint32_t opcode,
       address = Rn;
 
     // data = MemU[address,2];
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusOffset(base_reg, address - Rn);
+    context.SetRegisterPlusOffset(*base_reg, address - Rn);
 
     uint64_t data = MemURead(context, address, 2, 0, &success);
     if (!success)
@@ -8032,7 +8021,7 @@ bool EmulateInstructionARM::EmulateLDRSHImmediate(const uint32_t opcode,
       // R[t] = SignExtend(data, 32);
       int64_t signed_data = llvm::SignExtend64<16>(data);
       context.type = eContextRegisterLoad;
-      context.SetRegisterPlusOffset(base_reg, address - Rn);
+      context.SetRegisterPlusOffset(*base_reg, address - Rn);
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + t,
                                  (uint64_t)signed_data))
         return false;
@@ -8117,12 +8106,12 @@ bool EmulateInstructionARM::EmulateLDRSHLiteral(const uint32_t opcode,
       address = base - imm32;
 
     // data = MemU[address,2];
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusOffset(base_reg, imm32);
+    context.SetRegisterPlusOffset(*base_reg, imm32);
 
     uint64_t data = MemURead(context, address, 2, 0, &success);
     if (!success)
@@ -8283,15 +8272,14 @@ bool EmulateInstructionARM::EmulateLDRSHRegister(const uint32_t opcode,
       address = Rn;
 
     // data = MemU[address,2];
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-
-    RegisterInfo offset_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, offset_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> offset_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusIndirectOffset(base_reg, offset_reg);
+    context.SetRegisterPlusIndirectOffset(*base_reg, *offset_reg);
 
     uint64_t data = MemURead(context, address, 2, 0, &success);
     if (!success)
@@ -8310,7 +8298,7 @@ bool EmulateInstructionARM::EmulateLDRSHRegister(const uint32_t opcode,
     if (UnalignedSupport() || BitIsClear(address, 0)) {
       // R[t] = SignExtend(data, 32);
       context.type = eContextRegisterLoad;
-      context.SetRegisterPlusIndirectOffset(base_reg, offset_reg);
+      context.SetRegisterPlusIndirectOffset(*base_reg, *offset_reg);
 
       int64_t signed_data = llvm::SignExtend64<16>(data);
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + t,
@@ -8396,12 +8384,12 @@ bool EmulateInstructionARM::EmulateSXTB(const uint32_t opcode,
     // R[d] = SignExtend(rotated<7:0>, 32);
     int64_t data = llvm::SignExtend64<8>(rotated);
 
-    RegisterInfo source_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, source_reg);
+    llvm::Optional<RegisterInfo> source_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegister(source_reg);
+    context.SetRegister(*source_reg);
 
     if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + d,
                                (uint64_t)data))
@@ -8479,12 +8467,12 @@ bool EmulateInstructionARM::EmulateSXTH(const uint32_t opcode,
       return false;
 
     // R[d] = SignExtend(rotated<15:0>, 32);
-    RegisterInfo source_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, source_reg);
+    llvm::Optional<RegisterInfo> source_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegister(source_reg);
+    context.SetRegister(*source_reg);
 
     int64_t data = llvm::SignExtend64<16>(rotated);
     if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + d,
@@ -8564,12 +8552,12 @@ bool EmulateInstructionARM::EmulateUXTB(const uint32_t opcode,
       return false;
 
     // R[d] = ZeroExtend(rotated<7:0>, 32);
-    RegisterInfo source_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, source_reg);
+    llvm::Optional<RegisterInfo> source_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegister(source_reg);
+    context.SetRegister(*source_reg);
 
     if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + d,
                                Bits32(rotated, 7, 0)))
@@ -8646,12 +8634,12 @@ bool EmulateInstructionARM::EmulateUXTH(const uint32_t opcode,
       return false;
 
     // R[d] = ZeroExtend(rotated<15:0>, 32);
-    RegisterInfo source_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, source_reg);
+    llvm::Optional<RegisterInfo> source_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegister(source_reg);
+    context.SetRegister(*source_reg);
 
     if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + d,
                                Bits32(rotated, 15, 0)))
@@ -8765,12 +8753,12 @@ bool EmulateInstructionARM::EmulateRFE(const uint32_t opcode,
         address = address + 4;
 
       // CPSRWriteByInstr(MemA[address+4,4], '1111', TRUE);
-      RegisterInfo base_reg;
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+      llvm::Optional<RegisterInfo> base_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
       EmulateInstruction::Context context;
       context.type = eContextReturnFromException;
-      context.SetRegisterPlusOffset(base_reg, address - Rn);
+      context.SetRegisterPlusOffset(*base_reg, address - Rn);
 
       uint64_t data = MemARead(context, address + 4, 4, 0, &success);
       if (!success)
@@ -9727,10 +9715,10 @@ bool EmulateInstructionARM::EmulateSUBImmARM(const uint32_t opcode,
     else
       context.type = EmulateInstruction::eContextRegisterPlusOffset;
 
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindDWARF, Rn, dwarf_reg);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, Rn);
     int64_t imm32_signed = imm32;
-    context.SetRegisterPlusOffset(dwarf_reg, -imm32_signed);
+    context.SetRegisterPlusOffset(*dwarf_reg, -imm32_signed);
 
     if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
                                    res.carry_out, res.overflow))
@@ -10080,11 +10068,11 @@ bool EmulateInstructionARM::EmulateSUBSPReg(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = eContextArithmetic;
-    RegisterInfo sp_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_sp, sp_reg);
-    RegisterInfo dwarf_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, dwarf_reg);
-    context.SetRegisterRegisterOperands(sp_reg, dwarf_reg);
+    llvm::Optional<RegisterInfo> sp_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_sp);
+    llvm::Optional<RegisterInfo> dwarf_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
+    context.SetRegisterRegisterOperands(*sp_reg, *dwarf_reg);
 
     if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags,
                                    res.carry_out, res.overflow))
@@ -10167,12 +10155,12 @@ bool EmulateInstructionARM::EmulateADDRegShift(const uint32_t opcode,
     // R[d] = result;
     EmulateInstruction::Context context;
     context.type = eContextArithmetic;
-    RegisterInfo reg_n;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, reg_n);
-    RegisterInfo reg_m;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, reg_m);
+    llvm::Optional<RegisterInfo> reg_n =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> reg_m =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
 
-    context.SetRegisterRegisterOperands(reg_n, reg_m);
+    context.SetRegisterRegisterOperands(*reg_n, *reg_m);
 
     if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + d,
                                res.result))
@@ -10307,11 +10295,11 @@ bool EmulateInstructionARM::EmulateSUBReg(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = eContextArithmetic;
-    RegisterInfo reg_n;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, reg_n);
-    RegisterInfo reg_m;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, reg_m);
-    context.SetRegisterRegisterOperands(reg_n, reg_m);
+    llvm::Optional<RegisterInfo> reg_n =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> reg_m =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
+    context.SetRegisterRegisterOperands(*reg_n, *reg_m);
 
     if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags,
                                    res.carry_out, res.overflow))
@@ -10395,13 +10383,13 @@ bool EmulateInstructionARM::EmulateSTREX(const uint32_t opcode,
 
     addr_t address = Rn + imm32;
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-    RegisterInfo data_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t, data_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> data_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t);
     EmulateInstruction::Context context;
     context.type = eContextRegisterStore;
-    context.SetRegisterToRegisterPlusOffset(data_reg, base_reg, imm32);
+    context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg, imm32);
 
     // if ExclusiveMonitorsPass(address,4) then if (ExclusiveMonitorsPass
     // (address, addr_byte_size)) -- For now, for the sake of emulation, we
@@ -10506,13 +10494,13 @@ bool EmulateInstructionARM::EmulateSTRBImmARM(const uint32_t opcode,
     if (!success)
       return false;
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-    RegisterInfo data_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t, data_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> data_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t);
     EmulateInstruction::Context context;
     context.type = eContextRegisterStore;
-    context.SetRegisterToRegisterPlusOffset(data_reg, base_reg, address - Rn);
+    context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg, address - Rn);
 
     if (!MemUWrite(context, address, Bits32(Rt, 7, 0), 1))
       return false;
@@ -10594,13 +10582,13 @@ bool EmulateInstructionARM::EmulateSTRImmARM(const uint32_t opcode,
     else
       address = Rn;
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-    RegisterInfo data_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t, data_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> data_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t);
     EmulateInstruction::Context context;
     context.type = eContextRegisterStore;
-    context.SetRegisterToRegisterPlusOffset(data_reg, base_reg, address - Rn);
+    context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg, address - Rn);
 
     // MemU[address,4] = if t == 15 then PCStoreValue() else R[t];
     uint32_t Rt = ReadCoreReg(t, &success);
@@ -10740,8 +10728,6 @@ bool EmulateInstructionARM::EmulateLDRDImmediate(const uint32_t opcode,
       address = Rn;
 
     // R[t] = MemA[address,4];
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
 
     EmulateInstruction::Context context;
     if (n == 13)
@@ -10848,14 +10834,10 @@ bool EmulateInstructionARM::EmulateLDRDRegister(const uint32_t opcode,
     uint32_t Rn = ReadCoreReg(n, &success);
     if (!success)
       return false;
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
 
     uint32_t Rm = ReadCoreReg(m, &success);
     if (!success)
       return false;
-    RegisterInfo offset_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, offset_reg);
 
     // offset_addr = if add then (R[n] + R[m]) else (R[n] - R[m]);
     addr_t offset_addr;
@@ -10997,8 +10979,8 @@ bool EmulateInstructionARM::EmulateSTRDImm(const uint32_t opcode,
       return false;
     }
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     uint32_t Rn = ReadCoreReg(n, &success);
     if (!success)
@@ -11019,8 +11001,8 @@ bool EmulateInstructionARM::EmulateSTRDImm(const uint32_t opcode,
       address = Rn;
 
     // MemA[address,4] = R[t];
-    RegisterInfo data_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t, data_reg);
+    llvm::Optional<RegisterInfo> data_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t);
 
     uint32_t data = ReadCoreReg(t, &success);
     if (!success)
@@ -11031,7 +11013,7 @@ bool EmulateInstructionARM::EmulateSTRDImm(const uint32_t opcode,
       context.type = eContextPushRegisterOnStack;
     else
       context.type = eContextRegisterStore;
-    context.SetRegisterToRegisterPlusOffset(data_reg, base_reg, address - Rn);
+    context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg, address - Rn);
 
     const uint32_t addr_byte_size = GetAddressByteSize();
 
@@ -11039,8 +11021,8 @@ bool EmulateInstructionARM::EmulateSTRDImm(const uint32_t opcode,
       return false;
 
     // MemA[address+4,4] = R[t2];
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t2, data_reg);
-    context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+    data_reg = GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t2);
+    context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                             (address + 4) - Rn);
 
     data = ReadCoreReg(t2, &success);
@@ -11129,12 +11111,6 @@ bool EmulateInstructionARM::EmulateSTRDReg(const uint32_t opcode,
       return false;
     }
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-    RegisterInfo offset_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, offset_reg);
-    RegisterInfo data_reg;
-
     uint32_t Rn = ReadCoreReg(n, &success);
     if (!success)
       return false;
@@ -11167,9 +11143,14 @@ bool EmulateInstructionARM::EmulateSTRDReg(const uint32_t opcode,
     else
       context.type = eContextRegisterStore;
 
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t, data_reg);
-    context.SetRegisterToRegisterPlusIndirectOffset(base_reg, offset_reg,
-                                                    data_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> offset_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m);
+    llvm::Optional<RegisterInfo> data_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t);
+    context.SetRegisterToRegisterPlusIndirectOffset(*base_reg, *offset_reg,
+                                                    *data_reg);
 
     const uint32_t addr_byte_size = GetAddressByteSize();
 
@@ -11181,10 +11162,10 @@ bool EmulateInstructionARM::EmulateSTRDReg(const uint32_t opcode,
     if (!success)
       return false;
 
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t2, data_reg);
+    data_reg = GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + t2);
 
-    context.SetRegisterToRegisterPlusIndirectOffset(base_reg, offset_reg,
-                                                    data_reg);
+    context.SetRegisterToRegisterPlusIndirectOffset(*base_reg, *offset_reg,
+                                                    *data_reg);
 
     if (!MemAWrite(context, address + 4, Rt2, addr_byte_size))
       return false;
@@ -11306,9 +11287,6 @@ bool EmulateInstructionARM::EmulateVLDM(const uint32_t opcode,
       return false;
     }
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-
     uint32_t Rn = ReadCoreReg(n, &success);
     if (!success)
       return false;
@@ -11342,11 +11320,14 @@ bool EmulateInstructionARM::EmulateVLDM(const uint32_t opcode,
 
     context.type = eContextRegisterLoad;
 
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+
     // for r = 0 to regs-1
     for (uint32_t r = 0; r < regs; ++r) {
       if (single_regs) {
         // S[d+r] = MemA[address,4]; address = address+4;
-        context.SetRegisterPlusOffset(base_reg, address - Rn);
+        context.SetRegisterPlusOffset(*base_reg, address - Rn);
 
         uint32_t data = MemARead(context, address, addr_byte_size, 0, &success);
         if (!success)
@@ -11360,13 +11341,13 @@ bool EmulateInstructionARM::EmulateVLDM(const uint32_t opcode,
       } else {
         // word1 = MemA[address,4]; word2 = MemA[address+4,4]; address =
         // address+8;
-        context.SetRegisterPlusOffset(base_reg, address - Rn);
+        context.SetRegisterPlusOffset(*base_reg, address - Rn);
         uint32_t word1 =
             MemARead(context, address, addr_byte_size, 0, &success);
         if (!success)
           return false;
 
-        context.SetRegisterPlusOffset(base_reg, (address + 4) - Rn);
+        context.SetRegisterPlusOffset(*base_reg, (address + 4) - Rn);
         uint32_t word2 =
             MemARead(context, address + 4, addr_byte_size, 0, &success);
         if (!success)
@@ -11501,8 +11482,8 @@ bool EmulateInstructionARM::EmulateVSTM(const uint32_t opcode,
       return false;
     }
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     uint32_t Rn = ReadCoreReg(n, &success);
     if (!success)
@@ -11525,7 +11506,7 @@ bool EmulateInstructionARM::EmulateVSTM(const uint32_t opcode,
         value = Rn - imm32;
 
       context.type = eContextAdjustBaseRegister;
-      context.SetRegisterPlusOffset(base_reg, value - Rn);
+      context.SetRegisterPlusOffset(*base_reg, value - Rn);
 
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + n,
                                  value))
@@ -11546,9 +11527,9 @@ bool EmulateInstructionARM::EmulateVSTM(const uint32_t opcode,
         if (!success)
           return false;
 
-        RegisterInfo data_reg;
-        GetRegisterInfo(eRegisterKindDWARF, start_reg + d + r, data_reg);
-        context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+        llvm::Optional<RegisterInfo> data_reg =
+            GetRegisterInfo(eRegisterKindDWARF, start_reg + d + r);
+        context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                                 address - Rn);
         if (!MemAWrite(context, address, data, addr_byte_size))
           return false;
@@ -11565,28 +11546,28 @@ bool EmulateInstructionARM::EmulateVSTM(const uint32_t opcode,
         if (!success)
           return false;
 
-        RegisterInfo data_reg;
-        GetRegisterInfo(eRegisterKindDWARF, start_reg + d + r, data_reg);
+        llvm::Optional<RegisterInfo> data_reg =
+            GetRegisterInfo(eRegisterKindDWARF, start_reg + d + r);
 
         if (GetByteOrder() == eByteOrderBig) {
-          context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+          context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                                   address - Rn);
           if (!MemAWrite(context, address, Bits64(data, 63, 32),
                          addr_byte_size))
             return false;
 
-          context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+          context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                                   (address + 4) - Rn);
           if (!MemAWrite(context, address + 4, Bits64(data, 31, 0),
                          addr_byte_size))
             return false;
         } else {
-          context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+          context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                                   address - Rn);
           if (!MemAWrite(context, address, Bits64(data, 31, 0), addr_byte_size))
             return false;
 
-          context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+          context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                                   (address + 4) - Rn);
           if (!MemAWrite(context, address + 4, Bits64(data, 63, 32),
                          addr_byte_size))
@@ -11659,8 +11640,8 @@ bool EmulateInstructionARM::EmulateVLDR(const uint32_t opcode,
     default:
       return false;
     }
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     uint32_t Rn = ReadCoreReg(n, &success);
     if (!success)
@@ -11685,7 +11666,7 @@ bool EmulateInstructionARM::EmulateVLDR(const uint32_t opcode,
 
     EmulateInstruction::Context context;
     context.type = eContextRegisterLoad;
-    context.SetRegisterPlusOffset(base_reg, address - base);
+    context.SetRegisterPlusOffset(*base_reg, address - base);
 
     if (single_reg) {
       // S[d] = MemA[address,4];
@@ -11702,7 +11683,7 @@ bool EmulateInstructionARM::EmulateVLDR(const uint32_t opcode,
       if (!success)
         return false;
 
-      context.SetRegisterPlusOffset(base_reg, (address + 4) - base);
+      context.SetRegisterPlusOffset(*base_reg, (address + 4) - base);
       uint32_t word2 =
           MemARead(context, address + 4, addr_byte_size, 0, &success);
       if (!success)
@@ -11794,9 +11775,6 @@ bool EmulateInstructionARM::EmulateVSTR(const uint32_t opcode,
       return false;
     }
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-
     uint32_t Rn = ReadCoreReg(n, &success);
     if (!success)
       return false;
@@ -11811,11 +11789,13 @@ bool EmulateInstructionARM::EmulateVSTR(const uint32_t opcode,
     const uint32_t addr_byte_size = GetAddressByteSize();
     uint32_t start_reg = single_reg ? dwarf_s0 : dwarf_d0;
 
-    RegisterInfo data_reg;
-    GetRegisterInfo(eRegisterKindDWARF, start_reg + d, data_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+    llvm::Optional<RegisterInfo> data_reg =
+        GetRegisterInfo(eRegisterKindDWARF, start_reg + d);
     EmulateInstruction::Context context;
     context.type = eContextRegisterStore;
-    context.SetRegisterToRegisterPlusOffset(data_reg, base_reg, address - Rn);
+    context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg, address - Rn);
 
     if (single_reg) {
       // MemA[address,4] = S[d];
@@ -11840,7 +11820,7 @@ bool EmulateInstructionARM::EmulateVSTR(const uint32_t opcode,
         if (!MemAWrite(context, address, Bits64(data, 63, 32), addr_byte_size))
           return false;
 
-        context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+        context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                                 (address + 4) - Rn);
         if (!MemAWrite(context, address + 4, Bits64(data, 31, 0),
                        addr_byte_size))
@@ -11849,7 +11829,7 @@ bool EmulateInstructionARM::EmulateVSTR(const uint32_t opcode,
         if (!MemAWrite(context, address, Bits64(data, 31, 0), addr_byte_size))
           return false;
 
-        context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+        context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                                 (address + 4) - Rn);
         if (!MemAWrite(context, address + 4, Bits64(data, 63, 32),
                        addr_byte_size))
@@ -11957,8 +11937,8 @@ bool EmulateInstructionARM::EmulateVLD1Multiple(const uint32_t opcode,
       return false;
     }
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     uint32_t Rn = ReadCoreReg(n, &success);
     if (!success)
@@ -11985,7 +11965,7 @@ bool EmulateInstructionARM::EmulateVLD1Multiple(const uint32_t opcode,
 
       uint32_t value = Rn + offset;
       context.type = eContextAdjustBaseRegister;
-      context.SetRegisterPlusOffset(base_reg, offset);
+      context.SetRegisterPlusOffset(*base_reg, offset);
 
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + n,
                                  value))
@@ -11999,7 +11979,7 @@ bool EmulateInstructionARM::EmulateVLD1Multiple(const uint32_t opcode,
       for (uint32_t e = 0; e < elements; ++e) {
         // Elem[D[d+r],e,esize] = MemU[address,ebytes];
         context.type = eContextRegisterLoad;
-        context.SetRegisterPlusOffset(base_reg, address - Rn);
+        context.SetRegisterPlusOffset(*base_reg, address - Rn);
         uint64_t data = MemURead(context, address, ebytes, 0, &success);
         if (!success)
           return false;
@@ -12124,9 +12104,6 @@ bool EmulateInstructionARM::EmulateVLD1Single(const uint32_t opcode,
       return false;
     }
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-
     uint32_t Rn = ReadCoreReg(n, &success);
     if (!success)
       return false;
@@ -12153,7 +12130,9 @@ bool EmulateInstructionARM::EmulateVLD1Single(const uint32_t opcode,
       uint32_t value = Rn + offset;
 
       context.type = eContextAdjustBaseRegister;
-      context.SetRegisterPlusOffset(base_reg, offset);
+      llvm::Optional<RegisterInfo> base_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+      context.SetRegisterPlusOffset(*base_reg, offset);
 
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + n,
                                  value))
@@ -12290,8 +12269,8 @@ bool EmulateInstructionARM::EmulateVST1Multiple(const uint32_t opcode,
       return false;
     }
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     uint32_t Rn = ReadCoreReg(n, &success);
     if (!success)
@@ -12317,18 +12296,18 @@ bool EmulateInstructionARM::EmulateVST1Multiple(const uint32_t opcode,
         offset = 8 * regs;
 
       context.type = eContextAdjustBaseRegister;
-      context.SetRegisterPlusOffset(base_reg, offset);
+      context.SetRegisterPlusOffset(*base_reg, offset);
 
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + n,
                                  Rn + offset))
         return false;
     }
 
-    RegisterInfo data_reg;
     context.type = eContextRegisterStore;
     // for r = 0 to regs-1
     for (uint32_t r = 0; r < regs; ++r) {
-      GetRegisterInfo(eRegisterKindDWARF, dwarf_d0 + d + r, data_reg);
+      llvm::Optional<RegisterInfo> data_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_d0 + d + r);
       uint64_t register_data = ReadRegisterUnsigned(
           eRegisterKindDWARF, dwarf_d0 + d + r, 0, &success);
       if (!success)
@@ -12339,7 +12318,7 @@ bool EmulateInstructionARM::EmulateVST1Multiple(const uint32_t opcode,
         // MemU[address,ebytes] = Elem[D[d+r],e,esize];
         uint64_t word = Bits64(register_data, ((e + 1) * esize) - 1, e * esize);
 
-        context.SetRegisterToRegisterPlusOffset(data_reg, base_reg,
+        context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg,
                                                 address - Rn);
         if (!MemUWrite(context, address, word, ebytes))
           return false;
@@ -12457,8 +12436,8 @@ bool EmulateInstructionARM::EmulateVST1Single(const uint32_t opcode,
       return false;
     }
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
+    llvm::Optional<RegisterInfo> base_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
 
     uint32_t Rn = ReadCoreReg(n, &success);
     if (!success)
@@ -12484,7 +12463,7 @@ bool EmulateInstructionARM::EmulateVST1Single(const uint32_t opcode,
         offset = ebytes;
 
       context.type = eContextAdjustBaseRegister;
-      context.SetRegisterPlusOffset(base_reg, offset);
+      context.SetRegisterPlusOffset(*base_reg, offset);
 
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + n,
                                  Rn + offset))
@@ -12500,10 +12479,10 @@ bool EmulateInstructionARM::EmulateVST1Single(const uint32_t opcode,
     uint64_t word =
         Bits64(register_data, ((index + 1) * esize) - 1, index * esize);
 
-    RegisterInfo data_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_d0 + d, data_reg);
+    llvm::Optional<RegisterInfo> data_reg =
+        GetRegisterInfo(eRegisterKindDWARF, dwarf_d0 + d);
     context.type = eContextRegisterStore;
-    context.SetRegisterToRegisterPlusOffset(data_reg, base_reg, address - Rn);
+    context.SetRegisterToRegisterPlusOffset(*data_reg, *base_reg, address - Rn);
 
     if (!MemUWrite(context, address, word, ebytes))
       return false;
@@ -12582,9 +12561,6 @@ bool EmulateInstructionARM::EmulateVLD1SingleAll(const uint32_t opcode,
       return false;
     }
 
-    RegisterInfo base_reg;
-    GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg);
-
     uint32_t Rn = ReadCoreReg(n, &success);
     if (!success)
       return false;
@@ -12609,7 +12585,9 @@ bool EmulateInstructionARM::EmulateVLD1SingleAll(const uint32_t opcode,
         offset = ebytes;
 
       context.type = eContextAdjustBaseRegister;
-      context.SetRegisterPlusOffset(base_reg, offset);
+      llvm::Optional<RegisterInfo> base_reg =
+          GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n);
+      context.SetRegisterPlusOffset(*base_reg, offset);
 
       if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + n,
                                  Rn + offset))