From 0a47fb88847774eacc0ee4d33d734e5c31f9e2ad Mon Sep 17 00:00:00 2001
From: Diana Picus <diana.picus@linaro.org>
Date: Tue, 7 May 2019 11:39:30 +0000
Subject: [PATCH] [ARM GlobalISel] Widen G_SELECT operands

...except for the condition operand.

llvm-svn: 360135
---
 llvm/lib/Target/ARM/ARMLegalizerInfo.cpp      |  5 +-
 .../ARM/GlobalISel/arm-legalize-select.mir    | 71 +++++++++++++++++++
 2 files changed, 74 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
index 59e3409cad5d9..8f2029312d24f 100644
--- a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
@@ -129,8 +129,9 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
       .legalForCartesianProduct({s1}, {s32, p0})
       .minScalar(1, s32);
 
-  getActionDefinitionsBuilder(G_SELECT).legalForCartesianProduct({s32, p0},
-                                                                 {s1});
+  getActionDefinitionsBuilder(G_SELECT)
+      .legalForCartesianProduct({s32, p0}, {s1})
+      .minScalar(0, s32);
 
   // We're keeping these builders around because we'll want to add support for
   // floating point to them.
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-select.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-select.mir
index 0431f92d09976..d31dec62aa4d9 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-select.mir
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-select.mir
@@ -3,6 +3,9 @@
 --- |
   define void @test_select_s32() { ret void }
   define void @test_select_ptr() { ret void }
+
+  define void @test_select_s16() { ret void }
+  define void @test_select_s8() { ret void }
 ...
 ---
 name:            test_select_s32
@@ -56,3 +59,71 @@ body:             |
     $r0 = COPY %3(p0)
     BX_RET 14, $noreg, implicit $r0
 ...
+---
+name:            test_select_s16
+# CHECK-LABEL: name: test_select_s16
+legalized:       false
+# CHECK: legalized: true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+  - { id: 4, class: _ }
+  - { id: 5, class: _ }
+  - { id: 6, class: _ }
+body:             |
+  bb.0:
+    liveins: $r0, $r1, $r2
+
+    %0(s32) = COPY $r0
+    %1(s16) = G_TRUNC %0(s32)
+    %2(s32) = COPY $r1
+    %3(s16) = G_TRUNC %2(s32)
+    %4(s1) = G_CONSTANT i1 1
+    %5(s16) = G_SELECT %4(s1), %1, %3
+    ; G_SELECT with s16 should extend
+    ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
+    ; CHECK: {{%[0-9]+}}:_(s32) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
+    ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
+    %6(s32) = G_SEXT %5(s16)
+    $r0 = COPY %6(s32)
+    BX_RET 14, $noreg, implicit $r0
+...
+---
+name:            test_select_s8
+# CHECK-LABEL: name: test_select_s8
+legalized:       false
+# CHECK: legalized: true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+  - { id: 4, class: _ }
+  - { id: 5, class: _ }
+  - { id: 6, class: _ }
+body:             |
+  bb.0:
+    liveins: $r0, $r1, $r2
+
+    %0(s32) = COPY $r0
+    %1(s8) = G_TRUNC %0(s32)
+    %2(s32) = COPY $r1
+    %3(s8) = G_TRUNC %2(s32)
+    %4(s1) = G_CONSTANT i1 1
+    %5(s8) = G_SELECT %4(s1), %1, %3
+    ; G_SELECT with s8 should extend
+    ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
+    ; CHECK: {{%[0-9]+}}:_(s32) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
+    ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
+    %6(s32) = G_SEXT %5(s8)
+    $r0 = COPY %6(s32)
+    BX_RET 14, $noreg, implicit $r0
+...