diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 8e383ce85cb756..d25eda6b2dc52e 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2161,6 +2161,7 @@ static SDValue foldSelectWithIdentityConstant(SDNode *N, SelectionDAG &DAG, } if (ConstantSDNode *C = isConstOrConstSplat(V)) { switch (Opcode) { + case ISD::ADD: // X + 0 --> X case ISD::SUB: // X - 0 --> X return C->isZero(); } diff --git a/llvm/test/CodeGen/X86/vector-bo-select.ll b/llvm/test/CodeGen/X86/vector-bo-select.ll index 68348e0c1a52e9..068070a68c149b 100644 --- a/llvm/test/CodeGen/X86/vector-bo-select.ll +++ b/llvm/test/CodeGen/X86/vector-bo-select.ll @@ -772,8 +772,8 @@ define <4 x i32> @add_v4i32(<4 x i1> %b, <4 x i32> noundef %x, <4 x i32> noundef ; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vpslld $31, %xmm0, %xmm0 ; AVX512VL-NEXT: vptestmd %xmm0, %xmm0, %k1 -; AVX512VL-NEXT: vmovdqa32 %xmm2, %xmm0 {%k1} {z} -; AVX512VL-NEXT: vpaddd %xmm0, %xmm1, %xmm0 +; AVX512VL-NEXT: vpaddd %xmm2, %xmm1, %xmm1 {%k1} +; AVX512VL-NEXT: vmovdqa %xmm1, %xmm0 ; AVX512VL-NEXT: retq %s = select <4 x i1> %b, <4 x i32> %y, <4 x i32> zeroinitializer %r = add <4 x i32> %x, %s @@ -805,8 +805,8 @@ define <8 x i32> @add_v8i32_commute(<8 x i1> %b, <8 x i32> noundef %x, <8 x i32> ; AVX512VL-NEXT: vpmovsxwd %xmm0, %ymm0 ; AVX512VL-NEXT: vpslld $31, %ymm0, %ymm0 ; AVX512VL-NEXT: vptestmd %ymm0, %ymm0, %k1 -; AVX512VL-NEXT: vmovdqa32 %ymm2, %ymm0 {%k1} {z} -; AVX512VL-NEXT: vpaddd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: vpaddd %ymm2, %ymm1, %ymm1 {%k1} +; AVX512VL-NEXT: vmovdqa %ymm1, %ymm0 ; AVX512VL-NEXT: retq %s = select <8 x i1> %b, <8 x i32> %y, <8 x i32> zeroinitializer %r = add <8 x i32> %s, %x @@ -836,8 +836,7 @@ define <8 x i32> @add_v8i32_cast_cond(i8 noundef zeroext %pb, <8 x i32> noundef ; AVX512VL-LABEL: add_v8i32_cast_cond: ; AVX512VL: # %bb.0: ; AVX512VL-NEXT: kmovw %edi, %k1 -; AVX512VL-NEXT: vmovdqa32 %ymm1, %ymm1 {%k1} {z} -; AVX512VL-NEXT: vpaddd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: vpaddd %ymm1, %ymm0, %ymm0 {%k1} ; AVX512VL-NEXT: retq %b = bitcast i8 %pb to <8 x i1> %s = select <8 x i1> %b, <8 x i32> %y, <8 x i32> zeroinitializer @@ -865,8 +864,7 @@ define <8 x i64> @add_v8i64_cast_cond(i8 noundef zeroext %pb, <8 x i64> noundef ; AVX512-LABEL: add_v8i64_cast_cond: ; AVX512: # %bb.0: ; AVX512-NEXT: kmovw %edi, %k1 -; AVX512-NEXT: vmovdqa64 %zmm1, %zmm1 {%k1} {z} -; AVX512-NEXT: vpaddq %zmm1, %zmm0, %zmm0 +; AVX512-NEXT: vpaddq %zmm1, %zmm0, %zmm0 {%k1} ; AVX512-NEXT: retq %b = bitcast i8 %pb to <8 x i1> %s = select <8 x i1> %b, <8 x i64> %y, <8 x i64> zeroinitializer