diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Disassembler/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Disassembler/BUILD.gn
index 43fccb1dd58e8..196e4a6ae6826 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Disassembler/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/Disassembler/BUILD.gn
@@ -4,7 +4,8 @@ tablegen("AArch64GenDisassemblerTables") {
   visibility = [ ":Disassembler" ]
   args = [
     "-gen-disassembler",
-    "--large-decoder-table",
+    "-ignore-non-decodable-operands",
+    "-ignore-fully-defined-operands",
   ]
   td_file = "../AArch64.td"
 }
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/Disassembler/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/Disassembler/BUILD.gn
index 3ca5861b6d884..e870cf82e8790 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/Disassembler/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/Disassembler/BUILD.gn
@@ -5,6 +5,8 @@ tablegen("AMDGPUGenDisassemblerTables") {
   args = [
     "-gen-disassembler",
     "-specialize-decoders-per-bitwidth",
+    "-ignore-non-decodable-operands",
+    "-ignore-fully-defined-operands",
   ]
   td_file = "../AMDGPU.td"
 }
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/Disassembler/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/Disassembler/BUILD.gn
index 12add5188a9d4..c08304d8a573e 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/Disassembler/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/Disassembler/BUILD.gn
@@ -2,7 +2,10 @@ import("//llvm/utils/TableGen/tablegen.gni")
 
 tablegen("ARMGenDisassemblerTables") {
   visibility = [ ":Disassembler" ]
-  args = [ "-gen-disassembler" ]
+  args = [
+    "-gen-disassembler",
+    "-ignore-non-decodable-operands",
+  ]
   td_file = "../ARM.td"
 }
 
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AVR/Disassembler/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AVR/Disassembler/BUILD.gn
index dded556b786fb..bbae270d24c46 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AVR/Disassembler/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AVR/Disassembler/BUILD.gn
@@ -2,7 +2,10 @@ import("//llvm/utils/TableGen/tablegen.gni")
 
 tablegen("AVRGenDisassemblerTables") {
   visibility = [ ":Disassembler" ]
-  args = [ "-gen-disassembler" ]
+  args = [
+    "-gen-disassembler",
+    "-ignore-non-decodable-operands",
+  ]
   td_file = "../AVR.td"
 }
 
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/BPF/Disassembler/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/BPF/Disassembler/BUILD.gn
index f47fe7ac28cee..924317d20eee6 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/BPF/Disassembler/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/BPF/Disassembler/BUILD.gn
@@ -2,7 +2,10 @@ import("//llvm/utils/TableGen/tablegen.gni")
 
 tablegen("BPFGenDisassemblerTables") {
   visibility = [ ":Disassembler" ]
-  args = [ "-gen-disassembler" ]
+  args = [
+    "-gen-disassembler",
+    "-ignore-non-decodable-operands",
+  ]
   td_file = "../BPF.td"
 }
 
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/Disassembler/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/Disassembler/BUILD.gn
index 35a5d86c7e135..2d21060086036 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/Disassembler/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/Disassembler/BUILD.gn
@@ -2,7 +2,10 @@ import("//llvm/utils/TableGen/tablegen.gni")
 
 tablegen("HexagonGenDisassemblerTables") {
   visibility = [ ":Disassembler" ]
-  args = [ "-gen-disassembler" ]
+  args = [
+    "-gen-disassembler",
+    "-ignore-non-decodable-operands",
+  ]
   td_file = "../Hexagon.td"
 }
 
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/Mips/Disassembler/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/Mips/Disassembler/BUILD.gn
index 72032cfb75600..7f325fee2b139 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/Mips/Disassembler/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/Mips/Disassembler/BUILD.gn
@@ -2,7 +2,10 @@ import("//llvm/utils/TableGen/tablegen.gni")
 
 tablegen("MipsGenDisassemblerTables") {
   visibility = [ ":Disassembler" ]
-  args = [ "-gen-disassembler" ]
+  args = [
+    "-gen-disassembler",
+    "-ignore-non-decodable-operands",
+  ]
   td_file = "../Mips.td"
 }
 
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn
index 447a67af6be7b..94b6de7af6044 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn
@@ -5,6 +5,7 @@ tablegen("RISCVGenDisassemblerTables") {
   args = [
     "-gen-disassembler",
     "-specialize-decoders-per-bitwidth",
+    "-ignore-non-decodable-operands",
   ]
   td_file = "../RISCV.td"
 }