diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp index 846116a929b15..2490f5b9b97eb 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp @@ -1378,7 +1378,7 @@ Value *InstCombinerImpl::SimplifyDemandedVectorElts(Value *V, if (!Elt) return nullptr; Elts.push_back(Elt); - if (isa(Elt)) // Already undef or poison. + if (isa(Elt)) // Already poison. UndefElts.setBit(i); } diff --git a/llvm/test/Transforms/InstCombine/insert-const-shuf.ll b/llvm/test/Transforms/InstCombine/insert-const-shuf.ll index d2fa651b39449..1a6528d885568 100644 --- a/llvm/test/Transforms/InstCombine/insert-const-shuf.ll +++ b/llvm/test/Transforms/InstCombine/insert-const-shuf.ll @@ -92,10 +92,9 @@ define <3 x float> @twoShufUses(<3 x float> %x) { ; The inserted scalar constant index is out-of-bounds for the shuffle vector constant. -; FIXME: This is a miscompilation define <5 x i8> @longerMask(<3 x i8> %x) { ; CHECK-LABEL: @longerMask( -; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <3 x i8> [[X:%.*]], <3 x i8> , <5 x i32> +; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <3 x i8> [[X:%.*]], <3 x i8> , <5 x i32> ; CHECK-NEXT: [[INS:%.*]] = insertelement <5 x i8> [[SHUF]], i8 42, i64 4 ; CHECK-NEXT: ret <5 x i8> [[INS]] ; diff --git a/llvm/test/Transforms/InstCombine/vec_shuffle.ll b/llvm/test/Transforms/InstCombine/vec_shuffle.ll index e1174007b0fe0..978d90d7df94e 100644 --- a/llvm/test/Transforms/InstCombine/vec_shuffle.ll +++ b/llvm/test/Transforms/InstCombine/vec_shuffle.ll @@ -2333,11 +2333,10 @@ define <2 x float> @uitofp_shuf_narrow(<4 x i32> %x, <4 x i32> %y) { ret <2 x float> %r } -; FIXME: This is a miscompilation define <4 x i16> @blend_elements_from_load(ptr align 8 %_0) { ; CHECK-LABEL: @blend_elements_from_load( ; CHECK-NEXT: [[LOAD:%.*]] = load <3 x i16>, ptr [[_0:%.*]], align 8 -; CHECK-NEXT: [[RV:%.*]] = shufflevector <3 x i16> , <3 x i16> [[LOAD]], <4 x i32> +; CHECK-NEXT: [[RV:%.*]] = shufflevector <3 x i16> , <3 x i16> [[LOAD]], <4 x i32> ; CHECK-NEXT: ret <4 x i16> [[RV]] ; %load = load <3 x i16>, ptr %_0, align 8