diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp index e3c208653b7a89..725d263bfd3088 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp @@ -2057,7 +2057,8 @@ InstructionCost AArch64TTIImpl::getArithmeticInstrCost( Opcode, Ty, CostKind, Op1Info, Op2Info); if (Ty->isVectorTy()) { if (TLI->isOperationLegalOrCustom(ISD, LT.second) && ST->hasSVE()) { - // SDIV/UDIV operations are lowered, then we can have less costs. + // SDIV/UDIV operations are lowered using SVE, then we can have less + // costs. if (isa(Ty) && cast(Ty)->getPrimitiveSizeInBits().getFixedSize() < 128) { diff --git a/llvm/test/Analysis/CostModel/AArch64/sve-fixed-length.ll b/llvm/test/Analysis/CostModel/AArch64/sve-fixed-length.ll index 05afbea41a2eeb..1c34e4fbc4e8c6 100644 --- a/llvm/test/Analysis/CostModel/AArch64/sve-fixed-length.ll +++ b/llvm/test/Analysis/CostModel/AArch64/sve-fixed-length.ll @@ -60,9 +60,8 @@ define void @add() #0 { ; Assuming base_cost = 2 ; Assuming legalization_cost = (vec_len-1/VBITS)+1 -; Assuming extra cost of 8 for i8. -; Assuming extra cost of 4 for i16. -; The hard-coded expected cost is based on VBITS=128 +; For fixed-length vectors >= 128, if element type is i8, multiply the cost by 8. +; For fixed-length vectors >= 128, if element type is i16, multiply the cost by 4. define void @sdiv() #0 { ; CHECK-LABEL: function 'sdiv' @@ -110,9 +109,8 @@ define void @sdiv() #0 { ; Assuming base_cost = 2 ; Assuming legalization_cost = (vec_len-1/VBITS)+1 -; Assuming extra cost of 8 for i8. -; Assuming extra cost of 4 for i16. -; The hard-coded expected cost is based on VBITS=128 +; For fixed-length vectors >= 128, if element type is i8, multiply the cost by 8. +; For fixed-length vectors >= 128, if element type is i16, multiply the cost by 4. define void @udiv() #0 { ; CHECK-LABEL: function 'udiv'