diff --git a/llvm/include/llvm/Bitcode/BitcodeConvenience.h b/llvm/include/llvm/Bitcode/BitcodeConvenience.h index b7f63664409c2..8e3ac064bcf29 100644 --- a/llvm/include/llvm/Bitcode/BitcodeConvenience.h +++ b/llvm/include/llvm/Bitcode/BitcodeConvenience.h @@ -265,7 +265,7 @@ template class BCRecordCoding> { for (auto &element : array) ElementTy::assertValid(element); #endif - buffer.reserve(buffer.size() + std::distance(array.begin(), array.end())); + buffer.reserve(buffer.size() + llvm::size(array)); llvm::append_range(buffer, array); Stream.EmitRecordWithAbbrev(code, buffer); } diff --git a/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/PrintInstructionCount.h b/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/PrintInstructionCount.h index cd11d4c148926..b83954ae3eba4 100644 --- a/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/PrintInstructionCount.h +++ b/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/PrintInstructionCount.h @@ -13,7 +13,7 @@ class PrintInstructionCount final : public RegionPass { public: PrintInstructionCount() : RegionPass("null") {} bool runOnRegion(Region &R, const Analyses &A) final { - outs() << "InstructionCount: " << std::distance(R.begin(), R.end()) << "\n"; + outs() << "InstructionCount: " << llvm::size(R) << "\n"; return false; } }; diff --git a/llvm/lib/CAS/OnDiskCAS.cpp b/llvm/lib/CAS/OnDiskCAS.cpp index 7d29f4499211e..e8d72c9faef44 100644 --- a/llvm/lib/CAS/OnDiskCAS.cpp +++ b/llvm/lib/CAS/OnDiskCAS.cpp @@ -63,7 +63,7 @@ class OnDiskCAS : public BuiltinCAS { size_t getNumRefs(ObjectHandle Node) const final { auto RefsRange = DB->getObjectRefs(convertHandle(Node)); - return std::distance(RefsRange.begin(), RefsRange.end()); + return llvm::size(RefsRange); } ObjectRef readRef(ObjectHandle Node, size_t I) const final { diff --git a/llvm/lib/CAS/OnDiskGraphDB.cpp b/llvm/lib/CAS/OnDiskGraphDB.cpp index 2d76ff11064e9..2aede017133b0 100644 --- a/llvm/lib/CAS/OnDiskGraphDB.cpp +++ b/llvm/lib/CAS/OnDiskGraphDB.cpp @@ -1660,9 +1660,8 @@ Error OnDiskGraphDB::importFullTree(ObjectID PrimaryID, if (!Node) return; auto Refs = UpstreamDB->getObjectRefs(*Node); - CursorStack.push_back({*Node, - (size_t)std::distance(Refs.begin(), Refs.end()), - Refs.begin(), Refs.end()}); + CursorStack.push_back( + {*Node, (size_t)llvm::size(Refs), Refs.begin(), Refs.end()}); }; enqueueNode(PrimaryID, UpstreamNode); @@ -1722,7 +1721,7 @@ Error OnDiskGraphDB::importSingleNode(ObjectID PrimaryID, auto Data = UpstreamDB->getObjectData(UpstreamNode); auto UpstreamRefs = UpstreamDB->getObjectRefs(UpstreamNode); SmallVector Refs; - Refs.reserve(std::distance(UpstreamRefs.begin(), UpstreamRefs.end())); + Refs.reserve(llvm::size(UpstreamRefs)); for (ObjectID UpstreamRef : UpstreamRefs) { auto Ref = getReference(UpstreamDB->getDigest(UpstreamRef)); if (LLVM_UNLIKELY(!Ref)) diff --git a/llvm/lib/ObjectYAML/MinidumpEmitter.cpp b/llvm/lib/ObjectYAML/MinidumpEmitter.cpp index b27155162be6b..9172927161e5f 100644 --- a/llvm/lib/ObjectYAML/MinidumpEmitter.cpp +++ b/llvm/lib/ObjectYAML/MinidumpEmitter.cpp @@ -84,7 +84,7 @@ class BlobAllocator { template std::pair> BlobAllocator::allocateNewArray(const iterator_range &Range) { - size_t Num = std::distance(Range.begin(), Range.end()); + size_t Num = llvm::size(Range); MutableArrayRef Array(Temporaries.Allocate(Num), Num); llvm::uninitialized_copy(Range, Array.begin()); return {allocateArray(Array), Array}; diff --git a/llvm/lib/Support/BalancedPartitioning.cpp b/llvm/lib/Support/BalancedPartitioning.cpp index d859abddbcad8..2ae20e96845a2 100644 --- a/llvm/lib/Support/BalancedPartitioning.cpp +++ b/llvm/lib/Support/BalancedPartitioning.cpp @@ -114,7 +114,7 @@ void BalancedPartitioning::bisect(const FunctionNodeRange Nodes, unsigned RecDepth, unsigned RootBucket, unsigned Offset, std::optional &TP) const { - unsigned NumNodes = std::distance(Nodes.begin(), Nodes.end()); + unsigned NumNodes = llvm::size(Nodes); if (NumNodes <= 1 || RecDepth >= Config.SplitDepth) { // We've reach the lowest level of the recursion tree. Fall back to the // original order and assign to buckets. @@ -168,7 +168,7 @@ void BalancedPartitioning::runIterations(const FunctionNodeRange Nodes, unsigned LeftBucket, unsigned RightBucket, std::mt19937 &RNG) const { - unsigned NumNodes = std::distance(Nodes.begin(), Nodes.end()); + unsigned NumNodes = llvm::size(Nodes); DenseMap UtilityNodeIndex; for (auto &N : Nodes) for (auto &UN : N.UtilityNodes) @@ -303,7 +303,7 @@ bool BalancedPartitioning::moveFunctionNode(BPFunctionNode &N, void BalancedPartitioning::split(const FunctionNodeRange Nodes, unsigned StartBucket) const { - unsigned NumNodes = std::distance(Nodes.begin(), Nodes.end()); + unsigned NumNodes = llvm::size(Nodes); auto NodesMid = Nodes.begin() + (NumNodes + 1) / 2; llvm::sort(Nodes, [](auto &L, auto &R) { diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp index 96176b79e98a2..73d9699f71477 100644 --- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp +++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp @@ -1266,9 +1266,7 @@ void AArch64AsmPrinter::PrintDebugValueComment(const MachineInstr *MI, // Frame address. Currently handles register +- offset only. assert(MI->isIndirectDebugValue()); OS << '['; - for (unsigned I = 0, E = std::distance(MI->debug_operands().begin(), - MI->debug_operands().end()); - I < E; ++I) { + for (unsigned I = 0, E = llvm::size(MI->debug_operands()); I < E; ++I) { if (I != 0) OS << ", "; printOperand(MI, I, OS); diff --git a/llvm/lib/Target/AMDGPU/GCNRegPressure.h b/llvm/lib/Target/AMDGPU/GCNRegPressure.h index ab310bba142a3..f9d3ce039092e 100644 --- a/llvm/lib/Target/AMDGPU/GCNRegPressure.h +++ b/llvm/lib/Target/AMDGPU/GCNRegPressure.h @@ -455,7 +455,7 @@ template DenseMap getLiveRegMap(Range &&R, bool After, LiveIntervals &LIS) { std::vector Indexes; - Indexes.reserve(std::distance(R.begin(), R.end())); + Indexes.reserve(llvm::size(R)); auto &SII = *LIS.getSlotIndexes(); for (MachineInstr *I : R) { auto SI = SII.getInstructionIndex(*I); diff --git a/llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp b/llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp index e742a9811984b..cba9d45072852 100644 --- a/llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp @@ -606,8 +606,7 @@ bool SPIRVTargetLowering::insertLogicalCopyOnResult( createVirtualRegister(NewResultType, &GR, MRI, *I.getMF()); Register NewTypeReg = GR.getSPIRVTypeID(NewResultType); - assert(std::distance(I.defs().begin(), I.defs().end()) == 1 && - "Expected only one def"); + assert(llvm::size(I.defs()) == 1 && "Expected only one def"); MachineOperand &OldResult = *I.defs().begin(); Register OldResultReg = OldResult.getReg(); MachineOperand &OldType = *I.uses().begin(); diff --git a/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp b/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp index d538009f0ecbe..0f4b3d59b904a 100644 --- a/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp @@ -1067,8 +1067,7 @@ static void removeImplicitFallthroughs(MachineFunction &MF, if (!isImplicitFallthrough(MBB)) continue; - assert(std::distance(MBB.successors().begin(), MBB.successors().end()) == - 1); + assert(MBB.succ_size() == 1); MIB.setInsertPt(MBB, MBB.end()); MIB.buildBr(**MBB.successors().begin()); } diff --git a/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp b/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp index 0f3e66476f055..7e8cc03f7b002 100644 --- a/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp +++ b/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp @@ -2914,8 +2914,8 @@ static int CalculateUnswitchCostMultiplier( ParentLoopSizeMultiplier = std::max(ParentL->getNumBlocks() / UnswitchParentBlocksDiv, 1); - int SiblingsCount = (ParentL ? ParentL->getSubLoopsVector().size() - : std::distance(LI.begin(), LI.end())); + int SiblingsCount = + (ParentL ? ParentL->getSubLoopsVector().size() : llvm::size(LI)); // Count amount of clones that all the candidates might cause during // unswitching. Branch/guard/select counts as 1, switch counts as log2 of its // cases. diff --git a/llvm/tools/llvm-xray/xray-extract.cpp b/llvm/tools/llvm-xray/xray-extract.cpp index 70fe0111b0c40..5ff8dc1a308d3 100644 --- a/llvm/tools/llvm-xray/xray-extract.cpp +++ b/llvm/tools/llvm-xray/xray-extract.cpp @@ -57,7 +57,7 @@ static void exportAsYAML(const InstrumentationMap &Map, raw_ostream &OS, // First we translate the sleds into the YAMLXRaySledEntry objects in a deque. std::vector YAMLSleds; auto Sleds = Map.sleds(); - YAMLSleds.reserve(std::distance(Sleds.begin(), Sleds.end())); + YAMLSleds.reserve(llvm::size(Sleds)); for (const auto &Sled : Sleds) { auto FuncId = Map.getFunctionId(Sled.Function); if (!FuncId) diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp index 3486a7a7fb08c..e8c4a1a08e4ed 100644 --- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp +++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp @@ -703,8 +703,7 @@ void RegisterInfoEmitter::emitComposeSubRegIndices(raw_ostream &OS, SmallVector RowMap; SmallVector, 4> Rows; - auto SubRegIndicesSize = - std::distance(SubRegIndices.begin(), SubRegIndices.end()); + auto SubRegIndicesSize = llvm::size(SubRegIndices); for (const auto &Idx : SubRegIndices) { unsigned Found = ~0u; for (unsigned r = 0, re = Rows.size(); r != re; ++r) { @@ -1133,7 +1132,7 @@ void RegisterInfoEmitter::runMCDesc(raw_ostream &OS, raw_ostream &MainOS, << RegBank.getNumNativeRegUnits() << ", " << TargetName << "RegDiffLists, " << TargetName << "LaneMaskLists, " << TargetName << "RegStrings, " << TargetName << "RegClassStrings, " << TargetName << "SubRegIdxLists, " - << (std::distance(SubRegIndices.begin(), SubRegIndices.end()) + 1) << ",\n" + << (llvm::size(SubRegIndices) + 1) << ",\n" << TargetName << "RegEncodingTable);\n\n"; EmitRegMapping(OS, Regs, false); @@ -1527,8 +1526,7 @@ void RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, raw_ostream &MainOS, std::string ClassName = Target.getName().str() + "GenRegisterInfo"; - auto SubRegIndicesSize = - std::distance(SubRegIndices.begin(), SubRegIndices.end()); + auto SubRegIndicesSize = llvm::size(SubRegIndices); if (!SubRegIndices.empty()) { emitComposeSubRegIndices(OS, ClassName);