diff --git a/clang/test/Preprocessor/riscv-target-features.c b/clang/test/Preprocessor/riscv-target-features.c index 4112e7d473d23..8f50126f1b362 100644 --- a/clang/test/Preprocessor/riscv-target-features.c +++ b/clang/test/Preprocessor/riscv-target-features.c @@ -141,7 +141,9 @@ // Experimental extensions +// CHECK-NOT: __riscv_zaamo {{.*$}} // CHECK-NOT: __riscv_zacas {{.*$}} +// CHECK-NOT: __riscv_zalrsc {{.*$}} // CHECK-NOT: __riscv_zcmop {{.*$}} // CHECK-NOT: __riscv_zfbfmin {{.*$}} // CHECK-NOT: __riscv_zicfilp {{.*$}} @@ -1307,6 +1309,13 @@ // CHECK-ZVKT-EXT: __riscv_zvkt 1000000{{$}} // Experimental extensions +// RUN: %clang --target=riscv32 -menable-experimental-extensions \ +// RUN: -march=rv32i_zaamo0p2 -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZAAMO-EXT %s +// RUN: %clang --target=riscv64 -menable-experimental-extensions \ +// RUN: -march=rv64i_zaamo0p2 -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZAAMO-EXT %s +// CHECK-ZAAMO-EXT: __riscv_zaamo 2000{{$}} // RUN: %clang --target=riscv32 -menable-experimental-extensions \ // RUN: -march=rv32i_zacas1p0 -E -dM %s \ @@ -1316,6 +1325,14 @@ // RUN: -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s // CHECK-ZACAS-EXT: __riscv_zacas 1000000{{$}} +// RUN: %clang --target=riscv32 -menable-experimental-extensions \ +// RUN: -march=rv32i_zalrsc0p2 -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZALRSC-EXT %s +// RUN: %clang --target=riscv64 -menable-experimental-extensions \ +// RUN: -march=rv64i_zalrsc0p2 -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZALRSC-EXT %s +// CHECK-ZALRSC-EXT: __riscv_zalrsc 2000{{$}} + // RUN: %clang --target=riscv32 -menable-experimental-extensions \ // RUN: -march=rv32izfbfmin1p0 -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZFBFMIN-EXT %s diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst index 9dbbc3f04387b..2cfbb10abc8a1 100644 --- a/llvm/docs/RISCVUsage.rst +++ b/llvm/docs/RISCVUsage.rst @@ -246,6 +246,9 @@ The primary goal of experimental support is to assist in the process of ratifica ``experimental-zcmop`` LLVM implements the `v0.2 proposed specification `__. +``experimental-zaamo``, ``experimental-zalrsc`` + LLVM implements the `v0.2 proposed specification `__. + To use an experimental extension from `clang`, you must add `-menable-experimental-extensions` to the command line, and specify the exact version of the experimental extension you are using. To use an experimental extension with LLVM's internal developer tools (e.g. `llc`, `llvm-objdump`, `llvm-mc`), you must prefix the extension name with `experimental-`. Note that you don't need to specify the version with internal tools, and shouldn't include the `experimental-` prefix with `clang`. Vendor Extensions diff --git a/llvm/lib/Support/RISCVISAInfo.cpp b/llvm/lib/Support/RISCVISAInfo.cpp index 3c02492e99f1d..32b4ff5de86f1 100644 --- a/llvm/lib/Support/RISCVISAInfo.cpp +++ b/llvm/lib/Support/RISCVISAInfo.cpp @@ -190,8 +190,11 @@ static const RISCVSupportedExtension SupportedExtensions[] = { }; // NOTE: This table should be sorted alphabetically by extension name. +// clang-format off static const RISCVSupportedExtension SupportedExperimentalExtensions[] = { + {"zaamo", {0, 2}}, {"zacas", {1, 0}}, + {"zalrsc", {0, 2}}, {"zcmop", {0, 2}}, @@ -209,6 +212,7 @@ static const RISCVSupportedExtension SupportedExperimentalExtensions[] = { {"zvfbfmin", {1, 0}}, {"zvfbfwma", {1, 0}}, }; +// clang-format on static void verifyTables() { #ifndef NDEBUG diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td index 3878be680c049..680b66872286b 100644 --- a/llvm/lib/Target/RISCV/RISCVFeatures.td +++ b/llvm/lib/Target/RISCV/RISCVFeatures.td @@ -168,6 +168,15 @@ def FeatureStdExtZa64rs : SubtargetFeature<"za64rs", "HasStdExtZa64rs", "true", def FeatureStdExtZa128rs : SubtargetFeature<"za128rs", "HasStdExtZa128rs", "true", "'Za128rs' (Reservation Set Size of at Most 128 Bytes)">; +def FeatureStdExtZaamo + : SubtargetFeature<"experimental-zaamo", "HasStdExtZaamo", "true", + "'Zaamo' (Atomic Memory Operations)">; +def HasStdExtAOrZaamo + : Predicate<"Subtarget->hasStdExtA() || Subtarget->hasStdExtZaamo()">, + AssemblerPredicate<(any_of FeatureStdExtA, FeatureStdExtZaamo), + "'A' (Atomic Instructions) or " + "'Zaamo' (Atomic Memory Operations)">; + def FeatureStdExtZacas : SubtargetFeature<"experimental-zacas", "HasStdExtZacas", "true", "'Zacas' (Atomic Compare-And-Swap Instructions)">; @@ -176,6 +185,15 @@ def HasStdExtZacas : Predicate<"Subtarget->hasStdExtZacas()">, "'Zacas' (Atomic Compare-And-Swap Instructions)">; def NoStdExtZacas : Predicate<"!Subtarget->hasStdExtZacas()">; +def FeatureStdExtZalrsc + : SubtargetFeature<"experimental-zalrsc", "HasStdExtZalrsc", "true", + "'Zalrsc' (Load-Reserved/Store-Conditional)">; +def HasStdExtAOrZalrsc + : Predicate<"Subtarget->hasStdExtA() || Subtarget->hasStdExtZalrsc()">, + AssemblerPredicate<(any_of FeatureStdExtA, FeatureStdExtZalrsc), + "'A' (Atomic Instructions) or " + "'Zalrsc' (Load-Reserved/Store-Conditional)">; + def FeatureStdExtZawrs : SubtargetFeature<"zawrs", "HasStdExtZawrs", "true", "'Zawrs' (Wait on Reservation Set)">; def HasStdExtZawrs : Predicate<"Subtarget->hasStdExtZawrs()">, diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoA.td b/llvm/lib/Target/RISCV/RISCVInstrInfoA.td index 44552c00c62e5..36842ceb49bfb 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoA.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoA.td @@ -47,10 +47,13 @@ multiclass AMO_rr_aq_rl funct5, bits<3> funct3, string opcodestr> { // Instructions //===----------------------------------------------------------------------===// -let Predicates = [HasStdExtA], IsSignExtendingOpW = 1 in { +let Predicates = [HasStdExtAOrZalrsc], IsSignExtendingOpW = 1 in { defm LR_W : LR_r_aq_rl<0b010, "lr.w">, Sched<[WriteAtomicLDW, ReadAtomicLDW]>; defm SC_W : AMO_rr_aq_rl<0b00011, 0b010, "sc.w">, Sched<[WriteAtomicSTW, ReadAtomicSTW, ReadAtomicSTW]>; +} // Predicates = [HasStdExtAOrZalrsc], IsSignExtendingOpW = 1 + +let Predicates = [HasStdExtAOrZaamo], IsSignExtendingOpW = 1 in { defm AMOSWAP_W : AMO_rr_aq_rl<0b00001, 0b010, "amoswap.w">, Sched<[WriteAtomicW, ReadAtomicWA, ReadAtomicWD]>; defm AMOADD_W : AMO_rr_aq_rl<0b00000, 0b010, "amoadd.w">, @@ -69,12 +72,15 @@ defm AMOMINU_W : AMO_rr_aq_rl<0b11000, 0b010, "amominu.w">, Sched<[WriteAtomicW, ReadAtomicWA, ReadAtomicWD]>; defm AMOMAXU_W : AMO_rr_aq_rl<0b11100, 0b010, "amomaxu.w">, Sched<[WriteAtomicW, ReadAtomicWA, ReadAtomicWD]>; -} // Predicates = [HasStdExtA] +} // Predicates = [HasStdExtAOrZaamo], IsSignExtendingOpW = 1 -let Predicates = [HasStdExtA, IsRV64] in { +let Predicates = [HasStdExtAOrZalrsc, IsRV64] in { defm LR_D : LR_r_aq_rl<0b011, "lr.d">, Sched<[WriteAtomicLDD, ReadAtomicLDD]>; defm SC_D : AMO_rr_aq_rl<0b00011, 0b011, "sc.d">, Sched<[WriteAtomicSTD, ReadAtomicSTD, ReadAtomicSTD]>; +} // Predicates = [HasStdExtAOrZalrsc, IsRV64] + +let Predicates = [HasStdExtAOrZaamo, IsRV64] in { defm AMOSWAP_D : AMO_rr_aq_rl<0b00001, 0b011, "amoswap.d">, Sched<[WriteAtomicD, ReadAtomicDA, ReadAtomicDD]>; defm AMOADD_D : AMO_rr_aq_rl<0b00000, 0b011, "amoadd.d">, @@ -93,7 +99,7 @@ defm AMOMINU_D : AMO_rr_aq_rl<0b11000, 0b011, "amominu.d">, Sched<[WriteAtomicD, ReadAtomicDA, ReadAtomicDD]>; defm AMOMAXU_D : AMO_rr_aq_rl<0b11100, 0b011, "amomaxu.d">, Sched<[WriteAtomicD, ReadAtomicDA, ReadAtomicDD]>; -} // Predicates = [HasStdExtA, IsRV64] +} // Predicates = [HasStdExtAOrZaamo, IsRV64] //===----------------------------------------------------------------------===// // Pseudo-instructions and codegen patterns diff --git a/llvm/test/CodeGen/RISCV/attributes.ll b/llvm/test/CodeGen/RISCV/attributes.ll index b90bef7525379..ed1ab5a74f5c4 100644 --- a/llvm/test/CodeGen/RISCV/attributes.ll +++ b/llvm/test/CodeGen/RISCV/attributes.ll @@ -93,7 +93,9 @@ ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfbfmin %s -o - | FileCheck --check-prefixes=CHECK,RV32ZFBFMIN %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zvfbfmin %s -o - | FileCheck --check-prefixes=CHECK,RV32ZVFBFMIN %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zvfbfwma %s -o - | FileCheck --check-prefixes=CHECK,RV32ZVFBFWMA %s +; RUN: llc -mtriple=riscv32 -mattr=+experimental-zaamo %s -o - | FileCheck --check-prefix=RV32ZAAMO %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zacas %s -o - | FileCheck --check-prefix=RV32ZACAS %s +; RUN: llc -mtriple=riscv32 -mattr=+experimental-zalrsc %s -o - | FileCheck --check-prefix=RV32ZALRSC %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zicfilp %s -o - | FileCheck --check-prefix=RV32ZICFILP %s ; RUN: llc -mtriple=riscv64 %s -o - | FileCheck %s @@ -195,7 +197,9 @@ ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zfbfmin %s -o - | FileCheck --check-prefixes=CHECK,RV64ZFBFMIN %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zvfbfmin %s -o - | FileCheck --check-prefixes=CHECK,RV64ZVFBFMIN %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zvfbfwma %s -o - | FileCheck --check-prefixes=CHECK,RV64ZVFBFWMA %s +; RUN: llc -mtriple=riscv64 -mattr=+experimental-zaamo %s -o - | FileCheck --check-prefix=RV64ZAAMO %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zacas %s -o - | FileCheck --check-prefix=RV64ZACAS %s +; RUN: llc -mtriple=riscv64 -mattr=+experimental-zalrsc %s -o - | FileCheck --check-prefix=RV64ZALRSC %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zicfilp %s -o - | FileCheck --check-prefix=RV64ZICFILP %s ; CHECK: .attribute 4, 16 @@ -292,7 +296,9 @@ ; RV32ZFBFMIN: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zfbfmin1p0" ; RV32ZVFBFMIN: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfmin1p0_zvl32b1p0" ; RV32ZVFBFWMA: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zfbfmin1p0_zve32f1p0_zve32x1p0_zvfbfmin1p0_zvfbfwma1p0_zvl32b1p0" +; RV32ZAAMO: .attribute 5, "rv32i2p1_zaamo0p2" ; RV32ZACAS: .attribute 5, "rv32i2p1_a2p1_zacas1p0" +; RV32ZALRSC: .attribute 5, "rv32i2p1_zalrsc0p2" ; RV32ZICFILP: .attribute 5, "rv32i2p1_zicfilp0p4" ; RV64M: .attribute 5, "rv64i2p1_m2p0" @@ -393,7 +399,9 @@ ; RV64ZFBFMIN: .attribute 5, "rv64i2p1_f2p2_zicsr2p0_zfbfmin1p0" ; RV64ZVFBFMIN: .attribute 5, "rv64i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfmin1p0_zvl32b1p0" ; RV64ZVFBFWMA: .attribute 5, "rv64i2p1_f2p2_zicsr2p0_zfbfmin1p0_zve32f1p0_zve32x1p0_zvfbfmin1p0_zvfbfwma1p0_zvl32b1p0" +; RV64ZAAMO: .attribute 5, "rv64i2p1_zaamo0p2" ; RV64ZACAS: .attribute 5, "rv64i2p1_a2p1_zacas1p0" +; RV64ZALRSC: .attribute 5, "rv64i2p1_zalrsc0p2" ; RV64ZICFILP: .attribute 5, "rv64i2p1_zicfilp0p4" define i32 @addi(i32 %a) { diff --git a/llvm/test/MC/RISCV/rv32i-invalid.s b/llvm/test/MC/RISCV/rv32i-invalid.s index c5e0657b83809..80a59df94e36a 100644 --- a/llvm/test/MC/RISCV/rv32i-invalid.s +++ b/llvm/test/MC/RISCV/rv32i-invalid.s @@ -170,7 +170,8 @@ xor s2, s2 # CHECK: :[[@LINE]]:1: error: too few operands for instruction # Instruction not in the base ISA div a4, ra, s0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'M' (Integer Multiplication and Division){{$}} -amomaxu.w s5, s4, (s3) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'A' (Atomic Instructions){{$}} +amomaxu.w s5, s4, (s3) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'A' (Atomic Instructions) or 'Zaamo' (Atomic Memory Operations){{$}} +lr.w t0, (t1) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'A' (Atomic Instructions) or 'Zalrsc' (Load-Reserved/Store-Conditional){{$}} fadd.s ft0, ft1, ft2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'F' (Single-Precision Floating-Point){{$}} fadd.h ft0, ft1, ft2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zfh' (Half-Precision Floating-Point){{$}} fadd.s a0, a1, a2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zfinx' (Float in Integer){{$}} diff --git a/llvm/test/MC/RISCV/rv32zaamo-invalid.s b/llvm/test/MC/RISCV/rv32zaamo-invalid.s index f6183fbc8a1f1..fb4dab4542d6b 100644 --- a/llvm/test/MC/RISCV/rv32zaamo-invalid.s +++ b/llvm/test/MC/RISCV/rv32zaamo-invalid.s @@ -1,4 +1,5 @@ # RUN: not llvm-mc -triple riscv32 -mattr=+a < %s 2>&1 | FileCheck %s +# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zaamo < %s 2>&1 | FileCheck %s # Final operand must have parentheses amoswap.w a1, a2, a3 # CHECK: :[[@LINE]]:19: error: expected '(' or optional integer offset diff --git a/llvm/test/MC/RISCV/rv32zaamo-valid.s b/llvm/test/MC/RISCV/rv32zaamo-valid.s index ea1ae79558443..f6b5799b46f86 100644 --- a/llvm/test/MC/RISCV/rv32zaamo-valid.s +++ b/llvm/test/MC/RISCV/rv32zaamo-valid.s @@ -8,6 +8,16 @@ # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+a < %s \ # RUN: | llvm-objdump --mattr=+a -M no-aliases -d -r - \ # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zaamo -riscv-no-aliases -show-encoding \ +# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zaamo -riscv-no-aliases -show-encoding \ +# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zaamo < %s \ +# RUN: | llvm-objdump --mattr=+experimental-zaamo -M no-aliases -d -r - \ +# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zaamo < %s \ +# RUN: | llvm-objdump --mattr=+experimental-zaamo -M no-aliases -d -r - \ +# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # CHECK-ASM-AND-OBJ: amoswap.w a4, ra, (s0) # CHECK-ASM: encoding: [0x2f,0x27,0x14,0x08] diff --git a/llvm/test/MC/RISCV/rv32zalrsc-invalid.s b/llvm/test/MC/RISCV/rv32zalrsc-invalid.s index 61cfc614b7c42..9233c978f033a 100644 --- a/llvm/test/MC/RISCV/rv32zalrsc-invalid.s +++ b/llvm/test/MC/RISCV/rv32zalrsc-invalid.s @@ -1,4 +1,5 @@ # RUN: not llvm-mc -triple riscv32 -mattr=+a < %s 2>&1 | FileCheck %s +# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zalrsc < %s 2>&1 | FileCheck %s # Final operand must have parentheses lr.w a4, a5 # CHECK: :[[@LINE]]:10: error: expected '(' or optional integer offset diff --git a/llvm/test/MC/RISCV/rv32zalrsc-valid.s b/llvm/test/MC/RISCV/rv32zalrsc-valid.s index 0d4881a4b45a7..f59a4df0d6676 100644 --- a/llvm/test/MC/RISCV/rv32zalrsc-valid.s +++ b/llvm/test/MC/RISCV/rv32zalrsc-valid.s @@ -8,6 +8,16 @@ # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+a < %s \ # RUN: | llvm-objdump --mattr=+a -M no-aliases -d -r - \ # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zalrsc -riscv-no-aliases -show-encoding \ +# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zalrsc -riscv-no-aliases -show-encoding \ +# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zalrsc < %s \ +# RUN: | llvm-objdump --mattr=+experimental-zalrsc -M no-aliases -d -r - \ +# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zalrsc < %s \ +# RUN: | llvm-objdump --mattr=+experimental-zalrsc -M no-aliases -d -r - \ +# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # CHECK-ASM-AND-OBJ: lr.w t0, (t1) # CHECK-ASM: encoding: [0xaf,0x22,0x03,0x10] diff --git a/llvm/test/MC/RISCV/rv64zaamo-invalid.s b/llvm/test/MC/RISCV/rv64zaamo-invalid.s index 70a4e557755ba..e00c1ec7bed72 100644 --- a/llvm/test/MC/RISCV/rv64zaamo-invalid.s +++ b/llvm/test/MC/RISCV/rv64zaamo-invalid.s @@ -1,4 +1,5 @@ # RUN: not llvm-mc -triple riscv64 -mattr=+a < %s 2>&1 | FileCheck %s +# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-zaamo < %s 2>&1 | FileCheck %s # Final operand must have parentheses amoswap.d a1, a2, a3 # CHECK: :[[@LINE]]:19: error: expected '(' or optional integer offset diff --git a/llvm/test/MC/RISCV/rv64zaamo-valid.s b/llvm/test/MC/RISCV/rv64zaamo-valid.s index 73cdc55584341..51493b97c8752 100644 --- a/llvm/test/MC/RISCV/rv64zaamo-valid.s +++ b/llvm/test/MC/RISCV/rv64zaamo-valid.s @@ -6,6 +6,15 @@ # # RUN: not llvm-mc -triple riscv32 -mattr=+a < %s 2>&1 \ # RUN: | FileCheck -check-prefix=CHECK-RV32 %s +# +# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zaamo -riscv-no-aliases -show-encoding \ +# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zaamo < %s \ +# RUN: | llvm-objdump --mattr=+experimental-zaamo -M no-aliases -d -r - \ +# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s +# +# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zaamo < %s 2>&1 \ +# RUN: | FileCheck -check-prefix=CHECK-RV32 %s # CHECK-ASM-AND-OBJ: amoswap.d a4, ra, (s0) # CHECK-ASM: encoding: [0x2f,0x37,0x14,0x08] diff --git a/llvm/test/MC/RISCV/rv64zalrsc-invalid.s b/llvm/test/MC/RISCV/rv64zalrsc-invalid.s index 0be009725ed82..e2ad2fc49139c 100644 --- a/llvm/test/MC/RISCV/rv64zalrsc-invalid.s +++ b/llvm/test/MC/RISCV/rv64zalrsc-invalid.s @@ -1,4 +1,5 @@ # RUN: not llvm-mc -triple riscv64 -mattr=+a < %s 2>&1 | FileCheck %s +# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-zalrsc < %s 2>&1 | FileCheck %s # Final operand must have parentheses lr.d a4, a5 # CHECK: :[[@LINE]]:10: error: expected '(' or optional integer offset diff --git a/llvm/test/MC/RISCV/rv64zalrsc-valid.s b/llvm/test/MC/RISCV/rv64zalrsc-valid.s index d4c87523b71c1..5f4437250d9db 100644 --- a/llvm/test/MC/RISCV/rv64zalrsc-valid.s +++ b/llvm/test/MC/RISCV/rv64zalrsc-valid.s @@ -6,6 +6,15 @@ # # RUN: not llvm-mc -triple riscv32 -mattr=+a < %s 2>&1 \ # RUN: | FileCheck -check-prefix=CHECK-RV32 %s +# +# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zalrsc -riscv-no-aliases -show-encoding \ +# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s +# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zalrsc < %s \ +# RUN: | llvm-objdump --mattr=+experimental-zalrsc -M no-aliases -d -r - \ +# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s +# +# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zalrsc < %s 2>&1 \ +# RUN: | FileCheck -check-prefix=CHECK-RV32 %s # CHECK-ASM-AND-OBJ: lr.d t0, (t1) # CHECK-ASM: encoding: [0xaf,0x32,0x03,0x10] diff --git a/llvm/unittests/Support/RISCVISAInfoTest.cpp b/llvm/unittests/Support/RISCVISAInfoTest.cpp index 9b7112fa2bfeb..a595526dd24a9 100644 --- a/llvm/unittests/Support/RISCVISAInfoTest.cpp +++ b/llvm/unittests/Support/RISCVISAInfoTest.cpp @@ -795,7 +795,9 @@ Experimental extensions zicfiss 0.4 zicond 1.0 zimop 0.1 + zaamo 0.2 zacas 1.0 + zalrsc 0.2 zfbfmin 1.0 zcmop 0.2 ztso 0.1