diff --git a/clang/lib/Headers/CMakeLists.txt b/clang/lib/Headers/CMakeLists.txt
index 8b1e2bc4afa4d..fdd54c05eedf8 100644
--- a/clang/lib/Headers/CMakeLists.txt
+++ b/clang/lib/Headers/CMakeLists.txt
@@ -116,6 +116,8 @@ set(ppc_htm_files
   )
 
 set(riscv_files
+  riscv_bitmanip.h
+  riscv_crypto.h
   riscv_ntlh.h
   sifive_vector.h
   )
diff --git a/clang/lib/Headers/riscv_bitmanip.h b/clang/lib/Headers/riscv_bitmanip.h
new file mode 100644
index 0000000000000..1a81cc8618c97
--- /dev/null
+++ b/clang/lib/Headers/riscv_bitmanip.h
@@ -0,0 +1,179 @@
+/*===---- riscv_bitmanip.h - RISC-V Zb* intrinsics --------------------------===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===-----------------------------------------------------------------------===
+ */
+
+#ifndef __RISCV_BITMANIP_H
+#define __RISCV_BITMANIP_H
+
+#include <stdint.h>
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#if defined(__riscv_zbb)
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_orc_b_32(uint32_t __x) {
+  return __builtin_riscv_orc_b_32(__x);
+}
+
+static __inline__ unsigned __attribute__((__always_inline__, __nodebug__))
+__riscv_clz_32(uint32_t __x) {
+  return __builtin_riscv_clz_32(__x);
+}
+
+static __inline__ unsigned __attribute__((__always_inline__, __nodebug__))
+__riscv_ctz_32(uint32_t __x) {
+  return __builtin_riscv_ctz_32(__x);
+}
+
+static __inline__ unsigned __attribute__((__always_inline__, __nodebug__))
+__riscv_cpop_32(uint32_t __x) {
+  return __builtin_riscv_cpop_32(__x);
+}
+
+#if __riscv_xlen == 64
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_orc_b_64(uint64_t __x) {
+  return __builtin_riscv_orc_b_64(__x);
+}
+
+static __inline__ unsigned __attribute__((__always_inline__, __nodebug__))
+__riscv_clz_64(uint64_t __x) {
+  return __builtin_riscv_clz_64(__x);
+}
+
+static __inline__ unsigned __attribute__((__always_inline__, __nodebug__))
+__riscv_ctz_64(uint64_t __x) {
+  return __builtin_riscv_ctz_64(__x);
+}
+
+static __inline__ unsigned __attribute__((__always_inline__, __nodebug__))
+__riscv_cpop_64(uint64_t __x) {
+  return __builtin_riscv_cpop_64(__x);
+}
+#endif
+#endif // defined(__riscv_zbb)
+
+#if defined(__riscv_zbb) || defined(__riscv_zbkb)
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_rev8_32(uint32_t __x) {
+  return __builtin_bswap32(__x);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_rol_32(uint32_t __x, uint32_t __y) {
+  return __builtin_rotateleft32(__x, __y);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_ror_32(uint32_t __x, uint32_t __y) {
+  return __builtin_rotateright32(__x, __y);
+}
+
+#if __riscv_xlen == 64
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_rev8_64(uint64_t __x) {
+  return __builtin_bswap64(__x);
+}
+
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_rol_64(uint64_t __x, uint32_t __y) {
+  return __builtin_rotateleft64(__x, __y);
+}
+
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_ror_64(uint64_t __x, uint32_t __y) {
+  return __builtin_rotateright64(__x, __y);
+}
+#endif
+#endif // defined(__riscv_zbb) || defined(__riscv_zbkb)
+
+#if defined(__riscv_zbkb)
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_brev8_32(uint32_t __x) {
+  return __builtin_riscv_brev8_32(__x);
+}
+
+#if __riscv_xlen == 64
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_brev8_64(uint64_t __x) {
+  return __builtin_riscv_brev8_64(__x);
+}
+#endif
+
+#if __riscv_xlen == 32
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_unzip_32(uint32_t __x) {
+  return __builtin_riscv_unzip_32(__x);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_zip_32(uint32_t __x) {
+  return __builtin_riscv_zip_32(__x);
+}
+#endif
+#endif // defined(__riscv_zbkb)
+
+#if defined(__riscv_zbkc)
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_clmul_32(uint32_t __x, uint32_t __y) {
+  return __builtin_riscv_clmul_32(__x, __y);
+}
+
+#if __riscv_xlen == 32
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_clmulh_32(uint32_t __x, uint32_t __y) {
+  return __builtin_riscv_clmulh_32(__x, __y);
+}
+#endif
+
+#if __riscv_xlen == 64
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_clmul_64(uint64_t __x, uint64_t __y) {
+  return __builtin_riscv_clmul_64(__x, __y);
+}
+
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_clmulh_64(uint64_t __x, uint64_t __y) {
+  return __builtin_riscv_clmulh_64(__x, __y);
+}
+#endif
+#endif // defined(__riscv_zbkc)
+
+#if defined(__riscv_zbkx)
+#if __riscv_xlen == 32
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_xperm4_32(uint32_t __x, uint32_t __y) {
+  return __builtin_riscv_xperm4_32(__x, __y);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_xperm8_32(uint32_t __x, uint32_t __y) {
+  return __builtin_riscv_xperm8_32(__x, __y);
+}
+#endif
+
+#if __riscv_xlen == 64
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_xperm4_64(uint64_t __x, uint64_t __y) {
+  return __builtin_riscv_xperm4_64(__x, __y);
+}
+
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_xperm8_64(uint64_t __x, uint64_t __y) {
+  return __builtin_riscv_xperm8_64(__x, __y);
+}
+#endif
+#endif // defined(__riscv_zbkx)
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif
diff --git a/clang/lib/Headers/riscv_crypto.h b/clang/lib/Headers/riscv_crypto.h
new file mode 100644
index 0000000000000..39ee0898af0ff
--- /dev/null
+++ b/clang/lib/Headers/riscv_crypto.h
@@ -0,0 +1,180 @@
+/*===---- riscv_crypto.h - RISC-V Zk* intrinsics ---------------------------===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===-----------------------------------------------------------------------===
+ */
+
+#ifndef __RISCV_CRYPTO_H
+#define __RISCV_CRYPTO_H
+
+#include <stdint.h>
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#if defined(__riscv_zknd)
+#if __riscv_xlen == 32
+#define __riscv_aes32dsi(x, y, bs) __builtin_riscv_aes32dsi(x, y, bs)
+#define __riscv_aes32dsmi(x, y, bs) __builtin_riscv_aes32dsmi(x, y, bs)
+#endif
+
+#if __riscv_xlen == 64
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_aes64ds(uint64_t __x, uint64_t __y) {
+  return __builtin_riscv_aes64ds(__x, __y);
+}
+
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_aes64dsm(uint64_t __x, uint64_t __y) {
+  return __builtin_riscv_aes64dsm(__x, __y);
+}
+
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_aes64im(uint64_t __x) {
+  return __builtin_riscv_aes64im(__x);
+}
+#endif
+#endif // defined(__riscv_zknd)
+
+#if defined(__riscv_zkne)
+#if __riscv_xlen == 32
+#define __riscv_aes32esi(x, y, bs) __builtin_riscv_aes32esi(x, y, bs)
+#define __riscv_aes32esmi(x, y, bs) __builtin_riscv_aes32esmi(x, y, bs)
+#endif
+
+#if __riscv_xlen == 64
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_aes64es(uint64_t __x, uint64_t __y) {
+  return __builtin_riscv_aes64es(__x, __y);
+}
+
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_aes64esm(uint64_t __x, uint64_t __y) {
+  return __builtin_riscv_aes64esm(__x, __y);
+}
+#endif
+#endif // defined(__riscv_zknd)
+
+#if defined(__riscv_zknd) || defined(__riscv_zkne)
+#if __riscv_xlen == 64
+#define __riscv_aes64ks1i(x, rnum) __builtin_riscv_aes64ks1i(x, rnum)
+
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_aes64ks2(uint64_t __x, uint64_t __y) {
+  return __builtin_riscv_aes64ks2(__x, __y);
+}
+#endif
+#endif // defined(__riscv_zknd) || defined(__riscv_zkne)
+
+#if defined(__riscv_zknh)
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha256sig0(uint32_t __x) {
+  return __builtin_riscv_sha256sig0(__x);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha256sig1(uint32_t __x) {
+  return __builtin_riscv_sha256sig1(__x);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha256sum0(uint32_t __x) {
+  return __builtin_riscv_sha256sum0(__x);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha256sum1(uint32_t __x) {
+  return __builtin_riscv_sha256sum1(__x);
+}
+
+#if __riscv_xlen == 32
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha512sig0h(uint32_t __x, uint32_t __y) {
+  return __builtin_riscv_sha512sig0h(__x, __y);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha512sig0l(uint32_t __x, uint32_t __y) {
+  return __builtin_riscv_sha512sig0l(__x, __y);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha512sig1h(uint32_t __x, uint32_t __y) {
+  return __builtin_riscv_sha512sig1h(__x, __y);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha512sig1l(uint32_t __x, uint32_t __y) {
+  return __builtin_riscv_sha512sig1l(__x, __y);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha512sum0l(uint32_t __x, uint32_t __y) {
+  return __builtin_riscv_sha512sum0l(__x, __y);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha512sum0r(uint32_t __x, uint32_t __y) {
+  return __builtin_riscv_sha512sum0r(__x, __y);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha512sum1l(uint32_t __x, uint32_t __y) {
+  return __builtin_riscv_sha512sum1l(__x, __y);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha512sum1r(uint32_t __x, uint32_t __y) {
+  return __builtin_riscv_sha512sum1r(__x, __y);
+}
+#endif
+
+#if __riscv_xlen == 64
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha512sig0(uint64_t __x) {
+  return __builtin_riscv_sha512sig0(__x);
+}
+
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha512sig1(uint64_t __x) {
+  return __builtin_riscv_sha512sig1(__x);
+}
+
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha512sum0(uint64_t __x) {
+  return __builtin_riscv_sha512sum0(__x);
+}
+
+static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sha512sum1(uint64_t __x) {
+  return __builtin_riscv_sha512sum1(__x);
+}
+#endif
+#endif // defined(__riscv_zknh)
+
+#if defined(__riscv_zksh)
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sm3p0(uint32_t __x) {
+  return __builtin_riscv_sm3p0(__x);
+}
+
+static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+__riscv_sm3p1(uint32_t __x) {
+  return __builtin_riscv_sm3p1(__x);
+}
+#endif // defined(__riscv_zksh)
+
+#if defined(__riscv_zksed)
+#define __riscv_sm4ed(x, y, bs) __builtin_riscv_sm4ed(x, y, bs);
+#define __riscv_sm4ks(x, y, bs) __builtin_riscv_sm4ks(x, y, bs);
+#endif // defined(__riscv_zksh)
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif
diff --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/zbkb.c b/clang/test/CodeGen/RISCV/rvb-intrinsics/zbkb.c
index 9be7cc6a0fb7e..a27a543bd2ae6 100644
--- a/clang/test/CodeGen/RISCV/rvb-intrinsics/zbkb.c
+++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/zbkb.c
@@ -6,7 +6,7 @@
 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
 // RUN:     | FileCheck %s  -check-prefix=RV64ZBKB
 
-#include <stdint.h>
+#include <riscv_bitmanip.h>
 
 // RV32ZBKB-LABEL: @brev8_32(
 // RV32ZBKB-NEXT:  entry:
@@ -20,7 +20,7 @@
 //
 uint32_t brev8_32(uint32_t rs1)
 {
-  return __builtin_riscv_brev8_32(rs1);
+  return __riscv_brev8_32(rs1);
 }
 
 #if __riscv_xlen == 64
@@ -31,7 +31,7 @@ uint32_t brev8_32(uint32_t rs1)
 //
 uint64_t brev8_64(uint64_t rs1)
 {
-  return __builtin_riscv_brev8_64(rs1);
+  return __riscv_brev8_64(rs1);
 }
 #endif
 
@@ -43,7 +43,7 @@ uint64_t brev8_64(uint64_t rs1)
 //
 uint32_t zip(uint32_t rs1)
 {
-  return __builtin_riscv_zip_32(rs1);
+  return __riscv_zip_32(rs1);
 }
 
 // RV32ZBKB-LABEL: @unzip(
@@ -53,6 +53,6 @@ uint32_t zip(uint32_t rs1)
 //
 uint32_t unzip(uint32_t rs1)
 {
-  return __builtin_riscv_unzip_32(rs1);
+  return __riscv_unzip_32(rs1);
 }
 #endif
diff --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/zbkc.c b/clang/test/CodeGen/RISCV/rvb-intrinsics/zbkc.c
index ca09f899f9af6..38d168d4f6334 100644
--- a/clang/test/CodeGen/RISCV/rvb-intrinsics/zbkc.c
+++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/zbkc.c
@@ -6,7 +6,7 @@
 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
 // RUN:     | FileCheck %s  -check-prefix=RV64ZBKC
 
-#include <stdint.h>
+#include <riscv_bitmanip.h>
 
 #if __riscv_xlen == 64
 // RV64ZBKC-LABEL: @clmul_64(
@@ -15,7 +15,7 @@
 // RV64ZBKC-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t clmul_64(uint64_t a, uint64_t b) {
-  return __builtin_riscv_clmul_64(a, b);
+  return __riscv_clmul_64(a, b);
 }
 
 // RV64ZBKC-LABEL: @clmulh_64(
@@ -24,7 +24,7 @@ uint64_t clmul_64(uint64_t a, uint64_t b) {
 // RV64ZBKC-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t clmulh_64(uint64_t a, uint64_t b) {
-  return __builtin_riscv_clmulh_64(a, b);
+  return __riscv_clmulh_64(a, b);
 }
 #endif
 
@@ -39,7 +39,7 @@ uint64_t clmulh_64(uint64_t a, uint64_t b) {
 // RV64ZBKC-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t clmul_32(uint32_t a, uint32_t b) {
-  return __builtin_riscv_clmul_32(a, b);
+  return __riscv_clmul_32(a, b);
 }
 
 #if __riscv_xlen == 32
@@ -49,6 +49,6 @@ uint32_t clmul_32(uint32_t a, uint32_t b) {
 // RV32ZBKC-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t clmulh_32(uint32_t a, uint32_t b) {
-  return __builtin_riscv_clmulh_32(a, b);
+  return __riscv_clmulh_32(a, b);
 }
 #endif
diff --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/zbkx.c b/clang/test/CodeGen/RISCV/rvb-intrinsics/zbkx.c
index 1eeb2cc8582c6..9010a7947d435 100644
--- a/clang/test/CodeGen/RISCV/rvb-intrinsics/zbkx.c
+++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/zbkx.c
@@ -6,7 +6,7 @@
 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
 // RUN:     | FileCheck %s  -check-prefix=RV64ZBKX
 
-#include <stdint.h>
+#include <riscv_bitmanip.h>
 
 #if __riscv_xlen == 32
 // RV32ZBKX-LABEL: @xperm8_32(
@@ -16,7 +16,7 @@
 //
 uint32_t xperm8_32(uint32_t rs1, uint32_t rs2)
 {
-  return __builtin_riscv_xperm8_32(rs1, rs2);
+  return __riscv_xperm8_32(rs1, rs2);
 }
 
 // RV32ZBKX-LABEL: @xperm4_32(
@@ -26,7 +26,7 @@ uint32_t xperm8_32(uint32_t rs1, uint32_t rs2)
 //
 uint32_t xperm4_32(uint32_t rs1, uint32_t rs2)
 {
-  return __builtin_riscv_xperm4_32(rs1, rs2);
+  return __riscv_xperm4_32(rs1, rs2);
 }
 #endif
 
@@ -38,7 +38,7 @@ uint32_t xperm4_32(uint32_t rs1, uint32_t rs2)
 //
 uint64_t xperm8_64(uint64_t rs1, uint64_t rs2)
 {
-  return __builtin_riscv_xperm8_64(rs1, rs2);
+  return __riscv_xperm8_64(rs1, rs2);
 }
 
 // RV64ZBKX-LABEL: @xperm4_64(
@@ -48,6 +48,6 @@ uint64_t xperm8_64(uint64_t rs1, uint64_t rs2)
 //
 uint64_t xperm4_64(uint64_t rs1, uint64_t rs2)
 {
-  return __builtin_riscv_xperm4_64(rs1, rs2);
+  return __riscv_xperm4_64(rs1, rs2);
 }
 #endif
diff --git a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zknd.c b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zknd.c
index b2da68e8604a9..8b6e1f1673b69 100644
--- a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zknd.c
+++ b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zknd.c
@@ -3,7 +3,7 @@
 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
 // RUN:     | FileCheck %s  -check-prefix=RV32ZKND
 
-#include <stdint.h>
+#include <riscv_crypto.h>
 
 // RV32ZKND-LABEL: @aes32dsi(
 // RV32ZKND-NEXT:  entry:
@@ -11,7 +11,7 @@
 // RV32ZKND-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t aes32dsi(uint32_t rs1, uint32_t rs2) {
-  return __builtin_riscv_aes32dsi(rs1, rs2, 3);
+  return __riscv_aes32dsi(rs1, rs2, 3);
 }
 
 // RV32ZKND-LABEL: @aes32dsmi(
@@ -20,5 +20,5 @@ uint32_t aes32dsi(uint32_t rs1, uint32_t rs2) {
 // RV32ZKND-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t aes32dsmi(uint32_t rs1, uint32_t rs2) {
-  return __builtin_riscv_aes32dsmi(rs1, rs2, 3);
+  return __riscv_aes32dsmi(rs1, rs2, 3);
 }
diff --git a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zkne.c b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zkne.c
index 8f906e094c724..578614e84f824 100644
--- a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zkne.c
+++ b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zkne.c
@@ -3,7 +3,7 @@
 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
 // RUN:     | FileCheck %s  -check-prefix=RV32ZKNE
 
-#include <stdint.h>
+#include <riscv_crypto.h>
 
 // RV32ZKNE-LABEL: @aes32esi(
 // RV32ZKNE-NEXT:  entry:
@@ -11,7 +11,7 @@
 // RV32ZKNE-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t aes32esi(uint32_t rs1, uint32_t rs2) {
-  return __builtin_riscv_aes32esi(rs1, rs2, 3);
+  return __riscv_aes32esi(rs1, rs2, 3);
 }
 
 // RV32ZKNE-LABEL: @aes32esmi(
@@ -20,5 +20,5 @@ uint32_t aes32esi(uint32_t rs1, uint32_t rs2) {
 // RV32ZKNE-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t aes32esmi(uint32_t rs1, uint32_t rs2) {
-  return __builtin_riscv_aes32esmi(rs1, rs2, 3);
+  return __riscv_aes32esmi(rs1, rs2, 3);
 }
diff --git a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zknh.c b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zknh.c
index 9bb320b093f3c..7f4740a06ce9d 100644
--- a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zknh.c
+++ b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zknh.c
@@ -3,7 +3,7 @@
 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
 // RUN:     | FileCheck %s  -check-prefix=RV32ZKNH
 
-#include <stdint.h>
+#include <riscv_crypto.h>
 
 // RV32ZKNH-LABEL: @sha256sig0(
 // RV32ZKNH-NEXT:  entry:
@@ -11,7 +11,7 @@
 // RV32ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha256sig0(uint32_t rs1) {
-  return __builtin_riscv_sha256sig0(rs1);
+  return __riscv_sha256sig0(rs1);
 }
 
 // RV32ZKNH-LABEL: @sha256sig1(
@@ -20,7 +20,7 @@ uint32_t sha256sig0(uint32_t rs1) {
 // RV32ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha256sig1(uint32_t rs1) {
-  return __builtin_riscv_sha256sig1(rs1);
+  return __riscv_sha256sig1(rs1);
 }
 
 // RV32ZKNH-LABEL: @sha256sum0(
@@ -29,7 +29,7 @@ uint32_t sha256sig1(uint32_t rs1) {
 // RV32ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha256sum0(uint32_t rs1) {
-  return __builtin_riscv_sha256sum0(rs1);
+  return __riscv_sha256sum0(rs1);
 }
 
 // RV32ZKNH-LABEL: @sha256sum1(
@@ -38,7 +38,7 @@ uint32_t sha256sum0(uint32_t rs1) {
 // RV32ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha256sum1(uint32_t rs1) {
-  return __builtin_riscv_sha256sum1(rs1);
+  return __riscv_sha256sum1(rs1);
 }
 
 // RV32ZKNH-LABEL: @sha512sig0h(
@@ -47,7 +47,7 @@ uint32_t sha256sum1(uint32_t rs1) {
 // RV32ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha512sig0h(uint32_t rs1, uint32_t rs2) {
-  return __builtin_riscv_sha512sig0h(rs1, rs2);
+  return __riscv_sha512sig0h(rs1, rs2);
 }
 
 // RV32ZKNH-LABEL: @sha512sig0l(
@@ -56,7 +56,7 @@ uint32_t sha512sig0h(uint32_t rs1, uint32_t rs2) {
 // RV32ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha512sig0l(uint32_t rs1, uint32_t rs2) {
-  return __builtin_riscv_sha512sig0l(rs1, rs2);
+  return __riscv_sha512sig0l(rs1, rs2);
 }
 
 // RV32ZKNH-LABEL: @sha512sig1h(
@@ -65,7 +65,7 @@ uint32_t sha512sig0l(uint32_t rs1, uint32_t rs2) {
 // RV32ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha512sig1h(uint32_t rs1, uint32_t rs2) {
-  return __builtin_riscv_sha512sig1h(rs1, rs2);
+  return __riscv_sha512sig1h(rs1, rs2);
 }
 
 // RV32ZKNH-LABEL: @sha512sig1l(
@@ -74,7 +74,7 @@ uint32_t sha512sig1h(uint32_t rs1, uint32_t rs2) {
 // RV32ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha512sig1l(uint32_t rs1, uint32_t rs2) {
-  return __builtin_riscv_sha512sig1l(rs1, rs2);
+  return __riscv_sha512sig1l(rs1, rs2);
 }
 
 // RV32ZKNH-LABEL: @sha512sum0r(
@@ -83,7 +83,7 @@ uint32_t sha512sig1l(uint32_t rs1, uint32_t rs2) {
 // RV32ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha512sum0r(uint32_t rs1, uint32_t rs2) {
-  return __builtin_riscv_sha512sum0r(rs1, rs2);
+  return __riscv_sha512sum0r(rs1, rs2);
 }
 
 // RV32ZKNH-LABEL: @sha512sum1r(
@@ -92,5 +92,5 @@ uint32_t sha512sum0r(uint32_t rs1, uint32_t rs2) {
 // RV32ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha512sum1r(uint32_t rs1, uint32_t rs2) {
-  return __builtin_riscv_sha512sum1r(rs1, rs2);
+  return __riscv_sha512sum1r(rs1, rs2);
 }
diff --git a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknd-zkne.c b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknd-zkne.c
index a008ce36f1b7b..7f18e732ee41c 100644
--- a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknd-zkne.c
+++ b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknd-zkne.c
@@ -6,7 +6,7 @@
 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
 // RUN:     | FileCheck %s  -check-prefix=RV64ZKND-ZKNE
 
-#include <stdint.h>
+#include <riscv_crypto.h>
 
 // RV64ZKND-ZKNE-LABEL: @aes64ks1i(
 // RV64ZKND-ZKNE-NEXT:  entry:
@@ -14,7 +14,7 @@
 // RV64ZKND-ZKNE-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t aes64ks1i(uint64_t rs1) {
-  return __builtin_riscv_aes64ks1i(rs1, 0);
+  return __riscv_aes64ks1i(rs1, 0);
 }
 
 // RV64ZKND-ZKNE-LABEL: @aes64ks2(
@@ -23,5 +23,5 @@ uint64_t aes64ks1i(uint64_t rs1) {
 // RV64ZKND-ZKNE-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t aes64ks2(uint64_t rs1, uint64_t rs2) {
-  return __builtin_riscv_aes64ks2(rs1, rs2);
+  return __riscv_aes64ks2(rs1, rs2);
 }
diff --git a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknd.c b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknd.c
index a42555fe9ac6a..40ac72169f669 100644
--- a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknd.c
+++ b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknd.c
@@ -3,7 +3,7 @@
 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
 // RUN:     | FileCheck %s  -check-prefix=RV64ZKND
 
-#include <stdint.h>
+#include <riscv_crypto.h>
 
 // RV64ZKND-LABEL: @aes64dsm(
 // RV64ZKND-NEXT:  entry:
@@ -11,7 +11,7 @@
 // RV64ZKND-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t aes64dsm(uint64_t rs1, uint64_t rs2) {
-  return __builtin_riscv_aes64dsm(rs1, rs2);
+  return __riscv_aes64dsm(rs1, rs2);
 }
 
 
@@ -21,7 +21,7 @@ uint64_t aes64dsm(uint64_t rs1, uint64_t rs2) {
 // RV64ZKND-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t aes64ds(uint64_t rs1, uint64_t rs2) {
-  return __builtin_riscv_aes64ds(rs1, rs2);
+  return __riscv_aes64ds(rs1, rs2);
 }
 
 
@@ -31,5 +31,5 @@ uint64_t aes64ds(uint64_t rs1, uint64_t rs2) {
 // RV64ZKND-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t aes64im(uint64_t rs1) {
-  return __builtin_riscv_aes64im(rs1);
+  return __riscv_aes64im(rs1);
 }
diff --git a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zkne.c b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zkne.c
index 49f9de21f24dc..096b2b759aac7 100644
--- a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zkne.c
+++ b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zkne.c
@@ -3,7 +3,7 @@
 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
 // RUN:     | FileCheck %s  -check-prefix=RV64ZKNE
 
-#include <stdint.h>
+#include <riscv_crypto.h>
 
 // RV64ZKNE-LABEL: @aes64es(
 // RV64ZKNE-NEXT:  entry:
@@ -11,7 +11,7 @@
 // RV64ZKNE-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t aes64es(uint64_t rs1, uint64_t rs2) {
-  return __builtin_riscv_aes64es(rs1, rs2);
+  return __riscv_aes64es(rs1, rs2);
 }
 
 
@@ -21,5 +21,5 @@ uint64_t aes64es(uint64_t rs1, uint64_t rs2) {
 // RV64ZKNE-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t aes64esm(uint64_t rs1, uint64_t rs2) {
-  return __builtin_riscv_aes64esm(rs1, rs2);
+  return __riscv_aes64esm(rs1, rs2);
 }
diff --git a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknh.c b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknh.c
index 83326a70591a3..a2ac4881854a6 100644
--- a/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknh.c
+++ b/clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknh.c
@@ -3,7 +3,7 @@
 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
 // RUN:     | FileCheck %s  -check-prefix=RV64ZKNH
 
-#include <stdint.h>
+#include <riscv_crypto.h>
 
 // RV64ZKNH-LABEL: @sha512sig0(
 // RV64ZKNH-NEXT:  entry:
@@ -11,7 +11,7 @@
 // RV64ZKNH-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t sha512sig0(uint64_t rs1) {
-  return __builtin_riscv_sha512sig0(rs1);
+  return __riscv_sha512sig0(rs1);
 }
 
 
@@ -21,7 +21,7 @@ uint64_t sha512sig0(uint64_t rs1) {
 // RV64ZKNH-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t sha512sig1(uint64_t rs1) {
-  return __builtin_riscv_sha512sig1(rs1);
+  return __riscv_sha512sig1(rs1);
 }
 
 
@@ -31,7 +31,7 @@ uint64_t sha512sig1(uint64_t rs1) {
 // RV64ZKNH-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t sha512sum0(uint64_t rs1) {
-  return __builtin_riscv_sha512sum0(rs1);
+  return __riscv_sha512sum0(rs1);
 }
 
 
@@ -41,7 +41,7 @@ uint64_t sha512sum0(uint64_t rs1) {
 // RV64ZKNH-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t sha512sum1(uint64_t rs1) {
-  return __builtin_riscv_sha512sum1(rs1);
+  return __riscv_sha512sum1(rs1);
 }
 
 
@@ -51,7 +51,7 @@ uint64_t sha512sum1(uint64_t rs1) {
 // RV64ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha256sig0(uint32_t rs1) {
-  return __builtin_riscv_sha256sig0(rs1);
+  return __riscv_sha256sig0(rs1);
 }
 
 // RV64ZKNH-LABEL: @sha256sig1(
@@ -60,7 +60,7 @@ uint32_t sha256sig0(uint32_t rs1) {
 // RV64ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha256sig1(uint32_t rs1) {
-  return __builtin_riscv_sha256sig1(rs1);
+  return __riscv_sha256sig1(rs1);
 }
 
 
@@ -70,7 +70,7 @@ uint32_t sha256sig1(uint32_t rs1) {
 // RV64ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha256sum0(uint32_t rs1) {
-  return __builtin_riscv_sha256sum0(rs1);
+  return __riscv_sha256sum0(rs1);
 }
 
 // RV64ZKNH-LABEL: @sha256sum1(
@@ -79,5 +79,5 @@ uint32_t sha256sum0(uint32_t rs1) {
 // RV64ZKNH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sha256sum1(uint32_t rs1) {
-  return __builtin_riscv_sha256sum1(rs1);
+  return __riscv_sha256sum1(rs1);
 }
diff --git a/clang/test/CodeGen/RISCV/rvk-intrinsics/zksed.c b/clang/test/CodeGen/RISCV/rvk-intrinsics/zksed.c
index 40651f5cc4ced..bce650c880052 100644
--- a/clang/test/CodeGen/RISCV/rvk-intrinsics/zksed.c
+++ b/clang/test/CodeGen/RISCV/rvk-intrinsics/zksed.c
@@ -6,7 +6,7 @@
 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
 // RUN:     | FileCheck %s  -check-prefix=RV64ZKSED
 
-#include <stdint.h>
+#include <riscv_crypto.h>
 
 // RV32ZKSED-LABEL: @sm4ks(
 // RV32ZKSED-NEXT:  entry:
@@ -19,7 +19,7 @@
 // RV64ZKSED-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sm4ks(uint32_t rs1, uint32_t rs2) {
-  return __builtin_riscv_sm4ks(rs1, rs2, 0);
+  return __riscv_sm4ks(rs1, rs2, 0);
 }
 
 // RV32ZKSED-LABEL: @sm4ed(
@@ -33,5 +33,5 @@ uint32_t sm4ks(uint32_t rs1, uint32_t rs2) {
 // RV64ZKSED-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sm4ed(uint32_t rs1, uint32_t rs2) {
-  return __builtin_riscv_sm4ed(rs1, rs2, 0);
+  return __riscv_sm4ed(rs1, rs2, 0);
 }
diff --git a/clang/test/CodeGen/RISCV/rvk-intrinsics/zksh.c b/clang/test/CodeGen/RISCV/rvk-intrinsics/zksh.c
index 3df0f5dca0ba6..edc602e9902fb 100644
--- a/clang/test/CodeGen/RISCV/rvk-intrinsics/zksh.c
+++ b/clang/test/CodeGen/RISCV/rvk-intrinsics/zksh.c
@@ -6,7 +6,7 @@
 // RUN:     -disable-O0-optnone | opt -S -passes=mem2reg \
 // RUN:     | FileCheck %s  -check-prefix=RV64ZKSH
 
-#include <stdint.h>
+#include <riscv_crypto.h>
 
 // RV32ZKSH-LABEL: @sm3p0(
 // RV32ZKSH-NEXT:  entry:
@@ -19,7 +19,7 @@
 // RV64ZKSH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sm3p0(uint32_t rs1) {
-  return __builtin_riscv_sm3p0(rs1);
+  return __riscv_sm3p0(rs1);
 }
 
 
@@ -34,5 +34,5 @@ uint32_t sm3p0(uint32_t rs1) {
 // RV64ZKSH-NEXT:    ret i32 [[TMP0]]
 //
 uint32_t sm3p1(uint32_t rs1) {
-  return __builtin_riscv_sm3p1(rs1);
+  return __riscv_sm3p1(rs1);
 }
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 507cdd2298850..2c663932f8f8c 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -130,6 +130,7 @@ Changes to the RISC-V Backend
 
 * The Zfa extension version was upgraded to 1.0 and is no longer experimental.
 * Zihintntl extension version was upgraded to 1.0 and is no longer experimental.
+* Intrinsics were added for Zk*, Zbb, and Zbc. See https://github.com/riscv-non-isa/riscv-c-api-doc/blob/master/riscv-c-api.md#scalar-bit-manipulation-extension-intrinsics
 
 Changes to the WebAssembly Backend
 ----------------------------------