diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h index 805b963a7a13c..44aa886b61b6d 100644 --- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h +++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h @@ -268,7 +268,7 @@ inline constexpr ExtensionInfo Extensions[] = { {"sha3", AArch64::AEK_SHA3, "+sha3", "-sha3", FEAT_SHA3, "+sha3,+sha2,+fp-armv8,+neon", 140}, {"simd", AArch64::AEK_SIMD, "+neon", "-neon", FEAT_SIMD, "+fp-armv8,+neon", 100}, {"sm4", AArch64::AEK_SM4, "+sm4", "-sm4", FEAT_SM4, "+sm4,+fp-armv8,+neon", 106}, - {"sme-f16f16", AArch64::AEK_SMEF16F16, "+sme-f16f16", "-sme-f16f16", FEAT_INIT, "", 0}, + {"sme-f16f16", AArch64::AEK_SMEF16F16, "+sme-f16f16", "-sme-f16f16", FEAT_INIT, "+sme2,+sme-f16f16", 0}, {"sme-f64f64", AArch64::AEK_SMEF64F64, "+sme-f64f64", "-sme-f64f64", FEAT_SME_F64, "+sme,+sme-f64f64,+bf16", 560}, {"sme-i16i64", AArch64::AEK_SMEI16I64, "+sme-i16i64", "-sme-i16i64", FEAT_SME_I64, "+sme,+sme-i16i64,+bf16", 570}, {"sme", AArch64::AEK_SME, "+sme", "-sme", FEAT_SME, "+sme,+bf16", 430}, @@ -302,7 +302,7 @@ inline constexpr ExtensionInfo Extensions[] = { {"ssve-fp8dot4", AArch64::AEK_SSVE_FP8DOT4, "+ssve-fp8dot4", "-ssve-fp8dot4", FEAT_INIT, "+sme2", 0}, {"lut", AArch64::AEK_LUT, "+lut", "-lut", FEAT_INIT, "", 0}, {"sme-lutv2", AArch64::AEK_SME_LUTv2, "+sme-lutv2", "-sme-lutv2", FEAT_INIT, "", 0}, - {"sme-f8f16", AArch64::AEK_SMEF8F16, "+sme-f8f16", "-sme-f8f16", FEAT_INIT, "+sme2,+fp8", 0}, + {"sme-f8f16", AArch64::AEK_SMEF8F16, "+sme-f8f16", "-sme-f8f16", FEAT_INIT, "+fp8,+sme2", 0}, {"sme-f8f32", AArch64::AEK_SMEF8F32, "+sme-f8f32", "-sme-f8f32", FEAT_INIT, "+sme2,+fp8", 0}, {"sme-fa64", AArch64::AEK_SMEFA64, "+sme-fa64", "-sme-fa64", FEAT_INIT, "", 0}, {"cpa", AArch64::AEK_CPA, "+cpa", "-cpa", FEAT_INIT, "", 0}, diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index f2f1c93ea225c..4b2ce0d73949c 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -76,7 +76,7 @@ def SME2p1Unsupported : AArch64Unsupported; def SME2Unsupported : AArch64Unsupported { let F = !listconcat([HasSME2, HasSVE2orSME2, HasSVE2p1_or_HasSME2, HasSSVE_FP8FMA, - HasSMEF8F16, HasSMEF8F32], + HasSMEF8F16, HasSMEF8F32, HasSMEF16F16orSMEF8F16], SME2p1Unsupported.F); } diff --git a/llvm/lib/Target/AArch64/AArch64Features.td b/llvm/lib/Target/AArch64/AArch64Features.td index efda45a72ef42..3a3751a85afd1 100644 --- a/llvm/lib/Target/AArch64/AArch64Features.td +++ b/llvm/lib/Target/AArch64/AArch64Features.td @@ -505,15 +505,15 @@ def FeatureSMEF64F64 : SubtargetFeature<"sme-f64f64", "HasSMEF64F64", "true", def FeatureSMEI16I64 : SubtargetFeature<"sme-i16i64", "HasSMEI16I64", "true", "Enable Scalable Matrix Extension (SME) I16I64 instructions (FEAT_SME_I16I64)", [FeatureSME]>; -def FeatureSMEF16F16 : SubtargetFeature<"sme-f16f16", "HasSMEF16F16", "true", - "Enable SME2.1 non-widening Float16 instructions (FEAT_SME_F16F16)", []>; - def FeatureSMEFA64 : SubtargetFeature<"sme-fa64", "HasSMEFA64", "true", "Enable the full A64 instruction set in streaming SVE mode (FEAT_SME_FA64)", [FeatureSME, FeatureSVE2]>; def FeatureSME2 : SubtargetFeature<"sme2", "HasSME2", "true", "Enable Scalable Matrix Extension 2 (SME2) instructions", [FeatureSME]>; +def FeatureSMEF16F16 : SubtargetFeature<"sme-f16f16", "HasSMEF16F16", "true", + "Enable SME non-widening Float16 instructions (FEAT_SME_F16F16)", [FeatureSME2]>; + def FeatureSME2p1 : SubtargetFeature<"sme2p1", "HasSME2p1", "true", "Enable Scalable Matrix Extension 2.1 (FEAT_SME2p1) instructions", [FeatureSME2]>; diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index a7abb58064a53..17d96370c04a5 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -230,6 +230,12 @@ def HasSVE2p1_or_HasSME2 def HasSVE2p1_or_HasSME2p1 : Predicate<"Subtarget->hasSVE2p1() || Subtarget->hasSME2p1()">, AssemblerPredicateWithAll<(any_of FeatureSME2p1, FeatureSVE2p1), "sme2p1 or sve2p1">; + +def HasSMEF16F16orSMEF8F16 + : Predicate<"Subtarget->hasSMEF16F16() || Subtarget->hasSMEF8F16()">, + AssemblerPredicateWithAll<(any_of FeatureSMEF16F16, FeatureSMEF8F16), + "sme-f16f16 or sme-f8f16">; + // A subset of NEON instructions are legal in Streaming SVE execution mode, // they should be enabled if either has been specified. def HasNEONorSME diff --git a/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td b/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td index 2db0fa2534345..574178c8d5244 100644 --- a/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td @@ -792,12 +792,14 @@ defm LUTI4_S_2ZTZI : sme2p1_luti4_vector_vg2_index<"luti4">; defm LUTI4_S_4ZTZI : sme2p1_luti4_vector_vg4_index<"luti4">; } -let Predicates = [HasSME2p1, HasSMEF16F16] in { +let Predicates = [HasSMEF16F16orSMEF8F16] in { defm FADD_VG2_M2Z_H : sme2_multivec_accum_add_sub_vg2<"fadd", 0b0100, MatrixOp16, ZZ_h_mul_r, nxv8f16, null_frag>; defm FADD_VG4_M4Z_H : sme2_multivec_accum_add_sub_vg4<"fadd", 0b0100, MatrixOp16, ZZZZ_h_mul_r, nxv8f16, null_frag>; defm FSUB_VG2_M2Z_H : sme2_multivec_accum_add_sub_vg2<"fsub", 0b0101, MatrixOp16, ZZ_h_mul_r, nxv8f16, null_frag>; defm FSUB_VG4_M4Z_H : sme2_multivec_accum_add_sub_vg4<"fsub", 0b0101, MatrixOp16, ZZZZ_h_mul_r, nxv8f16, null_frag>; +} +let Predicates = [HasSMEF16F16] in { defm FMLA_VG2_M2ZZI_H : sme2p1_multi_vec_array_vg2_index_16b<"fmla", 0b00, 0b100, ZZ_h_mul_r, ZPR4b16>; defm FMLA_VG4_M4ZZI_H : sme2p1_multi_vec_array_vg4_index_16b<"fmla", 0b000, ZZZZ_h_mul_r, ZPR4b16>; defm FMLA_VG2_M2ZZ_H : sme2_dot_mla_add_sub_array_vg24_single<"fmla", 0b0011100, MatrixOp16, ZZ_h, ZPR4b16>; diff --git a/llvm/test/MC/AArch64/SME2p1/fadd-diagnostics.s b/llvm/test/MC/AArch64/SME2p1/fadd-diagnostics.s index c13a1be05b1cd..a18989880a346 100644 --- a/llvm/test/MC/AArch64/SME2p1/fadd-diagnostics.s +++ b/llvm/test/MC/AArch64/SME2p1/fadd-diagnostics.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 2>&1 < %s | FileCheck %s +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 2>&1 < %s | FileCheck %s // --------------------------------------------------------------------------// // Out of range index offset diff --git a/llvm/test/MC/AArch64/SME2p1/fadd.s b/llvm/test/MC/AArch64/SME2p1/fadd.s index a8e64a63dbdb6..bdb769093c838 100644 --- a/llvm/test/MC/AArch64/SME2p1/fadd.s +++ b/llvm/test/MC/AArch64/SME2p1/fadd.s @@ -1,300 +1,302 @@ -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f8f16 < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ -// RUN: | llvm-objdump -d --mattr=+sme2p1,+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ // RUN: | llvm-objdump -d --mattr=-sme2p1 - | FileCheck %s --check-prefix=CHECK-UNKNOWN -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \ -// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2p1,+sme-f16f16 -disassemble -show-encoding \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-f16f16 -disassemble -show-encoding \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST fadd za.h[w8, 0, vgx2], {z0.h, z1.h} // 11000001-10100100-00011100-00000000 // CHECK-INST: fadd za.h[w8, 0, vgx2], { z0.h, z1.h } // CHECK-ENCODING: [0x00,0x1c,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41c00 fadd za.h[w8, 0], {z0.h - z1.h} // 11000001-10100100-00011100-00000000 // CHECK-INST: fadd za.h[w8, 0, vgx2], { z0.h, z1.h } // CHECK-ENCODING: [0x00,0x1c,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41c00 fadd za.h[w10, 5, vgx2], {z10.h, z11.h} // 11000001-10100100-01011101-01000101 // CHECK-INST: fadd za.h[w10, 5, vgx2], { z10.h, z11.h } // CHECK-ENCODING: [0x45,0x5d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a45d45 fadd za.h[w10, 5], {z10.h - z11.h} // 11000001-10100100-01011101-01000101 // CHECK-INST: fadd za.h[w10, 5, vgx2], { z10.h, z11.h } // CHECK-ENCODING: [0x45,0x5d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a45d45 fadd za.h[w11, 7, vgx2], {z12.h, z13.h} // 11000001-10100100-01111101-10000111 // CHECK-INST: fadd za.h[w11, 7, vgx2], { z12.h, z13.h } // CHECK-ENCODING: [0x87,0x7d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a47d87 fadd za.h[w11, 7], {z12.h - z13.h} // 11000001-10100100-01111101-10000111 // CHECK-INST: fadd za.h[w11, 7, vgx2], { z12.h, z13.h } // CHECK-ENCODING: [0x87,0x7d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a47d87 fadd za.h[w11, 7, vgx2], {z30.h, z31.h} // 11000001-10100100-01111111-11000111 // CHECK-INST: fadd za.h[w11, 7, vgx2], { z30.h, z31.h } // CHECK-ENCODING: [0xc7,0x7f,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a47fc7 fadd za.h[w11, 7], {z30.h - z31.h} // 11000001-10100100-01111111-11000111 // CHECK-INST: fadd za.h[w11, 7, vgx2], { z30.h, z31.h } // CHECK-ENCODING: [0xc7,0x7f,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a47fc7 fadd za.h[w8, 5, vgx2], {z16.h, z17.h} // 11000001-10100100-00011110-00000101 // CHECK-INST: fadd za.h[w8, 5, vgx2], { z16.h, z17.h } // CHECK-ENCODING: [0x05,0x1e,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41e05 fadd za.h[w8, 5], {z16.h - z17.h} // 11000001-10100100-00011110-00000101 // CHECK-INST: fadd za.h[w8, 5, vgx2], { z16.h, z17.h } // CHECK-ENCODING: [0x05,0x1e,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41e05 fadd za.h[w8, 1, vgx2], {z0.h, z1.h} // 11000001-10100100-00011100-00000001 // CHECK-INST: fadd za.h[w8, 1, vgx2], { z0.h, z1.h } // CHECK-ENCODING: [0x01,0x1c,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41c01 fadd za.h[w8, 1], {z0.h - z1.h} // 11000001-10100100-00011100-00000001 // CHECK-INST: fadd za.h[w8, 1, vgx2], { z0.h, z1.h } // CHECK-ENCODING: [0x01,0x1c,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41c01 fadd za.h[w10, 0, vgx2], {z18.h, z19.h} // 11000001-10100100-01011110, 01000000 // CHECK-INST: fadd za.h[w10, 0, vgx2], { z18.h, z19.h } // CHECK-ENCODING: [0x40,0x5e,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a45e40 fadd za.h[w10, 0], {z18.h - z19.h} // 11000001-10100100-01011110-01000000 // CHECK-INST: fadd za.h[w10, 0, vgx2], { z18.h, z19.h } // CHECK-ENCODING: [0x40,0x5e,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a45e40 fadd za.h[w8, 0, vgx2], {z12.h, z13.h} // 11000001-10100100-00011101-10000000 // CHECK-INST: fadd za.h[w8, 0, vgx2], { z12.h, z13.h } // CHECK-ENCODING: [0x80,0x1d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41d80 fadd za.h[w8, 0], {z12.h - z13.h} // 11000001-10100100-00011101-10000000 // CHECK-INST: fadd za.h[w8, 0, vgx2], { z12.h, z13.h } // CHECK-ENCODING: [0x80,0x1d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41d80 fadd za.h[w10, 1, vgx2], {z0.h, z1.h} // 11000001-10100100-01011100-00000001 // CHECK-INST: fadd za.h[w10, 1, vgx2], { z0.h, z1.h } // CHECK-ENCODING: [0x01,0x5c,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a45c01 fadd za.h[w10, 1], {z0.h - z1.h} // 11000001-10100100-01011100-00000001 // CHECK-INST: fadd za.h[w10, 1, vgx2], { z0.h, z1.h } // CHECK-ENCODING: [0x01,0x5c,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a45c01 fadd za.h[w8, 5, vgx2], {z22.h, z23.h} // 11000001-10100100-00011110, 11000101 // CHECK-INST: fadd za.h[w8, 5, vgx2], { z22.h, z23.h } // CHECK-ENCODING: [0xc5,0x1e,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41ec5 fadd za.h[w8, 5], {z22.h - z23.h} // 11000001-10100100-00011110-11000101 // CHECK-INST: fadd za.h[w8, 5, vgx2], { z22.h, z23.h } // CHECK-ENCODING: [0xc5,0x1e,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41ec5 fadd za.h[w11, 2, vgx2], {z8.h, z9.h} // 11000001-10100100-01111101-00000010 // CHECK-INST: fadd za.h[w11, 2, vgx2], { z8.h, z9.h } // CHECK-ENCODING: [0x02,0x7d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a47d02 fadd za.h[w11, 2], {z8.h - z9.h} // 11000001-10100100-01111101-00000010 // CHECK-INST: fadd za.h[w11, 2, vgx2], { z8.h, z9.h } // CHECK-ENCODING: [0x02,0x7d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a47d02 fadd za.h[w9, 7, vgx2], {z12.h, z13.h} // 11000001-10100100-00111101-10000111 // CHECK-INST: fadd za.h[w9, 7, vgx2], { z12.h, z13.h } // CHECK-ENCODING: [0x87,0x3d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a43d87 fadd za.h[w9, 7], {z12.h - z13.h} // 11000001-10100100-00111101-10000111 // CHECK-INST: fadd za.h[w9, 7, vgx2], { z12.h, z13.h } // CHECK-ENCODING: [0x87,0x3d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a43d87 fadd za.h[w8, 0, vgx4], {z0.h - z3.h} // 11000001-10100101-00011100-00000000 // CHECK-INST: fadd za.h[w8, 0, vgx4], { z0.h - z3.h } // CHECK-ENCODING: [0x00,0x1c,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51c00 fadd za.h[w8, 0], {z0.h - z3.h} // 11000001-10100101-00011100-00000000 // CHECK-INST: fadd za.h[w8, 0, vgx4], { z0.h - z3.h } // CHECK-ENCODING: [0x00,0x1c,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51c00 fadd za.h[w10, 5, vgx4], {z8.h - z11.h} // 11000001-10100101-01011101-00000101 // CHECK-INST: fadd za.h[w10, 5, vgx4], { z8.h - z11.h } // CHECK-ENCODING: [0x05,0x5d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a55d05 fadd za.h[w10, 5], {z8.h - z11.h} // 11000001-10100101-01011101-00000101 // CHECK-INST: fadd za.h[w10, 5, vgx4], { z8.h - z11.h } // CHECK-ENCODING: [0x05,0x5d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a55d05 fadd za.h[w11, 7, vgx4], {z12.h - z15.h} // 11000001-10100101-01111101-10000111 // CHECK-INST: fadd za.h[w11, 7, vgx4], { z12.h - z15.h } // CHECK-ENCODING: [0x87,0x7d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a57d87 fadd za.h[w11, 7], {z12.h - z15.h} // 11000001-10100101-01111101-10000111 // CHECK-INST: fadd za.h[w11, 7, vgx4], { z12.h - z15.h } // CHECK-ENCODING: [0x87,0x7d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a57d87 fadd za.h[w11, 7, vgx4], {z28.h - z31.h} // 11000001-10100101-01111111-10000111 // CHECK-INST: fadd za.h[w11, 7, vgx4], { z28.h - z31.h } // CHECK-ENCODING: [0x87,0x7f,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a57f87 fadd za.h[w11, 7], {z28.h - z31.h} // 11000001-10100101-01111111-10000111 // CHECK-INST: fadd za.h[w11, 7, vgx4], { z28.h - z31.h } // CHECK-ENCODING: [0x87,0x7f,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a57f87 fadd za.h[w8, 5, vgx4], {z16.h - z19.h} // 11000001-10100101-00011110-00000101 // CHECK-INST: fadd za.h[w8, 5, vgx4], { z16.h - z19.h } // CHECK-ENCODING: [0x05,0x1e,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51e05 fadd za.h[w8, 5], {z16.h - z19.h} // 11000001-10100101-00011110-00000101 // CHECK-INST: fadd za.h[w8, 5, vgx4], { z16.h - z19.h } // CHECK-ENCODING: [0x05,0x1e,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51e05 fadd za.h[w8, 1, vgx4], {z0.h - z3.h} // 11000001-10100101-00011100-00000001 // CHECK-INST: fadd za.h[w8, 1, vgx4], { z0.h - z3.h } // CHECK-ENCODING: [0x01,0x1c,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51c01 fadd za.h[w8, 1], {z0.h - z3.h} // 11000001-10100101-00011100-00000001 // CHECK-INST: fadd za.h[w8, 1, vgx4], { z0.h - z3.h } // CHECK-ENCODING: [0x01,0x1c,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51c01 fadd za.h[w10, 0, vgx4], {z16.h - z19.h} // 11000001-10100101-01011110-00000000 // CHECK-INST: fadd za.h[w10, 0, vgx4], { z16.h - z19.h } // CHECK-ENCODING: [0x00,0x5e,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a55e00 fadd za.h[w10, 0], {z16.h - z19.h} // 11000001-10100101-01011110-00000000 // CHECK-INST: fadd za.h[w10, 0, vgx4], { z16.h - z19.h } // CHECK-ENCODING: [0x00,0x5e,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a55e00 fadd za.h[w8, 0, vgx4], {z12.h - z15.h} // 11000001-10100101-00011101-10000000 // CHECK-INST: fadd za.h[w8, 0, vgx4], { z12.h - z15.h } // CHECK-ENCODING: [0x80,0x1d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51d80 fadd za.h[w8, 0], {z12.h - z15.h} // 11000001-10100101-00011101-10000000 // CHECK-INST: fadd za.h[w8, 0, vgx4], { z12.h - z15.h } // CHECK-ENCODING: [0x80,0x1d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51d80 fadd za.h[w10, 1, vgx4], {z0.h - z3.h} // 11000001-10100101-01011100-00000001 // CHECK-INST: fadd za.h[w10, 1, vgx4], { z0.h - z3.h } // CHECK-ENCODING: [0x01,0x5c,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a55c01 fadd za.h[w10, 1], {z0.h - z3.h} // 11000001-10100101-01011100-00000001 // CHECK-INST: fadd za.h[w10, 1, vgx4], { z0.h - z3.h } // CHECK-ENCODING: [0x01,0x5c,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a55c01 fadd za.h[w8, 5, vgx4], {z20.h - z23.h} // 11000001-10100101-00011110-10000101 // CHECK-INST: fadd za.h[w8, 5, vgx4], { z20.h - z23.h } // CHECK-ENCODING: [0x85,0x1e,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51e85 fadd za.h[w8, 5], {z20.h - z23.h} // 11000001-10100101-00011110-10000101 // CHECK-INST: fadd za.h[w8, 5, vgx4], { z20.h - z23.h } // CHECK-ENCODING: [0x85,0x1e,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51e85 fadd za.h[w11, 2, vgx4], {z8.h - z11.h} // 11000001-10100101-01111101-00000010 // CHECK-INST: fadd za.h[w11, 2, vgx4], { z8.h - z11.h } // CHECK-ENCODING: [0x02,0x7d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a57d02 fadd za.h[w11, 2], {z8.h - z11.h} // 11000001-10100101-01111101-00000010 // CHECK-INST: fadd za.h[w11, 2, vgx4], { z8.h - z11.h } // CHECK-ENCODING: [0x02,0x7d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a57d02 fadd za.h[w9, 7, vgx4], {z12.h - z15.h} // 11000001-10100101-00111101-10000111 // CHECK-INST: fadd za.h[w9, 7, vgx4], { z12.h - z15.h } // CHECK-ENCODING: [0x87,0x3d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a53d87 fadd za.h[w9, 7], {z12.h - z15.h} // 11000001-10100101-00111101-10000111 // CHECK-INST: fadd za.h[w9, 7, vgx4], { z12.h - z15.h } // CHECK-ENCODING: [0x87,0x3d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a53d87 diff --git a/llvm/test/MC/AArch64/SME2p1/fcvt.s b/llvm/test/MC/AArch64/SME2p1/fcvt.s index b5707bad0a24e..2731055dedec4 100644 --- a/llvm/test/MC/AArch64/SME2p1/fcvt.s +++ b/llvm/test/MC/AArch64/SME2p1/fcvt.s @@ -1,36 +1,36 @@ -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ -// RUN: | llvm-objdump -d --mattr=+sme2p1,+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ // RUN: | llvm-objdump -d --mattr=-sme2p1 - | FileCheck %s --check-prefix=CHECK-UNKNOWN -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \ -// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2p1,+sme-f16f16 -disassemble -show-encoding \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-f16f16 -disassemble -show-encoding \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST fcvt {z0.s, z1.s}, z0.h // 11000001-10100000-11100000-00000000 // CHECK-INST: fcvt { z0.s, z1.s }, z0.h // CHECK-ENCODING: [0x00,0xe0,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a0e000 fcvt {z20.s, z21.s}, z10.h // 11000001-10100000-11100001-01010100 // CHECK-INST: fcvt { z20.s, z21.s }, z10.h // CHECK-ENCODING: [0x54,0xe1,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a0e154 fcvt {z22.s, z23.s}, z13.h // 11000001-10100000-11100001-10110110 // CHECK-INST: fcvt { z22.s, z23.s }, z13.h // CHECK-ENCODING: [0xb6,0xe1,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a0e1b6 fcvt {z30.s, z31.s}, z31.h // 11000001-10100000-11100011-11111110 // CHECK-INST: fcvt { z30.s, z31.s }, z31.h // CHECK-ENCODING: [0xfe,0xe3,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a0e3fe diff --git a/llvm/test/MC/AArch64/SME2p1/fcvtl-diagnostics.s b/llvm/test/MC/AArch64/SME2p1/fcvtl-diagnostics.s index a723d2fc6f3ac..ad3eaba7bdc21 100644 --- a/llvm/test/MC/AArch64/SME2p1/fcvtl-diagnostics.s +++ b/llvm/test/MC/AArch64/SME2p1/fcvtl-diagnostics.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 2>&1 < %s | FileCheck %s +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 2>&1 < %s | FileCheck %s // --------------------------------------------------------------------------// // Invalid vector list diff --git a/llvm/test/MC/AArch64/SME2p1/fcvtl.s b/llvm/test/MC/AArch64/SME2p1/fcvtl.s index 31cf90d037969..6284915e49831 100644 --- a/llvm/test/MC/AArch64/SME2p1/fcvtl.s +++ b/llvm/test/MC/AArch64/SME2p1/fcvtl.s @@ -1,36 +1,36 @@ -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ -// RUN: | llvm-objdump -d --mattr=+sme2p1,+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ // RUN: | llvm-objdump -d --mattr=-sme2p1 - | FileCheck %s --check-prefix=CHECK-UNKNOWN -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \ -// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2p1,+sme-f16f16 -disassemble -show-encoding \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-f16f16 -disassemble -show-encoding \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST fcvtl {z0.s, z1.s}, z0.h // 11000001-10100000-11100000-00000001 // CHECK-INST: fcvtl { z0.s, z1.s }, z0.h // CHECK-ENCODING: [0x01,0xe0,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a0e001 fcvtl {z20.s, z21.s}, z10.h // 11000001-10100000-11100001-01010101 // CHECK-INST: fcvtl { z20.s, z21.s }, z10.h // CHECK-ENCODING: [0x55,0xe1,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a0e155 fcvtl {z22.s, z23.s}, z13.h // 11000001-10100000-11100001-10110111 // CHECK-INST: fcvtl { z22.s, z23.s }, z13.h // CHECK-ENCODING: [0xb7,0xe1,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a0e1b7 fcvtl {z30.s, z31.s}, z31.h // 11000001-10100000-11100011-11111111 // CHECK-INST: fcvtl { z30.s, z31.s }, z31.h // CHECK-ENCODING: [0xff,0xe3,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a0e3ff diff --git a/llvm/test/MC/AArch64/SME2p1/fmla-diagnostics.s b/llvm/test/MC/AArch64/SME2p1/fmla-diagnostics.s index d32f795728a25..2f0dccb57c907 100644 --- a/llvm/test/MC/AArch64/SME2p1/fmla-diagnostics.s +++ b/llvm/test/MC/AArch64/SME2p1/fmla-diagnostics.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 2>&1 < %s | FileCheck %s +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 2>&1 < %s | FileCheck %s // --------------------------------------------------------------------------// // Invalid vector list diff --git a/llvm/test/MC/AArch64/SME2p1/fmla.s b/llvm/test/MC/AArch64/SME2p1/fmla.s index 10529d81eed63..df9ac8076e566 100644 --- a/llvm/test/MC/AArch64/SME2p1/fmla.s +++ b/llvm/test/MC/AArch64/SME2p1/fmla.s @@ -1,877 +1,877 @@ -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ -// RUN: | llvm-objdump -d --mattr=+sme2p1,+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ // RUN: | llvm-objdump -d --mattr=-sme2p1 - | FileCheck %s --check-prefix=CHECK-UNKNOWN -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \ -// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2p1,+sme-f16f16 -disassemble -show-encoding \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-f16f16 -disassemble -show-encoding \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST fmla za.h[w8, 0, vgx2], {z0.h, z1.h}, z0.h // 11000001-00100000-00011100-00000000 // CHECK-INST: fmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h // CHECK-ENCODING: [0x00,0x1c,0x20,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1201c00 fmla za.h[w8, 0], {z0.h - z1.h}, z0.h // 11000001-00100000-00011100-00000000 // CHECK-INST: fmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h // CHECK-ENCODING: [0x00,0x1c,0x20,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1201c00 fmla za.h[w10, 5, vgx2], {z10.h, z11.h}, z5.h // 11000001-00100101-01011101-01000101 // CHECK-INST: fmla za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h // CHECK-ENCODING: [0x45,0x5d,0x25,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1255d45 fmla za.h[w10, 5], {z10.h - z11.h}, z5.h // 11000001-00100101-01011101-01000101 // CHECK-INST: fmla za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h // CHECK-ENCODING: [0x45,0x5d,0x25,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1255d45 fmla za.h[w11, 7, vgx2], {z13.h, z14.h}, z8.h // 11000001-00101000-01111101-10100111 // CHECK-INST: fmla za.h[w11, 7, vgx2], { z13.h, z14.h }, z8.h // CHECK-ENCODING: [0xa7,0x7d,0x28,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1287da7 fmla za.h[w11, 7], {z13.h - z14.h}, z8.h // 11000001-00101000-01111101-10100111 // CHECK-INST: fmla za.h[w11, 7, vgx2], { z13.h, z14.h }, z8.h // CHECK-ENCODING: [0xa7,0x7d,0x28,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1287da7 fmla za.h[w11, 7, vgx2], {z31.h, z0.h}, z15.h // 11000001-00101111-01111111-11100111 // CHECK-INST: fmla za.h[w11, 7, vgx2], { z31.h, z0.h }, z15.h // CHECK-ENCODING: [0xe7,0x7f,0x2f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12f7fe7 fmla za.h[w11, 7], {z31.h - z0.h}, z15.h // 11000001-00101111-01111111-11100111 // CHECK-INST: fmla za.h[w11, 7, vgx2], { z31.h, z0.h }, z15.h // CHECK-ENCODING: [0xe7,0x7f,0x2f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12f7fe7 fmla za.h[w8, 5, vgx2], {z17.h, z18.h}, z0.h // 11000001-00100000-00011110-00100101 // CHECK-INST: fmla za.h[w8, 5, vgx2], { z17.h, z18.h }, z0.h // CHECK-ENCODING: [0x25,0x1e,0x20,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1201e25 fmla za.h[w8, 5], {z17.h - z18.h}, z0.h // 11000001-00100000-00011110-00100101 // CHECK-INST: fmla za.h[w8, 5, vgx2], { z17.h, z18.h }, z0.h // CHECK-ENCODING: [0x25,0x1e,0x20,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1201e25 fmla za.h[w8, 1, vgx2], {z1.h, z2.h}, z14.h // 11000001-00101110-00011100-00100001 // CHECK-INST: fmla za.h[w8, 1, vgx2], { z1.h, z2.h }, z14.h // CHECK-ENCODING: [0x21,0x1c,0x2e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12e1c21 fmla za.h[w8, 1], {z1.h - z2.h}, z14.h // 11000001-00101110-00011100-00100001 // CHECK-INST: fmla za.h[w8, 1, vgx2], { z1.h, z2.h }, z14.h // CHECK-ENCODING: [0x21,0x1c,0x2e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12e1c21 fmla za.h[w10, 0, vgx2], {z19.h, z20.h}, z4.h // 11000001-00100100-01011110-01100000 // CHECK-INST: fmla za.h[w10, 0, vgx2], { z19.h, z20.h }, z4.h // CHECK-ENCODING: [0x60,0x5e,0x24,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1245e60 fmla za.h[w10, 0], {z19.h - z20.h}, z4.h // 11000001-00100100-01011110-01100000 // CHECK-INST: fmla za.h[w10, 0, vgx2], { z19.h, z20.h }, z4.h // CHECK-ENCODING: [0x60,0x5e,0x24,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1245e60 fmla za.h[w8, 0, vgx2], {z12.h, z13.h}, z2.h // 11000001-00100010-00011101-10000000 // CHECK-INST: fmla za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h // CHECK-ENCODING: [0x80,0x1d,0x22,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1221d80 fmla za.h[w8, 0], {z12.h - z13.h}, z2.h // 11000001-00100010-00011101-10000000 // CHECK-INST: fmla za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h // CHECK-ENCODING: [0x80,0x1d,0x22,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1221d80 fmla za.h[w10, 1, vgx2], {z1.h, z2.h}, z10.h // 11000001-00101010-01011100-00100001 // CHECK-INST: fmla za.h[w10, 1, vgx2], { z1.h, z2.h }, z10.h // CHECK-ENCODING: [0x21,0x5c,0x2a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12a5c21 fmla za.h[w10, 1], {z1.h - z2.h}, z10.h // 11000001-00101010-01011100-00100001 // CHECK-INST: fmla za.h[w10, 1, vgx2], { z1.h, z2.h }, z10.h // CHECK-ENCODING: [0x21,0x5c,0x2a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12a5c21 fmla za.h[w8, 5, vgx2], {z22.h, z23.h}, z14.h // 11000001-00101110-00011110-11000101 // CHECK-INST: fmla za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h // CHECK-ENCODING: [0xc5,0x1e,0x2e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12e1ec5 fmla za.h[w8, 5], {z22.h - z23.h}, z14.h // 11000001-00101110-00011110-11000101 // CHECK-INST: fmla za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h // CHECK-ENCODING: [0xc5,0x1e,0x2e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12e1ec5 fmla za.h[w11, 2, vgx2], {z9.h, z10.h}, z1.h // 11000001-00100001-01111101-00100010 // CHECK-INST: fmla za.h[w11, 2, vgx2], { z9.h, z10.h }, z1.h // CHECK-ENCODING: [0x22,0x7d,0x21,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1217d22 fmla za.h[w11, 2], {z9.h - z10.h}, z1.h // 11000001-00100001-01111101-00100010 // CHECK-INST: fmla za.h[w11, 2, vgx2], { z9.h, z10.h }, z1.h // CHECK-ENCODING: [0x22,0x7d,0x21,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1217d22 fmla za.h[w9, 7, vgx2], {z12.h, z13.h}, z11.h // 11000001-00101011-00111101-10000111 // CHECK-INST: fmla za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h // CHECK-ENCODING: [0x87,0x3d,0x2b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12b3d87 fmla za.h[w9, 7], {z12.h - z13.h}, z11.h // 11000001-00101011-00111101-10000111 // CHECK-INST: fmla za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h // CHECK-ENCODING: [0x87,0x3d,0x2b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12b3d87 fmla za.h[w8, 0, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-00010000-00010000-00000000 // CHECK-INST: fmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0] // CHECK-ENCODING: [0x00,0x10,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1101000 fmla za.h[w8, 0], {z0.h - z1.h}, z0.h[0] // 11000001-00010000-00010000-00000000 // CHECK-INST: fmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0] // CHECK-ENCODING: [0x00,0x10,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1101000 fmla za.h[w10, 5, vgx2], {z10.h, z11.h}, z5.h[2] // 11000001-00010101-01010101-01000101 // CHECK-INST: fmla za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h[2] // CHECK-ENCODING: [0x45,0x55,0x15,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1155545 fmla za.h[w10, 5], {z10.h - z11.h}, z5.h[2] // 11000001-00010101-01010101-01000101 // CHECK-INST: fmla za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h[2] // CHECK-ENCODING: [0x45,0x55,0x15,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1155545 fmla za.h[w11, 7, vgx2], {z12.h, z13.h}, z8.h[6] // 11000001-00011000-01111101-10000111 // CHECK-INST: fmla za.h[w11, 7, vgx2], { z12.h, z13.h }, z8.h[6] // CHECK-ENCODING: [0x87,0x7d,0x18,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1187d87 fmla za.h[w11, 7], {z12.h - z13.h}, z8.h[6] // 11000001-00011000-01111101-10000111 // CHECK-INST: fmla za.h[w11, 7, vgx2], { z12.h, z13.h }, z8.h[6] // CHECK-ENCODING: [0x87,0x7d,0x18,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1187d87 fmla za.h[w11, 7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-00011111-01111111-11001111 // CHECK-INST: fmla za.h[w11, 7, vgx2], { z30.h, z31.h }, z15.h[7] // CHECK-ENCODING: [0xcf,0x7f,0x1f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11f7fcf fmla za.h[w11, 7], {z30.h - z31.h}, z15.h[7] // 11000001-00011111-01111111-11001111 // CHECK-INST: fmla za.h[w11, 7, vgx2], { z30.h, z31.h }, z15.h[7] // CHECK-ENCODING: [0xcf,0x7f,0x1f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11f7fcf fmla za.h[w8, 5, vgx2], {z16.h, z17.h}, z0.h[6] // 11000001-00010000-00011110-00000101 // CHECK-INST: fmla za.h[w8, 5, vgx2], { z16.h, z17.h }, z0.h[6] // CHECK-ENCODING: [0x05,0x1e,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1101e05 fmla za.h[w8, 5], {z16.h - z17.h}, z0.h[6] // 11000001-00010000-00011110-00000101 // CHECK-INST: fmla za.h[w8, 5, vgx2], { z16.h, z17.h }, z0.h[6] // CHECK-ENCODING: [0x05,0x1e,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1101e05 fmla za.h[w8, 1, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001-00011110-00010100-00000001 // CHECK-INST: fmla za.h[w8, 1, vgx2], { z0.h, z1.h }, z14.h[2] // CHECK-ENCODING: [0x01,0x14,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e1401 fmla za.h[w8, 1], {z0.h - z1.h}, z14.h[2] // 11000001-00011110-00010100-00000001 // CHECK-INST: fmla za.h[w8, 1, vgx2], { z0.h, z1.h }, z14.h[2] // CHECK-ENCODING: [0x01,0x14,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e1401 fmla za.h[w10, 0, vgx2], {z18.h, z19.h}, z4.h[3] // 11000001-00010100-01010110-01001000 // CHECK-INST: fmla za.h[w10, 0, vgx2], { z18.h, z19.h }, z4.h[3] // CHECK-ENCODING: [0x48,0x56,0x14,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1145648 fmla za.h[w10, 0], {z18.h - z19.h}, z4.h[3] // 11000001-00010100-01010110-01001000 // CHECK-INST: fmla za.h[w10, 0, vgx2], { z18.h, z19.h }, z4.h[3] // CHECK-ENCODING: [0x48,0x56,0x14,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1145648 fmla za.h[w8, 0, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001-00010010-00011001-10000000 // CHECK-INST: fmla za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h[4] // CHECK-ENCODING: [0x80,0x19,0x12,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1121980 fmla za.h[w8, 0], {z12.h - z13.h}, z2.h[4] // 11000001-00010010-00011001-10000000 // CHECK-INST: fmla za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h[4] // CHECK-ENCODING: [0x80,0x19,0x12,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1121980 fmla za.h[w10, 1, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001-00011010-01011000-00000001 // CHECK-INST: fmla za.h[w10, 1, vgx2], { z0.h, z1.h }, z10.h[4] // CHECK-ENCODING: [0x01,0x58,0x1a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11a5801 fmla za.h[w10, 1], {z0.h - z1.h}, z10.h[4] // 11000001-00011010-01011000-00000001 // CHECK-INST: fmla za.h[w10, 1, vgx2], { z0.h, z1.h }, z10.h[4] // CHECK-ENCODING: [0x01,0x58,0x1a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11a5801 fmla za.h[w8, 5, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001-00011110-00011010-11001101 // CHECK-INST: fmla za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h[5] // CHECK-ENCODING: [0xcd,0x1a,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e1acd fmla za.h[w8, 5], {z22.h - z23.h}, z14.h[5] // 11000001-00011110-00011010-11001101 // CHECK-INST: fmla za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h[5] // CHECK-ENCODING: [0xcd,0x1a,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e1acd fmla za.h[w11, 2, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001-00010001-01110101-00000010 // CHECK-INST: fmla za.h[w11, 2, vgx2], { z8.h, z9.h }, z1.h[2] // CHECK-ENCODING: [0x02,0x75,0x11,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1117502 fmla za.h[w11, 2], {z8.h - z9.h}, z1.h[2] // 11000001-00010001-01110101-00000010 // CHECK-INST: fmla za.h[w11, 2, vgx2], { z8.h, z9.h }, z1.h[2] // CHECK-ENCODING: [0x02,0x75,0x11,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1117502 fmla za.h[w9, 7, vgx2], {z12.h, z13.h}, z11.h[4] // 11000001-00011011-00111001-10000111 // CHECK-INST: fmla za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h[4] // CHECK-ENCODING: [0x87,0x39,0x1b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11b3987 fmla za.h[w9, 7], {z12.h - z13.h}, z11.h[4] // 11000001-00011011-00111001-10000111 // CHECK-INST: fmla za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h[4] // CHECK-ENCODING: [0x87,0x39,0x1b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11b3987 fmla za.h[w8, 0, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-10100000-00010000-00001000 // CHECK-INST: fmla za.h[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h } // CHECK-ENCODING: [0x08,0x10,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a01008 fmla za.h[w8, 0], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-10100000-00010000-00001000 // CHECK-INST: fmla za.h[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h } // CHECK-ENCODING: [0x08,0x10,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a01008 fmla za.h[w10, 5, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-10110100-01010001-01001101 // CHECK-INST: fmla za.h[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h } // CHECK-ENCODING: [0x4d,0x51,0xb4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b4514d fmla za.h[w10, 5], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-10110100-01010001-01001101 // CHECK-INST: fmla za.h[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h } // CHECK-ENCODING: [0x4d,0x51,0xb4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b4514d fmla za.h[w11, 7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-10101000-01110001-10001111 // CHECK-INST: fmla za.h[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h } // CHECK-ENCODING: [0x8f,0x71,0xa8,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a8718f fmla za.h[w11, 7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-10101000-01110001-10001111 // CHECK-INST: fmla za.h[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h } // CHECK-ENCODING: [0x8f,0x71,0xa8,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a8718f fmla za.h[w11, 7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-10111110-01110011-11001111 // CHECK-INST: fmla za.h[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h } // CHECK-ENCODING: [0xcf,0x73,0xbe,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1be73cf fmla za.h[w11, 7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-10111110-01110011-11001111 // CHECK-INST: fmla za.h[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h } // CHECK-ENCODING: [0xcf,0x73,0xbe,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1be73cf fmla za.h[w8, 5, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-10110000-00010010-00001101 // CHECK-INST: fmla za.h[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h } // CHECK-ENCODING: [0x0d,0x12,0xb0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b0120d fmla za.h[w8, 5], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-10110000-00010010-00001101 // CHECK-INST: fmla za.h[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h } // CHECK-ENCODING: [0x0d,0x12,0xb0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b0120d fmla za.h[w8, 1, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-10111110-00010000-00001001 // CHECK-INST: fmla za.h[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h } // CHECK-ENCODING: [0x09,0x10,0xbe,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1be1009 fmla za.h[w8, 1], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-10111110-00010000-00001001 // CHECK-INST: fmla za.h[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h } // CHECK-ENCODING: [0x09,0x10,0xbe,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1be1009 fmla za.h[w10, 0, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-10110100-01010010-01001000 // CHECK-INST: fmla za.h[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h } // CHECK-ENCODING: [0x48,0x52,0xb4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b45248 fmla za.h[w10, 0], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-10110100-01010010-01001000 // CHECK-INST: fmla za.h[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h } // CHECK-ENCODING: [0x48,0x52,0xb4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b45248 fmla za.h[w8, 0, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-10100010-00010001-10001000 // CHECK-INST: fmla za.h[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h } // CHECK-ENCODING: [0x88,0x11,0xa2,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a21188 fmla za.h[w8, 0], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-10100010-00010001-10001000 // CHECK-INST: fmla za.h[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h } // CHECK-ENCODING: [0x88,0x11,0xa2,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a21188 fmla za.h[w10, 1, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-10111010-01010000-00001001 // CHECK-INST: fmla za.h[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h } // CHECK-ENCODING: [0x09,0x50,0xba,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1ba5009 fmla za.h[w10, 1], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-10111010-01010000-00001001 // CHECK-INST: fmla za.h[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h } // CHECK-ENCODING: [0x09,0x50,0xba,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1ba5009 fmla za.h[w8, 5, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-10111110-00010010-11001101 // CHECK-INST: fmla za.h[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h } // CHECK-ENCODING: [0xcd,0x12,0xbe,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1be12cd fmla za.h[w8, 5], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-10111110-00010010-11001101 // CHECK-INST: fmla za.h[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h } // CHECK-ENCODING: [0xcd,0x12,0xbe,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1be12cd fmla za.h[w11, 2, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-10100000-01110001-00001010 // CHECK-INST: fmla za.h[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h } // CHECK-ENCODING: [0x0a,0x71,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a0710a fmla za.h[w11, 2], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-10100000-01110001-00001010 // CHECK-INST: fmla za.h[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h } // CHECK-ENCODING: [0x0a,0x71,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a0710a fmla za.h[w9, 7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-10101010-00110001-10001111 // CHECK-INST: fmla za.h[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h } // CHECK-ENCODING: [0x8f,0x31,0xaa,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1aa318f fmla za.h[w9, 7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-10101010-00110001-10001111 // CHECK-INST: fmla za.h[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h } // CHECK-ENCODING: [0x8f,0x31,0xaa,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1aa318f fmla za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h // 11000001-00110000-00011100-00000000 // CHECK-INST: fmla za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h // CHECK-ENCODING: [0x00,0x1c,0x30,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1301c00 fmla za.h[w8, 0], {z0.h - z3.h}, z0.h // 11000001-00110000-00011100-00000000 // CHECK-INST: fmla za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h // CHECK-ENCODING: [0x00,0x1c,0x30,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1301c00 fmla za.h[w10, 5, vgx4], {z10.h - z13.h}, z5.h // 11000001-00110101-01011101-01000101 // CHECK-INST: fmla za.h[w10, 5, vgx4], { z10.h - z13.h }, z5.h // CHECK-ENCODING: [0x45,0x5d,0x35,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1355d45 fmla za.h[w10, 5], {z10.h - z13.h}, z5.h // 11000001-00110101-01011101-01000101 // CHECK-INST: fmla za.h[w10, 5, vgx4], { z10.h - z13.h }, z5.h // CHECK-ENCODING: [0x45,0x5d,0x35,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1355d45 fmla za.h[w11, 7, vgx4], {z13.h - z16.h}, z8.h // 11000001-00111000-01111101-10100111 // CHECK-INST: fmla za.h[w11, 7, vgx4], { z13.h - z16.h }, z8.h // CHECK-ENCODING: [0xa7,0x7d,0x38,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1387da7 fmla za.h[w11, 7], {z13.h - z16.h}, z8.h // 11000001-00111000-01111101-10100111 // CHECK-INST: fmla za.h[w11, 7, vgx4], { z13.h - z16.h }, z8.h // CHECK-ENCODING: [0xa7,0x7d,0x38,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1387da7 fmla za.h[w11, 7, vgx4], {z31.h, z0.h, z1.h, z2.h}, z15.h // 11000001-00111111-01111111-11100111 // CHECK-INST: fmla za.h[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h // CHECK-ENCODING: [0xe7,0x7f,0x3f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13f7fe7 fmla za.h[w11, 7], {z31.h, z0.h, z1.h, z2.h}, z15.h // 11000001-00111111-01111111-11100111 // CHECK-INST: fmla za.h[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h // CHECK-ENCODING: [0xe7,0x7f,0x3f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13f7fe7 fmla za.h[w8, 5, vgx4], {z17.h - z20.h}, z0.h // 11000001-00110000-00011110-00100101 // CHECK-INST: fmla za.h[w8, 5, vgx4], { z17.h - z20.h }, z0.h // CHECK-ENCODING: [0x25,0x1e,0x30,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1301e25 fmla za.h[w8, 5], {z17.h - z20.h}, z0.h // 11000001-00110000-00011110-00100101 // CHECK-INST: fmla za.h[w8, 5, vgx4], { z17.h - z20.h }, z0.h // CHECK-ENCODING: [0x25,0x1e,0x30,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1301e25 fmla za.h[w8, 1, vgx4], {z1.h - z4.h}, z14.h // 11000001-00111110-00011100-00100001 // CHECK-INST: fmla za.h[w8, 1, vgx4], { z1.h - z4.h }, z14.h // CHECK-ENCODING: [0x21,0x1c,0x3e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13e1c21 fmla za.h[w8, 1], {z1.h - z4.h}, z14.h // 11000001-00111110-00011100-00100001 // CHECK-INST: fmla za.h[w8, 1, vgx4], { z1.h - z4.h }, z14.h // CHECK-ENCODING: [0x21,0x1c,0x3e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13e1c21 fmla za.h[w10, 0, vgx4], {z19.h - z22.h}, z4.h // 11000001-00110100-01011110-01100000 // CHECK-INST: fmla za.h[w10, 0, vgx4], { z19.h - z22.h }, z4.h // CHECK-ENCODING: [0x60,0x5e,0x34,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1345e60 fmla za.h[w10, 0], {z19.h - z22.h}, z4.h // 11000001-00110100-01011110-01100000 // CHECK-INST: fmla za.h[w10, 0, vgx4], { z19.h - z22.h }, z4.h // CHECK-ENCODING: [0x60,0x5e,0x34,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1345e60 fmla za.h[w8, 0, vgx4], {z12.h - z15.h}, z2.h // 11000001-00110010-00011101-10000000 // CHECK-INST: fmla za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h // CHECK-ENCODING: [0x80,0x1d,0x32,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1321d80 fmla za.h[w8, 0], {z12.h - z15.h}, z2.h // 11000001-00110010-00011101-10000000 // CHECK-INST: fmla za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h // CHECK-ENCODING: [0x80,0x1d,0x32,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1321d80 fmla za.h[w10, 1, vgx4], {z1.h - z4.h}, z10.h // 11000001-00111010-01011100-00100001 // CHECK-INST: fmla za.h[w10, 1, vgx4], { z1.h - z4.h }, z10.h // CHECK-ENCODING: [0x21,0x5c,0x3a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13a5c21 fmla za.h[w10, 1], {z1.h - z4.h}, z10.h // 11000001-00111010-01011100-00100001 // CHECK-INST: fmla za.h[w10, 1, vgx4], { z1.h - z4.h }, z10.h // CHECK-ENCODING: [0x21,0x5c,0x3a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13a5c21 fmla za.h[w8, 5, vgx4], {z22.h - z25.h}, z14.h // 11000001-00111110-00011110-11000101 // CHECK-INST: fmla za.h[w8, 5, vgx4], { z22.h - z25.h }, z14.h // CHECK-ENCODING: [0xc5,0x1e,0x3e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13e1ec5 fmla za.h[w8, 5], {z22.h - z25.h}, z14.h // 11000001-00111110-00011110-11000101 // CHECK-INST: fmla za.h[w8, 5, vgx4], { z22.h - z25.h }, z14.h // CHECK-ENCODING: [0xc5,0x1e,0x3e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13e1ec5 fmla za.h[w11, 2, vgx4], {z9.h - z12.h}, z1.h // 11000001-00110001-01111101-00100010 // CHECK-INST: fmla za.h[w11, 2, vgx4], { z9.h - z12.h }, z1.h // CHECK-ENCODING: [0x22,0x7d,0x31,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1317d22 fmla za.h[w11, 2], {z9.h - z12.h}, z1.h // 11000001-00110001-01111101-00100010 // CHECK-INST: fmla za.h[w11, 2, vgx4], { z9.h - z12.h }, z1.h // CHECK-ENCODING: [0x22,0x7d,0x31,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1317d22 fmla za.h[w9, 7, vgx4], {z12.h - z15.h}, z11.h // 11000001-00111011-00111101-10000111 // CHECK-INST: fmla za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h // CHECK-ENCODING: [0x87,0x3d,0x3b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13b3d87 fmla za.h[w9, 7], {z12.h - z15.h}, z11.h // 11000001-00111011-00111101-10000111 // CHECK-INST: fmla za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h // CHECK-ENCODING: [0x87,0x3d,0x3b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13b3d87 fmla za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h[0] // 11000001-00010000-10010000-00000000 // CHECK-INST: fmla za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0] // CHECK-ENCODING: [0x00,0x90,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1109000 fmla za.h[w8, 0], {z0.h - z3.h}, z0.h[0] // 11000001-00010000-10010000-00000000 // CHECK-INST: fmla za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0] // CHECK-ENCODING: [0x00,0x90,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1109000 fmla za.h[w10, 5, vgx4], {z8.h - z11.h}, z5.h[2] // 11000001-00010101-11010101-00000101 // CHECK-INST: fmla za.h[w10, 5, vgx4], { z8.h - z11.h }, z5.h[2] // CHECK-ENCODING: [0x05,0xd5,0x15,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c115d505 fmla za.h[w10, 5], {z8.h - z11.h}, z5.h[2] // 11000001-00010101-11010101-00000101 // CHECK-INST: fmla za.h[w10, 5, vgx4], { z8.h - z11.h }, z5.h[2] // CHECK-ENCODING: [0x05,0xd5,0x15,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c115d505 fmla za.h[w11, 7, vgx4], {z12.h - z15.h}, z8.h[6] // 11000001-00011000-11111101-10000111 // CHECK-INST: fmla za.h[w11, 7, vgx4], { z12.h - z15.h }, z8.h[6] // CHECK-ENCODING: [0x87,0xfd,0x18,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c118fd87 fmla za.h[w11, 7], {z12.h - z15.h}, z8.h[6] // 11000001-00011000-11111101-10000111 // CHECK-INST: fmla za.h[w11, 7, vgx4], { z12.h - z15.h }, z8.h[6] // CHECK-ENCODING: [0x87,0xfd,0x18,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c118fd87 fmla za.h[w11, 7, vgx4], {z28.h - z31.h}, z15.h[7] // 11000001-00011111-11111111-10001111 // CHECK-INST: fmla za.h[w11, 7, vgx4], { z28.h - z31.h }, z15.h[7] // CHECK-ENCODING: [0x8f,0xff,0x1f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11fff8f fmla za.h[w11, 7], {z28.h - z31.h}, z15.h[7] // 11000001-00011111-11111111-10001111 // CHECK-INST: fmla za.h[w11, 7, vgx4], { z28.h - z31.h }, z15.h[7] // CHECK-ENCODING: [0x8f,0xff,0x1f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11fff8f fmla za.h[w8, 5, vgx4], {z16.h - z19.h}, z0.h[6] // 11000001-00010000-10011110-00000101 // CHECK-INST: fmla za.h[w8, 5, vgx4], { z16.h - z19.h }, z0.h[6] // CHECK-ENCODING: [0x05,0x9e,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1109e05 fmla za.h[w8, 5], {z16.h - z19.h}, z0.h[6] // 11000001-00010000-10011110-00000101 // CHECK-INST: fmla za.h[w8, 5, vgx4], { z16.h - z19.h }, z0.h[6] // CHECK-ENCODING: [0x05,0x9e,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1109e05 fmla za.h[w8, 1, vgx4], {z0.h - z3.h}, z14.h[2] // 11000001-00011110-10010100-00000001 // CHECK-INST: fmla za.h[w8, 1, vgx4], { z0.h - z3.h }, z14.h[2] // CHECK-ENCODING: [0x01,0x94,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e9401 fmla za.h[w8, 1], {z0.h - z3.h}, z14.h[2] // 11000001-00011110-10010100-00000001 // CHECK-INST: fmla za.h[w8, 1, vgx4], { z0.h - z3.h }, z14.h[2] // CHECK-ENCODING: [0x01,0x94,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e9401 fmla za.h[w10, 0, vgx4], {z16.h - z19.h}, z4.h[3] // 11000001-00010100-11010110-00001000 // CHECK-INST: fmla za.h[w10, 0, vgx4], { z16.h - z19.h }, z4.h[3] // CHECK-ENCODING: [0x08,0xd6,0x14,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c114d608 fmla za.h[w10, 0], {z16.h - z19.h}, z4.h[3] // 11000001-00010100-11010110-00001000 // CHECK-INST: fmla za.h[w10, 0, vgx4], { z16.h - z19.h }, z4.h[3] // CHECK-ENCODING: [0x08,0xd6,0x14,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c114d608 fmla za.h[w8, 0, vgx4], {z12.h - z15.h}, z2.h[4] // 11000001-00010010-10011001-10000000 // CHECK-INST: fmla za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h[4] // CHECK-ENCODING: [0x80,0x99,0x12,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1129980 fmla za.h[w8, 0], {z12.h - z15.h}, z2.h[4] // 11000001-00010010-10011001-10000000 // CHECK-INST: fmla za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h[4] // CHECK-ENCODING: [0x80,0x99,0x12,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1129980 fmla za.h[w10, 1, vgx4], {z0.h - z3.h}, z10.h[4] // 11000001-00011010-11011000-00000001 // CHECK-INST: fmla za.h[w10, 1, vgx4], { z0.h - z3.h }, z10.h[4] // CHECK-ENCODING: [0x01,0xd8,0x1a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11ad801 fmla za.h[w10, 1], {z0.h - z3.h}, z10.h[4] // 11000001-00011010-11011000-00000001 // CHECK-INST: fmla za.h[w10, 1, vgx4], { z0.h - z3.h }, z10.h[4] // CHECK-ENCODING: [0x01,0xd8,0x1a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11ad801 fmla za.h[w8, 5, vgx4], {z20.h - z23.h}, z14.h[5] // 11000001-00011110-10011010-10001101 // CHECK-INST: fmla za.h[w8, 5, vgx4], { z20.h - z23.h }, z14.h[5] // CHECK-ENCODING: [0x8d,0x9a,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e9a8d fmla za.h[w8, 5], {z20.h - z23.h}, z14.h[5] // 11000001-00011110-10011010-10001101 // CHECK-INST: fmla za.h[w8, 5, vgx4], { z20.h - z23.h }, z14.h[5] // CHECK-ENCODING: [0x8d,0x9a,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e9a8d fmla za.h[w11, 2, vgx4], {z8.h - z11.h}, z1.h[2] // 11000001-00010001-11110101-00000010 // CHECK-INST: fmla za.h[w11, 2, vgx4], { z8.h - z11.h }, z1.h[2] // CHECK-ENCODING: [0x02,0xf5,0x11,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c111f502 fmla za.h[w11, 2], {z8.h - z11.h}, z1.h[2] // 11000001-00010001-11110101-00000010 // CHECK-INST: fmla za.h[w11, 2, vgx4], { z8.h - z11.h }, z1.h[2] // CHECK-ENCODING: [0x02,0xf5,0x11,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c111f502 fmla za.h[w9, 7, vgx4], {z12.h - z15.h}, z11.h[4] // 11000001-00011011-10111001-10000111 // CHECK-INST: fmla za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h[4] // CHECK-ENCODING: [0x87,0xb9,0x1b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11bb987 fmla za.h[w9, 7], {z12.h - z15.h}, z11.h[4] // 11000001-00011011-10111001-10000111 // CHECK-INST: fmla za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h[4] // CHECK-ENCODING: [0x87,0xb9,0x1b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11bb987 fmla za.h[w8, 0, vgx4], {z0.h - z3.h}, {z0.h - z3.h} // 11000001-10100001-00010000-00001000 // CHECK-INST: fmla za.h[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h } // CHECK-ENCODING: [0x08,0x10,0xa1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a11008 fmla za.h[w8, 0], {z0.h - z3.h}, {z0.h - z3.h} // 11000001-10100001-00010000-00001000 // CHECK-INST: fmla za.h[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h } // CHECK-ENCODING: [0x08,0x10,0xa1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a11008 fmla za.h[w10, 5, vgx4], {z8.h - z11.h}, {z20.h - z23.h} // 11000001-10110101-01010001-00001101 // CHECK-INST: fmla za.h[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h } // CHECK-ENCODING: [0x0d,0x51,0xb5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b5510d fmla za.h[w10, 5], {z8.h - z11.h}, {z20.h - z23.h} // 11000001-10110101-01010001-00001101 // CHECK-INST: fmla za.h[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h } // CHECK-ENCODING: [0x0d,0x51,0xb5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b5510d fmla za.h[w11, 7, vgx4], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-10101001-01110001-10001111 // CHECK-INST: fmla za.h[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h } // CHECK-ENCODING: [0x8f,0x71,0xa9,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a9718f fmla za.h[w11, 7], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-10101001-01110001-10001111 // CHECK-INST: fmla za.h[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h } // CHECK-ENCODING: [0x8f,0x71,0xa9,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a9718f fmla za.h[w11, 7, vgx4], {z28.h - z31.h}, {z28.h - z31.h} // 11000001-10111101-01110011-10001111 // CHECK-INST: fmla za.h[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h } // CHECK-ENCODING: [0x8f,0x73,0xbd,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1bd738f fmla za.h[w11, 7], {z28.h - z31.h}, {z28.h - z31.h} // 11000001-10111101-01110011-10001111 // CHECK-INST: fmla za.h[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h } // CHECK-ENCODING: [0x8f,0x73,0xbd,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1bd738f fmla za.h[w8, 5, vgx4], {z16.h - z19.h}, {z16.h - z19.h} // 11000001-10110001-00010010-00001101 // CHECK-INST: fmla za.h[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h } // CHECK-ENCODING: [0x0d,0x12,0xb1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b1120d fmla za.h[w8, 5], {z16.h - z19.h}, {z16.h - z19.h} // 11000001-10110001-00010010-00001101 // CHECK-INST: fmla za.h[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h } // CHECK-ENCODING: [0x0d,0x12,0xb1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b1120d fmla za.h[w8, 1, vgx4], {z0.h - z3.h}, {z28.h - z31.h} // 11000001-10111101-00010000-00001001 // CHECK-INST: fmla za.h[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h } // CHECK-ENCODING: [0x09,0x10,0xbd,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1bd1009 fmla za.h[w8, 1], {z0.h - z3.h}, {z28.h - z31.h} // 11000001-10111101-00010000-00001001 // CHECK-INST: fmla za.h[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h } // CHECK-ENCODING: [0x09,0x10,0xbd,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1bd1009 fmla za.h[w10, 0, vgx4], {z16.h - z19.h}, {z20.h - z23.h} // 11000001-10110101-01010010-00001000 // CHECK-INST: fmla za.h[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h } // CHECK-ENCODING: [0x08,0x52,0xb5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b55208 fmla za.h[w10, 0], {z16.h - z19.h}, {z20.h - z23.h} // 11000001-10110101-01010010-00001000 // CHECK-INST: fmla za.h[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h } // CHECK-ENCODING: [0x08,0x52,0xb5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b55208 fmla za.h[w8, 0, vgx4], {z12.h - z15.h}, {z0.h - z3.h} // 11000001-10100001-00010001-10001000 // CHECK-INST: fmla za.h[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h } // CHECK-ENCODING: [0x88,0x11,0xa1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a11188 fmla za.h[w8, 0], {z12.h - z15.h}, {z0.h - z3.h} // 11000001-10100001-00010001-10001000 // CHECK-INST: fmla za.h[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h } // CHECK-ENCODING: [0x88,0x11,0xa1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a11188 fmla za.h[w10, 1, vgx4], {z0.h - z3.h}, {z24.h - z27.h} // 11000001-10111001-01010000-00001001 // CHECK-INST: fmla za.h[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h } // CHECK-ENCODING: [0x09,0x50,0xb9,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b95009 fmla za.h[w10, 1], {z0.h - z3.h}, {z24.h - z27.h} // 11000001-10111001-01010000-00001001 // CHECK-INST: fmla za.h[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h } // CHECK-ENCODING: [0x09,0x50,0xb9,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b95009 fmla za.h[w8, 5, vgx4], {z20.h - z23.h}, {z28.h - z31.h} // 11000001-10111101-00010010-10001101 // CHECK-INST: fmla za.h[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h } // CHECK-ENCODING: [0x8d,0x12,0xbd,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1bd128d fmla za.h[w8, 5], {z20.h - z23.h}, {z28.h - z31.h} // 11000001-10111101-00010010-10001101 // CHECK-INST: fmla za.h[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h } // CHECK-ENCODING: [0x8d,0x12,0xbd,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1bd128d fmla za.h[w11, 2, vgx4], {z8.h - z11.h}, {z0.h - z3.h} // 11000001-10100001-01110001-00001010 // CHECK-INST: fmla za.h[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h } // CHECK-ENCODING: [0x0a,0x71,0xa1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a1710a fmla za.h[w11, 2], {z8.h - z11.h}, {z0.h - z3.h} // 11000001-10100001-01110001-00001010 // CHECK-INST: fmla za.h[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h } // CHECK-ENCODING: [0x0a,0x71,0xa1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a1710a fmla za.h[w9, 7, vgx4], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-10101001-00110001-10001111 // CHECK-INST: fmla za.h[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h } // CHECK-ENCODING: [0x8f,0x31,0xa9,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a9318f fmla za.h[w9, 7], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-10101001-00110001-10001111 // CHECK-INST: fmla za.h[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h } // CHECK-ENCODING: [0x8f,0x31,0xa9,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a9318f diff --git a/llvm/test/MC/AArch64/SME2p1/fmls-diagnostics.s b/llvm/test/MC/AArch64/SME2p1/fmls-diagnostics.s index 2174e4202ba0d..3ff09321e3436 100644 --- a/llvm/test/MC/AArch64/SME2p1/fmls-diagnostics.s +++ b/llvm/test/MC/AArch64/SME2p1/fmls-diagnostics.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 2>&1 < %s | FileCheck %s +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 2>&1 < %s | FileCheck %s // --------------------------------------------------------------------------// // Invalid vector list diff --git a/llvm/test/MC/AArch64/SME2p1/fmls.s b/llvm/test/MC/AArch64/SME2p1/fmls.s index 9bbb21869e377..67b1430240e8d 100644 --- a/llvm/test/MC/AArch64/SME2p1/fmls.s +++ b/llvm/test/MC/AArch64/SME2p1/fmls.s @@ -1,878 +1,878 @@ -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ -// RUN: | llvm-objdump -d --mattr=+sme2p1,+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ // RUN: | llvm-objdump -d --mattr=-sme2p1 - | FileCheck %s --check-prefix=CHECK-UNKNOWN -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \ -// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2p1,+sme-f16f16 -disassemble -show-encoding \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-f16f16 -disassemble -show-encoding \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST fmls za.h[w8, 0, vgx2], {z0.h, z1.h}, z0.h // 11000001-00100000-00011100-00001000 // CHECK-INST: fmls za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h // CHECK-ENCODING: [0x08,0x1c,0x20,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1201c08 fmls za.h[w8, 0], {z0.h - z1.h}, z0.h // 11000001-00100000-00011100-00001000 // CHECK-INST: fmls za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h // CHECK-ENCODING: [0x08,0x1c,0x20,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1201c08 fmls za.h[w10, 5, vgx2], {z10.h, z11.h}, z5.h // 11000001-00100101-01011101-01001101 // CHECK-INST: fmls za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h // CHECK-ENCODING: [0x4d,0x5d,0x25,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1255d4d fmls za.h[w10, 5], {z10.h - z11.h}, z5.h // 11000001-00100101-01011101-01001101 // CHECK-INST: fmls za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h // CHECK-ENCODING: [0x4d,0x5d,0x25,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1255d4d fmls za.h[w11, 7, vgx2], {z13.h, z14.h}, z8.h // 11000001-00101000-01111101-10101111 // CHECK-INST: fmls za.h[w11, 7, vgx2], { z13.h, z14.h }, z8.h // CHECK-ENCODING: [0xaf,0x7d,0x28,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1287daf fmls za.h[w11, 7], {z13.h - z14.h}, z8.h // 11000001-00101000-01111101-10101111 // CHECK-INST: fmls za.h[w11, 7, vgx2], { z13.h, z14.h }, z8.h // CHECK-ENCODING: [0xaf,0x7d,0x28,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1287daf fmls za.h[w11, 7, vgx2], {z31.h, z0.h}, z15.h // 11000001-00101111-01111111-11101111 // CHECK-INST: fmls za.h[w11, 7, vgx2], { z31.h, z0.h }, z15.h // CHECK-ENCODING: [0xef,0x7f,0x2f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12f7fef fmls za.h[w11, 7], {z31.h - z0.h}, z15.h // 11000001-00101111-01111111-11101111 // CHECK-INST: fmls za.h[w11, 7, vgx2], { z31.h, z0.h }, z15.h // CHECK-ENCODING: [0xef,0x7f,0x2f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12f7fef fmls za.h[w8, 5, vgx2], {z17.h, z18.h}, z0.h // 11000001-00100000-00011110-00101101 // CHECK-INST: fmls za.h[w8, 5, vgx2], { z17.h, z18.h }, z0.h // CHECK-ENCODING: [0x2d,0x1e,0x20,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1201e2d fmls za.h[w8, 5], {z17.h - z18.h}, z0.h // 11000001-00100000-00011110-00101101 // CHECK-INST: fmls za.h[w8, 5, vgx2], { z17.h, z18.h }, z0.h // CHECK-ENCODING: [0x2d,0x1e,0x20,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1201e2d fmls za.h[w8, 1, vgx2], {z1.h, z2.h}, z14.h // 11000001-00101110-00011100-00101001 // CHECK-INST: fmls za.h[w8, 1, vgx2], { z1.h, z2.h }, z14.h // CHECK-ENCODING: [0x29,0x1c,0x2e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12e1c29 fmls za.h[w8, 1], {z1.h - z2.h}, z14.h // 11000001-00101110-00011100-00101001 // CHECK-INST: fmls za.h[w8, 1, vgx2], { z1.h, z2.h }, z14.h // CHECK-ENCODING: [0x29,0x1c,0x2e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12e1c29 fmls za.h[w10, 0, vgx2], {z19.h, z20.h}, z4.h // 11000001-00100100-01011110-01101000 // CHECK-INST: fmls za.h[w10, 0, vgx2], { z19.h, z20.h }, z4.h // CHECK-ENCODING: [0x68,0x5e,0x24,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1245e68 fmls za.h[w10, 0], {z19.h - z20.h}, z4.h // 11000001-00100100-01011110-01101000 // CHECK-INST: fmls za.h[w10, 0, vgx2], { z19.h, z20.h }, z4.h // CHECK-ENCODING: [0x68,0x5e,0x24,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1245e68 fmls za.h[w8, 0, vgx2], {z12.h, z13.h}, z2.h // 11000001-00100010-00011101-10001000 // CHECK-INST: fmls za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h // CHECK-ENCODING: [0x88,0x1d,0x22,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1221d88 fmls za.h[w8, 0], {z12.h - z13.h}, z2.h // 11000001-00100010-00011101-10001000 // CHECK-INST: fmls za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h // CHECK-ENCODING: [0x88,0x1d,0x22,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1221d88 fmls za.h[w10, 1, vgx2], {z1.h, z2.h}, z10.h // 11000001-00101010-01011100-00101001 // CHECK-INST: fmls za.h[w10, 1, vgx2], { z1.h, z2.h }, z10.h // CHECK-ENCODING: [0x29,0x5c,0x2a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12a5c29 fmls za.h[w10, 1], {z1.h - z2.h}, z10.h // 11000001-00101010-01011100-00101001 // CHECK-INST: fmls za.h[w10, 1, vgx2], { z1.h, z2.h }, z10.h // CHECK-ENCODING: [0x29,0x5c,0x2a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12a5c29 fmls za.h[w8, 5, vgx2], {z22.h, z23.h}, z14.h // 11000001-00101110-00011110-11001101 // CHECK-INST: fmls za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h // CHECK-ENCODING: [0xcd,0x1e,0x2e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12e1ecd fmls za.h[w8, 5], {z22.h - z23.h}, z14.h // 11000001-00101110-00011110-11001101 // CHECK-INST: fmls za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h // CHECK-ENCODING: [0xcd,0x1e,0x2e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12e1ecd fmls za.h[w11, 2, vgx2], {z9.h, z10.h}, z1.h // 11000001-00100001-01111101-00101010 // CHECK-INST: fmls za.h[w11, 2, vgx2], { z9.h, z10.h }, z1.h // CHECK-ENCODING: [0x2a,0x7d,0x21,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1217d2a fmls za.h[w11, 2], {z9.h - z10.h}, z1.h // 11000001-00100001-01111101-00101010 // CHECK-INST: fmls za.h[w11, 2, vgx2], { z9.h, z10.h }, z1.h // CHECK-ENCODING: [0x2a,0x7d,0x21,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1217d2a fmls za.h[w9, 7, vgx2], {z12.h, z13.h}, z11.h // 11000001-00101011-00111101-10001111 // CHECK-INST: fmls za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h // CHECK-ENCODING: [0x8f,0x3d,0x2b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12b3d8f fmls za.h[w9, 7], {z12.h - z13.h}, z11.h // 11000001-00101011-00111101-10001111 // CHECK-INST: fmls za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h // CHECK-ENCODING: [0x8f,0x3d,0x2b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c12b3d8f fmls za.h[w8, 0, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-00010000-00010000-00010000 // CHECK-INST: fmls za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0] // CHECK-ENCODING: [0x10,0x10,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1101010 fmls za.h[w8, 0], {z0.h - z1.h}, z0.h[0] // 11000001-00010000-00010000-00010000 // CHECK-INST: fmls za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0] // CHECK-ENCODING: [0x10,0x10,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1101010 fmls za.h[w10, 5, vgx2], {z10.h, z11.h}, z5.h[2] // 11000001-00010101-01010101-01010101 // CHECK-INST: fmls za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h[2] // CHECK-ENCODING: [0x55,0x55,0x15,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1155555 fmls za.h[w10, 5], {z10.h - z11.h}, z5.h[2] // 11000001-00010101-01010101-01010101 // CHECK-INST: fmls za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h[2] // CHECK-ENCODING: [0x55,0x55,0x15,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1155555 fmls za.h[w11, 7, vgx2], {z12.h, z13.h}, z8.h[6] // 11000001-00011000-01111101-10010111 // CHECK-INST: fmls za.h[w11, 7, vgx2], { z12.h, z13.h }, z8.h[6] // CHECK-ENCODING: [0x97,0x7d,0x18,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1187d97 fmls za.h[w11, 7], {z12.h - z13.h}, z8.h[6] // 11000001-00011000-01111101-10010111 // CHECK-INST: fmls za.h[w11, 7, vgx2], { z12.h, z13.h }, z8.h[6] // CHECK-ENCODING: [0x97,0x7d,0x18,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1187d97 fmls za.h[w11, 7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-00011111-01111111-11011111 // CHECK-INST: fmls za.h[w11, 7, vgx2], { z30.h, z31.h }, z15.h[7] // CHECK-ENCODING: [0xdf,0x7f,0x1f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11f7fdf fmls za.h[w11, 7], {z30.h - z31.h}, z15.h[7] // 11000001-00011111-01111111-11011111 // CHECK-INST: fmls za.h[w11, 7, vgx2], { z30.h, z31.h }, z15.h[7] // CHECK-ENCODING: [0xdf,0x7f,0x1f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11f7fdf fmls za.h[w8, 5, vgx2], {z16.h, z17.h}, z0.h[6] // 11000001-00010000-00011110-00010101 // CHECK-INST: fmls za.h[w8, 5, vgx2], { z16.h, z17.h }, z0.h[6] // CHECK-ENCODING: [0x15,0x1e,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1101e15 fmls za.h[w8, 5], {z16.h - z17.h}, z0.h[6] // 11000001-00010000-00011110-00010101 // CHECK-INST: fmls za.h[w8, 5, vgx2], { z16.h, z17.h }, z0.h[6] // CHECK-ENCODING: [0x15,0x1e,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1101e15 fmls za.h[w8, 1, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001-00011110-00010100-00010001 // CHECK-INST: fmls za.h[w8, 1, vgx2], { z0.h, z1.h }, z14.h[2] // CHECK-ENCODING: [0x11,0x14,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e1411 fmls za.h[w8, 1], {z0.h - z1.h}, z14.h[2] // 11000001-00011110-00010100-00010001 // CHECK-INST: fmls za.h[w8, 1, vgx2], { z0.h, z1.h }, z14.h[2] // CHECK-ENCODING: [0x11,0x14,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e1411 fmls za.h[w10, 0, vgx2], {z18.h, z19.h}, z4.h[3] // 11000001-00010100-01010110-01011000 // CHECK-INST: fmls za.h[w10, 0, vgx2], { z18.h, z19.h }, z4.h[3] // CHECK-ENCODING: [0x58,0x56,0x14,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1145658 fmls za.h[w10, 0], {z18.h - z19.h}, z4.h[3] // 11000001-00010100-01010110-01011000 // CHECK-INST: fmls za.h[w10, 0, vgx2], { z18.h, z19.h }, z4.h[3] // CHECK-ENCODING: [0x58,0x56,0x14,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1145658 fmls za.h[w8, 0, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001-00010010-00011001-10010000 // CHECK-INST: fmls za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h[4] // CHECK-ENCODING: [0x90,0x19,0x12,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1121990 fmls za.h[w8, 0], {z12.h - z13.h}, z2.h[4] // 11000001-00010010-00011001-10010000 // CHECK-INST: fmls za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h[4] // CHECK-ENCODING: [0x90,0x19,0x12,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1121990 fmls za.h[w10, 1, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001-00011010-01011000-00010001 // CHECK-INST: fmls za.h[w10, 1, vgx2], { z0.h, z1.h }, z10.h[4] // CHECK-ENCODING: [0x11,0x58,0x1a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11a5811 fmls za.h[w10, 1], {z0.h - z1.h}, z10.h[4] // 11000001-00011010-01011000-00010001 // CHECK-INST: fmls za.h[w10, 1, vgx2], { z0.h, z1.h }, z10.h[4] // CHECK-ENCODING: [0x11,0x58,0x1a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11a5811 fmls za.h[w8, 5, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001-00011110-00011010-11011101 // CHECK-INST: fmls za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h[5] // CHECK-ENCODING: [0xdd,0x1a,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e1add fmls za.h[w8, 5], {z22.h - z23.h}, z14.h[5] // 11000001-00011110-00011010-11011101 // CHECK-INST: fmls za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h[5] // CHECK-ENCODING: [0xdd,0x1a,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e1add fmls za.h[w11, 2, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001-00010001-01110101-00010010 // CHECK-INST: fmls za.h[w11, 2, vgx2], { z8.h, z9.h }, z1.h[2] // CHECK-ENCODING: [0x12,0x75,0x11,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1117512 fmls za.h[w11, 2], {z8.h - z9.h}, z1.h[2] // 11000001-00010001-01110101-00010010 // CHECK-INST: fmls za.h[w11, 2, vgx2], { z8.h, z9.h }, z1.h[2] // CHECK-ENCODING: [0x12,0x75,0x11,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1117512 fmls za.h[w9, 7, vgx2], {z12.h, z13.h}, z11.h[4] // 11000001-00011011-00111001-10010111 // CHECK-INST: fmls za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h[4] // CHECK-ENCODING: [0x97,0x39,0x1b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11b3997 fmls za.h[w9, 7], {z12.h - z13.h}, z11.h[4] // 11000001-00011011-00111001-10010111 // CHECK-INST: fmls za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h[4] // CHECK-ENCODING: [0x97,0x39,0x1b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11b3997 fmls za.h[w8, 0, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-10100000-00010000-00011000 // CHECK-INST: fmls za.h[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h } // CHECK-ENCODING: [0x18,0x10,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a01018 fmls za.h[w8, 0], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-10100000-00010000-00011000 // CHECK-INST: fmls za.h[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h } // CHECK-ENCODING: [0x18,0x10,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a01018 fmls za.h[w10, 5, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-10110100-01010001-01011101 // CHECK-INST: fmls za.h[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h } // CHECK-ENCODING: [0x5d,0x51,0xb4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b4515d fmls za.h[w10, 5], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-10110100-01010001-01011101 // CHECK-INST: fmls za.h[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h } // CHECK-ENCODING: [0x5d,0x51,0xb4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b4515d fmls za.h[w11, 7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-10101000-01110001-10011111 // CHECK-INST: fmls za.h[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h } // CHECK-ENCODING: [0x9f,0x71,0xa8,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a8719f fmls za.h[w11, 7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-10101000-01110001-10011111 // CHECK-INST: fmls za.h[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h } // CHECK-ENCODING: [0x9f,0x71,0xa8,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a8719f fmls za.h[w11, 7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-10111110-01110011-11011111 // CHECK-INST: fmls za.h[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h } // CHECK-ENCODING: [0xdf,0x73,0xbe,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1be73df fmls za.h[w11, 7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-10111110-01110011-11011111 // CHECK-INST: fmls za.h[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h } // CHECK-ENCODING: [0xdf,0x73,0xbe,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1be73df fmls za.h[w8, 5, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-10110000-00010010-00011101 // CHECK-INST: fmls za.h[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h } // CHECK-ENCODING: [0x1d,0x12,0xb0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b0121d fmls za.h[w8, 5], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-10110000-00010010-00011101 // CHECK-INST: fmls za.h[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h } // CHECK-ENCODING: [0x1d,0x12,0xb0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b0121d fmls za.h[w8, 1, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-10111110-00010000-00011001 // CHECK-INST: fmls za.h[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h } // CHECK-ENCODING: [0x19,0x10,0xbe,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1be1019 fmls za.h[w8, 1], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-10111110-00010000-00011001 // CHECK-INST: fmls za.h[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h } // CHECK-ENCODING: [0x19,0x10,0xbe,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1be1019 fmls za.h[w10, 0, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-10110100-01010010-01011000 // CHECK-INST: fmls za.h[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h } // CHECK-ENCODING: [0x58,0x52,0xb4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b45258 fmls za.h[w10, 0], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-10110100-01010010-01011000 // CHECK-INST: fmls za.h[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h } // CHECK-ENCODING: [0x58,0x52,0xb4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b45258 fmls za.h[w8, 0, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-10100010-00010001-10011000 // CHECK-INST: fmls za.h[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h } // CHECK-ENCODING: [0x98,0x11,0xa2,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a21198 fmls za.h[w8, 0], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-10100010-00010001-10011000 // CHECK-INST: fmls za.h[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h } // CHECK-ENCODING: [0x98,0x11,0xa2,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a21198 fmls za.h[w10, 1, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-10111010-01010000-00011001 // CHECK-INST: fmls za.h[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h } // CHECK-ENCODING: [0x19,0x50,0xba,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1ba5019 fmls za.h[w10, 1], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-10111010-01010000-00011001 // CHECK-INST: fmls za.h[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h } // CHECK-ENCODING: [0x19,0x50,0xba,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1ba5019 fmls za.h[w8, 5, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-10111110-00010010-11011101 // CHECK-INST: fmls za.h[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h } // CHECK-ENCODING: [0xdd,0x12,0xbe,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1be12dd fmls za.h[w8, 5], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-10111110-00010010-11011101 // CHECK-INST: fmls za.h[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h } // CHECK-ENCODING: [0xdd,0x12,0xbe,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1be12dd fmls za.h[w11, 2, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-10100000-01110001-00011010 // CHECK-INST: fmls za.h[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h } // CHECK-ENCODING: [0x1a,0x71,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a0711a fmls za.h[w11, 2], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-10100000-01110001-00011010 // CHECK-INST: fmls za.h[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h } // CHECK-ENCODING: [0x1a,0x71,0xa0,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a0711a fmls za.h[w9, 7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-10101010-00110001-10011111 // CHECK-INST: fmls za.h[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h } // CHECK-ENCODING: [0x9f,0x31,0xaa,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1aa319f fmls za.h[w9, 7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-10101010-00110001-10011111 // CHECK-INST: fmls za.h[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h } // CHECK-ENCODING: [0x9f,0x31,0xaa,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1aa319f fmls za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h // 11000001-00110000-00011100-00001000 // CHECK-INST: fmls za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h // CHECK-ENCODING: [0x08,0x1c,0x30,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1301c08 fmls za.h[w8, 0], {z0.h - z3.h}, z0.h // 11000001-00110000-00011100-00001000 // CHECK-INST: fmls za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h // CHECK-ENCODING: [0x08,0x1c,0x30,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1301c08 fmls za.h[w10, 5, vgx4], {z10.h - z13.h}, z5.h // 11000001-00110101-01011101-01001101 // CHECK-INST: fmls za.h[w10, 5, vgx4], { z10.h - z13.h }, z5.h // CHECK-ENCODING: [0x4d,0x5d,0x35,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1355d4d fmls za.h[w10, 5], {z10.h - z13.h}, z5.h // 11000001-00110101-01011101-01001101 // CHECK-INST: fmls za.h[w10, 5, vgx4], { z10.h - z13.h }, z5.h // CHECK-ENCODING: [0x4d,0x5d,0x35,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1355d4d fmls za.h[w11, 7, vgx4], {z13.h - z16.h}, z8.h // 11000001-00111000-01111101-10101111 // CHECK-INST: fmls za.h[w11, 7, vgx4], { z13.h - z16.h }, z8.h // CHECK-ENCODING: [0xaf,0x7d,0x38,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1387daf fmls za.h[w11, 7], {z13.h - z16.h}, z8.h // 11000001-00111000-01111101-10101111 // CHECK-INST: fmls za.h[w11, 7, vgx4], { z13.h - z16.h }, z8.h // CHECK-ENCODING: [0xaf,0x7d,0x38,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1387daf fmls za.h[w11, 7, vgx4], {z31.h, z0.h, z1.h, z2.h}, z15.h // 11000001-00111111-01111111-11101111 // CHECK-INST: fmls za.h[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h // CHECK-ENCODING: [0xef,0x7f,0x3f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13f7fef fmls za.h[w11, 7], {z31.h, z0.h, z1.h, z2.h}, z15.h // 11000001-00111111-01111111-11101111 // CHECK-INST: fmls za.h[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h // CHECK-ENCODING: [0xef,0x7f,0x3f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13f7fef fmls za.h[w8, 5, vgx4], {z17.h - z20.h}, z0.h // 11000001-00110000-00011110-00101101 // CHECK-INST: fmls za.h[w8, 5, vgx4], { z17.h - z20.h }, z0.h // CHECK-ENCODING: [0x2d,0x1e,0x30,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1301e2d fmls za.h[w8, 5], {z17.h - z20.h}, z0.h // 11000001-00110000-00011110-00101101 // CHECK-INST: fmls za.h[w8, 5, vgx4], { z17.h - z20.h }, z0.h // CHECK-ENCODING: [0x2d,0x1e,0x30,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1301e2d fmls za.h[w8, 1, vgx4], {z1.h - z4.h}, z14.h // 11000001-00111110-00011100-00101001 // CHECK-INST: fmls za.h[w8, 1, vgx4], { z1.h - z4.h }, z14.h // CHECK-ENCODING: [0x29,0x1c,0x3e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13e1c29 fmls za.h[w8, 1], {z1.h - z4.h}, z14.h // 11000001-00111110-00011100-00101001 // CHECK-INST: fmls za.h[w8, 1, vgx4], { z1.h - z4.h }, z14.h // CHECK-ENCODING: [0x29,0x1c,0x3e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13e1c29 fmls za.h[w10, 0, vgx4], {z19.h - z22.h}, z4.h // 11000001-00110100-01011110-01101000 // CHECK-INST: fmls za.h[w10, 0, vgx4], { z19.h - z22.h }, z4.h // CHECK-ENCODING: [0x68,0x5e,0x34,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1345e68 fmls za.h[w10, 0], {z19.h - z22.h}, z4.h // 11000001-00110100-01011110-01101000 // CHECK-INST: fmls za.h[w10, 0, vgx4], { z19.h - z22.h }, z4.h // CHECK-ENCODING: [0x68,0x5e,0x34,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1345e68 fmls za.h[w8, 0, vgx4], {z12.h - z15.h}, z2.h // 11000001-00110010-00011101-10001000 // CHECK-INST: fmls za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h // CHECK-ENCODING: [0x88,0x1d,0x32,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1321d88 fmls za.h[w8, 0], {z12.h - z15.h}, z2.h // 11000001-00110010-00011101-10001000 // CHECK-INST: fmls za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h // CHECK-ENCODING: [0x88,0x1d,0x32,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1321d88 fmls za.h[w10, 1, vgx4], {z1.h - z4.h}, z10.h // 11000001-00111010-01011100-00101001 // CHECK-INST: fmls za.h[w10, 1, vgx4], { z1.h - z4.h }, z10.h // CHECK-ENCODING: [0x29,0x5c,0x3a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13a5c29 fmls za.h[w10, 1], {z1.h - z4.h}, z10.h // 11000001-00111010-01011100-00101001 // CHECK-INST: fmls za.h[w10, 1, vgx4], { z1.h - z4.h }, z10.h // CHECK-ENCODING: [0x29,0x5c,0x3a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13a5c29 fmls za.h[w8, 5, vgx4], {z22.h - z25.h}, z14.h // 11000001-00111110-00011110-11001101 // CHECK-INST: fmls za.h[w8, 5, vgx4], { z22.h - z25.h }, z14.h // CHECK-ENCODING: [0xcd,0x1e,0x3e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13e1ecd fmls za.h[w8, 5], {z22.h - z25.h}, z14.h // 11000001-00111110-00011110-11001101 // CHECK-INST: fmls za.h[w8, 5, vgx4], { z22.h - z25.h }, z14.h // CHECK-ENCODING: [0xcd,0x1e,0x3e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13e1ecd fmls za.h[w11, 2, vgx4], {z9.h - z12.h}, z1.h // 11000001-00110001-01111101-00101010 // CHECK-INST: fmls za.h[w11, 2, vgx4], { z9.h - z12.h }, z1.h // CHECK-ENCODING: [0x2a,0x7d,0x31,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1317d2a fmls za.h[w11, 2], {z9.h - z12.h}, z1.h // 11000001-00110001-01111101-00101010 // CHECK-INST: fmls za.h[w11, 2, vgx4], { z9.h - z12.h }, z1.h // CHECK-ENCODING: [0x2a,0x7d,0x31,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1317d2a fmls za.h[w9, 7, vgx4], {z12.h - z15.h}, z11.h // 11000001-00111011-00111101-10001111 // CHECK-INST: fmls za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h // CHECK-ENCODING: [0x8f,0x3d,0x3b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13b3d8f fmls za.h[w9, 7], {z12.h - z15.h}, z11.h // 11000001-00111011-00111101-10001111 // CHECK-INST: fmls za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h // CHECK-ENCODING: [0x8f,0x3d,0x3b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c13b3d8f fmls za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h[0] // 11000001-00010000-10010000-00010000 // CHECK-INST: fmls za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0] // CHECK-ENCODING: [0x10,0x90,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1109010 fmls za.h[w8, 0], {z0.h - z3.h}, z0.h[0] // 11000001-00010000-10010000-00010000 // CHECK-INST: fmls za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0] // CHECK-ENCODING: [0x10,0x90,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1109010 fmls za.h[w10, 5, vgx4], {z8.h - z11.h}, z5.h[2] // 11000001-00010101-11010101-00010101 // CHECK-INST: fmls za.h[w10, 5, vgx4], { z8.h - z11.h }, z5.h[2] // CHECK-ENCODING: [0x15,0xd5,0x15,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c115d515 fmls za.h[w10, 5], {z8.h - z11.h}, z5.h[2] // 11000001-00010101-11010101-00010101 // CHECK-INST: fmls za.h[w10, 5, vgx4], { z8.h - z11.h }, z5.h[2] // CHECK-ENCODING: [0x15,0xd5,0x15,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c115d515 fmls za.h[w11, 7, vgx4], {z12.h - z15.h}, z8.h[6] // 11000001-00011000-11111101-10010111 // CHECK-INST: fmls za.h[w11, 7, vgx4], { z12.h - z15.h }, z8.h[6] // CHECK-ENCODING: [0x97,0xfd,0x18,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c118fd97 fmls za.h[w11, 7], {z12.h - z15.h}, z8.h[6] // 11000001-00011000-11111101-10010111 // CHECK-INST: fmls za.h[w11, 7, vgx4], { z12.h - z15.h }, z8.h[6] // CHECK-ENCODING: [0x97,0xfd,0x18,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c118fd97 fmls za.h[w11, 7, vgx4], {z28.h - z31.h}, z15.h[7] // 11000001-00011111-11111111-10011111 // CHECK-INST: fmls za.h[w11, 7, vgx4], { z28.h - z31.h }, z15.h[7] // CHECK-ENCODING: [0x9f,0xff,0x1f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11fff9f fmls za.h[w11, 7], {z28.h - z31.h}, z15.h[7] // 11000001-00011111-11111111-10011111 // CHECK-INST: fmls za.h[w11, 7, vgx4], { z28.h - z31.h }, z15.h[7] // CHECK-ENCODING: [0x9f,0xff,0x1f,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11fff9f fmls za.h[w8, 5, vgx4], {z16.h - z19.h}, z0.h[6] // 11000001-00010000-10011110-00010101 // CHECK-INST: fmls za.h[w8, 5, vgx4], { z16.h - z19.h }, z0.h[6] // CHECK-ENCODING: [0x15,0x9e,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1109e15 fmls za.h[w8, 5], {z16.h - z19.h}, z0.h[6] // 11000001-00010000-10011110-00010101 // CHECK-INST: fmls za.h[w8, 5, vgx4], { z16.h - z19.h }, z0.h[6] // CHECK-ENCODING: [0x15,0x9e,0x10,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1109e15 fmls za.h[w8, 1, vgx4], {z0.h - z3.h}, z14.h[2] // 11000001-00011110-10010100-00010001 // CHECK-INST: fmls za.h[w8, 1, vgx4], { z0.h - z3.h }, z14.h[2] // CHECK-ENCODING: [0x11,0x94,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e9411 fmls za.h[w8, 1], {z0.h - z3.h}, z14.h[2] // 11000001-00011110-10010100-00010001 // CHECK-INST: fmls za.h[w8, 1, vgx4], { z0.h - z3.h }, z14.h[2] // CHECK-ENCODING: [0x11,0x94,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e9411 fmls za.h[w10, 0, vgx4], {z16.h - z19.h}, z4.h[3] // 11000001-00010100-11010110-00011000 // CHECK-INST: fmls za.h[w10, 0, vgx4], { z16.h - z19.h }, z4.h[3] // CHECK-ENCODING: [0x18,0xd6,0x14,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c114d618 fmls za.h[w10, 0], {z16.h - z19.h}, z4.h[3] // 11000001-00010100-11010110-00011000 // CHECK-INST: fmls za.h[w10, 0, vgx4], { z16.h - z19.h }, z4.h[3] // CHECK-ENCODING: [0x18,0xd6,0x14,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c114d618 fmls za.h[w8, 0, vgx4], {z12.h - z15.h}, z2.h[4] // 11000001-00010010-10011001-10010000 // CHECK-INST: fmls za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h[4] // CHECK-ENCODING: [0x90,0x99,0x12,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1129990 fmls za.h[w8, 0], {z12.h - z15.h}, z2.h[4] // 11000001-00010010-10011001-10010000 // CHECK-INST: fmls za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h[4] // CHECK-ENCODING: [0x90,0x99,0x12,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1129990 fmls za.h[w10, 1, vgx4], {z0.h - z3.h}, z10.h[4] // 11000001-00011010-11011000-00010001 // CHECK-INST: fmls za.h[w10, 1, vgx4], { z0.h - z3.h }, z10.h[4] // CHECK-ENCODING: [0x11,0xd8,0x1a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11ad811 fmls za.h[w10, 1], {z0.h - z3.h}, z10.h[4] // 11000001-00011010-11011000-00010001 // CHECK-INST: fmls za.h[w10, 1, vgx4], { z0.h - z3.h }, z10.h[4] // CHECK-ENCODING: [0x11,0xd8,0x1a,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11ad811 fmls za.h[w8, 5, vgx4], {z20.h - z23.h}, z14.h[5] // 11000001-00011110-10011010-10011101 // CHECK-INST: fmls za.h[w8, 5, vgx4], { z20.h - z23.h }, z14.h[5] // CHECK-ENCODING: [0x9d,0x9a,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e9a9d fmls za.h[w8, 5], {z20.h - z23.h}, z14.h[5] // 11000001-00011110-10011010-10011101 // CHECK-INST: fmls za.h[w8, 5, vgx4], { z20.h - z23.h }, z14.h[5] // CHECK-ENCODING: [0x9d,0x9a,0x1e,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11e9a9d fmls za.h[w11, 2, vgx4], {z8.h - z11.h}, z1.h[2] // 11000001-00010001-11110101-00010010 // CHECK-INST: fmls za.h[w11, 2, vgx4], { z8.h - z11.h }, z1.h[2] // CHECK-ENCODING: [0x12,0xf5,0x11,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c111f512 fmls za.h[w11, 2], {z8.h - z11.h}, z1.h[2] // 11000001-00010001-11110101-00010010 // CHECK-INST: fmls za.h[w11, 2, vgx4], { z8.h - z11.h }, z1.h[2] // CHECK-ENCODING: [0x12,0xf5,0x11,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c111f512 fmls za.h[w9, 7, vgx4], {z12.h - z15.h}, z11.h[4] // 11000001-00011011-10111001-10010111 // CHECK-INST: fmls za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h[4] // CHECK-ENCODING: [0x97,0xb9,0x1b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11bb997 fmls za.h[w9, 7], {z12.h - z15.h}, z11.h[4] // 11000001-00011011-10111001-10010111 // CHECK-INST: fmls za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h[4] // CHECK-ENCODING: [0x97,0xb9,0x1b,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c11bb997 fmls za.h[w8, 0, vgx4], {z0.h - z3.h}, {z0.h - z3.h} // 11000001-10100001-00010000-00011000 // CHECK-INST: fmls za.h[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h } // CHECK-ENCODING: [0x18,0x10,0xa1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a11018 fmls za.h[w8, 0], {z0.h - z3.h}, {z0.h - z3.h} // 11000001-10100001-00010000-00011000 // CHECK-INST: fmls za.h[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h } // CHECK-ENCODING: [0x18,0x10,0xa1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a11018 fmls za.h[w10, 5, vgx4], {z8.h - z11.h}, {z20.h - z23.h} // 11000001-10110101-01010001-00011101 // CHECK-INST: fmls za.h[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h } // CHECK-ENCODING: [0x1d,0x51,0xb5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b5511d fmls za.h[w10, 5], {z8.h - z11.h}, {z20.h - z23.h} // 11000001-10110101-01010001-00011101 // CHECK-INST: fmls za.h[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h } // CHECK-ENCODING: [0x1d,0x51,0xb5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b5511d fmls za.h[w11, 7, vgx4], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-10101001-01110001-10011111 // CHECK-INST: fmls za.h[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h } // CHECK-ENCODING: [0x9f,0x71,0xa9,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a9719f fmls za.h[w11, 7], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-10101001-01110001-10011111 // CHECK-INST: fmls za.h[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h } // CHECK-ENCODING: [0x9f,0x71,0xa9,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a9719f fmls za.h[w11, 7, vgx4], {z28.h - z31.h}, {z28.h - z31.h} // 11000001-10111101-01110011-10011111 // CHECK-INST: fmls za.h[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h } // CHECK-ENCODING: [0x9f,0x73,0xbd,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1bd739f fmls za.h[w11, 7], {z28.h - z31.h}, {z28.h - z31.h} // 11000001-10111101-01110011-10011111 // CHECK-INST: fmls za.h[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h } // CHECK-ENCODING: [0x9f,0x73,0xbd,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1bd739f fmls za.h[w8, 5, vgx4], {z16.h - z19.h}, {z16.h - z19.h} // 11000001-10110001-00010010-00011101 // CHECK-INST: fmls za.h[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h } // CHECK-ENCODING: [0x1d,0x12,0xb1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b1121d fmls za.h[w8, 5], {z16.h - z19.h}, {z16.h - z19.h} // 11000001-10110001-00010010-00011101 // CHECK-INST: fmls za.h[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h } // CHECK-ENCODING: [0x1d,0x12,0xb1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b1121d fmls za.h[w8, 1, vgx4], {z0.h - z3.h}, {z28.h - z31.h} // 11000001-10111101-00010000-00011001 // CHECK-INST: fmls za.h[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h } // CHECK-ENCODING: [0x19,0x10,0xbd,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1bd1019 fmls za.h[w8, 1], {z0.h - z3.h}, {z28.h - z31.h} // 11000001-10111101-00010000-00011001 // CHECK-INST: fmls za.h[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h } // CHECK-ENCODING: [0x19,0x10,0xbd,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1bd1019 fmls za.h[w10, 0, vgx4], {z16.h - z19.h}, {z20.h - z23.h} // 11000001-10110101-01010010-00011000 // CHECK-INST: fmls za.h[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h } // CHECK-ENCODING: [0x18,0x52,0xb5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b55218 fmls za.h[w10, 0], {z16.h - z19.h}, {z20.h - z23.h} // 11000001-10110101-01010010-00011000 // CHECK-INST: fmls za.h[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h } // CHECK-ENCODING: [0x18,0x52,0xb5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b55218 fmls za.h[w8, 0, vgx4], {z12.h - z15.h}, {z0.h - z3.h} // 11000001-10100001-00010001-10011000 // CHECK-INST: fmls za.h[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h } // CHECK-ENCODING: [0x98,0x11,0xa1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a11198 fmls za.h[w8, 0], {z12.h - z15.h}, {z0.h - z3.h} // 11000001-10100001-00010001-10011000 // CHECK-INST: fmls za.h[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h } // CHECK-ENCODING: [0x98,0x11,0xa1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a11198 fmls za.h[w10, 1, vgx4], {z0.h - z3.h}, {z24.h - z27.h} // 11000001-10111001-01010000-00011001 // CHECK-INST: fmls za.h[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h } // CHECK-ENCODING: [0x19,0x50,0xb9,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b95019 fmls za.h[w10, 1], {z0.h - z3.h}, {z24.h - z27.h} // 11000001-10111001-01010000-00011001 // CHECK-INST: fmls za.h[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h } // CHECK-ENCODING: [0x19,0x50,0xb9,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1b95019 fmls za.h[w8, 5, vgx4], {z20.h - z23.h}, {z28.h - z31.h} // 11000001-10111101-00010010-10011101 // CHECK-INST: fmls za.h[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h } // CHECK-ENCODING: [0x9d,0x12,0xbd,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1bd129d fmls za.h[w8, 5], {z20.h - z23.h}, {z28.h - z31.h} // 11000001-10111101-00010010-10011101 // CHECK-INST: fmls za.h[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h } // CHECK-ENCODING: [0x9d,0x12,0xbd,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1bd129d fmls za.h[w11, 2, vgx4], {z8.h - z11.h}, {z0.h - z3.h} // 11000001-10100001-01110001-00011010 // CHECK-INST: fmls za.h[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h } // CHECK-ENCODING: [0x1a,0x71,0xa1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a1711a fmls za.h[w11, 2], {z8.h - z11.h}, {z0.h - z3.h} // 11000001-10100001-01110001-00011010 // CHECK-INST: fmls za.h[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h } // CHECK-ENCODING: [0x1a,0x71,0xa1,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a1711a fmls za.h[w9, 7, vgx4], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-10101001-00110001-10011111 // CHECK-INST: fmls za.h[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h } // CHECK-ENCODING: [0x9f,0x31,0xa9,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a9319f fmls za.h[w9, 7], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-10101001-00110001-10011111 // CHECK-INST: fmls za.h[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h } // CHECK-ENCODING: [0x9f,0x31,0xa9,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: c1a9319f diff --git a/llvm/test/MC/AArch64/SME2p1/fmopa-diagnostics.s b/llvm/test/MC/AArch64/SME2p1/fmopa-diagnostics.s index def19a316c2ac..1c561959c25e0 100644 --- a/llvm/test/MC/AArch64/SME2p1/fmopa-diagnostics.s +++ b/llvm/test/MC/AArch64/SME2p1/fmopa-diagnostics.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 2>&1 < %s | FileCheck %s +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 2>&1 < %s | FileCheck %s // --------------------------------------------------------------------------// // Invalid predicate register diff --git a/llvm/test/MC/AArch64/SME2p1/fmopa.s b/llvm/test/MC/AArch64/SME2p1/fmopa.s index e53d21244fde3..0a586d3acc422 100644 --- a/llvm/test/MC/AArch64/SME2p1/fmopa.s +++ b/llvm/test/MC/AArch64/SME2p1/fmopa.s @@ -1,85 +1,85 @@ -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ -// RUN: | llvm-objdump -d --mattr=+sme2p1,+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ // RUN: | llvm-objdump -d --mattr=-sme2p1 - | FileCheck %s --check-prefix=CHECK-UNKNOWN -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \ -// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2p1,+sme-f16f16 -disassemble -show-encoding \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-f16f16 -disassemble -show-encoding \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST fmopa za0.h, p0/m, p0/m, z0.h, z0.h // 10000001-10000000-00000000-00001000 // CHECK-INST: fmopa za0.h, p0/m, p0/m, z0.h, z0.h // CHECK-ENCODING: [0x08,0x00,0x80,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 81800008 fmopa za1.h, p5/m, p2/m, z10.h, z21.h // 10000001-10010101-01010101-01001001 // CHECK-INST: fmopa za1.h, p5/m, p2/m, z10.h, z21.h // CHECK-ENCODING: [0x49,0x55,0x95,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 81955549 fmopa za1.h, p3/m, p7/m, z13.h, z8.h // 10000001-10001000-11101101-10101001 // CHECK-INST: fmopa za1.h, p3/m, p7/m, z13.h, z8.h // CHECK-ENCODING: [0xa9,0xed,0x88,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 8188eda9 fmopa za1.h, p7/m, p7/m, z31.h, z31.h // 10000001-10011111-11111111-11101001 // CHECK-INST: fmopa za1.h, p7/m, p7/m, z31.h, z31.h // CHECK-ENCODING: [0xe9,0xff,0x9f,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 819fffe9 fmopa za1.h, p3/m, p0/m, z17.h, z16.h // 10000001-10010000-00001110-00101001 // CHECK-INST: fmopa za1.h, p3/m, p0/m, z17.h, z16.h // CHECK-ENCODING: [0x29,0x0e,0x90,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 81900e29 fmopa za1.h, p1/m, p4/m, z1.h, z30.h // 10000001-10011110-10000100-00101001 // CHECK-INST: fmopa za1.h, p1/m, p4/m, z1.h, z30.h // CHECK-ENCODING: [0x29,0x84,0x9e,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 819e8429 fmopa za0.h, p5/m, p2/m, z19.h, z20.h // 10000001-10010100-01010110-01101000 // CHECK-INST: fmopa za0.h, p5/m, p2/m, z19.h, z20.h // CHECK-ENCODING: [0x68,0x56,0x94,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 81945668 fmopa za0.h, p6/m, p0/m, z12.h, z2.h // 10000001-10000010-00011001-10001000 // CHECK-INST: fmopa za0.h, p6/m, p0/m, z12.h, z2.h // CHECK-ENCODING: [0x88,0x19,0x82,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 81821988 fmopa za1.h, p2/m, p6/m, z1.h, z26.h // 10000001-10011010-11001000-00101001 // CHECK-INST: fmopa za1.h, p2/m, p6/m, z1.h, z26.h // CHECK-ENCODING: [0x29,0xc8,0x9a,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 819ac829 fmopa za1.h, p2/m, p0/m, z22.h, z30.h // 10000001-10011110-00001010-11001001 // CHECK-INST: fmopa za1.h, p2/m, p0/m, z22.h, z30.h // CHECK-ENCODING: [0xc9,0x0a,0x9e,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 819e0ac9 fmopa za0.h, p5/m, p7/m, z9.h, z1.h // 10000001-10000001-11110101-00101000 // CHECK-INST: fmopa za0.h, p5/m, p7/m, z9.h, z1.h // CHECK-ENCODING: [0x28,0xf5,0x81,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 8181f528 fmopa za1.h, p2/m, p5/m, z12.h, z11.h // 10000001-10001011-10101001-10001001 // CHECK-INST: fmopa za1.h, p2/m, p5/m, z12.h, z11.h // CHECK-ENCODING: [0x89,0xa9,0x8b,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 818ba989 diff --git a/llvm/test/MC/AArch64/SME2p1/fmops-diagnostics.s b/llvm/test/MC/AArch64/SME2p1/fmops-diagnostics.s index 75eea81132624..0ec227ae0e68e 100644 --- a/llvm/test/MC/AArch64/SME2p1/fmops-diagnostics.s +++ b/llvm/test/MC/AArch64/SME2p1/fmops-diagnostics.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 2>&1 < %s | FileCheck %s +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 2>&1 < %s | FileCheck %s // --------------------------------------------------------------------------// // Invalid predicate register diff --git a/llvm/test/MC/AArch64/SME2p1/fmops.s b/llvm/test/MC/AArch64/SME2p1/fmops.s index 325d4c125b606..597665d591501 100644 --- a/llvm/test/MC/AArch64/SME2p1/fmops.s +++ b/llvm/test/MC/AArch64/SME2p1/fmops.s @@ -1,84 +1,84 @@ -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ -// RUN: | llvm-objdump -d --mattr=+sme2p1,+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ // RUN: | llvm-objdump -d --mattr=-sme2p1 - | FileCheck %s --check-prefix=CHECK-UNKNOWN -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \ -// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2p1,+sme-f16f16 -disassemble -show-encoding \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-f16f16 -disassemble -show-encoding \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST fmops za0.h, p0/m, p0/m, z0.h, z0.h // 10000001-10000000-00000000-00011000 // CHECK-INST: fmops za0.h, p0/m, p0/m, z0.h, z0.h // CHECK-ENCODING: [0x18,0x00,0x80,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 81800018 fmops za1.h, p5/m, p2/m, z10.h, z21.h // 10000001-10010101-01010101-01011001 // CHECK-INST: fmops za1.h, p5/m, p2/m, z10.h, z21.h // CHECK-ENCODING: [0x59,0x55,0x95,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 81955559 fmops za1.h, p3/m, p7/m, z13.h, z8.h // 10000001-10001000-11101101-10111001 // CHECK-INST: fmops za1.h, p3/m, p7/m, z13.h, z8.h // CHECK-ENCODING: [0xb9,0xed,0x88,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 8188edb9 fmops za1.h, p7/m, p7/m, z31.h, z31.h // 10000001-10011111-11111111-11111001 // CHECK-INST: fmops za1.h, p7/m, p7/m, z31.h, z31.h // CHECK-ENCODING: [0xf9,0xff,0x9f,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 819ffff9 fmops za1.h, p3/m, p0/m, z17.h, z16.h // 10000001-10010000-00001110-00111001 // CHECK-INST: fmops za1.h, p3/m, p0/m, z17.h, z16.h // CHECK-ENCODING: [0x39,0x0e,0x90,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 81900e39 fmops za1.h, p1/m, p4/m, z1.h, z30.h // 10000001-10011110-10000100-00111001 // CHECK-INST: fmops za1.h, p1/m, p4/m, z1.h, z30.h // CHECK-ENCODING: [0x39,0x84,0x9e,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 819e8439 fmops za0.h, p5/m, p2/m, z19.h, z20.h // 10000001-10010100-01010110-01111000 // CHECK-INST: fmops za0.h, p5/m, p2/m, z19.h, z20.h // CHECK-ENCODING: [0x78,0x56,0x94,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 81945678 fmops za0.h, p6/m, p0/m, z12.h, z2.h // 10000001-10000010-00011001-10011000 // CHECK-INST: fmops za0.h, p6/m, p0/m, z12.h, z2.h // CHECK-ENCODING: [0x98,0x19,0x82,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 81821998 fmops za1.h, p2/m, p6/m, z1.h, z26.h // 10000001-10011010-11001000-00111001 // CHECK-INST: fmops za1.h, p2/m, p6/m, z1.h, z26.h // CHECK-ENCODING: [0x39,0xc8,0x9a,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 819ac839 fmops za1.h, p2/m, p0/m, z22.h, z30.h // 10000001-10011110-00001010-11011001 // CHECK-INST: fmops za1.h, p2/m, p0/m, z22.h, z30.h // CHECK-ENCODING: [0xd9,0x0a,0x9e,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 819e0ad9 fmops za0.h, p5/m, p7/m, z9.h, z1.h // 10000001-10000001-11110101-00111000 // CHECK-INST: fmops za0.h, p5/m, p7/m, z9.h, z1.h // CHECK-ENCODING: [0x38,0xf5,0x81,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 8181f538 fmops za1.h, p2/m, p5/m, z12.h, z11.h // 10000001-10001011-10101001-10011001 // CHECK-INST: fmops za1.h, p2/m, p5/m, z12.h, z11.h // CHECK-ENCODING: [0x99,0xa9,0x8b,0x81] -// CHECK-ERROR: instruction requires: sme2p1 sme-f16f16 +// CHECK-ERROR: instruction requires: sme-f16f16 // CHECK-UNKNOWN: 818ba999 diff --git a/llvm/test/MC/AArch64/SME2p1/fsub-diagnostics.s b/llvm/test/MC/AArch64/SME2p1/fsub-diagnostics.s index 716427a2f725d..60cef4260be94 100644 --- a/llvm/test/MC/AArch64/SME2p1/fsub-diagnostics.s +++ b/llvm/test/MC/AArch64/SME2p1/fsub-diagnostics.s @@ -1,5 +1,4 @@ -// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 2>&1 < %s | FileCheck %s - +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 2>&1 < %s | FileCheck %s // --------------------------------------------------------------------------// // Out of range index offset diff --git a/llvm/test/MC/AArch64/SME2p1/fsub.s b/llvm/test/MC/AArch64/SME2p1/fsub.s index b3735d554765a..66410008eb11d 100644 --- a/llvm/test/MC/AArch64/SME2p1/fsub.s +++ b/llvm/test/MC/AArch64/SME2p1/fsub.s @@ -1,296 +1,298 @@ -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f8f16 < %s \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-ERROR -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ -// RUN: | llvm-objdump -d --mattr=+sme2p1,+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST -// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-f16f16 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \ // RUN: | llvm-objdump -d --mattr=-sme2p1 - | FileCheck %s --check-prefix=CHECK-UNKNOWN -// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-f16f16 < %s \ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \ // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \ -// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2p1,+sme-f16f16 -disassemble -show-encoding \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-f16f16 -disassemble -show-encoding \ // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST fsub za.h[w8, 0], {z0.h - z1.h} // 11000001-10100100-00011100-00001000 // CHECK-INST: fsub za.h[w8, 0, vgx2], { z0.h, z1.h } // CHECK-ENCODING: [0x08,0x1c,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41c08 fsub za.h[w10, 5, vgx2], {z10.h, z11.h} // 11000001-10100100-01011101-01001101 // CHECK-INST: fsub za.h[w10, 5, vgx2], { z10.h, z11.h } // CHECK-ENCODING: [0x4d,0x5d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a45d4d fsub za.h[w10, 5], {z10.h - z11.h} // 11000001-10100100-01011101-01001101 // CHECK-INST: fsub za.h[w10, 5, vgx2], { z10.h, z11.h } // CHECK-ENCODING: [0x4d,0x5d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a45d4d fsub za.h[w11, 7, vgx2], {z12.h, z13.h} // 11000001-10100100-01111101-10001111 // CHECK-INST: fsub za.h[w11, 7, vgx2], { z12.h, z13.h } // CHECK-ENCODING: [0x8f,0x7d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a47d8f fsub za.h[w11, 7], {z12.h - z13.h} // 11000001-10100100-01111101-10001111 // CHECK-INST: fsub za.h[w11, 7, vgx2], { z12.h, z13.h } // CHECK-ENCODING: [0x8f,0x7d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a47d8f fsub za.h[w11, 7, vgx2], {z30.h, z31.h} // 11000001-10100100-01111111-11001111 // CHECK-INST: fsub za.h[w11, 7, vgx2], { z30.h, z31.h } // CHECK-ENCODING: [0xcf,0x7f,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a47fcf fsub za.h[w11, 7], {z30.h - z31.h} // 11000001-10100100-01111111-11001111 // CHECK-INST: fsub za.h[w11, 7, vgx2], { z30.h, z31.h } // CHECK-ENCODING: [0xcf,0x7f,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a47fcf fsub za.h[w8, 5, vgx2], {z16.h, z17.h} // 11000001-10100100-00011110-00001101 // CHECK-INST: fsub za.h[w8, 5, vgx2], { z16.h, z17.h } // CHECK-ENCODING: [0x0d,0x1e,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41e0d fsub za.h[w8, 5], {z16.h - z17.h} // 11000001-10100100-00011110-00001101 // CHECK-INST: fsub za.h[w8, 5, vgx2], { z16.h, z17.h } // CHECK-ENCODING: [0x0d,0x1e,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41e0d fsub za.h[w8, 1, vgx2], {z0.h, z1.h} // 11000001-10100100-00011100-00001001 // CHECK-INST: fsub za.h[w8, 1, vgx2], { z0.h, z1.h } // CHECK-ENCODING: [0x09,0x1c,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41c09 fsub za.h[w8, 1], {z0.h - z1.h} // 11000001-10100100-00011100-00001001 // CHECK-INST: fsub za.h[w8, 1, vgx2], { z0.h, z1.h } // CHECK-ENCODING: [0x09,0x1c,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41c09 fsub za.h[w10, 0, vgx2], {z18.h, z19.h} // 11000001-10100100-01011110, 01001000 // CHECK-INST: fsub za.h[w10, 0, vgx2], { z18.h, z19.h } // CHECK-ENCODING: [0x48,0x5e,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a45e48 fsub za.h[w10, 0], {z18.h - z19.h} // 11000001-10100100-01011110-01001000 // CHECK-INST: fsub za.h[w10, 0, vgx2], { z18.h, z19.h } // CHECK-ENCODING: [0x48,0x5e,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a45e48 fsub za.h[w8, 0, vgx2], {z12.h, z13.h} // 11000001-10100100-00011101-10001000 // CHECK-INST: fsub za.h[w8, 0, vgx2], { z12.h, z13.h } // CHECK-ENCODING: [0x88,0x1d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41d88 fsub za.h[w8, 0], {z12.h - z13.h} // 11000001-10100100-00011101-10001000 // CHECK-INST: fsub za.h[w8, 0, vgx2], { z12.h, z13.h } // CHECK-ENCODING: [0x88,0x1d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41d88 fsub za.h[w10, 1, vgx2], {z0.h, z1.h} // 11000001-10100100-01011100-00001001 // CHECK-INST: fsub za.h[w10, 1, vgx2], { z0.h, z1.h } // CHECK-ENCODING: [0x09,0x5c,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a45c09 fsub za.h[w10, 1], {z0.h - z1.h} // 11000001-10100100-01011100-00001001 // CHECK-INST: fsub za.h[w10, 1, vgx2], { z0.h, z1.h } // CHECK-ENCODING: [0x09,0x5c,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a45c09 fsub za.h[w8, 5, vgx2], {z22.h, z23.h} // 11000001-10100100-00011110, 11001101 // CHECK-INST: fsub za.h[w8, 5, vgx2], { z22.h, z23.h } // CHECK-ENCODING: [0xcd,0x1e,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41ecd fsub za.h[w8, 5], {z22.h - z23.h} // 11000001-10100100-00011110-11001101 // CHECK-INST: fsub za.h[w8, 5, vgx2], { z22.h, z23.h } // CHECK-ENCODING: [0xcd,0x1e,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a41ecd fsub za.h[w11, 2, vgx2], {z8.h, z9.h} // 11000001-10100100-01111101-00001010 // CHECK-INST: fsub za.h[w11, 2, vgx2], { z8.h, z9.h } // CHECK-ENCODING: [0x0a,0x7d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a47d0a fsub za.h[w11, 2], {z8.h - z9.h} // 11000001-10100100-01111101-00001010 // CHECK-INST: fsub za.h[w11, 2, vgx2], { z8.h, z9.h } // CHECK-ENCODING: [0x0a,0x7d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a47d0a fsub za.h[w9, 7, vgx2], {z12.h, z13.h} // 11000001-10100100-00111101-10001111 // CHECK-INST: fsub za.h[w9, 7, vgx2], { z12.h, z13.h } // CHECK-ENCODING: [0x8f,0x3d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a43d8f fsub za.h[w9, 7], {z12.h - z13.h} // 11000001-10100100-00111101-10001111 // CHECK-INST: fsub za.h[w9, 7, vgx2], { z12.h, z13.h } // CHECK-ENCODING: [0x8f,0x3d,0xa4,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a43d8f fsub za.h[w8, 0, vgx4], {z0.h - z3.h} // 11000001-10100101-00011100-00001000 // CHECK-INST: fsub za.h[w8, 0, vgx4], { z0.h - z3.h } // CHECK-ENCODING: [0x08,0x1c,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51c08 fsub za.h[w8, 0], {z0.h - z3.h} // 11000001-10100101-00011100-00001000 // CHECK-INST: fsub za.h[w8, 0, vgx4], { z0.h - z3.h } // CHECK-ENCODING: [0x08,0x1c,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51c08 fsub za.h[w10, 5, vgx4], {z8.h - z11.h} // 11000001-10100101-01011101-00001101 // CHECK-INST: fsub za.h[w10, 5, vgx4], { z8.h - z11.h } // CHECK-ENCODING: [0x0d,0x5d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a55d0d fsub za.h[w10, 5], {z8.h - z11.h} // 11000001-10100101-01011101-00001101 // CHECK-INST: fsub za.h[w10, 5, vgx4], { z8.h - z11.h } // CHECK-ENCODING: [0x0d,0x5d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a55d0d fsub za.h[w11, 7, vgx4], {z12.h - z15.h} // 11000001-10100101-01111101-10001111 // CHECK-INST: fsub za.h[w11, 7, vgx4], { z12.h - z15.h } // CHECK-ENCODING: [0x8f,0x7d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a57d8f fsub za.h[w11, 7], {z12.h - z15.h} // 11000001-10100101-01111101-10001111 // CHECK-INST: fsub za.h[w11, 7, vgx4], { z12.h - z15.h } // CHECK-ENCODING: [0x8f,0x7d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a57d8f fsub za.h[w11, 7, vgx4], {z28.h - z31.h} // 11000001-10100101-01111111-10001111 // CHECK-INST: fsub za.h[w11, 7, vgx4], { z28.h - z31.h } // CHECK-ENCODING: [0x8f,0x7f,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a57f8f fsub za.h[w11, 7], {z28.h - z31.h} // 11000001-10100101-01111111-10001111 // CHECK-INST: fsub za.h[w11, 7, vgx4], { z28.h - z31.h } // CHECK-ENCODING: [0x8f,0x7f,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a57f8f fsub za.h[w8, 5, vgx4], {z16.h - z19.h} // 11000001-10100101-00011110-00001101 // CHECK-INST: fsub za.h[w8, 5, vgx4], { z16.h - z19.h } // CHECK-ENCODING: [0x0d,0x1e,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51e0d fsub za.h[w8, 5], {z16.h - z19.h} // 11000001-10100101-00011110-00001101 // CHECK-INST: fsub za.h[w8, 5, vgx4], { z16.h - z19.h } // CHECK-ENCODING: [0x0d,0x1e,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51e0d fsub za.h[w8, 1, vgx4], {z0.h - z3.h} // 11000001-10100101-00011100-00001001 // CHECK-INST: fsub za.h[w8, 1, vgx4], { z0.h - z3.h } // CHECK-ENCODING: [0x09,0x1c,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51c09 fsub za.h[w8, 1], {z0.h - z3.h} // 11000001-10100101-00011100-00001001 // CHECK-INST: fsub za.h[w8, 1, vgx4], { z0.h - z3.h } // CHECK-ENCODING: [0x09,0x1c,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51c09 fsub za.h[w10, 0, vgx4], {z16.h - z19.h} // 11000001-10100101-01011110-00001000 // CHECK-INST: fsub za.h[w10, 0, vgx4], { z16.h - z19.h } // CHECK-ENCODING: [0x08,0x5e,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a55e08 fsub za.h[w10, 0], {z16.h - z19.h} // 11000001-10100101-01011110-00001000 // CHECK-INST: fsub za.h[w10, 0, vgx4], { z16.h - z19.h } // CHECK-ENCODING: [0x08,0x5e,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a55e08 fsub za.h[w8, 0, vgx4], {z12.h - z15.h} // 11000001-10100101-00011101-10001000 // CHECK-INST: fsub za.h[w8, 0, vgx4], { z12.h - z15.h } // CHECK-ENCODING: [0x88,0x1d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51d88 fsub za.h[w8, 0], {z12.h - z15.h} // 11000001-10100101-00011101-10001000 // CHECK-INST: fsub za.h[w8, 0, vgx4], { z12.h - z15.h } // CHECK-ENCODING: [0x88,0x1d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51d88 fsub za.h[w10, 1, vgx4], {z0.h - z3.h} // 11000001-10100101-01011100-00001001 // CHECK-INST: fsub za.h[w10, 1, vgx4], { z0.h - z3.h } // CHECK-ENCODING: [0x09,0x5c,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a55c09 fsub za.h[w10, 1], {z0.h - z3.h} // 11000001-10100101-01011100-00001001 // CHECK-INST: fsub za.h[w10, 1, vgx4], { z0.h - z3.h } // CHECK-ENCODING: [0x09,0x5c,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a55c09 fsub za.h[w8, 5, vgx4], {z20.h - z23.h} // 11000001-10100101-00011110-10001101 // CHECK-INST: fsub za.h[w8, 5, vgx4], { z20.h - z23.h } // CHECK-ENCODING: [0x8d,0x1e,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51e8d fsub za.h[w8, 5], {z20.h - z23.h} // 11000001-10100101-00011110-10001101 // CHECK-INST: fsub za.h[w8, 5, vgx4], { z20.h - z23.h } // CHECK-ENCODING: [0x8d,0x1e,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a51e8d fsub za.h[w11, 2, vgx4], {z8.h - z11.h} // 11000001-10100101-01111101-00001010 // CHECK-INST: fsub za.h[w11, 2, vgx4], { z8.h - z11.h } // CHECK-ENCODING: [0x0a,0x7d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a57d0a fsub za.h[w11, 2], {z8.h - z11.h} // 11000001-10100101-01111101-00001010 // CHECK-INST: fsub za.h[w11, 2, vgx4], { z8.h - z11.h } // CHECK-ENCODING: [0x0a,0x7d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a57d0a fsub za.h[w9, 7, vgx4], {z12.h - z15.h} // 11000001-10100101-00111101-10001111 // CHECK-INST: fsub za.h[w9, 7, vgx4], { z12.h - z15.h } // CHECK-ENCODING: [0x8f,0x3d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a53d8f fsub za.h[w9, 7], {z12.h - z15.h} // 11000001-10100101-00111101-10001111 // CHECK-INST: fsub za.h[w9, 7, vgx4], { z12.h - z15.h } // CHECK-ENCODING: [0x8f,0x3d,0xa5,0xc1] -// CHECK-ERROR: instruction requires: sme2p1 +// CHECK-ERROR: instruction requires: sme-f16f16 or sme-f8f16 // CHECK-UNKNOWN: c1a53d8f