diff --git a/llvm/test/Analysis/CostModel/RISCV/rvv-extractelement.ll b/llvm/test/Analysis/CostModel/RISCV/rvv-extractelement.ll new file mode 100644 index 0000000000000..4a5260d60f176 --- /dev/null +++ b/llvm/test/Analysis/CostModel/RISCV/rvv-extractelement.ll @@ -0,0 +1,490 @@ +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv32 -mattr=+v,+f,+d,+zfh,+experimental-zvfh -riscv-v-vector-bits-min=-1 < %s | FileCheck %s --check-prefixes=RV32,RV32V +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+experimental-zvfh -riscv-v-vector-bits-min=-1 < %s | FileCheck %s --check-prefixes=RV64 +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv32 -mattr=+zve64x -riscv-v-vector-bits-min=-1 < %s | FileCheck %s --check-prefixes=RV32,RV32ZVE64X +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv64 -mattr=+zve64x -riscv-v-vector-bits-min=-1 < %s | FileCheck %s --check-prefixes=RV64 +; Check that we don't crash querying costs when vectors are not enabled. +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv64 + +define void @extractelement_int() { +; RV32-LABEL: 'extractelement_int' +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i1_0 = extractelement <2 x i1> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i1_0 = extractelement <4 x i1> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i1_0 = extractelement <8 x i1> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i1_0 = extractelement <16 x i1> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i1_0 = extractelement <32 x i1> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i1_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i1_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i1_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i1_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i1_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_0 = extractelement <2 x i8> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_0 = extractelement <4 x i8> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_0 = extractelement <8 x i8> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_0 = extractelement <16 x i8> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i8_0 = extractelement <32 x i8> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i8_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i8_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i8_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_0 = extractelement <2 x i16> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_0 = extractelement <4 x i16> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_0 = extractelement <8 x i16> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_0 = extractelement <16 x i16> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_0 = extractelement <2 x i32> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_0 = extractelement <4 x i32> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_0 = extractelement <8 x i32> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_0 = extractelement <16 x i32> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_0 = extractelement <2 x i64> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_0 = extractelement <4 x i64> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_0 = extractelement <8 x i64> undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i64_0 = extractelement undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i1_1 = extractelement <2 x i1> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i1_1 = extractelement <4 x i1> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i1_1 = extractelement <8 x i1> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i1_1 = extractelement <16 x i1> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i1_1 = extractelement <32 x i1> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i1_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i1_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i1_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i1_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i1_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_1 = extractelement <2 x i8> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_1 = extractelement <4 x i8> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_1 = extractelement <8 x i8> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_1 = extractelement <16 x i8> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i8_1 = extractelement <32 x i8> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i8_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i8_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i8_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_1 = extractelement <2 x i16> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_1 = extractelement <4 x i16> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_1 = extractelement <8 x i16> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_1 = extractelement <16 x i16> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_1 = extractelement <2 x i32> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_1 = extractelement <4 x i32> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_1 = extractelement <8 x i32> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_1 = extractelement <16 x i32> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_1 = extractelement <2 x i64> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_1 = extractelement <4 x i64> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_1 = extractelement <8 x i64> undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i64_1 = extractelement undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RV64-LABEL: 'extractelement_int' +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i1_0 = extractelement <2 x i1> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i1_0 = extractelement <4 x i1> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i1_0 = extractelement <8 x i1> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i1_0 = extractelement <16 x i1> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i1_0 = extractelement <32 x i1> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i1_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i1_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i1_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i1_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i1_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_0 = extractelement <2 x i8> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_0 = extractelement <4 x i8> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_0 = extractelement <8 x i8> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_0 = extractelement <16 x i8> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i8_0 = extractelement <32 x i8> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i8_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i8_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i8_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_0 = extractelement <2 x i16> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_0 = extractelement <4 x i16> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_0 = extractelement <8 x i16> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_0 = extractelement <16 x i16> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_0 = extractelement <2 x i32> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_0 = extractelement <4 x i32> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_0 = extractelement <8 x i32> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_0 = extractelement <16 x i32> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i64_0 = extractelement <2 x i64> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_0 = extractelement <4 x i64> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i64_0 = extractelement <8 x i64> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i64_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i64_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i64_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i1_1 = extractelement <2 x i1> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i1_1 = extractelement <4 x i1> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i1_1 = extractelement <8 x i1> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i1_1 = extractelement <16 x i1> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i1_1 = extractelement <32 x i1> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i1_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i1_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i1_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i1_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i1_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_1 = extractelement <2 x i8> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_1 = extractelement <4 x i8> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_1 = extractelement <8 x i8> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_1 = extractelement <16 x i8> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i8_1 = extractelement <32 x i8> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i8_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i8_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i8_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_1 = extractelement <2 x i16> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_1 = extractelement <4 x i16> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_1 = extractelement <8 x i16> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_1 = extractelement <16 x i16> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_1 = extractelement <2 x i32> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_1 = extractelement <4 x i32> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_1 = extractelement <8 x i32> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_1 = extractelement <16 x i32> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i64_1 = extractelement <2 x i64> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_1 = extractelement <4 x i64> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i64_1 = extractelement <8 x i64> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i64_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i64_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i64_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %v2i1_0 = extractelement <2 x i1> undef, i32 0 + %v4i1_0 = extractelement <4 x i1> undef, i32 0 + %v8i1_0 = extractelement <8 x i1> undef, i32 0 + %v16i1_0 = extractelement <16 x i1> undef, i32 0 + %v32i1_0 = extractelement <32 x i1> undef, i32 0 + + %nxv2i1_0 = extractelement undef, i32 0 + %nxv4i1_0 = extractelement undef, i32 0 + %nxv8i1_0 = extractelement undef, i32 0 + %nxv16i1_0 = extractelement undef, i32 0 + %nxv32i1_0 = extractelement undef, i32 0 + + %v2i8_0 = extractelement <2 x i8> undef, i32 0 + %v4i8_0 = extractelement <4 x i8> undef, i32 0 + %v8i8_0 = extractelement <8 x i8> undef, i32 0 + %v16i8_0 = extractelement <16 x i8> undef, i32 0 + %v32i8_0 = extractelement <32 x i8> undef, i32 0 + + %nxv2i8_0 = extractelement undef, i32 0 + %nxv4i8_0 = extractelement undef, i32 0 + %nxv8i8_0 = extractelement undef, i32 0 + %nxv16i8_0 = extractelement undef, i32 0 + %nxv32i8_0 = extractelement undef, i32 0 + + %v2i16_0 = extractelement <2 x i16> undef, i32 0 + %v4i16_0 = extractelement <4 x i16> undef, i32 0 + %v8i16_0 = extractelement <8 x i16> undef, i32 0 + %v16i16_0 = extractelement <16 x i16> undef, i32 0 + + %nxv2i16_0 = extractelement undef, i32 0 + %nxv4i16_0 = extractelement undef, i32 0 + %nxv8i16_0 = extractelement undef, i32 0 + %nxv16i16_0 = extractelement undef, i32 0 + + %v2i32_0 = extractelement <2 x i32> undef, i32 0 + %v4i32_0 = extractelement <4 x i32> undef, i32 0 + %v8i32_0 = extractelement <8 x i32> undef, i32 0 + %v16i32_0 = extractelement <16 x i32> undef, i32 0 + + %nxv2i32_0 = extractelement undef, i32 0 + %nxv4i32_0 = extractelement undef, i32 0 + %nxv8i32_0 = extractelement undef, i32 0 + %nxv16i32_0 = extractelement undef, i32 0 + + %v2i64_0 = extractelement <2 x i64> undef, i32 0 + %v4i64_0 = extractelement <4 x i64> undef, i32 0 + %v8i64_0 = extractelement <8 x i64> undef, i32 0 + + %nxv2i64_0 = extractelement undef, i32 0 + %nxv4i64_0 = extractelement undef, i32 0 + %nxv8i64_0 = extractelement undef, i32 0 + + %v2i1_1 = extractelement <2 x i1> undef, i32 1 + %v4i1_1 = extractelement <4 x i1> undef, i32 1 + %v8i1_1 = extractelement <8 x i1> undef, i32 1 + %v16i1_1 = extractelement <16 x i1> undef, i32 1 + %v32i1_1 = extractelement <32 x i1> undef, i32 1 + + %nxv2i1_1 = extractelement undef, i32 1 + %nxv4i1_1 = extractelement undef, i32 1 + %nxv8i1_1 = extractelement undef, i32 1 + %nxv16i1_1 = extractelement undef, i32 1 + %nxv32i1_1 = extractelement undef, i32 1 + + %v2i8_1 = extractelement <2 x i8> undef, i32 1 + %v4i8_1 = extractelement <4 x i8> undef, i32 1 + %v8i8_1 = extractelement <8 x i8> undef, i32 1 + %v16i8_1 = extractelement <16 x i8> undef, i32 1 + %v32i8_1 = extractelement <32 x i8> undef, i32 1 + + %nxv2i8_1 = extractelement undef, i32 1 + %nxv4i8_1 = extractelement undef, i32 1 + %nxv8i8_1 = extractelement undef, i32 1 + %nxv16i8_1 = extractelement undef, i32 1 + %nxv32i8_1 = extractelement undef, i32 1 + + %v2i16_1 = extractelement <2 x i16> undef, i32 1 + %v4i16_1 = extractelement <4 x i16> undef, i32 1 + %v8i16_1 = extractelement <8 x i16> undef, i32 1 + %v16i16_1 = extractelement <16 x i16> undef, i32 1 + + %nxv2i16_1 = extractelement undef, i32 1 + %nxv4i16_1 = extractelement undef, i32 1 + %nxv8i16_1 = extractelement undef, i32 1 + %nxv16i16_1 = extractelement undef, i32 1 + + %v2i32_1 = extractelement <2 x i32> undef, i32 1 + %v4i32_1 = extractelement <4 x i32> undef, i32 1 + %v8i32_1 = extractelement <8 x i32> undef, i32 1 + %v16i32_1 = extractelement <16 x i32> undef, i32 1 + + %nxv2i32_1 = extractelement undef, i32 1 + %nxv4i32_1 = extractelement undef, i32 1 + %nxv8i32_1 = extractelement undef, i32 1 + %nxv16i32_1 = extractelement undef, i32 1 + + %v2i64_1 = extractelement <2 x i64> undef, i32 1 + %v4i64_1 = extractelement <4 x i64> undef, i32 1 + %v8i64_1 = extractelement <8 x i64> undef, i32 1 + + %nxv2i64_1 = extractelement undef, i32 1 + %nxv4i64_1 = extractelement undef, i32 1 + %nxv8i64_1 = extractelement undef, i32 1 + + ret void +} + +define void @extractelement_fp() { +; RV32V-LABEL: 'extractelement_fp' +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_0 = extractelement <2 x half> undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_0 = extractelement <4 x half> undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_0 = extractelement <8 x half> undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_0 = extractelement <16 x half> undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_0 = extractelement undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_0 = extractelement undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_0 = extractelement undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_0 = extractelement undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_0 = extractelement <2 x float> undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_0 = extractelement <4 x float> undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_0 = extractelement <8 x float> undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_0 = extractelement <16 x float> undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_0 = extractelement undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_0 = extractelement undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_0 = extractelement undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_0 = extractelement undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_0 = extractelement <2 x double> undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_0 = extractelement <4 x double> undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_0 = extractelement <8 x double> undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_0 = extractelement undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_0 = extractelement undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_0 = extractelement undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_1 = extractelement <2 x half> undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_1 = extractelement <4 x half> undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_1 = extractelement <8 x half> undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_1 = extractelement <16 x half> undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_1 = extractelement undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_1 = extractelement undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_1 = extractelement undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_1 = extractelement undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_1 = extractelement <2 x float> undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_1 = extractelement <4 x float> undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_1 = extractelement <8 x float> undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_1 = extractelement <16 x float> undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_1 = extractelement undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_1 = extractelement undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_1 = extractelement undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_1 = extractelement undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_1 = extractelement <2 x double> undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_1 = extractelement <4 x double> undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_1 = extractelement <8 x double> undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_1 = extractelement undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_1 = extractelement undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_1 = extractelement undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RV64-LABEL: 'extractelement_fp' +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_0 = extractelement <2 x half> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_0 = extractelement <4 x half> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_0 = extractelement <8 x half> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_0 = extractelement <16 x half> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_0 = extractelement <2 x float> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_0 = extractelement <4 x float> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_0 = extractelement <8 x float> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_0 = extractelement <16 x float> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_0 = extractelement <2 x double> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_0 = extractelement <4 x double> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_0 = extractelement <8 x double> undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_0 = extractelement undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_1 = extractelement <2 x half> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_1 = extractelement <4 x half> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_1 = extractelement <8 x half> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_1 = extractelement <16 x half> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_1 = extractelement <2 x float> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_1 = extractelement <4 x float> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_1 = extractelement <8 x float> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_1 = extractelement <16 x float> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_1 = extractelement <2 x double> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_1 = extractelement <4 x double> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_1 = extractelement <8 x double> undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_1 = extractelement undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RV32ZVE64X-LABEL: 'extractelement_fp' +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_0 = extractelement <2 x half> undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_0 = extractelement <4 x half> undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_0 = extractelement <8 x half> undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_0 = extractelement <16 x half> undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_0 = extractelement undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_0 = extractelement undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_0 = extractelement undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_0 = extractelement undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_0 = extractelement <2 x float> undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_0 = extractelement <4 x float> undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_0 = extractelement <8 x float> undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_0 = extractelement <16 x float> undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_0 = extractelement undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_0 = extractelement undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_0 = extractelement undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_0 = extractelement undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f64_0 = extractelement <2 x double> undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_0 = extractelement <4 x double> undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_0 = extractelement <8 x double> undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_0 = extractelement undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_0 = extractelement undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f64_0 = extractelement undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_1 = extractelement <2 x half> undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_1 = extractelement <4 x half> undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_1 = extractelement <8 x half> undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_1 = extractelement <16 x half> undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_1 = extractelement undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_1 = extractelement undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_1 = extractelement undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_1 = extractelement undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_1 = extractelement <2 x float> undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_1 = extractelement <4 x float> undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_1 = extractelement <8 x float> undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_1 = extractelement <16 x float> undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_1 = extractelement undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_1 = extractelement undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_1 = extractelement undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_1 = extractelement undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f64_1 = extractelement <2 x double> undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_1 = extractelement <4 x double> undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_1 = extractelement <8 x double> undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_1 = extractelement undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_1 = extractelement undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f64_1 = extractelement undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %v2f16_0 = extractelement <2 x half> undef, i32 0 + %v4f16_0 = extractelement <4 x half> undef, i32 0 + %v8f16_0 = extractelement <8 x half> undef, i32 0 + %v16f16_0 = extractelement <16 x half> undef, i32 0 + + %nxv2f16_0 = extractelement undef, i32 0 + %nxv4f16_0 = extractelement undef, i32 0 + %nxv8f16_0 = extractelement undef, i32 0 + %nxv16f16_0 = extractelement undef, i32 0 + + %v2f32_0 = extractelement <2 x float> undef, i32 0 + %v4f32_0 = extractelement <4 x float> undef, i32 0 + %v8f32_0 = extractelement <8 x float> undef, i32 0 + %v16f32_0 = extractelement <16 x float> undef, i32 0 + + %nxv2f32_0 = extractelement undef, i32 0 + %nxv4f32_0 = extractelement undef, i32 0 + %nxv8f32_0 = extractelement undef, i32 0 + %nxv16f32_0 = extractelement undef, i32 0 + + %v2f64_0 = extractelement <2 x double> undef, i32 0 + %v4f64_0 = extractelement <4 x double> undef, i32 0 + %v8f64_0 = extractelement <8 x double> undef, i32 0 + + %nxv2f64_0 = extractelement undef, i32 0 + %nxv4f64_0 = extractelement undef, i32 0 + %nxv8f64_0 = extractelement undef, i32 0 + + %v2f16_1 = extractelement <2 x half> undef, i32 1 + %v4f16_1 = extractelement <4 x half> undef, i32 1 + %v8f16_1 = extractelement <8 x half> undef, i32 1 + %v16f16_1 = extractelement <16 x half> undef, i32 1 + + %nxv2f16_1 = extractelement undef, i32 1 + %nxv4f16_1 = extractelement undef, i32 1 + %nxv8f16_1 = extractelement undef, i32 1 + %nxv16f16_1 = extractelement undef, i32 1 + + %v2f32_1 = extractelement <2 x float> undef, i32 1 + %v4f32_1 = extractelement <4 x float> undef, i32 1 + %v8f32_1 = extractelement <8 x float> undef, i32 1 + %v16f32_1 = extractelement <16 x float> undef, i32 1 + + %nxv2f32_1 = extractelement undef, i32 1 + %nxv4f32_1 = extractelement undef, i32 1 + %nxv8f32_1 = extractelement undef, i32 1 + %nxv16f32_1 = extractelement undef, i32 1 + + %v2f64_1 = extractelement <2 x double> undef, i32 1 + %v4f64_1 = extractelement <4 x double> undef, i32 1 + %v8f64_1 = extractelement <8 x double> undef, i32 1 + + %nxv2f64_1 = extractelement undef, i32 1 + %nxv4f64_1 = extractelement undef, i32 1 + %nxv8f64_1 = extractelement undef, i32 1 + + ret void +} diff --git a/llvm/test/Analysis/CostModel/RISCV/rvv-insertelement.ll b/llvm/test/Analysis/CostModel/RISCV/rvv-insertelement.ll new file mode 100644 index 0000000000000..36622e3689f22 --- /dev/null +++ b/llvm/test/Analysis/CostModel/RISCV/rvv-insertelement.ll @@ -0,0 +1,490 @@ +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv32 -mattr=+v,+f,+d,+zfh,+experimental-zvfh -riscv-v-vector-bits-min=-1 < %s | FileCheck %s --check-prefixes=RV32,RV32V +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+experimental-zvfh -riscv-v-vector-bits-min=-1 < %s | FileCheck %s --check-prefixes=RV64 +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv32 -mattr=+zve64x -riscv-v-vector-bits-min=-1 < %s | FileCheck %s --check-prefixes=RV32,RV32ZVE64X +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv64 -mattr=+zve64x -riscv-v-vector-bits-min=-1 < %s | FileCheck %s --check-prefixes=RV64 +; Check that we don't crash querying costs when vectors are not enabled. +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv64 + +define void @insertelement_int() { +; RV32-LABEL: 'insertelement_int' +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i1_0 = insertelement <2 x i1> undef, i1 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i1_0 = insertelement <4 x i1> undef, i1 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i1_0 = insertelement <8 x i1> undef, i1 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i1_0 = insertelement <16 x i1> undef, i1 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i1_0 = insertelement <32 x i1> undef, i1 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i1_0 = insertelement undef, i1 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i1_0 = insertelement undef, i1 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i1_0 = insertelement undef, i1 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i1_0 = insertelement undef, i1 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i1_0 = insertelement undef, i1 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_0 = insertelement <2 x i8> undef, i8 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_0 = insertelement <4 x i8> undef, i8 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_0 = insertelement <8 x i8> undef, i8 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_0 = insertelement <16 x i8> undef, i8 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i8_0 = insertelement <32 x i8> undef, i8 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_0 = insertelement undef, i8 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_0 = insertelement undef, i8 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i8_0 = insertelement undef, i8 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i8_0 = insertelement undef, i8 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i8_0 = insertelement undef, i8 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_0 = insertelement <2 x i16> undef, i16 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_0 = insertelement <4 x i16> undef, i16 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_0 = insertelement <8 x i16> undef, i16 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_0 = insertelement <16 x i16> undef, i16 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_0 = insertelement undef, i16 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_0 = insertelement undef, i16 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_0 = insertelement undef, i16 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_0 = insertelement undef, i16 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_0 = insertelement <2 x i32> undef, i32 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_0 = insertelement <4 x i32> undef, i32 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_0 = insertelement <8 x i32> undef, i32 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_0 = insertelement <16 x i32> undef, i32 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_0 = insertelement undef, i32 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_0 = insertelement undef, i32 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_0 = insertelement undef, i32 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_0 = insertelement undef, i32 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_0 = insertelement <2 x i64> undef, i64 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_0 = insertelement <4 x i64> undef, i64 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_0 = insertelement <8 x i64> undef, i64 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_0 = insertelement undef, i64 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_0 = insertelement undef, i64 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i64_0 = insertelement undef, i64 undef, i32 0 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i1_1 = insertelement <2 x i1> undef, i1 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i1_1 = insertelement <4 x i1> undef, i1 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i1_1 = insertelement <8 x i1> undef, i1 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i1_1 = insertelement <16 x i1> undef, i1 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i1_1 = insertelement <32 x i1> undef, i1 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i1_1 = insertelement undef, i1 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i1_1 = insertelement undef, i1 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i1_1 = insertelement undef, i1 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i1_1 = insertelement undef, i1 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i1_1 = insertelement undef, i1 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_1 = insertelement <2 x i8> undef, i8 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_1 = insertelement <4 x i8> undef, i8 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_1 = insertelement <8 x i8> undef, i8 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_1 = insertelement <16 x i8> undef, i8 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i8_1 = insertelement <32 x i8> undef, i8 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_1 = insertelement undef, i8 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_1 = insertelement undef, i8 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i8_1 = insertelement undef, i8 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i8_1 = insertelement undef, i8 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i8_1 = insertelement undef, i8 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_1 = insertelement <2 x i16> undef, i16 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_1 = insertelement <4 x i16> undef, i16 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_1 = insertelement <8 x i16> undef, i16 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_1 = insertelement <16 x i16> undef, i16 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_1 = insertelement undef, i16 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_1 = insertelement undef, i16 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_1 = insertelement undef, i16 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_1 = insertelement undef, i16 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_1 = insertelement <2 x i32> undef, i32 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_1 = insertelement <4 x i32> undef, i32 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_1 = insertelement <8 x i32> undef, i32 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_1 = insertelement <16 x i32> undef, i32 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_1 = insertelement undef, i32 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_1 = insertelement undef, i32 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_1 = insertelement undef, i32 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_1 = insertelement undef, i32 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_1 = insertelement <2 x i64> undef, i64 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i64_1 = insertelement <4 x i64> undef, i64 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8i64_1 = insertelement <8 x i64> undef, i64 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2i64_1 = insertelement undef, i64 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4i64_1 = insertelement undef, i64 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8i64_1 = insertelement undef, i64 undef, i32 1 +; RV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RV64-LABEL: 'insertelement_int' +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i1_0 = insertelement <2 x i1> undef, i1 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i1_0 = insertelement <4 x i1> undef, i1 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i1_0 = insertelement <8 x i1> undef, i1 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i1_0 = insertelement <16 x i1> undef, i1 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i1_0 = insertelement <32 x i1> undef, i1 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i1_0 = insertelement undef, i1 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i1_0 = insertelement undef, i1 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i1_0 = insertelement undef, i1 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i1_0 = insertelement undef, i1 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i1_0 = insertelement undef, i1 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_0 = insertelement <2 x i8> undef, i8 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_0 = insertelement <4 x i8> undef, i8 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_0 = insertelement <8 x i8> undef, i8 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_0 = insertelement <16 x i8> undef, i8 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i8_0 = insertelement <32 x i8> undef, i8 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_0 = insertelement undef, i8 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_0 = insertelement undef, i8 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i8_0 = insertelement undef, i8 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i8_0 = insertelement undef, i8 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i8_0 = insertelement undef, i8 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_0 = insertelement <2 x i16> undef, i16 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_0 = insertelement <4 x i16> undef, i16 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_0 = insertelement <8 x i16> undef, i16 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_0 = insertelement <16 x i16> undef, i16 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_0 = insertelement undef, i16 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_0 = insertelement undef, i16 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_0 = insertelement undef, i16 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_0 = insertelement undef, i16 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_0 = insertelement <2 x i32> undef, i32 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_0 = insertelement <4 x i32> undef, i32 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_0 = insertelement <8 x i32> undef, i32 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_0 = insertelement <16 x i32> undef, i32 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_0 = insertelement undef, i32 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_0 = insertelement undef, i32 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_0 = insertelement undef, i32 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_0 = insertelement undef, i32 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i64_0 = insertelement <2 x i64> undef, i64 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_0 = insertelement <4 x i64> undef, i64 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i64_0 = insertelement <8 x i64> undef, i64 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i64_0 = insertelement undef, i64 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i64_0 = insertelement undef, i64 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i64_0 = insertelement undef, i64 undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i1_1 = insertelement <2 x i1> undef, i1 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i1_1 = insertelement <4 x i1> undef, i1 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i1_1 = insertelement <8 x i1> undef, i1 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i1_1 = insertelement <16 x i1> undef, i1 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i1_1 = insertelement <32 x i1> undef, i1 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i1_1 = insertelement undef, i1 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i1_1 = insertelement undef, i1 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i1_1 = insertelement undef, i1 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i1_1 = insertelement undef, i1 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i1_1 = insertelement undef, i1 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i8_1 = insertelement <2 x i8> undef, i8 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i8_1 = insertelement <4 x i8> undef, i8 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i8_1 = insertelement <8 x i8> undef, i8 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i8_1 = insertelement <16 x i8> undef, i8 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v32i8_1 = insertelement <32 x i8> undef, i8 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i8_1 = insertelement undef, i8 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i8_1 = insertelement undef, i8 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i8_1 = insertelement undef, i8 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i8_1 = insertelement undef, i8 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv32i8_1 = insertelement undef, i8 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16_1 = insertelement <2 x i16> undef, i16 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i16_1 = insertelement <4 x i16> undef, i16 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i16_1 = insertelement <8 x i16> undef, i16 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i16_1 = insertelement <16 x i16> undef, i16 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i16_1 = insertelement undef, i16 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i16_1 = insertelement undef, i16 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i16_1 = insertelement undef, i16 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i16_1 = insertelement undef, i16 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i32_1 = insertelement <2 x i32> undef, i32 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i32_1 = insertelement <4 x i32> undef, i32 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i32_1 = insertelement <8 x i32> undef, i32 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16i32_1 = insertelement <16 x i32> undef, i32 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i32_1 = insertelement undef, i32 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i32_1 = insertelement undef, i32 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i32_1 = insertelement undef, i32 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16i32_1 = insertelement undef, i32 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i64_1 = insertelement <2 x i64> undef, i64 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_1 = insertelement <4 x i64> undef, i64 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8i64_1 = insertelement <8 x i64> undef, i64 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2i64_1 = insertelement undef, i64 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4i64_1 = insertelement undef, i64 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8i64_1 = insertelement undef, i64 undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %v2i1_0 = insertelement <2 x i1> undef, i1 undef, i32 0 + %v4i1_0 = insertelement <4 x i1> undef, i1 undef, i32 0 + %v8i1_0 = insertelement <8 x i1> undef, i1 undef, i32 0 + %v16i1_0 = insertelement <16 x i1> undef, i1 undef, i32 0 + %v32i1_0 = insertelement <32 x i1> undef, i1 undef, i32 0 + + %nxv2i1_0 = insertelement undef, i1 undef, i32 0 + %nxv4i1_0 = insertelement undef, i1 undef, i32 0 + %nxv8i1_0 = insertelement undef, i1 undef, i32 0 + %nxv16i1_0 = insertelement undef, i1 undef, i32 0 + %nxv32i1_0 = insertelement undef, i1 undef, i32 0 + + %v2i8_0 = insertelement <2 x i8> undef, i8 undef, i32 0 + %v4i8_0 = insertelement <4 x i8> undef, i8 undef, i32 0 + %v8i8_0 = insertelement <8 x i8> undef, i8 undef, i32 0 + %v16i8_0 = insertelement <16 x i8> undef, i8 undef, i32 0 + %v32i8_0 = insertelement <32 x i8> undef, i8 undef, i32 0 + + %nxv2i8_0 = insertelement undef, i8 undef, i32 0 + %nxv4i8_0 = insertelement undef, i8 undef, i32 0 + %nxv8i8_0 = insertelement undef, i8 undef, i32 0 + %nxv16i8_0 = insertelement undef, i8 undef, i32 0 + %nxv32i8_0 = insertelement undef, i8 undef, i32 0 + + %v2i16_0 = insertelement <2 x i16> undef, i16 undef, i32 0 + %v4i16_0 = insertelement <4 x i16> undef, i16 undef, i32 0 + %v8i16_0 = insertelement <8 x i16> undef, i16 undef, i32 0 + %v16i16_0 = insertelement <16 x i16> undef, i16 undef, i32 0 + + %nxv2i16_0 = insertelement undef, i16 undef, i32 0 + %nxv4i16_0 = insertelement undef, i16 undef, i32 0 + %nxv8i16_0 = insertelement undef, i16 undef, i32 0 + %nxv16i16_0 = insertelement undef, i16 undef, i32 0 + + %v2i32_0 = insertelement <2 x i32> undef, i32 undef, i32 0 + %v4i32_0 = insertelement <4 x i32> undef, i32 undef, i32 0 + %v8i32_0 = insertelement <8 x i32> undef, i32 undef, i32 0 + %v16i32_0 = insertelement <16 x i32> undef, i32 undef, i32 0 + + %nxv2i32_0 = insertelement undef, i32 undef, i32 0 + %nxv4i32_0 = insertelement undef, i32 undef, i32 0 + %nxv8i32_0 = insertelement undef, i32 undef, i32 0 + %nxv16i32_0 = insertelement undef, i32 undef, i32 0 + + %v2i64_0 = insertelement <2 x i64> undef, i64 undef, i32 0 + %v4i64_0 = insertelement <4 x i64> undef, i64 undef, i32 0 + %v8i64_0 = insertelement <8 x i64> undef, i64 undef, i32 0 + + %nxv2i64_0 = insertelement undef, i64 undef, i32 0 + %nxv4i64_0 = insertelement undef, i64 undef, i32 0 + %nxv8i64_0 = insertelement undef, i64 undef, i32 0 + + %v2i1_1 = insertelement <2 x i1> undef, i1 undef, i32 1 + %v4i1_1 = insertelement <4 x i1> undef, i1 undef, i32 1 + %v8i1_1 = insertelement <8 x i1> undef, i1 undef, i32 1 + %v16i1_1 = insertelement <16 x i1> undef, i1 undef, i32 1 + %v32i1_1 = insertelement <32 x i1> undef, i1 undef, i32 1 + + %nxv2i1_1 = insertelement undef, i1 undef, i32 1 + %nxv4i1_1 = insertelement undef, i1 undef, i32 1 + %nxv8i1_1 = insertelement undef, i1 undef, i32 1 + %nxv16i1_1 = insertelement undef, i1 undef, i32 1 + %nxv32i1_1 = insertelement undef, i1 undef, i32 1 + + %v2i8_1 = insertelement <2 x i8> undef, i8 undef, i32 1 + %v4i8_1 = insertelement <4 x i8> undef, i8 undef, i32 1 + %v8i8_1 = insertelement <8 x i8> undef, i8 undef, i32 1 + %v16i8_1 = insertelement <16 x i8> undef, i8 undef, i32 1 + %v32i8_1 = insertelement <32 x i8> undef, i8 undef, i32 1 + + %nxv2i8_1 = insertelement undef, i8 undef, i32 1 + %nxv4i8_1 = insertelement undef, i8 undef, i32 1 + %nxv8i8_1 = insertelement undef, i8 undef, i32 1 + %nxv16i8_1 = insertelement undef, i8 undef, i32 1 + %nxv32i8_1 = insertelement undef, i8 undef, i32 1 + + %v2i16_1 = insertelement <2 x i16> undef, i16 undef, i32 1 + %v4i16_1 = insertelement <4 x i16> undef, i16 undef, i32 1 + %v8i16_1 = insertelement <8 x i16> undef, i16 undef, i32 1 + %v16i16_1 = insertelement <16 x i16> undef, i16 undef, i32 1 + + %nxv2i16_1 = insertelement undef, i16 undef, i32 1 + %nxv4i16_1 = insertelement undef, i16 undef, i32 1 + %nxv8i16_1 = insertelement undef, i16 undef, i32 1 + %nxv16i16_1 = insertelement undef, i16 undef, i32 1 + + %v2i32_1 = insertelement <2 x i32> undef, i32 undef, i32 1 + %v4i32_1 = insertelement <4 x i32> undef, i32 undef, i32 1 + %v8i32_1 = insertelement <8 x i32> undef, i32 undef, i32 1 + %v16i32_1 = insertelement <16 x i32> undef, i32 undef, i32 1 + + %nxv2i32_1 = insertelement undef, i32 undef, i32 1 + %nxv4i32_1 = insertelement undef, i32 undef, i32 1 + %nxv8i32_1 = insertelement undef, i32 undef, i32 1 + %nxv16i32_1 = insertelement undef, i32 undef, i32 1 + + %v2i64_1 = insertelement <2 x i64> undef, i64 undef, i32 1 + %v4i64_1 = insertelement <4 x i64> undef, i64 undef, i32 1 + %v8i64_1 = insertelement <8 x i64> undef, i64 undef, i32 1 + + %nxv2i64_1 = insertelement undef, i64 undef, i32 1 + %nxv4i64_1 = insertelement undef, i64 undef, i32 1 + %nxv8i64_1 = insertelement undef, i64 undef, i32 1 + + ret void +} + +define void @insertelement_fp() { +; RV32V-LABEL: 'insertelement_fp' +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_0 = insertelement <2 x half> undef, half undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_0 = insertelement <4 x half> undef, half undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_0 = insertelement <8 x half> undef, half undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_0 = insertelement <16 x half> undef, half undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_0 = insertelement undef, half undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_0 = insertelement undef, half undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_0 = insertelement undef, half undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_0 = insertelement undef, half undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_0 = insertelement <2 x float> undef, float undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_0 = insertelement <4 x float> undef, float undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_0 = insertelement <8 x float> undef, float undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_0 = insertelement <16 x float> undef, float undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_0 = insertelement undef, float undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_0 = insertelement undef, float undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_0 = insertelement undef, float undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_0 = insertelement undef, float undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_0 = insertelement <2 x double> undef, double undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_0 = insertelement <4 x double> undef, double undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_0 = insertelement <8 x double> undef, double undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_0 = insertelement undef, double undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_0 = insertelement undef, double undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_0 = insertelement undef, double undef, i32 0 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_1 = insertelement <2 x half> undef, half undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_1 = insertelement <4 x half> undef, half undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_1 = insertelement <8 x half> undef, half undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_1 = insertelement <16 x half> undef, half undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_1 = insertelement undef, half undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_1 = insertelement undef, half undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_1 = insertelement undef, half undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_1 = insertelement undef, half undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_1 = insertelement <2 x float> undef, float undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_1 = insertelement <4 x float> undef, float undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_1 = insertelement <8 x float> undef, float undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_1 = insertelement <16 x float> undef, float undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_1 = insertelement undef, float undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_1 = insertelement undef, float undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_1 = insertelement undef, float undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_1 = insertelement undef, float undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_1 = insertelement <2 x double> undef, double undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_1 = insertelement <4 x double> undef, double undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_1 = insertelement <8 x double> undef, double undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_1 = insertelement undef, double undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_1 = insertelement undef, double undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_1 = insertelement undef, double undef, i32 1 +; RV32V-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RV64-LABEL: 'insertelement_fp' +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_0 = insertelement <2 x half> undef, half undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_0 = insertelement <4 x half> undef, half undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_0 = insertelement <8 x half> undef, half undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_0 = insertelement <16 x half> undef, half undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_0 = insertelement undef, half undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_0 = insertelement undef, half undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_0 = insertelement undef, half undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_0 = insertelement undef, half undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_0 = insertelement <2 x float> undef, float undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_0 = insertelement <4 x float> undef, float undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_0 = insertelement <8 x float> undef, float undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_0 = insertelement <16 x float> undef, float undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_0 = insertelement undef, float undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_0 = insertelement undef, float undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_0 = insertelement undef, float undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_0 = insertelement undef, float undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_0 = insertelement <2 x double> undef, double undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_0 = insertelement <4 x double> undef, double undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_0 = insertelement <8 x double> undef, double undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_0 = insertelement undef, double undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_0 = insertelement undef, double undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_0 = insertelement undef, double undef, i32 0 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_1 = insertelement <2 x half> undef, half undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_1 = insertelement <4 x half> undef, half undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_1 = insertelement <8 x half> undef, half undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_1 = insertelement <16 x half> undef, half undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_1 = insertelement undef, half undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_1 = insertelement undef, half undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_1 = insertelement undef, half undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_1 = insertelement undef, half undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_1 = insertelement <2 x float> undef, float undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_1 = insertelement <4 x float> undef, float undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_1 = insertelement <8 x float> undef, float undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_1 = insertelement <16 x float> undef, float undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_1 = insertelement undef, float undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_1 = insertelement undef, float undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_1 = insertelement undef, float undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_1 = insertelement undef, float undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_1 = insertelement <2 x double> undef, double undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_1 = insertelement <4 x double> undef, double undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_1 = insertelement <8 x double> undef, double undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f64_1 = insertelement undef, double undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f64_1 = insertelement undef, double undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f64_1 = insertelement undef, double undef, i32 1 +; RV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RV32ZVE64X-LABEL: 'insertelement_fp' +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_0 = insertelement <2 x half> undef, half undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_0 = insertelement <4 x half> undef, half undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_0 = insertelement <8 x half> undef, half undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_0 = insertelement <16 x half> undef, half undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_0 = insertelement undef, half undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_0 = insertelement undef, half undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_0 = insertelement undef, half undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_0 = insertelement undef, half undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_0 = insertelement <2 x float> undef, float undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_0 = insertelement <4 x float> undef, float undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_0 = insertelement <8 x float> undef, float undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_0 = insertelement <16 x float> undef, float undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_0 = insertelement undef, float undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_0 = insertelement undef, float undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_0 = insertelement undef, float undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_0 = insertelement undef, float undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f64_0 = insertelement <2 x double> undef, double undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_0 = insertelement <4 x double> undef, double undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_0 = insertelement <8 x double> undef, double undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_0 = insertelement undef, double undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_0 = insertelement undef, double undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f64_0 = insertelement undef, double undef, i32 0 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f16_1 = insertelement <2 x half> undef, half undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f16_1 = insertelement <4 x half> undef, half undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f16_1 = insertelement <8 x half> undef, half undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f16_1 = insertelement <16 x half> undef, half undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f16_1 = insertelement undef, half undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f16_1 = insertelement undef, half undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f16_1 = insertelement undef, half undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f16_1 = insertelement undef, half undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f32_1 = insertelement <2 x float> undef, float undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_1 = insertelement <4 x float> undef, float undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f32_1 = insertelement <8 x float> undef, float undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16f32_1 = insertelement <16 x float> undef, float undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv2f32_1 = insertelement undef, float undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv4f32_1 = insertelement undef, float undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv8f32_1 = insertelement undef, float undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nxv16f32_1 = insertelement undef, float undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2f64_1 = insertelement <2 x double> undef, double undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4f64_1 = insertelement <4 x double> undef, double undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v8f64_1 = insertelement <8 x double> undef, double undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv2f64_1 = insertelement undef, double undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv4f64_1 = insertelement undef, double undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %nxv8f64_1 = insertelement undef, double undef, i32 1 +; RV32ZVE64X-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %v2f16_0 = insertelement <2 x half> undef, half undef, i32 0 + %v4f16_0 = insertelement <4 x half> undef, half undef, i32 0 + %v8f16_0 = insertelement <8 x half> undef, half undef, i32 0 + %v16f16_0 = insertelement <16 x half> undef, half undef, i32 0 + + %nxv2f16_0 = insertelement undef, half undef, i32 0 + %nxv4f16_0 = insertelement undef, half undef, i32 0 + %nxv8f16_0 = insertelement undef, half undef, i32 0 + %nxv16f16_0 = insertelement undef, half undef, i32 0 + + %v2f32_0 = insertelement <2 x float> undef, float undef, i32 0 + %v4f32_0 = insertelement <4 x float> undef, float undef, i32 0 + %v8f32_0 = insertelement <8 x float> undef, float undef, i32 0 + %v16f32_0 = insertelement <16 x float> undef, float undef, i32 0 + + %nxv2f32_0 = insertelement undef, float undef, i32 0 + %nxv4f32_0 = insertelement undef, float undef, i32 0 + %nxv8f32_0 = insertelement undef, float undef, i32 0 + %nxv16f32_0 = insertelement undef, float undef, i32 0 + + %v2f64_0 = insertelement <2 x double> undef, double undef, i32 0 + %v4f64_0 = insertelement <4 x double> undef, double undef, i32 0 + %v8f64_0 = insertelement <8 x double> undef, double undef, i32 0 + + %nxv2f64_0 = insertelement undef, double undef, i32 0 + %nxv4f64_0 = insertelement undef, double undef, i32 0 + %nxv8f64_0 = insertelement undef, double undef, i32 0 + + %v2f16_1 = insertelement <2 x half> undef, half undef, i32 1 + %v4f16_1 = insertelement <4 x half> undef, half undef, i32 1 + %v8f16_1 = insertelement <8 x half> undef, half undef, i32 1 + %v16f16_1 = insertelement <16 x half> undef, half undef, i32 1 + + %nxv2f16_1 = insertelement undef, half undef, i32 1 + %nxv4f16_1 = insertelement undef, half undef, i32 1 + %nxv8f16_1 = insertelement undef, half undef, i32 1 + %nxv16f16_1 = insertelement undef, half undef, i32 1 + + %v2f32_1 = insertelement <2 x float> undef, float undef, i32 1 + %v4f32_1 = insertelement <4 x float> undef, float undef, i32 1 + %v8f32_1 = insertelement <8 x float> undef, float undef, i32 1 + %v16f32_1 = insertelement <16 x float> undef, float undef, i32 1 + + %nxv2f32_1 = insertelement undef, float undef, i32 1 + %nxv4f32_1 = insertelement undef, float undef, i32 1 + %nxv8f32_1 = insertelement undef, float undef, i32 1 + %nxv16f32_1 = insertelement undef, float undef, i32 1 + + %v2f64_1 = insertelement <2 x double> undef, double undef, i32 1 + %v4f64_1 = insertelement <4 x double> undef, double undef, i32 1 + %v8f64_1 = insertelement <8 x double> undef, double undef, i32 1 + + %nxv2f64_1 = insertelement undef, double undef, i32 1 + %nxv4f64_1 = insertelement undef, double undef, i32 1 + %nxv8f64_1 = insertelement undef, double undef, i32 1 + + ret void +}