diff --git a/llvm/lib/Analysis/ScalarEvolution.cpp b/llvm/lib/Analysis/ScalarEvolution.cpp index 829df945c329e5..0eff45db61bc80 100644 --- a/llvm/lib/Analysis/ScalarEvolution.cpp +++ b/llvm/lib/Analysis/ScalarEvolution.cpp @@ -5631,8 +5631,13 @@ const SCEV *ScalarEvolution::createNodeForPHI(PHINode *PN) { if (const SCEV *S = createNodeFromSelectLikePHI(PN)) return S; + // If the PHI has a single incoming value, follow that value, unless the + // PHI's incoming blocks are in a different loop, in which case doing so + // risks breaking LCSSA form. Instcombine would normally zap these, but + // it doesn't have DominatorTree information, so it may miss cases. if (Value *V = SimplifyInstruction(PN, {getDataLayout(), &TLI, &DT, &AC})) - return getSCEV(V); + if (LI.replacementPreservesLCSSAForm(PN, V)) + return getSCEV(V); // If it's not a loop phi, we can't handle it yet. return getUnknown(PN); diff --git a/llvm/test/Analysis/DependenceAnalysis/lcssa.ll b/llvm/test/Analysis/DependenceAnalysis/lcssa.ll index 801b24276f5b55..2bd20f39f4a7e6 100644 --- a/llvm/test/Analysis/DependenceAnalysis/lcssa.ll +++ b/llvm/test/Analysis/DependenceAnalysis/lcssa.ll @@ -2,7 +2,7 @@ ; RUN: "-aa-pipeline=basic-aa,tbaa" 2>&1 | FileCheck %s ; CHECK: Src: %v = load i32, i32* %arrayidx1, align 4 --> Dst: store i32 %add, i32* %a.lcssa, align 4 -; CHECK-NEXT: da analyze - anti [*|<]! +; CHECK-NEXT: da analyze - confused! define void @f(i32 *%a, i32 %n, i64 %n2) { entry: diff --git a/llvm/test/Analysis/ScalarEvolution/cycled_phis.ll b/llvm/test/Analysis/ScalarEvolution/cycled_phis.ll index 80cf153c913bba..7183bb8c0a634d 100644 --- a/llvm/test/Analysis/ScalarEvolution/cycled_phis.ll +++ b/llvm/test/Analysis/ScalarEvolution/cycled_phis.ll @@ -46,7 +46,7 @@ define void @test_02(i32* %p, i32* %q) { ; CHECK-NEXT: %inner_cond = call i1 @cond() ; CHECK-NEXT: --> %inner_cond U: full-set S: full-set Exits: <> LoopDispositions: { %inner_loop: Variant, %outer_loop: Variant } ; CHECK-NEXT: %inner_lcssa = phi i32 [ %inner_phi, %inner_loop ] -; CHECK-NEXT: --> %inner_phi U: full-set S: full-set Exits: <> LoopDispositions: { %outer_loop: Variant, %inner_loop: Variant } +; CHECK-NEXT: --> %inner_lcssa U: full-set S: full-set Exits: <> LoopDispositions: { %outer_loop: Variant, %inner_loop: Invariant } ; CHECK-NEXT: %outer_cond = call i1 @cond() ; CHECK-NEXT: --> %outer_cond U: full-set S: full-set Exits: <> LoopDispositions: { %outer_loop: Variant, %inner_loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @test_02 @@ -97,7 +97,7 @@ define void @test_03(i32* %p, i32* %q) { ; CHECK-NEXT: %inner_cond = call i1 @cond() ; CHECK-NEXT: --> %inner_cond U: full-set S: full-set Exits: <> LoopDispositions: { %inner_loop: Variant, %outer_loop: Variant } ; CHECK-NEXT: %inner_lcssa = phi i32 [ %inner_phi_1, %inner_loop ] -; CHECK-NEXT: --> %inner_phi_1 U: full-set S: full-set Exits: <> LoopDispositions: { %outer_loop: Variant, %inner_loop: Variant } +; CHECK-NEXT: --> %inner_lcssa U: full-set S: full-set Exits: <> LoopDispositions: { %outer_loop: Variant, %inner_loop: Invariant } ; CHECK-NEXT: %outer_cond = call i1 @cond() ; CHECK-NEXT: --> %outer_cond U: full-set S: full-set Exits: <> LoopDispositions: { %outer_loop: Variant, %inner_loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @test_03 diff --git a/llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll b/llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll index 73e33753363fea..2336b7f62f063b 100644 --- a/llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll +++ b/llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll @@ -53,7 +53,7 @@ define dso_local i32 @f() { ; CHECK-NEXT: %dec.3 = add nsw i32 %storemerge1921.3, -1 ; CHECK-NEXT: --> {2,+,-1}<%inner.loop> U: [2,3) S: [2,3) Exits: <> LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant } ; CHECK-NEXT: %storemerge1921.lcssa25.3 = phi i32 [ %storemerge1921.3, %for.end.3 ] -; CHECK-NEXT: --> {3,+,-1}<%inner.loop> U: [3,4) S: [3,4) Exits: <> LoopDispositions: { %outer.loop: Variant, %for.cond6: Variant, %inner.loop: Computable } +; CHECK-NEXT: --> %storemerge1921.lcssa25.3 U: [3,4) S: [3,4) Exits: <> LoopDispositions: { %outer.loop: Variant, %for.cond6: Invariant, %inner.loop: Invariant } ; CHECK-NEXT: %dec16 = add nsw i32 %storemerge23, -1 ; CHECK-NEXT: --> {2,+,-1}<%outer.loop> U: [0,3) S: [0,3) Exits: <> LoopDispositions: { %outer.loop: Computable, %for.cond6: Invariant, %inner.loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @f diff --git a/llvm/test/Analysis/ScalarEvolution/solve-quadratic-i1.ll b/llvm/test/Analysis/ScalarEvolution/solve-quadratic-i1.ll index bc6f14135b1ad0..490ba57a92dfc2 100644 --- a/llvm/test/Analysis/ScalarEvolution/solve-quadratic-i1.ll +++ b/llvm/test/Analysis/ScalarEvolution/solve-quadratic-i1.ll @@ -59,9 +59,9 @@ define void @f1() #0 { ; CHECK-NEXT: %v6 = add nuw nsw i32 %v1, 1 ; CHECK-NEXT: --> {4,+,1}<%b1> U: [4,7) S: [4,7) Exits: 6 LoopDispositions: { %b1: Computable } ; CHECK-NEXT: %v7 = phi i32 [ %v1, %b1 ] -; CHECK-NEXT: --> {3,+,1}<%b1> U: [3,6) S: [3,6) --> 5 U: [5,6) S: [5,6) +; CHECK-NEXT: --> %v7 U: [3,6) S: [3,6) --> 5 U: [5,6) S: [5,6) ; CHECK-NEXT: %v8 = phi i16 [ %v3, %b1 ] -; CHECK-NEXT: --> {3,+,4,+,1}<%b1> U: full-set S: full-set --> 12 U: [12,13) S: [12,13) +; CHECK-NEXT: --> %v8 U: full-set S: full-set --> 12 U: [12,13) S: [12,13) ; CHECK-NEXT: Determining loop execution counts for: @f1 ; CHECK-NEXT: Loop %b3: Unpredictable backedge-taken count. ; CHECK-NEXT: Loop %b3: Unpredictable max backedge-taken count. diff --git a/llvm/test/Analysis/ScalarEvolution/solve-quadratic-overflow.ll b/llvm/test/Analysis/ScalarEvolution/solve-quadratic-overflow.ll index 10473e238583a1..519450720cded8 100644 --- a/llvm/test/Analysis/ScalarEvolution/solve-quadratic-overflow.ll +++ b/llvm/test/Analysis/ScalarEvolution/solve-quadratic-overflow.ll @@ -12,11 +12,11 @@ ; CHECK-NEXT: %v3 = mul i16 %v2, %v2 ; CHECK-NEXT: --> {1,+,3,+,2}<%b1> U: full-set S: full-set Exits: 0 LoopDispositions: { %b1: Computable } ; CHECK-NEXT: %v5 = phi i16 [ %v2, %b1 ] -; CHECK-NEXT: --> {-1,+,-1}<%b1> U: [-256,0) S: [-256,0) --> -256 U: [-256,-255) S: [-256,-255) +; CHECK-NEXT: --> %v5 U: [-256,0) S: [-256,0) ; CHECK-NEXT: %v6 = phi i16 [ %v3, %b1 ] -; CHECK-NEXT: --> {1,+,3,+,2}<%b1> U: full-set S: full-set --> 0 U: [0,1) S: [0,1) +; CHECK-NEXT: --> %v6 U: full-set S: full-set ; CHECK-NEXT: %v7 = sext i16 %v5 to i32 -; CHECK-NEXT: --> {-1,+,-1}<%b1> U: [-256,0) S: [-256,0) --> -256 U: [-256,-255) S: [-256,-255) +; CHECK-NEXT: --> (sext i16 %v5 to i32) U: [-256,0) S: [-256,0) ; CHECK-NEXT: Determining loop execution counts for: @f0 ; CHECK-NEXT: Loop %b1: backedge-taken count is 255 ; CHECK-NEXT: Loop %b1: max backedge-taken count is 255 diff --git a/llvm/test/Transforms/LoopStrengthReduce/funclet.ll b/llvm/test/Transforms/LoopStrengthReduce/funclet.ll index ca0a86635ec0c5..c6b2029fc18d76 100644 --- a/llvm/test/Transforms/LoopStrengthReduce/funclet.ll +++ b/llvm/test/Transforms/LoopStrengthReduce/funclet.ll @@ -15,21 +15,23 @@ define void @f() personality i32 (...)* @_except_handler3 { ; CHECK-NEXT: entry: ; CHECK-NEXT: br label [[THROW:%.*]] ; CHECK: throw: +; CHECK-NEXT: [[TMP96:%.*]] = getelementptr inbounds i8, i8* undef, i32 1 ; CHECK-NEXT: invoke void @reserve() ; CHECK-NEXT: to label [[THROW]] unwind label [[PAD:%.*]] ; CHECK: pad: +; CHECK-NEXT: [[PHI2:%.*]] = phi i8* [ [[TMP96]], [[THROW]] ] ; CHECK-NEXT: [[CS:%.*]] = catchswitch within none [label %unreachable] unwind label [[BLAH2:%.*]] ; CHECK: unreachable: ; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS]] [] ; CHECK-NEXT: unreachable ; CHECK: blah2: ; CHECK-NEXT: [[CLEANUPPADI4_I_I_I:%.*]] = cleanuppad within none [] +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[PHI2]], i32 -1 ; CHECK-NEXT: br label [[LOOP_BODY:%.*]] ; CHECK: loop_body: -; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[ITER:%.*]] ], [ 0, [[BLAH2]] ] -; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i32 [[LSR_IV]], -1 -; CHECK-NEXT: [[LSR_IV_NEXT1:%.*]] = inttoptr i32 [[LSR_IV_NEXT]] to i8* -; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[LSR_IV_NEXT1]], null +; CHECK-NEXT: [[LSR_IV:%.*]] = phi i8* [ [[SCEVGEP1:%.*]], [[ITER:%.*]] ], [ [[SCEVGEP]], [[BLAH2]] ] +; CHECK-NEXT: [[SCEVGEP1]] = getelementptr i8, i8* [[LSR_IV]], i32 1 +; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[SCEVGEP1]], undef ; CHECK-NEXT: br i1 [[TMP100]], label [[UNWIND_OUT:%.*]], label [[ITER]] ; CHECK: iter: ; CHECK-NEXT: br i1 true, label [[UNWIND_OUT]], label [[LOOP_BODY]] @@ -74,25 +76,27 @@ define void @g() personality i32 (...)* @_except_handler3 { ; CHECK-NEXT: entry: ; CHECK-NEXT: br label [[THROW:%.*]] ; CHECK: throw: +; CHECK-NEXT: [[TMP96:%.*]] = getelementptr inbounds i8, i8* undef, i32 1 ; CHECK-NEXT: invoke void @reserve() ; CHECK-NEXT: to label [[THROW]] unwind label [[PAD:%.*]] ; CHECK: pad: +; CHECK-NEXT: [[PHI2:%.*]] = phi i8* [ [[TMP96]], [[THROW]] ] ; CHECK-NEXT: [[CS:%.*]] = catchswitch within none [label [[UNREACHABLE:%.*]], label %blah] unwind to caller ; CHECK: unreachable: ; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS]] [] ; CHECK-NEXT: unreachable ; CHECK: blah: ; CHECK-NEXT: [[CATCHPAD:%.*]] = catchpad within [[CS]] [] +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[PHI2]], i32 -1 ; CHECK-NEXT: br label [[LOOP_BODY:%.*]] ; CHECK: unwind_out: ; CHECK-NEXT: catchret from [[CATCHPAD]] to label [[LEAVE:%.*]] ; CHECK: leave: ; CHECK-NEXT: ret void ; CHECK: loop_body: -; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[ITER:%.*]] ], [ 0, [[BLAH:%.*]] ] -; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i32 [[LSR_IV]], -1 -; CHECK-NEXT: [[LSR_IV_NEXT1:%.*]] = inttoptr i32 [[LSR_IV_NEXT]] to i8* -; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[LSR_IV_NEXT1]], null +; CHECK-NEXT: [[LSR_IV:%.*]] = phi i8* [ [[SCEVGEP1:%.*]], [[ITER:%.*]] ], [ [[SCEVGEP]], [[BLAH:%.*]] ] +; CHECK-NEXT: [[SCEVGEP1]] = getelementptr i8, i8* [[LSR_IV]], i32 1 +; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[SCEVGEP1]], undef ; CHECK-NEXT: br i1 [[TMP100]], label [[UNWIND_OUT:%.*]], label [[ITER]] ; CHECK: iter: ; CHECK-NEXT: br i1 true, label [[UNWIND_OUT]], label [[LOOP_BODY]] @@ -138,6 +142,7 @@ define void @h() personality i32 (...)* @_except_handler3 { ; CHECK-NEXT: entry: ; CHECK-NEXT: br label [[THROW:%.*]] ; CHECK: throw: +; CHECK-NEXT: [[TMP96:%.*]] = getelementptr inbounds i8, i8* undef, i32 1 ; CHECK-NEXT: invoke void @reserve() ; CHECK-NEXT: to label [[THROW]] unwind label [[PAD:%.*]] ; CHECK: pad: @@ -146,17 +151,18 @@ define void @h() personality i32 (...)* @_except_handler3 { ; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS]] [] ; CHECK-NEXT: unreachable ; CHECK: blug: +; CHECK-NEXT: [[PHI2:%.*]] = phi i8* [ [[TMP96]], [[PAD]] ] ; CHECK-NEXT: [[CATCHPAD:%.*]] = catchpad within [[CS]] [] +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[PHI2]], i32 -1 ; CHECK-NEXT: br label [[LOOP_BODY:%.*]] ; CHECK: unwind_out: ; CHECK-NEXT: catchret from [[CATCHPAD]] to label [[LEAVE:%.*]] ; CHECK: leave: ; CHECK-NEXT: ret void ; CHECK: loop_body: -; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[ITER:%.*]] ], [ 0, [[BLUG:%.*]] ] -; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i32 [[LSR_IV]], -1 -; CHECK-NEXT: [[LSR_IV_NEXT1:%.*]] = inttoptr i32 [[LSR_IV_NEXT]] to i8* -; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[LSR_IV_NEXT1]], null +; CHECK-NEXT: [[LSR_IV:%.*]] = phi i8* [ [[SCEVGEP1:%.*]], [[ITER:%.*]] ], [ [[SCEVGEP]], [[BLUG:%.*]] ] +; CHECK-NEXT: [[SCEVGEP1]] = getelementptr i8, i8* [[LSR_IV]], i32 1 +; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[SCEVGEP1]], undef ; CHECK-NEXT: br i1 [[TMP100]], label [[UNWIND_OUT:%.*]], label [[ITER]] ; CHECK: iter: ; CHECK-NEXT: br i1 true, label [[UNWIND_OUT]], label [[LOOP_BODY]] @@ -202,9 +208,11 @@ define void @i() personality i32 (...)* @_except_handler3 { ; CHECK-NEXT: entry: ; CHECK-NEXT: br label [[THROW:%.*]] ; CHECK: throw: +; CHECK-NEXT: [[TMP96:%.*]] = getelementptr inbounds i8, i8* undef, i32 1 ; CHECK-NEXT: invoke void @reserve() ; CHECK-NEXT: to label [[THROW]] unwind label [[CATCHPAD:%.*]] ; CHECK: catchpad: +; CHECK-NEXT: [[PHI2:%.*]] = phi i8* [ [[TMP96]], [[THROW]] ] ; CHECK-NEXT: [[CS:%.*]] = catchswitch within none [label %cp_body] unwind label [[CLEANUPPAD:%.*]] ; CHECK: cp_body: ; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS]] [] @@ -213,12 +221,12 @@ define void @i() personality i32 (...)* @_except_handler3 { ; CHECK-NEXT: [[TMP1:%.*]] = cleanuppad within none [] ; CHECK-NEXT: br label [[LOOP_HEAD]] ; CHECK: loop_head: +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[PHI2]], i32 -1 ; CHECK-NEXT: br label [[LOOP_BODY:%.*]] ; CHECK: loop_body: -; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[ITER:%.*]] ], [ 0, [[LOOP_HEAD]] ] -; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i32 [[LSR_IV]], -1 -; CHECK-NEXT: [[LSR_IV_NEXT1:%.*]] = inttoptr i32 [[LSR_IV_NEXT]] to i8* -; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[LSR_IV_NEXT1]], null +; CHECK-NEXT: [[LSR_IV:%.*]] = phi i8* [ [[SCEVGEP1:%.*]], [[ITER:%.*]] ], [ [[SCEVGEP]], [[LOOP_HEAD]] ] +; CHECK-NEXT: [[SCEVGEP1]] = getelementptr i8, i8* [[LSR_IV]], i32 1 +; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[SCEVGEP1]], undef ; CHECK-NEXT: br i1 [[TMP100]], label [[UNWIND_OUT:%.*]], label [[ITER]] ; CHECK: iter: ; CHECK-NEXT: br i1 true, label [[UNWIND_OUT]], label [[LOOP_BODY]] diff --git a/llvm/test/Transforms/LoopVectorize/pr45259.ll b/llvm/test/Transforms/LoopVectorize/pr45259.ll index 25055f50356c42..229274b2888e98 100644 --- a/llvm/test/Transforms/LoopVectorize/pr45259.ll +++ b/llvm/test/Transforms/LoopVectorize/pr45259.ll @@ -6,7 +6,7 @@ define i8 @widget(i8* %arr, i8 %t9) { ; CHECK-LABEL: @widget( ; CHECK-NEXT: bb: -; CHECK-NEXT: [[ARR1:%.*]] = ptrtoint i8* [[ARR:%.*]] to i64 +; CHECK-NEXT: [[ARR2:%.*]] = ptrtoint i8* [[ARR:%.*]] to i64 ; CHECK-NEXT: br label [[BB6:%.*]] ; CHECK: bb6: ; CHECK-NEXT: [[T1_0:%.*]] = phi i8* [ [[ARR]], [[BB:%.*]] ], [ null, [[BB6]] ] @@ -14,33 +14,32 @@ define i8 @widget(i8* %arr, i8 %t9) { ; CHECK-NEXT: br i1 [[C]], label [[FOR_PREHEADER:%.*]], label [[BB6]] ; CHECK: for.preheader: ; CHECK-NEXT: [[T1_0_LCSSA:%.*]] = phi i8* [ [[T1_0]], [[BB6]] ] -; CHECK-NEXT: [[T1_0_LCSSA2:%.*]] = ptrtoint i8* [[T1_0_LCSSA]] to i64 -; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[ARR1]] to i32 -; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[TMP0]] -; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[T1_0_LCSSA2]] to i32 -; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP1]], [[TMP2]] -; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP3]], 4 +; CHECK-NEXT: [[T1_0_LCSSA1:%.*]] = ptrtoint i8* [[T1_0_LCSSA]] to i64 +; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[T1_0_LCSSA1]] to i32 +; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[ARR2]] to i32 +; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[TMP1]] +; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP2]], 4 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]] ; CHECK: vector.scevcheck: -; CHECK-NEXT: [[TMP4:%.*]] = sub i64 -1, [[ARR1]] -; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[TMP4]], [[T1_0_LCSSA2]] -; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8 -; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 1, i8 [[TMP6]]) +; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[T1_0_LCSSA1]], -1 +; CHECK-NEXT: [[TMP4:%.*]] = sub i64 [[TMP3]], [[ARR2]] +; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 1, i8 [[TMP5]]) ; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0 ; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1 -; CHECK-NEXT: [[TMP7:%.*]] = add i8 1, [[MUL_RESULT]] -; CHECK-NEXT: [[TMP8:%.*]] = sub i8 1, [[MUL_RESULT]] -; CHECK-NEXT: [[TMP9:%.*]] = icmp sgt i8 [[TMP8]], 1 -; CHECK-NEXT: [[TMP10:%.*]] = icmp slt i8 [[TMP7]], 1 -; CHECK-NEXT: [[TMP11:%.*]] = select i1 false, i1 [[TMP9]], i1 [[TMP10]] -; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt i64 [[TMP5]], 255 -; CHECK-NEXT: [[TMP13:%.*]] = or i1 [[TMP11]], [[TMP12]] -; CHECK-NEXT: [[TMP14:%.*]] = or i1 [[TMP13]], [[MUL_OVERFLOW]] -; CHECK-NEXT: [[TMP15:%.*]] = or i1 false, [[TMP14]] -; CHECK-NEXT: br i1 [[TMP15]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] +; CHECK-NEXT: [[TMP6:%.*]] = add i8 1, [[MUL_RESULT]] +; CHECK-NEXT: [[TMP7:%.*]] = sub i8 1, [[MUL_RESULT]] +; CHECK-NEXT: [[TMP8:%.*]] = icmp sgt i8 [[TMP7]], 1 +; CHECK-NEXT: [[TMP9:%.*]] = icmp slt i8 [[TMP6]], 1 +; CHECK-NEXT: [[TMP10:%.*]] = select i1 false, i1 [[TMP8]], i1 [[TMP9]] +; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt i64 [[TMP4]], 255 +; CHECK-NEXT: [[TMP12:%.*]] = or i1 [[TMP10]], [[TMP11]] +; CHECK-NEXT: [[TMP13:%.*]] = or i1 [[TMP12]], [[MUL_OVERFLOW]] +; CHECK-NEXT: [[TMP14:%.*]] = or i1 false, [[TMP13]] +; CHECK-NEXT: br i1 [[TMP14]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: -; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP3]], 4 -; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP3]], [[N_MOD_VF]] +; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP2]], 4 +; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP2]], [[N_MOD_VF]] ; CHECK-NEXT: [[IND_END:%.*]] = trunc i32 [[N_VEC]] to i8 ; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i8> poison, i8 [[T9:%.*]], i32 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i8> [[BROADCAST_SPLATINSERT]], <4 x i8> poison, <4 x i32> zeroinitializer @@ -48,20 +47,20 @@ define i8 @widget(i8* %arr, i8 %t9) { ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i8> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] -; CHECK-NEXT: [[TMP16:%.*]] = add <4 x i8> [[VEC_IND]], -; CHECK-NEXT: [[TMP17:%.*]] = extractelement <4 x i8> [[TMP16]], i32 0 -; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, i8* [[ARR]], i8 [[TMP17]] -; CHECK-NEXT: [[TMP19:%.*]] = icmp slt <4 x i8> [[TMP16]], [[BROADCAST_SPLAT]] -; CHECK-NEXT: [[TMP20:%.*]] = zext <4 x i1> [[TMP19]] to <4 x i8> -; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i8, i8* [[TMP18]], i32 0 -; CHECK-NEXT: [[TMP22:%.*]] = bitcast i8* [[TMP21]] to <4 x i8>* -; CHECK-NEXT: store <4 x i8> [[TMP20]], <4 x i8>* [[TMP22]], align 1 +; CHECK-NEXT: [[TMP15:%.*]] = add <4 x i8> [[VEC_IND]], +; CHECK-NEXT: [[TMP16:%.*]] = extractelement <4 x i8> [[TMP15]], i32 0 +; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i8, i8* [[ARR]], i8 [[TMP16]] +; CHECK-NEXT: [[TMP18:%.*]] = icmp slt <4 x i8> [[TMP15]], [[BROADCAST_SPLAT]] +; CHECK-NEXT: [[TMP19:%.*]] = zext <4 x i1> [[TMP18]] to <4 x i8> +; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i8, i8* [[TMP17]], i32 0 +; CHECK-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to <4 x i8>* +; CHECK-NEXT: store <4 x i8> [[TMP19]], <4 x i8>* [[TMP21]], align 1 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 ; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i8> [[VEC_IND]], -; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; CHECK-NEXT: br i1 [[TMP23]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] +; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; CHECK-NEXT: br i1 [[TMP22]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] ; CHECK: middle.block: -; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP3]], [[N_VEC]] +; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP2]], [[N_VEC]] ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_EXIT:%.*]], label [[SCALAR_PH]] ; CHECK: scalar.ph: ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i8 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_PREHEADER]] ], [ 0, [[VECTOR_SCEVCHECK]] ]