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Merge branch 'main' into pr147946-visitTRUNCATE
2 parents b6847a4 + 0ebcc97 commit 2a06315

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8 files changed

+431
-10
lines changed

8 files changed

+431
-10
lines changed

‎libcxx/include/__cxx03/regex‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2100,7 +2100,7 @@ public:
21002100
__ranges_.push_back(
21012101
std::make_pair(__traits_.transform(__b.begin(), __b.end()), __traits_.transform(__e.begin(), __e.end())));
21022102
} else {
2103-
if (__b.size() != 1 || __e.size() != 1)
2103+
if (__b.size() != 1 || __e.size() != 1 || char_traits<typename string_type::value_type>::lt(__e[0], __b[0]))
21042104
__throw_regex_error<regex_constants::error_range>();
21052105
if (__icase_) {
21062106
__b[0] = __traits_.translate_nocase(__b[0]);

‎libcxx/include/__cxx03/vector‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -432,10 +432,12 @@ public:
432432
template <__enable_if_t<__is_allocator<_Allocator>::value, int> = 0>
433433
_LIBCPP_HIDE_FROM_ABI vector(size_type __n, const value_type& __x, const allocator_type& __a)
434434
: __end_cap_(nullptr, __a) {
435+
auto __guard = std::__make_exception_guard(__destroy_vector(*this));
435436
if (__n > 0) {
436437
__vallocate(__n);
437438
__construct_at_end(__n, __x);
438439
}
440+
__guard.__complete();
439441
}
440442

441443
template <class _InputIterator,
@@ -1054,9 +1056,7 @@ inline _LIBCPP_HIDE_FROM_ABI vector<_Tp, _Allocator>::vector(vector&& __x, const
10541056
__x.__begin_ = __x.__end_ = __x.__end_cap() = nullptr;
10551057
} else {
10561058
typedef move_iterator<iterator> _Ip;
1057-
auto __guard = std::__make_exception_guard(__destroy_vector(*this));
1058-
assign(_Ip(__x.begin()), _Ip(__x.end()));
1059-
__guard.__complete();
1059+
__init_with_size(_Ip(__x.begin()), _Ip(__x.end()), __x.size());
10601060
}
10611061
}
10621062

‎libcxx/test/std/containers/sequences/vector/vector.cons/exceptions.pass.cpp‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,6 @@
1111
// (bug report: https://llvm.org/PR58392)
1212
// Check that vector constructors don't leak memory when an operation inside the constructor throws an exception
1313

14-
// XFAIL: FROZEN-CXX03-HEADERS-FIXME
15-
1614
#include <cstddef>
1715
#include <memory>
1816
#include <type_traits>

‎libcxx/test/std/re/re.regex/re.regex.construct/bad_range.pass.cpp‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,8 +14,6 @@
1414
// template <class ST, class SA>
1515
// basic_regex(const basic_string<charT, ST, SA>& s);
1616

17-
// XFAIL: FROZEN-CXX03-HEADERS-FIXME
18-
1917
#include <regex>
2018
#include <cassert>
2119
#include "test_macros.h"

‎llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp‎

Lines changed: 37 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2013,6 +2013,43 @@ unsigned GISelValueTracking::computeNumSignBits(Register R,
20132013
FirstAnswer = std::min(Src1NumSignBits, Src2NumSignBits) - 1;
20142014
break;
20152015
}
2016+
case TargetOpcode::G_ADD: {
2017+
Register Src2 = MI.getOperand(2).getReg();
2018+
unsigned Src2NumSignBits =
2019+
computeNumSignBits(Src2, DemandedElts, Depth + 1);
2020+
if (Src2NumSignBits <= 2)
2021+
return 1; // Early out.
2022+
2023+
Register Src1 = MI.getOperand(1).getReg();
2024+
unsigned Src1NumSignBits =
2025+
computeNumSignBits(Src1, DemandedElts, Depth + 1);
2026+
if (Src1NumSignBits == 1)
2027+
return 1; // Early Out.
2028+
2029+
// Special case decrementing a value (ADD X, -1):
2030+
KnownBits Known2 = getKnownBits(Src2, DemandedElts, Depth);
2031+
if (Known2.isAllOnes()) {
2032+
KnownBits Known1 = getKnownBits(Src1, DemandedElts, Depth);
2033+
// If the input is known to be 0 or 1, the output is 0/-1, which is all
2034+
// sign bits set.
2035+
if ((Known1.Zero | 1).isAllOnes())
2036+
return TyBits;
2037+
2038+
// If we are subtracting one from a positive number, there is no carry
2039+
// out of the result.
2040+
if (Known1.isNonNegative()) {
2041+
FirstAnswer = Src1NumSignBits;
2042+
break;
2043+
}
2044+
2045+
// Otherwise, we treat this like an ADD.
2046+
}
2047+
2048+
// Add can have at most one carry bit. Thus we know that the output
2049+
// is, at worst, one more bit than the inputs.
2050+
FirstAnswer = std::min(Src1NumSignBits, Src2NumSignBits) - 1;
2051+
break;
2052+
}
20162053
case TargetOpcode::G_FCMP:
20172054
case TargetOpcode::G_ICMP: {
20182055
bool IsFP = Opcode == TargetOpcode::G_FCMP;

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5063,8 +5063,7 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
50635063
break;
50645064
case ISD::ADD:
50655065
case ISD::ADDC:
5066-
// Add can have at most one carry bit. Thus we know that the output
5067-
// is, at worst, one more bit than the inputs.
5066+
// TODO: Move Operand 1 check before Operand 0 check
50685067
Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth + 1);
50695068
if (Tmp == 1) return 1; // Early out.
50705069

@@ -5088,6 +5087,9 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
50885087

50895088
Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth + 1);
50905089
if (Tmp2 == 1) return 1; // Early out.
5090+
5091+
// Add can have at most one carry bit. Thus we know that the output
5092+
// is, at worst, one more bit than the inputs.
50915093
return std::min(Tmp, Tmp2) - 1;
50925094
case ISD::SUB:
50935095
Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth + 1);

‎llvm/test/CodeGen/AArch64/GlobalISel/knownbits-add.mir‎

Lines changed: 278 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,278 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
2+
# RUN: llc -mtriple=aarch64 -passes="print<gisel-value-tracking>" -filetype=null %s 2>&1 | FileCheck %s
3+
4+
---
5+
name: Cst
6+
body: |
7+
bb.1:
8+
; CHECK-LABEL: name: @Cst
9+
; CHECK-NEXT: %0:_ KnownBits:00000010 SignBits:6
10+
; CHECK-NEXT: %1:_ KnownBits:00011000 SignBits:3
11+
; CHECK-NEXT: %2:_ KnownBits:00011010 SignBits:3
12+
%0:_(s8) = G_CONSTANT i8 2
13+
%1:_(s8) = G_CONSTANT i8 24
14+
%2:_(s8) = G_ADD %0, %1
15+
...
16+
---
17+
name: CstZero
18+
body: |
19+
bb.1:
20+
; CHECK-LABEL: name: @CstZero
21+
; CHECK-NEXT: %0:_ KnownBits:00000001 SignBits:7
22+
; CHECK-NEXT: %1:_ KnownBits:11111111 SignBits:8
23+
; CHECK-NEXT: %2:_ KnownBits:00000000 SignBits:8
24+
%0:_(s8) = G_CONSTANT i8 1
25+
%1:_(s8) = G_CONSTANT i8 255
26+
%2:_(s8) = G_ADD %0, %1
27+
...
28+
---
29+
name: CstNegOne
30+
body: |
31+
bb.1:
32+
; CHECK-LABEL: name: @CstNegOne
33+
; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
34+
; CHECK-NEXT: %1:_ KnownBits:11111111 SignBits:8
35+
; CHECK-NEXT: %2:_ KnownBits:11111111 SignBits:8
36+
%0:_(s8) = G_CONSTANT i8 0
37+
%1:_(s8) = G_CONSTANT i8 255
38+
%2:_(s8) = G_ADD %0, %1
39+
...
40+
---
41+
name: CstSeven
42+
body: |
43+
bb.1:
44+
; CHECK-LABEL: name: @CstSeven
45+
; CHECK-NEXT: %0:_ KnownBits:00001000 SignBits:4
46+
; CHECK-NEXT: %1:_ KnownBits:11111111 SignBits:8
47+
; CHECK-NEXT: %2:_ KnownBits:00000111 SignBits:5
48+
%0:_(s8) = G_CONSTANT i8 8
49+
%1:_(s8) = G_CONSTANT i8 255
50+
%2:_(s8) = G_ADD %0, %1
51+
...
52+
---
53+
name: CstNeg
54+
body: |
55+
bb.1:
56+
; CHECK-LABEL: name: @CstNeg
57+
; CHECK-NEXT: %0:_ KnownBits:11100000 SignBits:3
58+
; CHECK-NEXT: %1:_ KnownBits:00000010 SignBits:6
59+
; CHECK-NEXT: %2:_ KnownBits:11100010 SignBits:3
60+
%0:_(s8) = G_CONSTANT i8 224
61+
%1:_(s8) = G_CONSTANT i8 2
62+
%2:_(s8) = G_ADD %0, %1
63+
...
64+
---
65+
name: ScalarVar
66+
body: |
67+
bb.1:
68+
; CHECK-LABEL: name: @ScalarVar
69+
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
70+
; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1
71+
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
72+
%0:_(s8) = COPY $b0
73+
%1:_(s8) = COPY $b1
74+
%2:_(s8) = G_ADD %0, %1
75+
...
76+
---
77+
name: ScalarRhsEarlyOut
78+
body: |
79+
bb.1:
80+
; CHECK-LABEL: name: @ScalarRhsEarlyOut
81+
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
82+
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
83+
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
84+
%0:_(s8) = COPY $b0
85+
%1:_(s8) = G_CONSTANT i8 3
86+
%2:_(s8) = G_ADD %0, %1
87+
...
88+
---
89+
name: ScalarNonNegative
90+
body: |
91+
bb.1:
92+
; CHECK-LABEL: name: @ScalarNonNegative
93+
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
94+
; CHECK-NEXT: %1:_ KnownBits:00001111 SignBits:4
95+
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
96+
; CHECK-NEXT: %3:_ KnownBits:11111111 SignBits:8
97+
; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:4
98+
%0:_(s8) = COPY $b0
99+
%1:_(s8) = G_CONSTANT i8 15
100+
%2:_(s8) = G_AND %0, %1
101+
%3:_(s8) = G_CONSTANT i8 255
102+
%4:_(s8) = G_ADD %2, %3
103+
...
104+
---
105+
name: ScalarLhsEarlyOut
106+
body: |
107+
bb.1:
108+
; CHECK-LABEL: name: @ScalarLhsEarlyOut
109+
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
110+
; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6
111+
; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1
112+
%0:_(s8) = COPY $b0
113+
%1:_(s8) = G_CONSTANT i8 3
114+
%2:_(s8) = G_ADD %1, %0
115+
...
116+
---
117+
name: ScalarPartKnown
118+
body: |
119+
bb.1:
120+
; CHECK-LABEL: name: @ScalarPartKnown
121+
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
122+
; CHECK-NEXT: %1:_ KnownBits:00001111 SignBits:4
123+
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
124+
; CHECK-NEXT: %3:_ KnownBits:00000101 SignBits:5
125+
; CHECK-NEXT: %4:_ KnownBits:000????? SignBits:3
126+
%0:_(s8) = COPY $b0
127+
%1:_(s8) = G_CONSTANT i8 15
128+
%2:_(s8) = G_AND %0, %1
129+
%3:_(s8) = G_CONSTANT i8 5
130+
%4:_(s8) = G_ADD %2, %3
131+
...
132+
---
133+
name: VectorCstZero
134+
body: |
135+
bb.1:
136+
; CHECK-LABEL: name: @VectorCstZero
137+
; CHECK-NEXT: %0:_ KnownBits:0000000000000001 SignBits:15
138+
; CHECK-NEXT: %1:_ KnownBits:1111111111111111 SignBits:16
139+
; CHECK-NEXT: %2:_ KnownBits:0000000000000001 SignBits:15
140+
; CHECK-NEXT: %3:_ KnownBits:1111111111111111 SignBits:16
141+
; CHECK-NEXT: %4:_ KnownBits:0000000000000000 SignBits:16
142+
%0:_(s16) = G_CONSTANT i16 1
143+
%1:_(s16) = G_CONSTANT i16 65535
144+
%2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
145+
%3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
146+
%4:_(<4 x s16>) = G_ADD %2, %3
147+
...
148+
---
149+
name: VectorCstNegOne
150+
body: |
151+
bb.1:
152+
; CHECK-LABEL: name: @VectorCstNegOne
153+
; CHECK-NEXT: %0:_ KnownBits:0000000000000000 SignBits:16
154+
; CHECK-NEXT: %1:_ KnownBits:1111111111111111 SignBits:16
155+
; CHECK-NEXT: %2:_ KnownBits:0000000000000000 SignBits:16
156+
; CHECK-NEXT: %3:_ KnownBits:1111111111111111 SignBits:16
157+
; CHECK-NEXT: %4:_ KnownBits:1111111111111111 SignBits:16
158+
%0:_(s16) = G_CONSTANT i16 0
159+
%1:_(s16) = G_CONSTANT i16 65535
160+
%2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
161+
%3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
162+
%4:_(<4 x s16>) = G_ADD %2, %3
163+
...
164+
---
165+
name: VectorVar
166+
body: |
167+
bb.1:
168+
; CHECK-LABEL: name: @VectorVar
169+
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
170+
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
171+
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:1
172+
%0:_(<4 x s16>) = COPY $d0
173+
%1:_(<4 x s16>) = COPY $d1
174+
%2:_(<4 x s16>) = G_ADD %0, %1
175+
...
176+
---
177+
name: VectorRhsEarlyOut
178+
body: |
179+
bb.1:
180+
; CHECK-LABEL: name: @VectorRhsEarlyOut
181+
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
182+
; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
183+
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
184+
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
185+
%0:_(<4 x s16>) = COPY $d0
186+
%1:_(s16) = G_CONSTANT i16 3
187+
%2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
188+
%3:_(<4 x s16>) = G_ADD %2, %0
189+
...
190+
---
191+
name: VectorNonNegative
192+
body: |
193+
bb.1:
194+
; CHECK-LABEL: name: @VectorNonNegative
195+
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
196+
; CHECK-NEXT: %1:_ KnownBits:0000000011111111 SignBits:8
197+
; CHECK-NEXT: %2:_ KnownBits:0000000011111111 SignBits:8
198+
; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8
199+
; CHECK-NEXT: %4:_ KnownBits:1111111111111111 SignBits:16
200+
; CHECK-NEXT: %5:_ KnownBits:1111111111111111 SignBits:16
201+
; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:8
202+
%0:_(<4 x s16>) = COPY $d0
203+
%1:_(s16) = G_CONSTANT i16 255
204+
%2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
205+
%3:_(<4 x s16>) = G_AND %0, %2
206+
%4:_(s16) = G_CONSTANT i16 65535
207+
%5:_(<4 x s16>) = G_BUILD_VECTOR %4, %4, %4, %4
208+
%6:_(<4 x s16>) = G_ADD %3, %5
209+
...
210+
---
211+
name: VectorLhsEarlyOut
212+
body: |
213+
bb.1:
214+
; CHECK-LABEL: name: @VectorLhsEarlyOut
215+
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
216+
; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14
217+
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
218+
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
219+
%0:_(<4 x s16>) = COPY $d0
220+
%1:_(s16) = G_CONSTANT i16 3
221+
%2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
222+
%3:_(<4 x s16>) = G_ADD %0, %2
223+
...
224+
---
225+
name: VectorPartKnown
226+
body: |
227+
bb.1:
228+
; CHECK-LABEL: name: @VectorPartKnown
229+
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
230+
; CHECK-NEXT: %1:_ KnownBits:0000000011111111 SignBits:8
231+
; CHECK-NEXT: %2:_ KnownBits:0000000011111111 SignBits:8
232+
; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8
233+
; CHECK-NEXT: %4:_ KnownBits:0000000000101010 SignBits:10
234+
; CHECK-NEXT: %5:_ KnownBits:0000000001001010 SignBits:9
235+
; CHECK-NEXT: %6:_ KnownBits:000000000??01010 SignBits:9
236+
; CHECK-NEXT: %7:_ KnownBits:0000000????????? SignBits:7
237+
%0:_(<4 x s16>) = COPY $d0
238+
%1:_(s16) = G_CONSTANT i16 255
239+
%2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1
240+
%3:_(<4 x s16>) = G_AND %0, %2
241+
%4:_(s16) = G_CONSTANT i16 42
242+
%5:_(s16) = G_CONSTANT i16 74
243+
%6:_(<4 x s16>) = G_BUILD_VECTOR %4, %5, %5, %4
244+
%7:_(<4 x s16>) = G_ADD %6, %3
245+
...
246+
---
247+
name: VectorCst36
248+
body: |
249+
bb.1:
250+
; CHECK-LABEL: name: @VectorCst36
251+
; CHECK-NEXT: %0:_ KnownBits:0000000000000011 SignBits:14
252+
; CHECK-NEXT: %1:_ KnownBits:0000000000000110 SignBits:13
253+
; CHECK-NEXT: %2:_ KnownBits:0000000000000?1? SignBits:13
254+
; CHECK-NEXT: %3:_ KnownBits:0000000000000?1? SignBits:13
255+
; CHECK-NEXT: %4:_ KnownBits:000000000000???? SignBits:12
256+
%0:_(s16) = G_CONSTANT i16 3
257+
%1:_(s16) = G_CONSTANT i16 6
258+
%2:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
259+
%3:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0
260+
%4:_(<4 x s16>) = G_ADD %2, %3
261+
...
262+
263+
---
264+
name: VectorCst3unknown
265+
body: |
266+
bb.1:
267+
; CHECK-LABEL: name: @VectorCst3unknown
268+
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
269+
; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
270+
; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14
271+
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
272+
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
273+
%0:_(<4 x s16>) = COPY $d0
274+
%1:_(s16) = COPY $h0
275+
%2:_(s16) = G_CONSTANT i16 3
276+
%3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1
277+
%4:_(<4 x s16>) = G_ADD %0, %3
278+
...

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