From 2f448bf509432c1a19ec46ab8cbc7353c03c6280 Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Wed, 22 Jun 2022 14:33:12 +0200 Subject: [PATCH] [X86] Migrate tests to use opaque pointers (NFC) Test updates were performed using: https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34 These are only the test updates where the test passed without further modification (which is almost all of them, as the backend is largely pointer-type agnostic). --- .../X86/2004-02-13-FrameReturnAddress.ll | 16 +- .../test/CodeGen/X86/2005-01-17-CycleInDAG.ll | 8 +- .../X86/2005-02-14-IllegalAssembler.ll | 4 +- .../CodeGen/X86/2006-01-19-ISelFoldingBug.ll | 4 +- .../CodeGen/X86/2006-04-04-CrossBlockCrash.ll | 4 +- .../CodeGen/X86/2006-04-27-ISelFoldingBug.ll | 16 +- .../X86/2006-05-01-SchedCausingSpills.ll | 18 +- .../CodeGen/X86/2006-05-02-InstrSched1.ll | 24 +- .../CodeGen/X86/2006-05-02-InstrSched2.ll | 14 +- .../X86/2006-05-08-CoalesceSubRegClass.ll | 16 +- .../test/CodeGen/X86/2006-05-08-InstrSched.ll | 18 +- .../test/CodeGen/X86/2006-05-11-InstrSched.ll | 27 +- .../test/CodeGen/X86/2006-05-25-CycleInDAG.ll | 2 +- .../X86/2006-07-12-InlineAsmQConstraint.ll | 2 +- llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll | 18 +- .../2006-07-28-AsmPrint-Long-As-Pointer.ll | 2 +- .../test/CodeGen/X86/2006-08-07-CycleInDAG.ll | 10 +- .../test/CodeGen/X86/2006-08-16-CycleInDAG.ll | 10 +- .../test/CodeGen/X86/2006-09-01-CycleInDAG.ll | 156 +- .../test/CodeGen/X86/2006-10-09-CycleInDAG.ll | 6 +- .../X86/2006-10-10-FindModifiedNodeSlotBug.ll | 10 +- .../test/CodeGen/X86/2006-10-12-CycleInDAG.ll | 17 +- .../test/CodeGen/X86/2006-10-13-CycleInDAG.ll | 10 +- .../2006-10-19-SwitchUnnecessaryBranching.ll | 12 +- .../CodeGen/X86/2006-11-17-IllegalMove.ll | 6 +- .../CodeGen/X86/2006-12-16-InlineAsmCrash.ll | 32 +- .../CodeGen/X86/2007-01-08-X86-64-Pointer.ll | 6 +- .../CodeGen/X86/2007-01-13-StackPtrIndex.ll | 119 +- .../test/CodeGen/X86/2007-02-04-OrAddrMode.ll | 9 +- .../X86/2007-02-19-LiveIntervalAssert.ll | 20 +- .../CodeGen/X86/2007-03-01-SpillerCrash.ll | 2 +- .../CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll | 76 +- llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll | 28 +- .../X86/2007-03-24-InlineAsmPModifier.ll | 2 +- .../CodeGen/X86/2007-03-26-CoalescerBug.ll | 2 +- .../CodeGen/X86/2007-04-08-InlineAsmCrash.ll | 12 +- .../X86/2007-04-11-InlineAsmVectorResult.ll | 2 +- .../X86/2007-04-17-LiveIntervalAssert.ll | 14 +- .../test/CodeGen/X86/2007-04-24-Huge-Stack.ll | 18 +- .../CodeGen/X86/2007-04-24-VectorCrash.ll | 4 +- .../CodeGen/X86/2007-05-05-Personality.ll | 14 +- .../CodeGen/X86/2007-05-05-VecCastExpand.ll | 10 +- .../X86/2007-05-14-LiveIntervalAssert.ll | 10 +- llvm/test/CodeGen/X86/2007-05-15-maskmovq.ll | 6 +- .../CodeGen/X86/2007-05-17-ShuffleISelBug.ll | 4 +- .../X86/2007-06-04-X86-64-CtorAsmBugs.ll | 10 +- .../X86/2007-06-29-VecFPConstantCSEBug.ll | 10 +- .../test/CodeGen/X86/2007-07-03-GR64ToVR64.ll | 4 +- .../CodeGen/X86/2007-07-10-StackerAssert.ll | 10 +- .../CodeGen/X86/2007-07-18-Vector-Extract.ll | 12 +- .../X86/2007-08-09-IllegalX86-64Asm.ll | 239 +- .../CodeGen/X86/2007-08-10-SignExtSubreg.ll | 4 +- .../test/CodeGen/X86/2007-09-05-InvalidAsm.ll | 38 +- .../CodeGen/X86/2007-09-06-ExtWeakAliasee.ll | 4 +- .../CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll | 8 +- .../X86/2007-10-12-CoalesceExtSubReg.ll | 12 +- .../CodeGen/X86/2007-10-12-SpillerUnfold1.ll | 26 +- .../CodeGen/X86/2007-10-12-SpillerUnfold2.ll | 22 +- .../CodeGen/X86/2007-10-14-CoalescerCrash.ll | 6 +- .../CodeGen/X86/2007-10-15-CoalescerCrash.ll | 436 ++-- .../CodeGen/X86/2007-10-19-SpillerUnfold.ll | 24 +- .../X86/2007-10-28-inlineasm-q-modifier.ll | 4 +- .../CodeGen/X86/2007-10-29-ExtendSetCC.ll | 2 +- llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll | 6 +- .../X86/2007-10-31-extractelement-i64.ll | 64 +- llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll | 6 +- .../X86/2007-11-03-x86-64-q-constraint.ll | 2 +- .../X86/2007-11-04-LiveIntervalCrash.ll | 18 +- .../X86/2007-11-04-LiveVariablesBug.ll | 14 +- .../X86/2007-11-04-rip-immediate-constant.ll | 4 +- .../test/CodeGen/X86/2007-11-06-InstrSched.ll | 10 +- llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll | 14 +- .../CodeGen/X86/2007-11-30-LoadFolding-Bug.ll | 34 +- .../CodeGen/X86/2007-12-16-BURRSchedCrash.ll | 17 +- .../test/CodeGen/X86/2007-12-18-LoadCSEBug.ll | 13 +- .../CodeGen/X86/2008-01-08-SchedulerCrash.ll | 6 +- .../X86/2008-01-16-FPStackifierAssert.ll | 18 +- .../X86/2008-01-16-InvalidDAGCombineXform.ll | 48 +- llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll | 6 +- .../CodeGen/X86/2008-02-06-LoadFoldingBug.ll | 24 +- .../CodeGen/X86/2008-02-18-TailMergingBug.ll | 70 +- .../X86/2008-02-20-InlineAsmClobber.ll | 12 +- .../X86/2008-02-22-LocalRegAllocBug.ll | 72 +- .../CodeGen/X86/2008-02-25-InlineAsmBug.ll | 22 +- .../X86/2008-02-25-X86-64-CoalescerBug.ll | 27 +- .../CodeGen/X86/2008-02-26-AsmDirectMemOp.ll | 4 +- .../CodeGen/X86/2008-02-27-DeadSlotElimBug.ll | 31 +- llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll | 94 +- .../CodeGen/X86/2008-03-10-RegAllocInfLoop.ll | 10 +- .../X86/2008-03-12-ThreadLocalAlias.ll | 26 +- .../CodeGen/X86/2008-03-14-SpillerCrash.ll | 26 +- .../X86/2008-03-23-DarwinAsmComments.ll | 38 +- .../CodeGen/X86/2008-03-25-TwoAddrPassBug.ll | 2 +- .../X86/2008-03-31-SpillerFoldingBug.ll | 55 +- .../CodeGen/X86/2008-04-09-BranchFolding.ll | 32 +- .../CodeGen/X86/2008-04-15-LiveVariableBug.ll | 50 +- .../CodeGen/X86/2008-04-16-CoalescerBug.ll | 6 +- llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll | 27 +- .../CodeGen/X86/2008-04-17-CoalescerBug.ll | 62 +- llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll | 6 +- .../X86/2008-04-24-pblendw-fold-crash.ll | 2 +- .../CodeGen/X86/2008-04-28-CoalescerBug.ll | 16 +- .../test/CodeGen/X86/2008-05-09-PHIElimBug.ll | 4 +- .../X86/2008-05-09-ShuffleLoweringBug.ll | 4 +- .../CodeGen/X86/2008-05-12-tailmerge-5.ll | 82 +- .../CodeGen/X86/2008-05-21-CoalescerBug.ll | 105 +- .../X86/2008-05-22-FoldUnalignedLoad.ll | 6 +- .../X86/2008-05-28-LocalRegAllocBug.ll | 20 +- .../X86/2008-06-13-NotVolatileLoadStore.ll | 16 +- .../X86/2008-06-13-VolatileLoadStore.ll | 18 +- .../test/CodeGen/X86/2008-06-16-SubregsBug.ll | 4 +- .../test/CodeGen/X86/2008-06-25-VecISelBug.ll | 2 +- .../X86/2008-07-07-DanglingDeadInsts.ll | 38 +- .../CodeGen/X86/2008-07-16-CoalescerCrash.ll | 16 +- .../CodeGen/X86/2008-07-19-movups-spills.ll | 196 +- .../CodeGen/X86/2008-07-22-CombinerCrash.ll | 8 +- llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll | 6 +- .../CodeGen/X86/2008-08-06-RewriterBug.ll | 18 +- .../CodeGen/X86/2008-08-23-64Bit-maskmovq.ll | 18 +- .../CodeGen/X86/2008-08-31-EH_RETURN32.ll | 10 +- .../CodeGen/X86/2008-08-31-EH_RETURN64.ll | 12 +- .../CodeGen/X86/2008-09-09-LinearScanBug.ll | 4 +- .../CodeGen/X86/2008-09-11-CoalescerBug.ll | 6 +- .../CodeGen/X86/2008-09-11-CoalescerBug2.ll | 4 +- .../CodeGen/X86/2008-09-17-inline-asm-1.ll | 8 +- .../CodeGen/X86/2008-09-18-inline-asm-2.ll | 22 +- .../CodeGen/X86/2008-09-19-RegAllocBug.ll | 6 +- .../CodeGen/X86/2008-09-26-FrameAddrBug.ll | 16 +- llvm/test/CodeGen/X86/2008-09-29-ReMatBug.ll | 66 +- .../CodeGen/X86/2008-09-29-VolatileBug.ll | 6 +- .../CodeGen/X86/2008-10-06-x87ld-nan-2.ll | 4 +- .../test/CodeGen/X86/2008-10-07-SSEISelBug.ll | 18 +- llvm/test/CodeGen/X86/2008-10-11-CallCrash.ll | 4 +- .../test/CodeGen/X86/2008-10-16-VecUnaryOp.ll | 6 +- .../CodeGen/X86/2008-10-24-FlippedCompare.ll | 2 +- .../CodeGen/X86/2008-10-27-CoalescerBug.ll | 4 +- .../CodeGen/X86/2008-10-29-ExpandVAARG.ll | 6 +- llvm/test/CodeGen/X86/2008-11-03-F80VAARG.ll | 15 +- llvm/test/CodeGen/X86/2008-11-06-testb.ll | 19 +- .../CodeGen/X86/2008-11-13-inlineasm-3.ll | 4 +- .../CodeGen/X86/2008-12-01-SpillerAssert.ll | 8 +- .../2008-12-01-loop-iv-used-outside-loop.ll | 12 +- .../X86/2008-12-02-IllegalResultType.ll | 8 +- .../CodeGen/X86/2008-12-02-dagcombine-1.ll | 12 +- .../CodeGen/X86/2008-12-02-dagcombine-2.ll | 12 +- .../CodeGen/X86/2008-12-02-dagcombine-3.ll | 8 +- .../CodeGen/X86/2008-12-19-EarlyClobberBug.ll | 8 +- .../CodeGen/X86/2008-12-23-crazy-address.ll | 24 +- .../CodeGen/X86/2009-01-13-DoubleUpdate.ll | 4 +- .../CodeGen/X86/2009-01-16-SchedulerBug.ll | 20 +- .../X86/2009-01-18-ConstantExprCrash.ll | 8 +- llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll | 9 +- .../test/CodeGen/X86/2009-01-26-WrongCheck.ll | 4 +- .../CodeGen/X86/2009-01-27-NullStrings.ll | 4 +- llvm/test/CodeGen/X86/2009-01-31-BigShift2.ll | 6 +- llvm/test/CodeGen/X86/2009-01-31-BigShift3.ll | 18 +- llvm/test/CodeGen/X86/2009-02-01-LargeMask.ll | 18 +- .../CodeGen/X86/2009-02-03-AnalyzedTwice.ll | 4 +- .../CodeGen/X86/2009-02-04-sext-i64-gep.ll | 5 +- .../X86/2009-02-09-ivs-different-sizes.ll | 6 +- .../X86/2009-02-11-codegenprepare-reuse.ll | 23 +- .../CodeGen/X86/2009-02-12-DebugInfoVLA.ll | 85 +- .../test/CodeGen/X86/2009-02-12-SpillerBug.ll | 2 +- .../X86/2009-02-21-ExtWeakInitializer.ll | 16 +- .../CodeGen/X86/2009-02-26-MachineLICMBug.ll | 28 +- llvm/test/CodeGen/X86/2009-03-03-BTHang.ll | 22 +- .../CodeGen/X86/2009-03-05-burr-list-crash.ll | 18 +- .../test/CodeGen/X86/2009-03-09-APIntCrash.ll | 2 +- .../test/CodeGen/X86/2009-03-09-SpillerBug.ll | 8 +- .../CodeGen/X86/2009-03-10-CoalescerBug.ll | 8 +- .../test/CodeGen/X86/2009-03-12-CPAlignBug.ll | 6 +- .../test/CodeGen/X86/2009-03-13-PHIElimBug.ll | 4 +- .../CodeGen/X86/2009-03-16-PHIElimInLPad.ll | 4 +- .../CodeGen/X86/2009-03-23-LinearScanBug.ll | 8 +- .../CodeGen/X86/2009-03-23-MultiUseSched.ll | 52 +- llvm/test/CodeGen/X86/2009-03-25-TestBug.ll | 10 +- llvm/test/CodeGen/X86/2009-04-12-picrel.ll | 6 +- .../CodeGen/X86/2009-04-13-2AddrAssert-2.ll | 4 +- .../CodeGen/X86/2009-04-13-2AddrAssert.ll | 2 +- .../CodeGen/X86/2009-04-14-IllegalRegs.ll | 42 +- .../CodeGen/X86/2009-04-16-SpillerUnfold.ll | 32 +- llvm/test/CodeGen/X86/2009-04-24.ll | 2 +- .../CodeGen/X86/2009-04-25-CoalescerBug.ll | 4 +- .../CodeGen/X86/2009-04-27-CoalescerAssert.ll | 568 ++--- .../X86/2009-04-29-IndirectDestOperands.ll | 30 +- .../CodeGen/X86/2009-04-29-LinearScanBug.ll | 162 +- .../CodeGen/X86/2009-04-29-RegAllocAssert.ll | 138 +- llvm/test/CodeGen/X86/2009-04-scale.ll | 16 +- .../X86/2009-05-08-InlineAsmIOffset.ll | 8 +- .../CodeGen/X86/2009-05-11-tailmerge-crash.ll | 4 +- .../2009-05-19-SingleElementExtractElement.ll | 2 +- .../X86/2009-05-23-available_externally.ll | 10 +- .../CodeGen/X86/2009-05-28-DAGCombineCrash.ll | 6 +- llvm/test/CodeGen/X86/2009-05-30-ISelBug.ll | 18 +- .../CodeGen/X86/2009-06-02-RewriterBug.ll | 78 +- .../CodeGen/X86/2009-06-04-VirtualLiveIn.ll | 14 +- .../CodeGen/X86/2009-06-05-VZextByteShort.ll | 16 +- .../CodeGen/X86/2009-06-15-not-a-tail-call.ll | 12 +- .../CodeGen/X86/2009-07-06-TwoAddrAssert.ll | 8 +- llvm/test/CodeGen/X86/2009-07-07-SplitICmp.ll | 4 +- .../X86/2009-07-09-ExtractBoolFromVector.ll | 4 +- .../CodeGen/X86/2009-07-15-CoalescerBug.ll | 61 +- .../CodeGen/X86/2009-07-16-CoalescerBug.ll | 32 +- .../X86/2009-07-19-AsmExtraOperands.ll | 4 +- .../CodeGen/X86/2009-07-20-CoalescerBug.ll | 52 +- .../CodeGen/X86/2009-07-20-DAGCombineBug.ll | 6 +- .../X86/2009-08-06-branchfolder-crash.ll | 10 +- llvm/test/CodeGen/X86/2009-08-06-inlineasm.ll | 16 +- llvm/test/CodeGen/X86/2009-08-08-CastError.ll | 4 +- .../X86/2009-08-14-Win64MemoryIndirectArg.ll | 24 +- .../X86/2009-08-19-LoadNarrowingMiscompile.ll | 4 +- .../CodeGen/X86/2009-08-23-SubRegReuseUndo.ll | 12 +- .../CodeGen/X86/2009-09-10-LoadFoldingBug.ll | 20 +- .../CodeGen/X86/2009-09-10-SpillComments.ll | 88 +- .../CodeGen/X86/2009-09-16-CoalescerBug.ll | 8 +- .../X86/2009-09-21-NoSpillLoopCount.ll | 12 +- .../CodeGen/X86/2009-09-22-CoalescerBug.ll | 6 +- .../X86/2009-09-23-LiveVariablesBug.ll | 22 +- .../X86/2009-10-14-LiveVariablesBug.ll | 12 +- llvm/test/CodeGen/X86/2009-10-16-Scope.ll | 6 +- .../CodeGen/X86/2009-10-19-EmergencySpill.ll | 37 +- .../X86/2009-10-19-atomic-cmp-eflags.ll | 45 +- .../CodeGen/X86/2009-10-25-RewriterBug.ll | 110 +- .../X86/2009-11-13-VirtRegRewriterBug.ll | 4 +- .../CodeGen/X86/2009-11-16-MachineLICM.ll | 28 +- .../CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll | 5 +- .../X86/2009-11-17-UpdateTerminator.ll | 14 +- .../CodeGen/X86/2009-11-18-TwoAddrKill.ll | 8 +- llvm/test/CodeGen/X86/2009-11-25-ImpDefBug.ll | 30 +- .../CodeGen/X86/2009-12-01-EarlyClobberBug.ll | 20 +- .../CodeGen/X86/2009-12-11-TLSNoRedZone.ll | 56 +- llvm/test/CodeGen/X86/20090313-signext.ll | 2 +- llvm/test/CodeGen/X86/2010-01-07-ISelBug.ll | 4 +- .../CodeGen/X86/2010-01-08-Atomic64Bug.ll | 4 +- .../CodeGen/X86/2010-01-11-ExtraPHIArg.ll | 4 +- .../X86/2010-01-15-SelectionDAGCycle.ll | 14 +- llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll | 20 +- llvm/test/CodeGen/X86/2010-01-19-OptExtBug.ll | 6 +- .../CodeGen/X86/2010-02-01-DbgValueCrash.ll | 8 +- .../CodeGen/X86/2010-02-01-TaillCallCrash.ll | 4 +- .../CodeGen/X86/2010-02-04-SchedulerBug.ll | 14 +- .../CodeGen/X86/2010-02-11-NonTemporal.ll | 12 +- .../X86/2010-02-12-CoalescerBug-Impdef.ll | 128 +- .../X86/2010-02-19-TailCallRetAddrBug.ll | 37 +- .../CodeGen/X86/2010-02-23-DAGCombineBug.ll | 4 +- .../CodeGen/X86/2010-02-23-DIV8rDefinesAX.ll | 4 +- .../X86/2010-02-23-RematImplicitSubreg.ll | 12 +- .../X86/2010-02-23-SingleDefPhiJoin.ll | 2 +- llvm/test/CodeGen/X86/2010-03-04-Mul8Bug.ll | 6 +- .../CodeGen/X86/2010-03-05-ConstantFoldCFG.ll | 4 +- .../CodeGen/X86/2010-03-05-EFLAGS-Redef.ll | 2 +- llvm/test/CodeGen/X86/2010-03-17-ISelBug.ll | 36 +- .../X86/2010-04-06-SSEDomainFixCrash.ll | 12 +- .../CodeGen/X86/2010-04-08-CoalescerBug.ll | 17 +- .../X86/2010-04-13-AnalyzeBranchCrash.ll | 12 +- .../CodeGen/X86/2010-04-21-CoalescerBug.ll | 7 +- .../CodeGen/X86/2010-04-29-CoalescerCrash.ll | 2 +- .../X86/2010-04-30-LocalAlloc-LandingPad.ll | 97 +- .../X86/2010-05-05-LocalAllocEarlyClobber.ll | 30 +- .../X86/2010-05-06-LocalInlineAsmClobber.ll | 4 +- llvm/test/CodeGen/X86/2010-05-07-ldconvert.ll | 12 +- .../CodeGen/X86/2010-05-10-DAGCombinerBug.ll | 6 +- .../CodeGen/X86/2010-05-12-FastAllocKills.ll | 2 +- .../CodeGen/X86/2010-05-16-nosseconversion.ll | 4 +- .../CodeGen/X86/2010-05-26-DotDebugLoc.ll | 16 +- .../CodeGen/X86/2010-05-26-FP_TO_INT-crash.ll | 4 +- .../CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll | 6 +- .../X86/2010-06-09-FastAllocRegisters.ll | 2 +- .../X86/2010-06-14-fast-isel-fs-load.ll | 4 +- .../X86/2010-06-15-FastAllocEarlyCLobber.ll | 22 +- .../X86/2010-06-24-g-constraint-crash.ll | 4 +- .../X86/2010-06-25-CoalescerSubRegDefDead.ll | 23 +- .../CodeGen/X86/2010-06-25-asm-RA-crash.ll | 13 +- .../X86/2010-06-28-FastAllocTiedOperand.ll | 6 +- .../X86/2010-06-28-matched-g-constraint.ll | 6 +- llvm/test/CodeGen/X86/2010-07-02-UnfoldBug.ll | 6 +- llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll | 10 +- llvm/test/CodeGen/X86/2010-07-06-asm-RIP.ll | 6 +- .../CodeGen/X86/2010-07-11-FPStackLoneUse.ll | 6 +- .../X86/2010-07-13-indirectXconstraint.ll | 4 +- llvm/test/CodeGen/X86/2010-07-15-Crash.ll | 6 +- .../X86/2010-08-04-MaskedSignedCompare.ll | 10 +- .../test/CodeGen/X86/2010-08-04-MingWCrash.ll | 22 +- .../CodeGen/X86/2010-08-04-StackVariable.ll | 55 +- .../2010-09-01-RemoveCopyByCommutingDef.ll | 10 +- llvm/test/CodeGen/X86/2010-09-16-asmcrash.ll | 6 +- .../X86/2010-09-17-SideEffectsInChain.ll | 18 +- .../X86/2010-09-30-CMOV-JumpTable-PHI.ll | 14 +- llvm/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll | 4 +- .../CodeGen/X86/2010-11-02-DbgParameter.ll | 4 +- llvm/test/CodeGen/X86/2010-11-09-MOVLPS.ll | 66 +- .../CodeGen/X86/2010-11-18-SelectOfExtload.ll | 4 +- .../X86/2011-01-07-LegalizeTypesCrash.ll | 2 +- .../X86/2011-01-24-DbgValue-Before-Use.ll | 8 +- llvm/test/CodeGen/X86/2011-02-12-shuffle.ll | 4 +- .../2011-02-21-VirtRegRewriter-KillSubReg.ll | 20 +- .../CodeGen/X86/2011-03-02-DAGCombiner.ll | 51 +- .../CodeGen/X86/2011-03-08-Sched-crash.ll | 6 +- .../X86/2011-03-09-Physreg-Coalescing.ll | 11 +- .../X86/2011-03-30-CreateFixedObjCrash.ll | 2 +- .../CodeGen/X86/2011-04-13-SchedCmpJmp.ll | 27 +- llvm/test/CodeGen/X86/2011-05-09-loaduse.ll | 6 +- .../X86/2011-05-26-UnreachableBlockElim.ll | 14 +- .../X86/2011-05-27-CrossClassCoalescing.ll | 6 +- llvm/test/CodeGen/X86/2011-06-01-fildll.ll | 4 +- llvm/test/CodeGen/X86/2011-06-03-x87chain.ll | 22 +- .../CodeGen/X86/2011-06-12-FastAllocSpill.ll | 34 +- .../CodeGen/X86/2011-06-14-mmx-inlineasm.ll | 4 +- .../X86/2011-06-19-QuicksortCoalescerBug.ll | 6 +- .../2011-07-13-BadFrameIndexDisplacement.ll | 8 +- .../test/CodeGen/X86/2011-08-23-Trampoline.ll | 12 +- .../CodeGen/X86/2011-08-29-BlockConstant.ll | 4 +- llvm/test/CodeGen/X86/2011-08-29-InitOrder.ll | 4 +- .../CodeGen/X86/2011-09-14-valcoalesce.ll | 2 +- llvm/test/CodeGen/X86/2011-09-21-setcc-bug.ll | 24 +- llvm/test/CodeGen/X86/2011-10-11-srl.ll | 6 +- .../test/CodeGen/X86/2011-10-12-MachineCSE.ll | 139 +- .../X86/2011-10-18-FastISel-VectorParams.ll | 20 +- .../CodeGen/X86/2011-10-19-LegelizeLoad.ll | 6 +- .../CodeGen/X86/2011-10-19-widen_vselect.ll | 14 +- llvm/test/CodeGen/X86/2011-10-21-widen-cmp.ll | 9 +- llvm/test/CodeGen/X86/2011-10-27-tstore.ll | 6 +- .../X86/2011-11-07-LegalizeBuildVector.ll | 4 +- .../CodeGen/X86/2011-11-22-AVX2-Domains.ll | 24 +- llvm/test/CodeGen/X86/2011-11-30-or.ll | 2 +- .../X86/2011-12-06-AVXVectorExtractCombine.ll | 6 +- .../CodeGen/X86/2011-12-08-AVXISelBugs.ll | 16 +- ...011-12-26-extractelement-duplicate-load.ll | 4 +- llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll | 5 +- .../CodeGen/X86/2011-12-8-bitcastintprom.ll | 4 +- .../test/CodeGen/X86/2011-20-21-zext-ui2fp.ll | 4 +- .../X86/2012-01-10-UndefExceptionEdge.ll | 46 +- llvm/test/CodeGen/X86/2012-01-11-split-cv.ll | 6 +- .../test/CodeGen/X86/2012-01-12-extract-sv.ll | 4 +- .../X86/2012-01-16-mfence-nosse-flags.ll | 10 +- llvm/test/CodeGen/X86/2012-02-12-dagco.ll | 6 +- .../CodeGen/X86/2012-02-29-CoalescerBug.ll | 10 +- .../X86/2012-03-20-LargeConstantExpr.ll | 6 +- .../CodeGen/X86/2012-03-26-PostRALICMBug.ll | 33 +- .../CodeGen/X86/2012-04-09-TwoAddrPassBug.ll | 2 +- llvm/test/CodeGen/X86/2012-04-26-sdglue.ll | 10 +- .../CodeGen/X86/2012-05-19-CoalescerCrash.ll | 28 +- llvm/test/CodeGen/X86/2012-07-10-extload64.ll | 14 +- llvm/test/CodeGen/X86/2012-07-10-shufnorm.ll | 2 +- .../CodeGen/X86/2012-07-15-broadcastfold.ll | 4 +- llvm/test/CodeGen/X86/2012-07-16-LeaUndef.ll | 2 +- .../test/CodeGen/X86/2012-08-07-CmpISelBug.ll | 4 +- .../CodeGen/X86/2012-08-17-legalizer-crash.ll | 13 +- .../test/CodeGen/X86/2012-09-13-dagco-fneg.ll | 2 +- .../test/CodeGen/X86/2012-1-10-buildvector.ll | 4 +- llvm/test/CodeGen/X86/2012-10-02-DAGCycle.ll | 28 +- llvm/test/CodeGen/X86/2012-10-03-DAGCycle.ll | 25 +- .../CodeGen/X86/2012-10-18-crash-dagco.ll | 21 +- .../X86/2012-11-28-merge-store-alias.ll | 52 +- .../CodeGen/X86/2012-12-1-merge-multiple.ll | 33 +- .../CodeGen/X86/2012-12-12-DAGCombineCrash.ll | 4 +- .../CodeGen/X86/2012-12-14-v8fp80-crash.ll | 2 +- .../CodeGen/X86/2012-12-19-NoImplicitFloat.ll | 11 +- .../CodeGen/X86/2013-01-09-DAGCombineBug.ll | 6 +- .../CodeGen/X86/2013-03-13-VEX-DestReg.ll | 4 +- .../X86/2013-05-06-ConactVectorCrash.ll | 2 +- .../X86/2013-10-14-FastISel-incorrect-vreg.ll | 25 +- .../CodeGen/X86/2014-08-29-CompactUnwind.ll | 9 +- .../X86/2020_12_02_decrementing_loop.ll | 31 +- llvm/test/CodeGen/X86/20210831-inlineasm.ll | 10 +- llvm/test/CodeGen/X86/3addr-or.ll | 8 +- .../CodeGen/X86/64-bit-shift-by-32-minus-y.ll | 8 +- llvm/test/CodeGen/X86/9601.ll | 2 +- .../test/CodeGen/X86/AMX/amx-combine-undef.ll | 80 +- llvm/test/CodeGen/X86/AMX/amx-combine.ll | 79 +- llvm/test/CodeGen/X86/AMX/amx-config.ll | 18 +- .../CodeGen/X86/AMX/amx-configO2toO0-lower.ll | 58 +- .../CodeGen/X86/AMX/amx-intrinsic-chain.ll | 24 +- .../CodeGen/X86/AMX/amx-ldtilecfg-insert.ll | 38 +- .../AMX/amx-low-intrinsics-no-amx-bitcast.ll | 42 +- .../CodeGen/X86/AMX/amx-low-intrinsics.ll | 75 +- .../CodeGen/X86/AMX/amx-lower-tile-copy.ll | 22 +- llvm/test/CodeGen/X86/AMX/amx-sched.ll | 10 +- llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll | 30 +- llvm/test/CodeGen/X86/AMX/amx-spill.ll | 32 +- llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll | 16 +- .../CodeGen/X86/AMX/amx-tile-intrinsics.ll | 22 +- .../X86/AMX/lat-combine-amx-bitcast.ll | 209 +- llvm/test/CodeGen/X86/Atomics-64.ll | 1602 ++++++-------- llvm/test/CodeGen/X86/GC/alloc_loop.ll | 36 +- llvm/test/CodeGen/X86/GC/argpromotion.ll | 14 +- llvm/test/CodeGen/X86/GC/badreadproto.ll | 11 +- llvm/test/CodeGen/X86/GC/badrootproto.ll | 10 +- llvm/test/CodeGen/X86/GC/badwriteproto.ll | 19 +- llvm/test/CodeGen/X86/GC/cg-O0.ll | 7 +- llvm/test/CodeGen/X86/GC/deadargelim.ll | 6 +- .../test/CodeGen/X86/GC/dynamic-frame-size.ll | 8 +- llvm/test/CodeGen/X86/GC/fat.ll | 7 +- llvm/test/CodeGen/X86/GC/inline.ll | 19 +- llvm/test/CodeGen/X86/GC/inline2.ll | 19 +- llvm/test/CodeGen/X86/GC/lower_gcroot.ll | 6 +- llvm/test/CodeGen/X86/GC/ocaml-gc-assert.ll | 10 +- llvm/test/CodeGen/X86/GC/outside.ll | 10 +- llvm/test/CodeGen/X86/GlobalISel/GV.ll | 6 +- llvm/test/CodeGen/X86/GlobalISel/add-ext.ll | 58 +- llvm/test/CodeGen/X86/GlobalISel/brcond.ll | 6 +- .../CodeGen/X86/GlobalISel/callingconv.ll | 24 +- llvm/test/CodeGen/X86/GlobalISel/constant.ll | 4 +- llvm/test/CodeGen/X86/GlobalISel/fconstant.ll | 4 +- .../test/CodeGen/X86/GlobalISel/frameIndex.ll | 4 +- llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll | 6 +- .../GlobalISel/irtranslator-callingconv.ll | 46 +- .../X86/GlobalISel/memop-scalar-x32.ll | 50 +- .../CodeGen/X86/GlobalISel/memop-scalar.ll | 84 +- llvm/test/CodeGen/X86/GlobalISel/memop-vec.ll | 48 +- llvm/test/CodeGen/X86/GlobalISel/ptr-add.ll | 48 +- llvm/test/CodeGen/X86/GlobalISel/ptrtoint.ll | 20 +- .../X86/GlobalISel/x32-irtranslator.ll | 12 +- .../CodeGen/X86/GlobalISel/x86_64-fallback.ll | 14 +- llvm/test/CodeGen/X86/MachineBranchProb.ll | 4 +- llvm/test/CodeGen/X86/MachineSink-DbgValue.ll | 6 +- llvm/test/CodeGen/X86/MachineSink-SubReg.ll | 10 +- llvm/test/CodeGen/X86/MachineSink-eflags.ll | 50 +- llvm/test/CodeGen/X86/PR34565.ll | 4 +- llvm/test/CodeGen/X86/PR40322.ll | 67 +- llvm/test/CodeGen/X86/StackColoring-dbg.ll | 11 +- llvm/test/CodeGen/X86/StackColoring.ll | 487 ++-- llvm/test/CodeGen/X86/SwitchLowering.ll | 10 +- llvm/test/CodeGen/X86/SwizzleShuff.ll | 36 +- llvm/test/CodeGen/X86/abi-isel.ll | 809 ++++--- .../CodeGen/X86/absolute-bit-mask-fastisel.ll | 6 +- llvm/test/CodeGen/X86/absolute-bit-mask.ll | 18 +- llvm/test/CodeGen/X86/absolute-bt.ll | 12 +- llvm/test/CodeGen/X86/absolute-cmp.ll | 4 +- llvm/test/CodeGen/X86/absolute-constant.ll | 6 +- llvm/test/CodeGen/X86/absolute-rotate.ll | 8 +- llvm/test/CodeGen/X86/add-and-not.ll | 16 +- llvm/test/CodeGen/X86/add-cmov.ll | 194 +- llvm/test/CodeGen/X86/add-ext.ll | 58 +- llvm/test/CodeGen/X86/add.ll | 40 +- llvm/test/CodeGen/X86/add32ri8.ll | 4 +- llvm/test/CodeGen/X86/addcarry.ll | 1016 +++++---- llvm/test/CodeGen/X86/addcarry2.ll | 58 +- .../test/CodeGen/X86/addr-label-difference.ll | 2 +- llvm/test/CodeGen/X86/addr-mode-matcher-2.ll | 6 +- llvm/test/CodeGen/X86/addr-mode-matcher.ll | 18 +- llvm/test/CodeGen/X86/addr-of-ret-addr.ll | 8 +- .../address-type-promotion-constantexpr.ll | 2 +- .../CodeGen/X86/adx-intrinsics-upgrade.ll | 49 +- llvm/test/CodeGen/X86/adx-intrinsics.ll | 78 +- llvm/test/CodeGen/X86/alias-gep.ll | 4 +- llvm/test/CodeGen/X86/alias-static-alloca.ll | 16 +- .../align-branch-boundary-noautopadding.ll | 6 +- .../align-branch-boundary-suppressions-tls.ll | 4 +- .../X86/align-branch-boundary-suppressions.ll | 16 +- llvm/test/CodeGen/X86/align-down-const.ll | 4 +- llvm/test/CodeGen/X86/align-down.ll | 14 +- llvm/test/CodeGen/X86/aligned-variadic.ll | 22 +- llvm/test/CodeGen/X86/alignment-2.ll | 21 +- llvm/test/CodeGen/X86/alldiv-divdi3.ll | 2 +- .../CodeGen/X86/alloca-align-rounding-32.ll | 6 +- .../test/CodeGen/X86/alloca-align-rounding.ll | 6 +- llvm/test/CodeGen/X86/alloca-overaligned.ll | 8 +- llvm/test/CodeGen/X86/allrem-moddi3.ll | 2 +- llvm/test/CodeGen/X86/and-encoding.ll | 8 +- llvm/test/CodeGen/X86/and-load-fold.ll | 5 +- llvm/test/CodeGen/X86/and-sink.ll | 22 +- llvm/test/CodeGen/X86/and-su.ll | 4 +- llvm/test/CodeGen/X86/andimm8.ll | 4 +- llvm/test/CodeGen/X86/anyregcc-crash.ll | 4 +- llvm/test/CodeGen/X86/anyregcc.ll | 36 +- llvm/test/CodeGen/X86/apm.ll | 6 +- llvm/test/CodeGen/X86/arg-copy-elide-win64.ll | 4 +- llvm/test/CodeGen/X86/arg-copy-elide.ll | 115 +- llvm/test/CodeGen/X86/arg_returned_bitcast.ll | 8 +- llvm/test/CodeGen/X86/arithmetic_fence.ll | 4 +- .../CodeGen/X86/asan-check-memaccess-add.ll | 44 +- .../CodeGen/X86/asan-check-memaccess-or.ll | 6 +- llvm/test/CodeGen/X86/asm-block-labels2.ll | 4 +- llvm/test/CodeGen/X86/asm-global-imm.ll | 10 +- llvm/test/CodeGen/X86/asm-indirect-mem.ll | 4 +- .../X86/asm-invalid-register-class-crasher.ll | 4 +- llvm/test/CodeGen/X86/asm-label2.ll | 4 +- llvm/test/CodeGen/X86/asm-modifier-P.ll | 14 +- llvm/test/CodeGen/X86/asm-modifier.ll | 8 +- .../X86/asm-reg-type-mismatch-avx512.ll | 2 +- .../test/CodeGen/X86/asm-reg-type-mismatch.ll | 8 +- .../X86/asm-reject-reg-type-mismatch.ll | 4 +- llvm/test/CodeGen/X86/asm-reject-x87-int.ll | 13 +- .../atom-call-reg-indirect-foldedreload32.ll | 38 +- .../atom-call-reg-indirect-foldedreload64.ll | 52 +- .../CodeGen/X86/atom-call-reg-indirect.ll | 19 +- llvm/test/CodeGen/X86/atom-cmpb.ll | 10 +- llvm/test/CodeGen/X86/atom-fixup-lea1.ll | 6 +- llvm/test/CodeGen/X86/atom-fixup-lea2.ll | 35 +- llvm/test/CodeGen/X86/atom-fixup-lea3.ll | 20 +- llvm/test/CodeGen/X86/atom-fixup-lea4.ll | 13 +- llvm/test/CodeGen/X86/atom-lea-addw-bug.ll | 6 +- llvm/test/CodeGen/X86/atom-lea-sp.ll | 7 +- .../CodeGen/X86/atom-pad-short-functions.ll | 2 +- llvm/test/CodeGen/X86/atom-sched.ll | 12 +- llvm/test/CodeGen/X86/atomic-add.ll | 96 +- llvm/test/CodeGen/X86/atomic-bit-test.ll | 40 +- llvm/test/CodeGen/X86/atomic-eflags-reuse.ll | 76 +- llvm/test/CodeGen/X86/atomic-flags.ll | 28 +- llvm/test/CodeGen/X86/atomic-fp.ll | 48 +- llvm/test/CodeGen/X86/atomic-idempotent.ll | 60 +- .../CodeGen/X86/atomic-load-store-wide.ll | 16 +- llvm/test/CodeGen/X86/atomic-load-store.ll | 12 +- llvm/test/CodeGen/X86/atomic-mi.ll | 438 ++-- llvm/test/CodeGen/X86/atomic-minmax-i6432.ll | 15 +- llvm/test/CodeGen/X86/atomic-monotonic.ll | 32 +- .../CodeGen/X86/atomic-non-integer-fp128.ll | 4 +- llvm/test/CodeGen/X86/atomic-non-integer.ll | 48 +- llvm/test/CodeGen/X86/atomic-op.ll | 122 +- .../test/CodeGen/X86/atomic-ops-ancient-64.ll | 24 +- llvm/test/CodeGen/X86/atomic-or.ll | 20 +- llvm/test/CodeGen/X86/atomic-pointer.ll | 10 +- llvm/test/CodeGen/X86/atomic128.ll | 74 +- llvm/test/CodeGen/X86/atomic16.ll | 52 +- llvm/test/CodeGen/X86/atomic32.ll | 52 +- llvm/test/CodeGen/X86/atomic6432.ll | 50 +- llvm/test/CodeGen/X86/atomic8.ll | 50 +- llvm/test/CodeGen/X86/atomicf128.ll | 2 +- llvm/test/CodeGen/X86/attribute-sections.ll | 18 +- llvm/test/CodeGen/X86/avg.ll | 230 +- llvm/test/CodeGen/X86/avoid-loop-align-2.ll | 8 +- llvm/test/CodeGen/X86/avoid-loop-align.ll | 18 +- llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll | 123 +- llvm/test/CodeGen/X86/avoid-sfb.ll | 222 +- llvm/test/CodeGen/X86/avoid_complex_am.ll | 14 +- llvm/test/CodeGen/X86/avx-arith.ll | 14 +- llvm/test/CodeGen/X86/avx-basic.ll | 31 +- llvm/test/CodeGen/X86/avx-bitcast.ll | 2 +- llvm/test/CodeGen/X86/avx-cvt-2.ll | 16 +- llvm/test/CodeGen/X86/avx-cvt.ll | 36 +- llvm/test/CodeGen/X86/avx-cvttp2si.ll | 8 +- llvm/test/CodeGen/X86/avx-intel-ocl.ll | 10 +- .../CodeGen/X86/avx-intrinsics-fast-isel.ll | 201 +- .../CodeGen/X86/avx-intrinsics-x86-upgrade.ll | 48 +- llvm/test/CodeGen/X86/avx-intrinsics-x86.ll | 76 +- llvm/test/CodeGen/X86/avx-isa-check.ll | 60 +- llvm/test/CodeGen/X86/avx-load-store.ll | 66 +- llvm/test/CodeGen/X86/avx-logic.ll | 8 +- llvm/test/CodeGen/X86/avx-select.ll | 2 +- llvm/test/CodeGen/X86/avx-shuffle-x86_32.ll | 4 +- llvm/test/CodeGen/X86/avx-splat.ll | 21 +- llvm/test/CodeGen/X86/avx-unpack.ll | 24 +- llvm/test/CodeGen/X86/avx-varargs-x86_64.ll | 2 +- llvm/test/CodeGen/X86/avx-vbroadcast.ll | 241 +- llvm/test/CodeGen/X86/avx-vbroadcastf128.ll | 72 +- llvm/test/CodeGen/X86/avx-vextractf128.ll | 48 +- llvm/test/CodeGen/X86/avx-vinsertf128.ll | 16 +- llvm/test/CodeGen/X86/avx-vperm2x128.ll | 83 +- llvm/test/CodeGen/X86/avx-vzeroupper.ll | 8 +- llvm/test/CodeGen/X86/avx.ll | 30 +- .../CodeGen/X86/avx1-logical-load-folding.ll | 28 +- llvm/test/CodeGen/X86/avx2-arith.ll | 4 +- llvm/test/CodeGen/X86/avx2-conversions.ll | 20 +- llvm/test/CodeGen/X86/avx2-gather.ll | 44 +- .../CodeGen/X86/avx2-intrinsics-fast-isel.ll | 292 ++- .../X86/avx2-intrinsics-x86-upgrade.ll | 12 +- llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll | 168 +- llvm/test/CodeGen/X86/avx2-masked-gather.ll | 94 +- llvm/test/CodeGen/X86/avx2-nontemporal.ll | 34 +- llvm/test/CodeGen/X86/avx2-pmovxrm.ll | 48 +- llvm/test/CodeGen/X86/avx2-shift.ll | 40 +- llvm/test/CodeGen/X86/avx2-vbroadcast.ll | 222 +- llvm/test/CodeGen/X86/avx2-vbroadcasti128.ll | 66 +- .../CodeGen/X86/avx512-any_extend_load.ll | 18 +- llvm/test/CodeGen/X86/avx512-arith.ll | 56 +- llvm/test/CodeGen/X86/avx512-bugfix-23634.ll | 8 +- llvm/test/CodeGen/X86/avx512-bugfix-25270.ll | 8 +- llvm/test/CodeGen/X86/avx512-bugfix-26264.ll | 12 +- llvm/test/CodeGen/X86/avx512-calling-conv.ll | 16 +- llvm/test/CodeGen/X86/avx512-cmp-mask.ll | 38 +- llvm/test/CodeGen/X86/avx512-cvt.ll | 44 +- llvm/test/CodeGen/X86/avx512-cvttp2i.ll | 68 +- llvm/test/CodeGen/X86/avx512-ext.ll | 198 +- .../avx512-extract-subvector-load-store.ll | 318 +-- .../CodeGen/X86/avx512-extract-subvector.ll | 235 +- llvm/test/CodeGen/X86/avx512-fma-commute.ll | 32 +- .../test/CodeGen/X86/avx512-fma-intrinsics.ll | 2 +- llvm/test/CodeGen/X86/avx512-fma.ll | 20 +- ...avx512-gather-scatter-intrin-deprecated.ll | 420 ++-- .../X86/avx512-gather-scatter-intrin.ll | 424 ++-- llvm/test/CodeGen/X86/avx512-i1test.ll | 4 +- .../test/CodeGen/X86/avx512-insert-extract.ll | 128 +- llvm/test/CodeGen/X86/avx512-intel-ocl.ll | 10 +- .../X86/avx512-intrinsics-fast-isel.ll | 120 +- .../CodeGen/X86/avx512-intrinsics-upgrade.ll | 595 +++-- llvm/test/CodeGen/X86/avx512-intrinsics.ll | 263 ++- llvm/test/CodeGen/X86/avx512-load-store.ll | 158 +- .../CodeGen/X86/avx512-load-trunc-store-i1.ll | 42 +- llvm/test/CodeGen/X86/avx512-logic.ll | 8 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 169 +- .../CodeGen/X86/avx512-mask-zext-bugfix.ll | 14 +- .../CodeGen/X86/avx512-masked-memop-64-32.ll | 89 +- .../CodeGen/X86/avx512-masked_memop-16-8.ll | 84 +- llvm/test/CodeGen/X86/avx512-memfold.ll | 20 +- llvm/test/CodeGen/X86/avx512-mov.ll | 192 +- llvm/test/CodeGen/X86/avx512-nontemporal.ll | 34 +- llvm/test/CodeGen/X86/avx512-pmovxrm.ll | 48 +- .../test/CodeGen/X86/avx512-regcall-NoMask.ll | 26 +- llvm/test/CodeGen/X86/avx512-rndscale.ll | 720 +++--- .../CodeGen/X86/avx512-scalarIntrinsics.ll | 24 +- llvm/test/CodeGen/X86/avx512-select.ll | 32 +- llvm/test/CodeGen/X86/avx512-shift.ll | 16 +- .../avx512-shuffles/broadcast-scalar-fp.ll | 180 +- .../avx512-shuffles/broadcast-scalar-int.ll | 416 ++-- .../avx512-shuffles/broadcast-vector-fp.ll | 288 +-- .../avx512-shuffles/broadcast-vector-int.ll | 324 +-- .../X86/avx512-shuffles/duplicate-high.ll | 132 +- .../X86/avx512-shuffles/duplicate-low.ll | 240 +- .../X86/avx512-shuffles/in_lane_permute.ll | 292 +-- .../X86/avx512-shuffles/partial_permute.ll | 600 +++-- .../CodeGen/X86/avx512-shuffles/permute.ll | 472 ++-- .../X86/avx512-shuffles/shuffle-interleave.ll | 220 +- .../X86/avx512-shuffles/shuffle-vec.ll | 320 +-- .../CodeGen/X86/avx512-shuffles/shuffle.ll | 468 ++-- .../CodeGen/X86/avx512-shuffles/unpack.ll | 440 ++-- llvm/test/CodeGen/X86/avx512-trunc.ll | 148 +- .../test/CodeGen/X86/avx512-unsafe-fp-math.ll | 24 +- llvm/test/CodeGen/X86/avx512-vbroadcast.ll | 24 +- .../test/CodeGen/X86/avx512-vbroadcasti128.ll | 54 +- .../test/CodeGen/X86/avx512-vbroadcasti256.ll | 24 +- llvm/test/CodeGen/X86/avx512-vec-cmp.ll | 162 +- .../CodeGen/X86/avx512-vpermv3-commute.ll | 36 +- .../CodeGen/X86/avx512-vpternlog-commute.ll | 308 +-- llvm/test/CodeGen/X86/avx512bw-arith.ll | 16 +- .../X86/avx512bw-intrinsics-canonical.ll | 48 +- .../X86/avx512bw-intrinsics-fast-isel.ll | 30 +- .../X86/avx512bw-intrinsics-upgrade.ll | 236 +- llvm/test/CodeGen/X86/avx512bw-intrinsics.ll | 100 +- llvm/test/CodeGen/X86/avx512bw-mask-op.ll | 24 +- llvm/test/CodeGen/X86/avx512bw-mov.ll | 88 +- llvm/test/CodeGen/X86/avx512bw-vec-cmp.ll | 24 +- llvm/test/CodeGen/X86/avx512bwvl-arith.ll | 32 +- .../X86/avx512bwvl-intrinsics-canonical.ll | 192 +- .../X86/avx512bwvl-intrinsics-upgrade.ll | 584 ++--- .../test/CodeGen/X86/avx512bwvl-intrinsics.ll | 192 +- llvm/test/CodeGen/X86/avx512bwvl-mov.ll | 80 +- llvm/test/CodeGen/X86/avx512bwvl-vec-cmp.ll | 48 +- .../X86/avx512dq-intrinsics-upgrade.ll | 16 +- llvm/test/CodeGen/X86/avx512dq-intrinsics.ll | 8 +- llvm/test/CodeGen/X86/avx512dq-mask-op.ll | 12 +- .../X86/avx512dqvl-intrinsics-upgrade.ll | 368 +-- .../test/CodeGen/X86/avx512dqvl-intrinsics.ll | 144 +- llvm/test/CodeGen/X86/avx512er-intrinsics.ll | 26 +- .../X86/avx512fp16-arith-intrinsics.ll | 40 +- .../X86/avx512fp16-arith-vl-intrinsics.ll | 56 +- llvm/test/CodeGen/X86/avx512fp16-arith.ll | 40 +- .../X86/avx512fp16-cvt-ph-w-intrinsics.ll | 64 +- .../X86/avx512fp16-cvt-ph-w-vl-intrinsics.ll | 96 +- llvm/test/CodeGen/X86/avx512fp16-cvt.ll | 40 +- .../CodeGen/X86/avx512fp16-fma-commute.ll | 240 +- .../CodeGen/X86/avx512fp16-fma-intrinsics.ll | 12 +- .../X86/avx512fp16-fold-load-binops.ll | 24 +- .../test/CodeGen/X86/avx512fp16-intrinsics.ll | 44 +- llvm/test/CodeGen/X86/avx512fp16-mov.ll | 301 ++- llvm/test/CodeGen/X86/avx512fp16-mscatter.ll | 8 +- .../X86/avx512fp16-subv-broadcast-fp16.ll | 18 +- .../CodeGen/X86/avx512fp16-unsafe-fp-math.ll | 32 +- .../CodeGen/X86/avx512fp16vl-intrinsics.ll | 8 +- .../X86/avx512ifma-intrinsics-upgrade.ll | 48 +- .../test/CodeGen/X86/avx512ifma-intrinsics.ll | 48 +- .../X86/avx512vbmi2-intrinsics-fast-isel.ll | 49 +- .../X86/avx512vbmi2-intrinsics-upgrade.ll | 72 +- .../CodeGen/X86/avx512vbmi2-intrinsics.ll | 89 +- .../X86/avx512vbmi2vl-intrinsics-fast-isel.ll | 98 +- .../X86/avx512vbmi2vl-intrinsics-upgrade.ll | 144 +- .../CodeGen/X86/avx512vbmi2vl-intrinsics.ll | 178 +- llvm/test/CodeGen/X86/avx512vl-arith.ll | 80 +- .../X86/avx512vl-intrinsics-fast-isel.ll | 276 ++- .../X86/avx512vl-intrinsics-upgrade.ll | 1014 +++++---- llvm/test/CodeGen/X86/avx512vl-intrinsics.ll | 288 +-- llvm/test/CodeGen/X86/avx512vl-mov.ll | 320 ++- llvm/test/CodeGen/X86/avx512vl-nontemporal.ll | 38 +- llvm/test/CodeGen/X86/avx512vl-vbroadcast.ll | 8 +- llvm/test/CodeGen/X86/avx512vl-vec-cmp.ll | 144 +- .../CodeGen/X86/avx512vl-vec-masked-cmp.ll | 1968 ++++++++--------- .../X86/avx512vl_vnni-intrinsics-upgrade.ll | 32 +- .../CodeGen/X86/avx512vl_vnni-intrinsics.ll | 36 +- .../X86/avx512vlvp2intersect-intrinsics.ll | 138 +- .../X86/avx512vnni-intrinsics-upgrade.ll | 16 +- .../test/CodeGen/X86/avx512vnni-intrinsics.ll | 16 +- llvm/test/CodeGen/X86/avx512vnni.ll | 16 +- .../X86/avx512vp2intersect-intrinsics.ll | 82 +- llvm/test/CodeGen/X86/avxvnni.ll | 32 +- llvm/test/CodeGen/X86/backpropmask.ll | 14 +- .../CodeGen/X86/base-pointer-and-cmpxchg.ll | 8 +- .../CodeGen/X86/base-pointer-and-mwaitx.ll | 32 +- ...basic-block-sections-blockaddress-taken.ll | 4 +- .../basic-block-sections-clusters-branches.ll | 4 +- .../X86/basic-block-sections-clusters-eh.ll | 16 +- .../X86/basic-block-sections-clusters.ll | 4 +- .../X86/basic-block-sections-directjumps.ll | 4 +- .../CodeGen/X86/basic-block-sections-eh.ll | 66 +- .../X86/basic-block-sections-labels.ll | 6 +- .../CodeGen/X86/basic-block-sections-list.ll | 20 +- .../X86/basic-block-sections-listbb.ll | 4 +- .../X86/basic-block-sections-mir-print.ll | 12 +- .../X86/basic-block-sections-unreachable.ll | 4 +- llvm/test/CodeGen/X86/basic-block-sections.ll | 4 +- .../CodeGen/X86/basic-block-sections_2.ll | 8 +- llvm/test/CodeGen/X86/bigstructret2.ll | 4 +- llvm/test/CodeGen/X86/bit-piece-comment.ll | 2 +- llvm/test/CodeGen/X86/bitcast-mmx.ll | 13 +- llvm/test/CodeGen/X86/bitcast-setcc-128.ll | 16 +- llvm/test/CodeGen/X86/bitcast-setcc-256.ll | 16 +- llvm/test/CodeGen/X86/bitcast-setcc-512.ll | 16 +- llvm/test/CodeGen/X86/bitcnt-false-dep.ll | 24 +- llvm/test/CodeGen/X86/bittest-intrin.ll | 56 +- llvm/test/CodeGen/X86/bmi-x86_64.ll | 8 +- llvm/test/CodeGen/X86/bmi.ll | 24 +- llvm/test/CodeGen/X86/bmi2-x86_64.ll | 22 +- llvm/test/CodeGen/X86/bmi2.ll | 22 +- llvm/test/CodeGen/X86/br-fold.ll | 8 +- .../CodeGen/X86/branchfolding-catchpads.ll | 32 +- .../CodeGen/X86/branchfolding-debugloc.ll | 12 +- .../CodeGen/X86/branchfolding-landingpads.ll | 10 +- .../CodeGen/X86/break-anti-dependencies.ll | 8 +- llvm/test/CodeGen/X86/break-false-dep.ll | 66 +- llvm/test/CodeGen/X86/bss_pagealigned.ll | 8 +- llvm/test/CodeGen/X86/bswap-vector.ll | 2 +- llvm/test/CodeGen/X86/bswap.ll | 12 +- llvm/test/CodeGen/X86/bt.ll | 12 +- llvm/test/CodeGen/X86/btc_bts_btr.ll | 90 +- llvm/test/CodeGen/X86/bug37521.ll | 3 +- llvm/test/CodeGen/X86/bug80500.ll | 4 +- llvm/test/CodeGen/X86/buildvec-insertvec.ll | 33 +- llvm/test/CodeGen/X86/byref.ll | 6 +- llvm/test/CodeGen/X86/byval-align.ll | 51 +- llvm/test/CodeGen/X86/byval-callee-cleanup.ll | 6 +- llvm/test/CodeGen/X86/byval.ll | 5 +- llvm/test/CodeGen/X86/byval2.ll | 17 +- llvm/test/CodeGen/X86/byval3.ll | 29 +- llvm/test/CodeGen/X86/byval4.ll | 29 +- llvm/test/CodeGen/X86/byval5.ll | 29 +- llvm/test/CodeGen/X86/byval6.ll | 4 +- llvm/test/CodeGen/X86/byval7.ll | 10 +- llvm/test/CodeGen/X86/cache-intrinsic.ll | 16 +- llvm/test/CodeGen/X86/call-imm.ll | 2 +- llvm/test/CodeGen/X86/call-push.ll | 13 +- llvm/test/CodeGen/X86/call-rv-marker.ll | 113 +- .../test/CodeGen/X86/call-site-info-output.ll | 2 +- llvm/test/CodeGen/X86/call-structfp.ll | 6 +- .../test/CodeGen/X86/callbr-asm-bb-exports.ll | 2 +- .../CodeGen/X86/callbr-asm-blockplacement.ll | 28 +- .../CodeGen/X86/callbr-asm-branch-folding.ll | 20 +- .../CodeGen/X86/callbr-asm-destinations.ll | 2 +- llvm/test/CodeGen/X86/callbr-asm-errors.ll | 2 +- .../X86/callbr-asm-instr-scheduling.ll | 43 +- .../test/CodeGen/X86/callbr-asm-label-addr.ll | 2 +- llvm/test/CodeGen/X86/callbr-asm-obj-file.ll | 2 +- .../X86/callbr-asm-outputs-pred-succ.ll | 18 +- llvm/test/CodeGen/X86/callbr-asm-outputs.ll | 16 +- .../CodeGen/X86/callbr-asm-phi-placement.ll | 12 +- llvm/test/CodeGen/X86/callbr-asm.ll | 22 +- .../test/CodeGen/X86/callbr-codegenprepare.ll | 2 +- llvm/test/CodeGen/X86/cas.ll | 58 +- llvm/test/CodeGen/X86/cast-vsel.ll | 62 +- llvm/test/CodeGen/X86/catch.ll | 6 +- .../CodeGen/X86/catchpad-dynamic-alloca.ll | 16 +- .../CodeGen/X86/catchpad-realign-savexmm.ll | 8 +- llvm/test/CodeGen/X86/catchpad-regmask.ll | 32 +- llvm/test/CodeGen/X86/catchpad-reuse.ll | 12 +- llvm/test/CodeGen/X86/catchpad-weight.ll | 43 +- .../CodeGen/X86/catchret-empty-fallthrough.ll | 4 +- llvm/test/CodeGen/X86/catchret-fallthrough.ll | 6 +- llvm/test/CodeGen/X86/catchret-regmask.ll | 16 +- .../test/CodeGen/X86/cet_endbr_imm_enhance.ll | 36 +- llvm/test/CodeGen/X86/cfguard-module-flag.ll | 6 +- .../CodeGen/X86/cfguard-x86-64-vectorcall.ll | 12 +- .../CodeGen/X86/cfguard-x86-vectorcall.ll | 12 +- .../CodeGen/X86/cfi-basic-block-sections-1.ll | 4 +- ...ic-block-sections-callee-save-registers.ll | 4 +- llvm/test/CodeGen/X86/cfi.ll | 6 +- llvm/test/CodeGen/X86/cfstring.ll | 12 +- llvm/test/CodeGen/X86/cgp-usubo.ll | 48 +- llvm/test/CodeGen/X86/chain_order.ll | 32 +- .../CodeGen/X86/change-compare-stride-1.ll | 46 +- .../X86/change-compare-stride-trickiness-1.ll | 4 +- .../X86/change-compare-stride-trickiness-2.ll | 6 +- llvm/test/CodeGen/X86/cldemote-intrinsic.ll | 6 +- llvm/test/CodeGen/X86/cleanuppad-inalloca.ll | 20 +- .../CodeGen/X86/cleanuppad-large-codemodel.ll | 2 +- llvm/test/CodeGen/X86/cleanuppad-realign.ll | 8 +- llvm/test/CodeGen/X86/clear-bitfield.ll | 14 +- llvm/test/CodeGen/X86/clear-highbits.ll | 52 +- llvm/test/CodeGen/X86/clear-lowbits.ll | 64 +- llvm/test/CodeGen/X86/clflushopt.ll | 6 +- llvm/test/CodeGen/X86/clwb.ll | 6 +- llvm/test/CodeGen/X86/clz.ll | 6 +- llvm/test/CodeGen/X86/clzero.ll | 6 +- llvm/test/CodeGen/X86/cmov-double.ll | 2 +- llvm/test/CodeGen/X86/cmov-into-branch.ll | 18 +- llvm/test/CodeGen/X86/cmov.ll | 30 +- llvm/test/CodeGen/X86/cmovcmov.ll | 2 +- llvm/test/CodeGen/X86/cmp-bool.ll | 4 +- llvm/test/CodeGen/X86/cmp.ll | 30 +- .../test/CodeGen/X86/cmpxchg-clobber-flags.ll | 14 +- llvm/test/CodeGen/X86/cmpxchg-i1.ll | 22 +- llvm/test/CodeGen/X86/cmpxchg-i128-i1.ll | 22 +- llvm/test/CodeGen/X86/cmpxchg8b.ll | 4 +- .../X86/cmpxchg8b_alloca_regalloc_handling.ll | 26 +- llvm/test/CodeGen/X86/coal-sections.ll | 8 +- llvm/test/CodeGen/X86/coalesce-esp.ll | 14 +- llvm/test/CodeGen/X86/coalesce-implicitdef.ll | 45 +- llvm/test/CodeGen/X86/coalescer-commute1.ll | 14 +- llvm/test/CodeGen/X86/coalescer-commute3.ll | 8 +- llvm/test/CodeGen/X86/coalescer-commute4.ll | 10 +- llvm/test/CodeGen/X86/coalescer-cross.ll | 44 +- llvm/test/CodeGen/X86/coalescer-dce2.ll | 30 +- llvm/test/CodeGen/X86/coalescer-identity.ll | 12 +- llvm/test/CodeGen/X86/coalescer-remat.ll | 6 +- llvm/test/CodeGen/X86/coalescer-subreg.ll | 16 +- llvm/test/CodeGen/X86/coalescer-win64.ll | 4 +- .../test/CodeGen/X86/code-model-elf-memset.ll | 7 +- llvm/test/CodeGen/X86/code-model-elf.ll | 30 +- llvm/test/CodeGen/X86/code_placement_eh.ll | 10 +- .../X86/code_placement_ext_tsp_large.ll | 2 +- .../X86/codegen-prepare-addrmode-sext.ll | 228 +- .../test/CodeGen/X86/codegen-prepare-crash.ll | 4 +- .../CodeGen/X86/codegen-prepare-extload.ll | 120 +- .../CodeGen/X86/codegen-prepare-oob-shl.ll | 10 +- .../test/CodeGen/X86/codegen-prepare-uaddo.ll | 136 +- llvm/test/CodeGen/X86/codegen-prepare.ll | 16 +- llvm/test/CodeGen/X86/codemodel.ll | 14 +- llvm/test/CodeGen/X86/coff-alias-type.ll | 4 +- llvm/test/CodeGen/X86/coff-comdat.ll | 4 +- llvm/test/CodeGen/X86/coff-fp-section-name.ll | 34 +- llvm/test/CodeGen/X86/coff-no-dead-strip.ll | 2 +- llvm/test/CodeGen/X86/combine-adc.ll | 12 +- llvm/test/CodeGen/X86/combine-add.ll | 16 +- llvm/test/CodeGen/X86/combine-andintoload.ll | 10 +- llvm/test/CodeGen/X86/combine-bitselect.ll | 54 +- llvm/test/CodeGen/X86/combine-bswap.ll | 12 +- .../test/CodeGen/X86/combine-concatvectors.ll | 30 +- llvm/test/CodeGen/X86/combine-multiplies.ll | 26 +- llvm/test/CodeGen/X86/combine-pmuldq.ll | 18 +- llvm/test/CodeGen/X86/combine-ptest.ll | 6 +- llvm/test/CodeGen/X86/combine-sbb.ll | 112 +- llvm/test/CodeGen/X86/combine-sra-load.ll | 32 +- llvm/test/CodeGen/X86/combine-srem.ll | 2 +- llvm/test/CodeGen/X86/combine-sub.ll | 60 +- llvm/test/CodeGen/X86/combine-testm-and.ll | 8 +- .../X86/combine-undef-index-mscatter.ll | 6 +- .../CodeGen/X86/combineIncDecVector-crash.ll | 28 +- llvm/test/CodeGen/X86/commute-3dnow.ll | 90 +- llvm/test/CodeGen/X86/commute-blend-avx2.ll | 32 +- llvm/test/CodeGen/X86/commute-blend-sse41.ll | 27 +- llvm/test/CodeGen/X86/commute-clmul.ll | 16 +- llvm/test/CodeGen/X86/commute-fcmp.ll | 192 +- llvm/test/CodeGen/X86/commute-intrinsic.ll | 4 +- llvm/test/CodeGen/X86/commute-two-addr.ll | 6 +- llvm/test/CodeGen/X86/commute-xop.ll | 80 +- llvm/test/CodeGen/X86/compact-unwind.ll | 43 +- llvm/test/CodeGen/X86/compare-global.ll | 4 +- llvm/test/CodeGen/X86/compiler_used.ll | 4 +- llvm/test/CodeGen/X86/complex-fca.ll | 6 +- .../test/CodeGen/X86/computeKnownBits_urem.ll | 4 +- llvm/test/CodeGen/X86/concat-cast.ll | 4 +- .../CodeGen/X86/conditional-tailcall-pgso.ll | 6 +- llvm/test/CodeGen/X86/conditional-tailcall.ll | 36 +- .../CodeGen/X86/consecutive-load-shuffle.ll | 6 +- llvm/test/CodeGen/X86/const-base-addr.ll | 12 +- llvm/test/CodeGen/X86/constant-combines.ll | 4 +- .../test/CodeGen/X86/constant-hoisting-bfi.ll | 52 +- .../CodeGen/X86/constant-hoisting-optnone.ll | 4 +- .../X86/constant-hoisting-shift-immediate.ll | 6 +- .../test/CodeGen/X86/constant-pool-sharing.ll | 6 +- llvm/test/CodeGen/X86/constpool.ll | 2 +- llvm/test/CodeGen/X86/constructor.ll | 2 +- .../X86/convert-2-addr-3-addr-inc64.ll | 6 +- llvm/test/CodeGen/X86/convertphitype.ll | 10 +- llvm/test/CodeGen/X86/copy-eflags.ll | 46 +- llvm/test/CodeGen/X86/copy-propagation.ll | 4 +- llvm/test/CodeGen/X86/crash-O0.ll | 4 +- .../X86/crash-lre-eliminate-dead-def.ll | 26 +- llvm/test/CodeGen/X86/crash-nosse.ll | 6 +- llvm/test/CodeGen/X86/crash.ll | 131 +- .../CodeGen/X86/critical-anti-dep-breaker.ll | 18 +- .../test/CodeGen/X86/critical-edge-split-2.ll | 4 +- .../test/CodeGen/X86/cse-add-with-overflow.ll | 6 +- llvm/test/CodeGen/X86/csr-split.ll | 42 +- llvm/test/CodeGen/X86/ctor-priority-coff.ll | 18 +- llvm/test/CodeGen/X86/cvt16-2.ll | 16 +- llvm/test/CodeGen/X86/cvt16.ll | 12 +- llvm/test/CodeGen/X86/cxx_tlscc64.ll | 40 +- .../CodeGen/X86/dag-merge-fast-accesses.ll | 35 +- llvm/test/CodeGen/X86/dag-optnone.ll | 4 +- llvm/test/CodeGen/X86/dagcombine-and-setcc.ll | 12 +- .../CodeGen/X86/dagcombine-buildvector.ll | 10 +- llvm/test/CodeGen/X86/dagcombine-cse.ll | 12 +- .../test/CodeGen/X86/dagcombine-dead-store.ll | 38 +- .../X86/dagcombine-tokenfactor-limit-crash.ll | 40 +- llvm/test/CodeGen/X86/darwin-bzero.ll | 6 +- llvm/test/CodeGen/X86/darwin-no-dead-strip.ll | 4 +- llvm/test/CodeGen/X86/darwin-preemption.ll | 108 +- llvm/test/CodeGen/X86/darwin-quote.ll | 2 +- llvm/test/CodeGen/X86/darwin-tls.ll | 2 +- llvm/test/CodeGen/X86/dbg-baseptr.ll | 22 +- .../X86/dbg-changes-codegen-branch-folding.ll | 60 +- llvm/test/CodeGen/X86/dbg-changes-codegen.ll | 33 +- llvm/test/CodeGen/X86/dbg-combine.ll | 45 +- .../test/CodeGen/X86/dbg-distringtype-uint.ll | 2 +- .../test/CodeGen/X86/dbg-list-dependencies.ll | 58 +- llvm/test/CodeGen/X86/dbg-value-func-arg.ll | 14 +- llvm/test/CodeGen/X86/debugloc-argsize.ll | 12 +- llvm/test/CodeGen/X86/deopt-bundles.ll | 16 +- llvm/test/CodeGen/X86/disable-shrink-store.ll | 6 +- llvm/test/CodeGen/X86/discontiguous-loops.ll | 16 +- .../X86/discriminate-mem-ops-missing-info.ll | 12 +- .../X86/discriminate-mem-ops-skip-pfetch.ll | 15 +- llvm/test/CodeGen/X86/discriminate-mem-ops.ll | 10 +- .../X86/div-rem-pair-recomposition-signed.ll | 66 +- .../div-rem-pair-recomposition-unsigned.ll | 66 +- llvm/test/CodeGen/X86/div8.ll | 12 +- llvm/test/CodeGen/X86/divrem.ll | 48 +- llvm/test/CodeGen/X86/divrem8_ext.ll | 4 +- llvm/test/CodeGen/X86/dllexport.ll | 8 +- llvm/test/CodeGen/X86/dllimport-x86_64.ll | 6 +- llvm/test/CodeGen/X86/dllimport.ll | 8 +- llvm/test/CodeGen/X86/dollar-name.ll | 4 +- .../X86/domain-reassignment-implicit-def.ll | 4 +- .../X86/dont-remove-empty-preheader.ll | 24 +- .../X86/dont-trunc-store-double-to-float.ll | 6 +- llvm/test/CodeGen/X86/dpbusd.ll | 184 +- llvm/test/CodeGen/X86/dpbusd_i4.ll | 15 +- llvm/test/CodeGen/X86/dropped_constructor.ll | 4 +- llvm/test/CodeGen/X86/dso_local_equivalent.ll | 12 +- llvm/test/CodeGen/X86/dtor-priority-coff.ll | 22 +- llvm/test/CodeGen/X86/dup-cost.ll | 12 +- llvm/test/CodeGen/X86/dwarf-eh-prepare.ll | 76 +- llvm/test/CodeGen/X86/dwarf_eh_resume.ll | 8 +- llvm/test/CodeGen/X86/dyn-stackalloc.ll | 4 +- llvm/test/CodeGen/X86/dyn_alloca_aligned.ll | 2 +- .../CodeGen/X86/dynamic-alloca-lifetime.ll | 14 +- .../X86/dynamic-allocas-VLAs-stack-align.ll | 12 +- llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll | 68 +- llvm/test/CodeGen/X86/early-ifcvt-crash.ll | 4 +- llvm/test/CodeGen/X86/early-ifcvt.ll | 14 +- llvm/test/CodeGen/X86/eh-label.ll | 6 +- llvm/test/CodeGen/X86/eh-nolandingpads.ll | 2 +- llvm/test/CodeGen/X86/eh-null-personality.ll | 10 +- llvm/test/CodeGen/X86/eh-unknown.ll | 2 +- llvm/test/CodeGen/X86/eh_frame.ll | 2 +- llvm/test/CodeGen/X86/ehcontguard.ll | 4 +- .../element-wise-atomic-memory-intrinsics.ll | 322 +-- .../CodeGen/X86/elf-associated-discarded.ll | 2 +- llvm/test/CodeGen/X86/elf-associated.ll | 16 +- llvm/test/CodeGen/X86/elf-retain.ll | 14 +- llvm/test/CodeGen/X86/embed-bitcode.ll | 2 +- llvm/test/CodeGen/X86/emit-big-cst.ll | 7 +- .../CodeGen/X86/empty-struct-return-type.ll | 6 +- llvm/test/CodeGen/X86/emutls-pic.ll | 27 +- llvm/test/CodeGen/X86/emutls-pie.ll | 23 +- llvm/test/CodeGen/X86/emutls.ll | 49 +- llvm/test/CodeGen/X86/emutls_generic.ll | 12 +- llvm/test/CodeGen/X86/enqcmd-intrinsics.ll | 12 +- llvm/test/CodeGen/X86/epilogue-cfi-fp.ll | 10 +- llvm/test/CodeGen/X86/epilogue.ll | 4 +- llvm/test/CodeGen/X86/exception-label.ll | 6 +- llvm/test/CodeGen/X86/exedeps-movq.ll | 16 +- llvm/test/CodeGen/X86/expand-opaque-const.ll | 12 +- .../CodeGen/X86/explicit-section-mergeable.ll | 2 +- .../CodeGen/X86/extend-set-cc-uses-dbg.ll | 4 +- llvm/test/CodeGen/X86/extend.ll | 8 +- llvm/test/CodeGen/X86/extern_weak.ll | 6 +- llvm/test/CodeGen/X86/extract-bits.ll | 98 +- llvm/test/CodeGen/X86/extract-combine.ll | 2 +- llvm/test/CodeGen/X86/extract-concat.ll | 14 +- llvm/test/CodeGen/X86/extract-extract.ll | 12 +- llvm/test/CodeGen/X86/extract-insert.ll | 4 +- llvm/test/CodeGen/X86/extract-lowbits.ll | 128 +- llvm/test/CodeGen/X86/extract-store.ll | 88 +- llvm/test/CodeGen/X86/extractelement-fp.ll | 2 +- .../CodeGen/X86/extractelement-from-arg.ll | 4 +- .../X86/extractelement-legalization-cycle.ll | 8 +- ...ractelement-legalization-store-ordering.ll | 25 +- llvm/test/CodeGen/X86/extractelement-load.ll | 89 +- llvm/test/CodeGen/X86/extractps.ll | 10 +- .../CodeGen/X86/f16c-intrinsics-upgrade.ll | 16 +- llvm/test/CodeGen/X86/f16c-intrinsics.ll | 16 +- .../CodeGen/X86/fast-cc-merge-stack-adj.ll | 6 +- llvm/test/CodeGen/X86/fast-isel-abort-warm.ll | 6 +- llvm/test/CodeGen/X86/fast-isel-args-fail.ll | 4 +- llvm/test/CodeGen/X86/fast-isel-args-fail2.ll | 5 +- llvm/test/CodeGen/X86/fast-isel-atomic.ll | 8 +- .../fast-isel-avoid-unnecessary-pic-base.ll | 12 +- llvm/test/CodeGen/X86/fast-isel-bail.ll | 2 +- llvm/test/CodeGen/X86/fast-isel-call-bool.ll | 4 +- llvm/test/CodeGen/X86/fast-isel-call.ll | 22 +- llvm/test/CodeGen/X86/fast-isel-cmp-branch.ll | 4 +- llvm/test/CodeGen/X86/fast-isel-constpool.ll | 12 +- .../X86/fast-isel-constrain-store-indexreg.ll | 8 +- llvm/test/CodeGen/X86/fast-isel-deadcode.ll | 65 +- llvm/test/CodeGen/X86/fast-isel-emutls.ll | 17 +- llvm/test/CodeGen/X86/fast-isel-expect.ll | 2 +- llvm/test/CodeGen/X86/fast-isel-extract.ll | 12 +- llvm/test/CodeGen/X86/fast-isel-fneg.ll | 12 +- llvm/test/CodeGen/X86/fast-isel-fold-mem.ll | 4 +- .../CodeGen/X86/fast-isel-fptrunc-fpext.ll | 20 +- .../CodeGen/X86/fast-isel-gc-intrinsics.ll | 33 +- llvm/test/CodeGen/X86/fast-isel-gep.ll | 69 +- llvm/test/CodeGen/X86/fast-isel-gv.ll | 18 +- llvm/test/CodeGen/X86/fast-isel-i1.ll | 6 +- .../fast-isel-int-float-conversion-x86-64.ll | 16 +- .../X86/fast-isel-int-float-conversion.ll | 16 +- .../X86/fast-isel-load-bitcast-fold.ll | 9 +- llvm/test/CodeGen/X86/fast-isel-load-i1.ll | 4 +- llvm/test/CodeGen/X86/fast-isel-mem.ll | 14 +- .../CodeGen/X86/fast-isel-movsbl-indexreg.ll | 4 +- .../test/CodeGen/X86/fast-isel-nontemporal.ll | 166 +- .../CodeGen/X86/fast-isel-prolog-dbgloc.ll | 32 +- llvm/test/CodeGen/X86/fast-isel-sext.ll | 4 +- llvm/test/CodeGen/X86/fast-isel-store.ll | 80 +- llvm/test/CodeGen/X86/fast-isel-tailcall.ll | 7 +- llvm/test/CodeGen/X86/fast-isel-tls.ll | 6 +- .../fast-isel-uint-float-conversion-x86-64.ll | 16 +- .../X86/fast-isel-uint-float-conversion.ll | 16 +- llvm/test/CodeGen/X86/fast-isel-undef-fp.ll | 8 +- llvm/test/CodeGen/X86/fast-isel-vecload.ll | 168 +- llvm/test/CodeGen/X86/fast-isel-x32.ll | 4 +- llvm/test/CodeGen/X86/fast-isel-x86-64.ll | 50 +- llvm/test/CodeGen/X86/fast-isel-x86.ll | 20 +- llvm/test/CodeGen/X86/fast-isel.ll | 81 +- .../CodeGen/X86/fastcall-correct-mangling.ll | 2 +- llvm/test/CodeGen/X86/fastcc-byval.ll | 9 +- llvm/test/CodeGen/X86/fastcc-sret.ll | 14 +- llvm/test/CodeGen/X86/fastcc.ll | 16 +- .../X86/fastisel-gep-promote-before-add.ll | 26 +- llvm/test/CodeGen/X86/fcmp-logic.ll | 8 +- llvm/test/CodeGen/X86/fentry-insertion.ll | 2 +- llvm/test/CodeGen/X86/fixed-stack-di-mir.ll | 4 +- llvm/test/CodeGen/X86/fixup-bw-inst.ll | 64 +- llvm/test/CodeGen/X86/fltused.ll | 4 +- .../CodeGen/X86/fltused_function_pointer.ll | 4 +- llvm/test/CodeGen/X86/fma-commute-loop.ll | 37 +- llvm/test/CodeGen/X86/fma-do-not-commute.ll | 8 +- llvm/test/CodeGen/X86/fma-scalar-memfold.ll | 128 +- .../X86/fma4-intrinsics-x86_64-folded-load.ll | 44 +- llvm/test/CodeGen/X86/fma4-scalar-memfold.ll | 32 +- llvm/test/CodeGen/X86/fma_patterns.ll | 20 +- llvm/test/CodeGen/X86/fma_patterns_wide.ll | 8 +- llvm/test/CodeGen/X86/fmf-flags.ll | 4 +- llvm/test/CodeGen/X86/fmul-combines.ll | 6 +- llvm/test/CodeGen/X86/fold-add.ll | 12 +- .../test/CodeGen/X86/fold-and-shift-x86_64.ll | 36 +- llvm/test/CodeGen/X86/fold-and-shift.ll | 42 +- llvm/test/CodeGen/X86/fold-call-2.ll | 4 +- llvm/test/CodeGen/X86/fold-call-oper.ll | 20 +- llvm/test/CodeGen/X86/fold-call.ll | 11 +- llvm/test/CodeGen/X86/fold-load-binops.ll | 32 +- llvm/test/CodeGen/X86/fold-load-unops.ll | 96 +- llvm/test/CodeGen/X86/fold-load-vec.ll | 38 +- llvm/test/CodeGen/X86/fold-load.ll | 22 +- llvm/test/CodeGen/X86/fold-masked-merge.ll | 12 +- llvm/test/CodeGen/X86/fold-mul-lohi.ll | 12 +- llvm/test/CodeGen/X86/fold-pcmpeqd-2.ll | 14 +- llvm/test/CodeGen/X86/fold-rmw-ops.ll | 320 +-- llvm/test/CodeGen/X86/fold-tied-op.ll | 25 +- llvm/test/CodeGen/X86/fold-vector-bv-crash.ll | 2 +- .../CodeGen/X86/fold-vector-shuffle-crash.ll | 144 +- llvm/test/CodeGen/X86/fold-vex.ll | 4 +- llvm/test/CodeGen/X86/fold-zext-trunc.ll | 4 +- .../CodeGen/X86/force-align-stack-alloca.ll | 10 +- llvm/test/CodeGen/X86/force-align-stack.ll | 8 +- llvm/test/CodeGen/X86/fp-arith.ll | 48 +- llvm/test/CodeGen/X86/fp-cvt.ll | 68 +- llvm/test/CodeGen/X86/fp-double-rounding.ll | 10 +- llvm/test/CodeGen/X86/fp-intrinsics-flags.ll | 12 +- llvm/test/CodeGen/X86/fp-load-trunc.ll | 16 +- llvm/test/CodeGen/X86/fp-stack-2results.ll | 20 +- llvm/test/CodeGen/X86/fp-stack-O0-crash.ll | 12 +- llvm/test/CodeGen/X86/fp-stack-O0.ll | 2 +- llvm/test/CodeGen/X86/fp-stack-compare.ll | 4 +- llvm/test/CodeGen/X86/fp-stack-ret-conv.ll | 4 +- llvm/test/CodeGen/X86/fp-stack-ret-store.ll | 8 +- llvm/test/CodeGen/X86/fp-stack-ret.ll | 8 +- llvm/test/CodeGen/X86/fp-stack-retcopy.ll | 2 +- llvm/test/CodeGen/X86/fp-stack.ll | 6 +- .../test/CodeGen/X86/fp-strict-scalar-fp16.ll | 30 +- llvm/test/CodeGen/X86/fp-strict-scalar.ll | 24 +- llvm/test/CodeGen/X86/fp-une-cmp.ll | 4 +- llvm/test/CodeGen/X86/fp128-cast-strict.ll | 32 +- llvm/test/CodeGen/X86/fp128-cast.ll | 88 +- llvm/test/CodeGen/X86/fp128-g.ll | 32 +- llvm/test/CodeGen/X86/fp128-i128.ll | 26 +- llvm/test/CodeGen/X86/fp128-libcalls.ll | 48 +- llvm/test/CodeGen/X86/fp128-load.ll | 6 +- llvm/test/CodeGen/X86/fp128-select.ll | 6 +- llvm/test/CodeGen/X86/fp128-store.ll | 2 +- llvm/test/CodeGen/X86/fp2sint.ll | 8 +- llvm/test/CodeGen/X86/fp_load_cast_fold.ll | 12 +- llvm/test/CodeGen/X86/fp_load_fold.ll | 24 +- llvm/test/CodeGen/X86/frame-base.ll | 4 +- .../X86/frame-lowering-debug-intrinsic-2.ll | 12 +- .../X86/frame-lowering-debug-intrinsic.ll | 6 +- llvm/test/CodeGen/X86/frame-order.ll | 32 +- llvm/test/CodeGen/X86/frameaddr.ll | 14 +- llvm/test/CodeGen/X86/freeze.ll | 8 +- llvm/test/CodeGen/X86/frem-libcall.ll | 4 +- llvm/test/CodeGen/X86/frem.ll | 60 +- llvm/test/CodeGen/X86/fsafdo_test1.ll | 8 +- llvm/test/CodeGen/X86/fsafdo_test3.ll | 6 +- llvm/test/CodeGen/X86/fsafdo_test4.ll | 8 +- llvm/test/CodeGen/X86/fshl.ll | 37 +- llvm/test/CodeGen/X86/fshr.ll | 37 +- llvm/test/CodeGen/X86/fsxor-alignment.ll | 6 +- llvm/test/CodeGen/X86/full-lsr.ll | 26 +- llvm/test/CodeGen/X86/funclet-layout.ll | 28 +- .../X86/function-subtarget-features.ll | 22 +- llvm/test/CodeGen/X86/ga-offset.ll | 4 +- llvm/test/CodeGen/X86/ga-offset2.ll | 4 +- llvm/test/CodeGen/X86/gather-addresses.ll | 28 +- .../CodeGen/X86/gcc_except_table-multi.ll | 20 +- llvm/test/CodeGen/X86/gcc_except_table.ll | 10 +- .../X86/gcc_except_table_bb_sections.ll | 10 +- ...able_bb_sections_ehpad_groups_with_cold.ll | 10 +- .../CodeGen/X86/gcc_except_table_functions.ll | 18 +- llvm/test/CodeGen/X86/gep-expanded-vector.ll | 10 +- llvm/test/CodeGen/X86/getelementptr.ll | 66 +- llvm/test/CodeGen/X86/getmant-false-deps.ll | 72 +- llvm/test/CodeGen/X86/ghc-cc.ll | 8 +- llvm/test/CodeGen/X86/ghc-cc64.ll | 32 +- llvm/test/CodeGen/X86/global-access-pie.ll | 16 +- llvm/test/CodeGen/X86/global-sections-tls.ll | 6 +- llvm/test/CodeGen/X86/global-sections.ll | 12 +- llvm/test/CodeGen/X86/gnu-eh-alternative.ll | 45 +- llvm/test/CodeGen/X86/gnu-seh-nolpads.ll | 4 +- llvm/test/CodeGen/X86/gpr-to-mask.ll | 74 +- llvm/test/CodeGen/X86/gs-fold.ll | 6 +- .../CodeGen/X86/h-register-addressing-32.ll | 42 +- .../CodeGen/X86/h-register-addressing-64.ll | 42 +- llvm/test/CodeGen/X86/h-register-store.ll | 12 +- llvm/test/CodeGen/X86/h-registers-0.ll | 12 +- llvm/test/CodeGen/X86/h-registers-2.ll | 6 +- .../CodeGen/X86/haddsub-shuf-undef-operand.ll | 8 +- llvm/test/CodeGen/X86/haddsub.ll | 14 +- llvm/test/CodeGen/X86/half-constrained.ll | 18 +- llvm/test/CodeGen/X86/half.ll | 72 +- llvm/test/CodeGen/X86/hhvm-cc.ll | 6 +- llvm/test/CodeGen/X86/hidden-vis-2.ll | 4 +- llvm/test/CodeGen/X86/hidden-vis-3.ll | 8 +- llvm/test/CodeGen/X86/hidden-vis-4.ll | 4 +- llvm/test/CodeGen/X86/hidden-vis-pic.ll | 14 +- llvm/test/CodeGen/X86/hidden-vis.ll | 2 +- llvm/test/CodeGen/X86/hipe-cc.ll | 27 +- llvm/test/CodeGen/X86/hipe-cc64.ll | 31 +- llvm/test/CodeGen/X86/hipe-prologue.ll | 6 +- llvm/test/CodeGen/X86/hoist-invariant-load.ll | 62 +- llvm/test/CodeGen/X86/hoist-spill-lpad.ll | 32 +- llvm/test/CodeGen/X86/hoist-spill.ll | 34 +- .../X86/horizontal-shuffle-demanded.ll | 64 +- llvm/test/CodeGen/X86/huge-stack-offset.ll | 11 +- llvm/test/CodeGen/X86/huge-stack-offset2.ll | 14 +- .../CodeGen/X86/i128-fpconv-win64-strict.ll | 36 +- llvm/test/CodeGen/X86/i128-fpconv-win64.ll | 36 +- llvm/test/CodeGen/X86/i128-mul.ll | 10 +- llvm/test/CodeGen/X86/i128-ret.ll | 4 +- llvm/test/CodeGen/X86/i16lshr8pat.ll | 6 +- llvm/test/CodeGen/X86/i1narrowfail.ll | 12 +- llvm/test/CodeGen/X86/i256-add.ll | 16 +- llvm/test/CodeGen/X86/i2k.ll | 8 +- llvm/test/CodeGen/X86/i386-setjmp-pic.ll | 6 +- llvm/test/CodeGen/X86/i386-shrink-wrapping.ll | 18 +- .../CodeGen/X86/i386-tlscall-fastregalloc.ll | 4 +- llvm/test/CodeGen/X86/i486-fence-loop.ll | 6 +- llvm/test/CodeGen/X86/i64-mem-copy.ll | 18 +- .../CodeGen/X86/i686-win-shrink-wrapping.ll | 14 +- llvm/test/CodeGen/X86/ibtseal-kernel.ll | 4 +- llvm/test/CodeGen/X86/ibtseal-large.ll | 4 +- llvm/test/CodeGen/X86/ibtseal-small.ll | 4 +- llvm/test/CodeGen/X86/icall-branch-funnel.ll | 60 +- llvm/test/CodeGen/X86/ifunc-asm.ll | 6 +- .../CodeGen/X86/illegal-bitfield-loadstore.ll | 36 +- llvm/test/CodeGen/X86/immediate_merging.ll | 46 +- llvm/test/CodeGen/X86/immediate_merging64.ll | 18 +- llvm/test/CodeGen/X86/implicit-faultmap.ll | 12 +- .../X86/implicit-null-check-negative.ll | 70 +- llvm/test/CodeGen/X86/implicit-null-check.ll | 176 +- llvm/test/CodeGen/X86/inalloca-ctor.ll | 17 +- llvm/test/CodeGen/X86/inalloca-invoke.ll | 29 +- llvm/test/CodeGen/X86/inalloca-regparm.ll | 6 +- llvm/test/CodeGen/X86/inalloca-stdcall.ll | 11 +- llvm/test/CodeGen/X86/inalloca.ll | 33 +- .../CodeGen/X86/inconsistent_landingpad.ll | 4 +- .../X86/indirect-branch-tracking-cm-lager.ll | 4 +- .../X86/indirect-branch-tracking-eh.ll | 12 +- .../X86/indirect-branch-tracking-eh2.ll | 81 +- .../X86/indirect-branch-tracking-r2.ll | 14 +- .../CodeGen/X86/indirect-branch-tracking.ll | 58 +- llvm/test/CodeGen/X86/indirect-hidden.ll | 16 +- llvm/test/CodeGen/X86/init-priority.ll | 10 +- .../CodeGen/X86/inline-asm-A-constraint.ll | 8 +- .../CodeGen/X86/inline-asm-R-constraint.ll | 12 +- .../X86/inline-asm-avx-v-constraint.ll | 4 +- .../X86/inline-asm-avx512f-v-constraint.ll | 4 +- .../X86/inline-asm-bad-constraint-n.ll | 4 +- .../X86/inline-asm-duplicated-constraint.ll | 6 +- .../CodeGen/X86/inline-asm-e-constraint.ll | 2 +- .../CodeGen/X86/inline-asm-flag-clobber.ll | 8 +- .../CodeGen/X86/inline-asm-flag-output.ll | 224 +- llvm/test/CodeGen/X86/inline-asm-fpstack.ll | 20 +- llvm/test/CodeGen/X86/inline-asm-h.ll | 2 +- .../test/CodeGen/X86/inline-asm-modifier-V.ll | 4 +- .../test/CodeGen/X86/inline-asm-modifier-c.ll | 2 +- .../test/CodeGen/X86/inline-asm-modifier-q.ll | 4 +- llvm/test/CodeGen/X86/inline-asm-mrv.ll | 8 +- .../CodeGen/X86/inline-asm-multilevel-gep.ll | 2 +- llvm/test/CodeGen/X86/inline-asm-out-regs.ll | 12 +- .../CodeGen/X86/inline-asm-p-constraint.ll | 6 +- llvm/test/CodeGen/X86/inline-asm-pic.ll | 8 +- llvm/test/CodeGen/X86/inline-asm-ptr-cast.ll | 19 +- .../X86/inline-asm-sp-clobber-memcpy.ll | 8 +- .../CodeGen/X86/inline-asm-stack-realign.ll | 6 +- .../CodeGen/X86/inline-asm-stack-realign2.ll | 6 +- .../CodeGen/X86/inline-asm-stack-realign3.ll | 10 +- llvm/test/CodeGen/X86/inline-asm.ll | 12 +- llvm/test/CodeGen/X86/inline-sse.ll | 2 +- llvm/test/CodeGen/X86/inreg.ll | 6 +- llvm/test/CodeGen/X86/ins_split_regalloc.ll | 4 +- .../test/CodeGen/X86/ins_subreg_coalesce-1.ll | 4 +- .../test/CodeGen/X86/ins_subreg_coalesce-3.ll | 38 +- llvm/test/CodeGen/X86/insert-loaded-scalar.ll | 96 +- llvm/test/CodeGen/X86/insert-positions.ll | 4 +- .../CodeGen/X86/insert-prefetch-inline.ll | 18 +- .../X86/insert-prefetch-invalid-instr.ll | 8 +- llvm/test/CodeGen/X86/insert-prefetch.ll | 10 +- .../CodeGen/X86/insertelement-copytoregs.ll | 4 +- .../CodeGen/X86/insertelement-duplicates.ll | 10 +- .../CodeGen/X86/insertelement-legalize.ll | 4 +- .../CodeGen/X86/insertelement-var-index.ll | 102 +- llvm/test/CodeGen/X86/insertelement-zero.ll | 6 +- llvm/test/CodeGen/X86/insertps-O0-bug.ll | 8 +- llvm/test/CodeGen/X86/insertps-combine.ll | 40 +- .../CodeGen/X86/insertps-unfold-load-bug.ll | 10 +- .../test/CodeGen/X86/interval-update-remat.ll | 26 +- .../CodeGen/X86/invalid-shift-immediate.ll | 6 +- llvm/test/CodeGen/X86/invpcid-intrinsic.ll | 12 +- llvm/test/CodeGen/X86/ipra-inline-asm.ll | 2 +- llvm/test/CodeGen/X86/ipra-reg-usage.ll | 2 +- .../X86/isel-blendi-gettargetconstant.ll | 6 +- llvm/test/CodeGen/X86/isel-optnone.ll | 28 +- .../isel-postprocessing-test-fold-memop.ll | 4 +- llvm/test/CodeGen/X86/isel-sink.ll | 8 +- llvm/test/CodeGen/X86/isel-sink2.ll | 11 +- llvm/test/CodeGen/X86/isel-sink3.ll | 14 +- llvm/test/CodeGen/X86/jump_sign.ll | 20 +- .../X86/keylocker-intrinsics-fast-isel.ll | 391 ++-- llvm/test/CodeGen/X86/keylocker-intrinsics.ll | 166 +- llvm/test/CodeGen/X86/known-bits.ll | 4 +- .../test/CodeGen/X86/known-signbits-vector.ll | 4 +- llvm/test/CodeGen/X86/label-heapallocsite.ll | 39 +- llvm/test/CodeGen/X86/label-redefinition.ll | 2 +- .../test/CodeGen/X86/large-code-model-isel.ll | 2 +- llvm/test/CodeGen/X86/large-constants.ll | 20 +- llvm/test/CodeGen/X86/large-gep-scale.ll | 6 +- llvm/test/CodeGen/X86/large-pic-string.ll | 2 +- llvm/test/CodeGen/X86/late-address-taken.ll | 22 +- llvm/test/CodeGen/X86/ldzero.ll | 36 +- llvm/test/CodeGen/X86/lea-5.ll | 8 +- llvm/test/CodeGen/X86/lea-opt-cse1.ll | 15 +- llvm/test/CodeGen/X86/lea-opt-cse2.ll | 15 +- llvm/test/CodeGen/X86/lea-opt-cse4.ll | 30 +- .../test/CodeGen/X86/lea-opt-memop-check-1.ll | 38 +- .../test/CodeGen/X86/lea-opt-memop-check-2.ll | 6 +- llvm/test/CodeGen/X86/lea-opt.ll | 78 +- llvm/test/CodeGen/X86/lea-opt2.ll | 58 +- llvm/test/CodeGen/X86/lea-recursion.ll | 34 +- llvm/test/CodeGen/X86/leaf-fp-elim.ll | 10 +- llvm/test/CodeGen/X86/legalize-libcalls.ll | 8 +- llvm/test/CodeGen/X86/legalize-shift-64.ll | 4 +- llvm/test/CodeGen/X86/legalize-shift.ll | 4 +- llvm/test/CodeGen/X86/legalize-sub-zero-2.ll | 2 +- llvm/test/CodeGen/X86/legalize-sub-zero.ll | 2 +- .../CodeGen/X86/legalize-types-remapid.ll | 12 +- llvm/test/CodeGen/X86/legalize-vaarg.ll | 4 +- llvm/test/CodeGen/X86/libcall-sret.ll | 2 +- llvm/test/CodeGen/X86/licm-dominance.ll | 16 +- llvm/test/CodeGen/X86/licm-nested.ll | 30 +- llvm/test/CodeGen/X86/licm-regpressure.ll | 31 +- llvm/test/CodeGen/X86/licm-symbol.ll | 12 +- llvm/test/CodeGen/X86/lifetime-alias.ll | 92 +- .../CodeGen/X86/line-zero-prologue-end.ll | 2 +- llvm/test/CodeGen/X86/linux-preemption.ll | 134 +- llvm/test/CodeGen/X86/live-range-nosubreg.ll | 14 +- .../CodeGen/X86/liveness-local-regalloc.ll | 32 +- .../CodeGen/X86/llc-override-mcpu-mattr.ll | 6 +- llvm/test/CodeGen/X86/load-chain.ll | 10 +- llvm/test/CodeGen/X86/load-combine-dbg.ll | 15 +- llvm/test/CodeGen/X86/load-combine.ll | 561 +++-- llvm/test/CodeGen/X86/load-local-v3i1.ll | 24 +- llvm/test/CodeGen/X86/load-local-v3i129.ll | 4 +- llvm/test/CodeGen/X86/load-local-v4i5.ll | 42 +- .../CodeGen/X86/load-partial-dot-product.ll | 76 +- llvm/test/CodeGen/X86/load-partial.ll | 269 ++- .../test/CodeGen/X86/load-scalar-as-vector.ll | 160 +- llvm/test/CodeGen/X86/load-slice.ll | 39 +- llvm/test/CodeGen/X86/loadStore_vectorizer.ll | 22 +- llvm/test/CodeGen/X86/loc-remat.ll | 16 +- .../X86/local_stack_symbol_ordering.ll | 78 +- llvm/test/CodeGen/X86/localescape.ll | 50 +- .../test/CodeGen/X86/long-double-abi-align.ll | 17 +- llvm/test/CodeGen/X86/longlong-deadload.ll | 6 +- llvm/test/CodeGen/X86/loop-hoist.ll | 6 +- llvm/test/CodeGen/X86/loop-search.ll | 6 +- .../CodeGen/X86/loop-strength-reduce-2.ll | 10 +- .../CodeGen/X86/loop-strength-reduce-3.ll | 10 +- .../CodeGen/X86/loop-strength-reduce-crash.ll | 4 +- llvm/test/CodeGen/X86/loop-strength-reduce.ll | 10 +- .../test/CodeGen/X86/loop-strength-reduce2.ll | 6 +- .../test/CodeGen/X86/loop-strength-reduce4.ll | 44 +- .../test/CodeGen/X86/loop-strength-reduce5.ll | 8 +- .../test/CodeGen/X86/loop-strength-reduce6.ll | 2 +- .../test/CodeGen/X86/loop-strength-reduce7.ll | 14 +- .../test/CodeGen/X86/loop-strength-reduce8.ll | 107 +- llvm/test/CodeGen/X86/lower-ptrmask.ll | 16 +- llvm/test/CodeGen/X86/lower-vec-shift.ll | 4 +- llvm/test/CodeGen/X86/lsr-crash-empty-uses.ll | 20 +- llvm/test/CodeGen/X86/lsr-delayed-fold.ll | 10 +- llvm/test/CodeGen/X86/lsr-i386.ll | 6 +- llvm/test/CodeGen/X86/lsr-interesting-step.ll | 6 +- llvm/test/CodeGen/X86/lsr-nonaffine.ll | 4 +- llvm/test/CodeGen/X86/lsr-normalization.ll | 84 +- llvm/test/CodeGen/X86/lsr-quadratic-expand.ll | 4 +- .../CodeGen/X86/lsr-redundant-addressing.ll | 32 +- llvm/test/CodeGen/X86/lsr-reuse-trunc.ll | 16 +- llvm/test/CodeGen/X86/lsr-reuse.ll | 341 ++- llvm/test/CodeGen/X86/lsr-sort.ll | 4 +- llvm/test/CodeGen/X86/lsr-static-addr.ll | 6 +- llvm/test/CodeGen/X86/lsr-wrap.ll | 6 +- .../CodeGen/X86/lvi-hardening-gadget-graph.ll | 54 +- .../CodeGen/X86/lvi-hardening-indirectbr.ll | 107 +- llvm/test/CodeGen/X86/lvi-hardening-loads.ll | 36 +- llvm/test/CodeGen/X86/lvi-hardening-ret.ll | 16 +- .../test/CodeGen/X86/lwp-intrinsics-x86_64.ll | 8 +- llvm/test/CodeGen/X86/lwp-intrinsics.ll | 22 +- llvm/test/CodeGen/X86/lzcnt-tzcnt.ll | 48 +- llvm/test/CodeGen/X86/machine-cse.ll | 36 +- .../CodeGen/X86/machine-function-splitter.ll | 24 +- .../CodeGen/X86/machine-outliner-debuginfo.ll | 20 +- .../X86/machine-outliner-disubprogram.ll | 90 +- .../CodeGen/X86/machine-outliner-noredzone.ll | 48 +- .../CodeGen/X86/machine-outliner-tailcalls.ll | 4 +- llvm/test/CodeGen/X86/machine-outliner.ll | 52 +- .../machine-sink-and-implicit-null-checks.ll | 28 +- .../X86/machine-trace-metrics-crash.ll | 19 +- llvm/test/CodeGen/X86/mangle-question-mark.ll | 20 +- llvm/test/CodeGen/X86/masked-iv-safe.ll | 160 +- llvm/test/CodeGen/X86/masked-iv-unsafe.ll | 260 +-- llvm/test/CodeGen/X86/masked_compressstore.ll | 104 +- llvm/test/CodeGen/X86/masked_expandload.ll | 104 +- llvm/test/CodeGen/X86/masked_gather.ll | 52 +- .../test/CodeGen/X86/masked_gather_scatter.ll | 543 +++-- .../X86/masked_gather_scatter_widen.ll | 56 +- llvm/test/CodeGen/X86/masked_load.ll | 243 +- .../CodeGen/X86/masked_loadstore_split.ll | 12 +- llvm/test/CodeGen/X86/masked_store.ll | 179 +- llvm/test/CodeGen/X86/masked_store_trunc.ll | 96 +- .../CodeGen/X86/masked_store_trunc_ssat.ll | 96 +- .../CodeGen/X86/masked_store_trunc_usat.ll | 96 +- llvm/test/CodeGen/X86/maskmovdqu.ll | 6 +- llvm/test/CodeGen/X86/materialize.ll | 11 +- llvm/test/CodeGen/X86/mcinst-lowering.ll | 2 +- llvm/test/CodeGen/X86/mcu-abi.ll | 34 +- llvm/test/CodeGen/X86/mem-intrin-base-reg.ll | 42 +- llvm/test/CodeGen/X86/mem-promote-integers.ll | 210 +- llvm/test/CodeGen/X86/membarrier.ll | 4 +- llvm/test/CodeGen/X86/memcmp-constant.ll | 37 +- llvm/test/CodeGen/X86/memcmp-mergeexpand.ll | 18 +- llvm/test/CodeGen/X86/memcmp-minsize-x32.ll | 114 +- llvm/test/CodeGen/X86/memcmp-minsize.ll | 114 +- .../CodeGen/X86/memcmp-more-load-pairs-x32.ll | 482 ++-- .../CodeGen/X86/memcmp-more-load-pairs.ll | 482 ++-- llvm/test/CodeGen/X86/memcmp-optsize-x32.ll | 120 +- llvm/test/CodeGen/X86/memcmp-optsize.ll | 120 +- llvm/test/CodeGen/X86/memcmp-pgso-x32.ll | 120 +- llvm/test/CodeGen/X86/memcmp-pgso.ll | 120 +- llvm/test/CodeGen/X86/memcmp-x32.ll | 506 ++--- llvm/test/CodeGen/X86/memcmp.ll | 506 ++--- llvm/test/CodeGen/X86/memcpy-2.ll | 22 +- llvm/test/CodeGen/X86/memcpy-from-string.ll | 8 +- llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll | 12 +- llvm/test/CodeGen/X86/memcpy-inline.ll | 16 +- .../CodeGen/X86/memcpy-struct-by-value.ll | 16 +- llvm/test/CodeGen/X86/memcpy.ll | 52 +- llvm/test/CodeGen/X86/mempcpy-32.ll | 14 +- llvm/test/CodeGen/X86/mempcpy.ll | 14 +- llvm/test/CodeGen/X86/memset-2.ll | 14 +- llvm/test/CodeGen/X86/memset-3.ll | 5 +- llvm/test/CodeGen/X86/memset-inline.ll | 84 +- llvm/test/CodeGen/X86/memset-minsize.ll | 51 +- llvm/test/CodeGen/X86/memset-nonzero.ll | 44 +- .../X86/memset-sse-stack-realignment.ll | 12 +- .../CodeGen/X86/memset-vs-memset-inline.ll | 16 +- llvm/test/CodeGen/X86/memset-zero.ll | 70 +- llvm/test/CodeGen/X86/memset.ll | 17 +- llvm/test/CodeGen/X86/memset64-on-x86-32.ll | 4 +- .../X86/merge-consecutive-loads-128.ll | 398 ++-- .../X86/merge-consecutive-loads-256.ll | 331 ++- .../X86/merge-consecutive-loads-512.ll | 351 ++- .../X86/merge-consecutive-stores-i1.ll | 4 +- .../X86/merge-consecutive-stores-nt.ll | 128 +- .../CodeGen/X86/merge-consecutive-stores.ll | 12 +- llvm/test/CodeGen/X86/merge-sp-update-lea.ll | 10 +- .../test/CodeGen/X86/merge-store-constants.ll | 99 +- .../merge-vector-stores-scale-idx-crash.ll | 32 +- llvm/test/CodeGen/X86/merge_store.ll | 39 +- .../X86/merge_store_duplicated_loads.ll | 66 +- llvm/test/CodeGen/X86/mfence.ll | 4 +- llvm/test/CodeGen/X86/midpoint-int-vec-128.ll | 56 +- llvm/test/CodeGen/X86/midpoint-int-vec-256.ll | 56 +- llvm/test/CodeGen/X86/midpoint-int-vec-512.ll | 56 +- llvm/test/CodeGen/X86/midpoint-int.ll | 56 +- llvm/test/CodeGen/X86/mingw-alloca.ll | 14 +- llvm/test/CodeGen/X86/mingw-comdats-xdata.ll | 14 +- llvm/test/CodeGen/X86/mingw-comdats.ll | 4 +- llvm/test/CodeGen/X86/mingw-refptr.ll | 10 +- llvm/test/CodeGen/X86/misaligned-memset.ll | 8 +- llvm/test/CodeGen/X86/misched-aa-colored.ll | 104 +- llvm/test/CodeGen/X86/misched-aa-mmos.ll | 17 +- llvm/test/CodeGen/X86/misched-balance.ll | 202 +- .../X86/misched-code-difference-with-debug.ll | 22 +- llvm/test/CodeGen/X86/misched-crash.ll | 8 +- llvm/test/CodeGen/X86/misched-fusion.ll | 42 +- llvm/test/CodeGen/X86/misched-matmul.ll | 190 +- llvm/test/CodeGen/X86/misched-matrix.ll | 123 +- llvm/test/CodeGen/X86/misched-new.ll | 20 +- .../X86/misched_phys_reg_assign_order.ll | 9 +- llvm/test/CodeGen/X86/mixed-ptr-sizes-i686.ll | 96 +- llvm/test/CodeGen/X86/mixed-ptr-sizes.ll | 95 +- .../CodeGen/X86/mmx-arg-passing-x86-64.ll | 2 +- llvm/test/CodeGen/X86/mmx-arg-passing.ll | 4 +- llvm/test/CodeGen/X86/mmx-arith.ll | 150 +- llvm/test/CodeGen/X86/mmx-bitcast.ll | 18 +- llvm/test/CodeGen/X86/mmx-build-vector.ll | 88 +- llvm/test/CodeGen/X86/mmx-coalescing.ll | 19 +- llvm/test/CodeGen/X86/mmx-copy-gprs.ll | 6 +- llvm/test/CodeGen/X86/mmx-cvt.ll | 81 +- llvm/test/CodeGen/X86/mmx-fold-load.ll | 163 +- llvm/test/CodeGen/X86/mmx-intrinsics.ll | 13 +- llvm/test/CodeGen/X86/movbe.ll | 24 +- llvm/test/CodeGen/X86/movdir-intrinsic-x86.ll | 12 +- .../CodeGen/X86/movdir-intrinsic-x86_64.ll | 6 +- .../CodeGen/X86/move_latch_to_loop_top.ll | 40 +- llvm/test/CodeGen/X86/movfs.ll | 4 +- llvm/test/CodeGen/X86/movgs.ll | 22 +- llvm/test/CodeGen/X86/movmsk.ll | 48 +- llvm/test/CodeGen/X86/movntdq-no-avx.ll | 4 +- llvm/test/CodeGen/X86/movpc32-check.ll | 2 +- llvm/test/CodeGen/X86/movtopush.ll | 71 +- llvm/test/CodeGen/X86/movtopush64.ll | 20 +- .../test/CodeGen/X86/ms-inline-asm-PR44272.ll | 2 +- llvm/test/CodeGen/X86/ms-inline-asm-array.ll | 2 +- llvm/test/CodeGen/X86/ms-inline-asm-avx512.ll | 2 +- .../X86/ms-inline-asm-redundant-clobber.ll | 2 +- .../X86/ms-inline-asm-variables-x64-1-reg.ll | 8 +- .../X86/ms-inline-asm-variables-x64-2-regs.ll | 4 +- .../X86/ms-inline-asm-variables-x64-nopic.ll | 8 +- .../X86/ms-inline-asm-variables-x86-1-reg.ll | 8 +- .../X86/ms-inline-asm-variables-x86-2-regs.ll | 4 +- llvm/test/CodeGen/X86/ms-inline-asm.ll | 44 +- llvm/test/CodeGen/X86/mul-i256.ll | 8 +- llvm/test/CodeGen/X86/mul-i512.ll | 8 +- llvm/test/CodeGen/X86/mul128.ll | 4 +- llvm/test/CodeGen/X86/mul128_sext_loop.ll | 8 +- llvm/test/CodeGen/X86/mulc-false-deps.ll | 88 +- .../test/CodeGen/X86/mult-alt-generic-i686.ll | 198 +- .../CodeGen/X86/mult-alt-generic-x86_64.ll | 198 +- llvm/test/CodeGen/X86/mult-alt-x86.ll | 136 +- .../CodeGen/X86/multiple-loop-post-inc.ll | 209 +- .../X86/multiple-return-values-cross-block.ll | 6 +- llvm/test/CodeGen/X86/mulx32.ll | 4 +- llvm/test/CodeGen/X86/mulx64.ll | 4 +- llvm/test/CodeGen/X86/musttail-fastcall.ll | 14 +- llvm/test/CodeGen/X86/musttail-inalloca.ll | 23 +- llvm/test/CodeGen/X86/musttail-indirect.ll | 158 +- llvm/test/CodeGen/X86/musttail-tailcc.ll | 16 +- llvm/test/CodeGen/X86/musttail-thiscall.ll | 44 +- llvm/test/CodeGen/X86/musttail-varargs.ll | 43 +- llvm/test/CodeGen/X86/musttail.ll | 32 +- llvm/test/CodeGen/X86/mwaitx.ll | 6 +- llvm/test/CodeGen/X86/narrow-shl-cst.ll | 14 +- llvm/test/CodeGen/X86/narrow-shl-load.ll | 12 +- llvm/test/CodeGen/X86/narrow_op-1.ll | 12 +- llvm/test/CodeGen/X86/neg_fp.ll | 2 +- llvm/test/CodeGen/X86/negate-add-zero.ll | 1202 +++++----- llvm/test/CodeGen/X86/negative-offset.ll | 6 +- llvm/test/CodeGen/X86/negative-subscript.ll | 4 +- llvm/test/CodeGen/X86/new-remat.ll | 8 +- llvm/test/CodeGen/X86/no-cmov.ll | 4 +- llvm/test/CodeGen/X86/no-plt.ll | 16 +- llvm/test/CodeGen/X86/no-prolog-kill.ll | 10 +- .../X86/no-seh-unwind-inline-asm-codegen.ll | 6 +- llvm/test/CodeGen/X86/no-sse-win64.ll | 32 +- llvm/test/CodeGen/X86/no-sse-x86.ll | 16 +- .../X86/no-unwind-inline-asm-codegen.ll | 10 +- llvm/test/CodeGen/X86/no-wide-load.ll | 8 +- llvm/test/CodeGen/X86/nocf_check.ll | 14 +- llvm/test/CodeGen/X86/nocfivalue.ll | 8 +- llvm/test/CodeGen/X86/nocx16.ll | 18 +- llvm/test/CodeGen/X86/nomovtopush.ll | 12 +- llvm/test/CodeGen/X86/nonconst-static-ev.ll | 2 +- llvm/test/CodeGen/X86/nonconst-static-iv.ll | 2 +- llvm/test/CodeGen/X86/nontemporal-2.ll | 198 +- llvm/test/CodeGen/X86/nontemporal-3.ll | 144 +- llvm/test/CodeGen/X86/nontemporal-loads-2.ll | 144 +- llvm/test/CodeGen/X86/nontemporal-loads.ll | 227 +- llvm/test/CodeGen/X86/nontemporal.ll | 44 +- llvm/test/CodeGen/X86/noreturn-call-linux.ll | 16 +- llvm/test/CodeGen/X86/noreturn-call-win64.ll | 14 +- llvm/test/CodeGen/X86/noreturn-call.ll | 30 +- llvm/test/CodeGen/X86/norex-subreg.ll | 10 +- llvm/test/CodeGen/X86/nosse-error1.ll | 20 +- llvm/test/CodeGen/X86/nosse-varargs.ll | 46 +- llvm/test/CodeGen/X86/nosse-vector.ll | 52 +- llvm/test/CodeGen/X86/not-of-dec.ll | 4 +- llvm/test/CodeGen/X86/oddshuffles.ll | 154 +- llvm/test/CodeGen/X86/oddsubvector.ll | 63 +- llvm/test/CodeGen/X86/offload_sections.ll | 2 +- llvm/test/CodeGen/X86/offset-operator.ll | 4 +- llvm/test/CodeGen/X86/opaque-constant-asm.ll | 2 +- llvm/test/CodeGen/X86/opt-ext-uses.ll | 2 +- llvm/test/CodeGen/X86/opt-shuff-tstore.ll | 16 +- llvm/test/CodeGen/X86/optimize-max-0.ll | 96 +- llvm/test/CodeGen/X86/optimize-max-1.ll | 24 +- llvm/test/CodeGen/X86/optimize-max-2.ll | 8 +- llvm/test/CodeGen/X86/optimize-max-3.ll | 14 +- llvm/test/CodeGen/X86/or-address.ll | 36 +- llvm/test/CodeGen/X86/oss-fuzz-25184.ll | 2 +- llvm/test/CodeGen/X86/osx-private-labels.ll | 18 +- .../X86/overflow-intrinsic-optimizations.ll | 4 +- .../CodeGen/X86/overflowing-iv-codegen.ll | 40 +- llvm/test/CodeGen/X86/overflowing-iv.ll | 80 +- llvm/test/CodeGen/X86/overlap-shift.ll | 4 +- llvm/test/CodeGen/X86/packed_struct.ll | 14 +- llvm/test/CodeGen/X86/paddus.ll | 40 +- llvm/test/CodeGen/X86/parity.ll | 4 +- llvm/test/CodeGen/X86/partial-tail-dup.ll | 12 +- llvm/test/CodeGen/X86/partition.ll | 6 +- llvm/test/CodeGen/X86/pass-three.ll | 10 +- .../X86/patchable-function-entry-ibt.ll | 6 +- llvm/test/CodeGen/X86/patchable-prologue.ll | 13 +- llvm/test/CodeGen/X86/patchpoint-invoke.ll | 14 +- .../CodeGen/X86/patchpoint-webkit_jscc.ll | 20 +- llvm/test/CodeGen/X86/patchpoint.ll | 48 +- llvm/test/CodeGen/X86/peep-test-0.ll | 8 +- llvm/test/CodeGen/X86/peep-test-1.ll | 8 +- llvm/test/CodeGen/X86/peep-test-3.ll | 30 +- llvm/test/CodeGen/X86/peep-test-5.ll | 6 +- llvm/test/CodeGen/X86/peephole-cvt-sse.ll | 8 +- llvm/test/CodeGen/X86/peephole-fold-movsd.ll | 14 +- .../CodeGen/X86/peephole-multiple-folds.ll | 6 +- .../X86/peephole-na-phys-copy-folding.ll | 40 +- llvm/test/CodeGen/X86/perm.avx2-false-deps.ll | 16 +- .../CodeGen/X86/perm.avx512-false-deps.ll | 104 +- llvm/test/CodeGen/X86/personality.ll | 8 +- llvm/test/CodeGen/X86/personality_size.ll | 4 +- llvm/test/CodeGen/X86/phaddsub-extract.ll | 14 +- llvm/test/CodeGen/X86/phi-bit-propagation.ll | 9 +- llvm/test/CodeGen/X86/phielim-split.ll | 26 +- .../CodeGen/X86/phys-reg-local-regalloc.ll | 46 +- .../CodeGen/X86/phys_subreg_coalesce-3.ll | 10 +- llvm/test/CodeGen/X86/pic-load-remat.ll | 10 +- llvm/test/CodeGen/X86/pic.ll | 70 +- llvm/test/CodeGen/X86/pic_jumptable.ll | 6 +- llvm/test/CodeGen/X86/pmaddubsw.ll | 48 +- llvm/test/CodeGen/X86/pmovext.ll | 16 +- llvm/test/CodeGen/X86/pmovsx-inreg.ll | 96 +- llvm/test/CodeGen/X86/pmulld.ll | 4 +- llvm/test/CodeGen/X86/pmullq-false-deps.ll | 36 +- llvm/test/CodeGen/X86/pointer-vector.ll | 92 +- .../CodeGen/X86/pop-stack-cleanup-msvc.ll | 8 +- llvm/test/CodeGen/X86/post-ra-sched.ll | 20 +- llvm/test/CodeGen/X86/postalloc-coalescing.ll | 4 +- llvm/test/CodeGen/X86/postra-licm.ll | 68 +- llvm/test/CodeGen/X86/pow-libcall.ll | 4 +- llvm/test/CodeGen/X86/pr10475.ll | 2 +- llvm/test/CodeGen/X86/pr10524.ll | 2 +- llvm/test/CodeGen/X86/pr10525.ll | 4 +- llvm/test/CodeGen/X86/pr10526.ll | 2 +- llvm/test/CodeGen/X86/pr11202.ll | 2 +- llvm/test/CodeGen/X86/pr11334.ll | 4 +- llvm/test/CodeGen/X86/pr11468.ll | 2 +- llvm/test/CodeGen/X86/pr11985.ll | 6 +- llvm/test/CodeGen/X86/pr12360.ll | 8 +- llvm/test/CodeGen/X86/pr12889.ll | 4 +- llvm/test/CodeGen/X86/pr13209.ll | 34 +- llvm/test/CodeGen/X86/pr13458.ll | 2 +- llvm/test/CodeGen/X86/pr13859.ll | 4 +- llvm/test/CodeGen/X86/pr13899.ll | 40 +- llvm/test/CodeGen/X86/pr14088.ll | 6 +- llvm/test/CodeGen/X86/pr14161.ll | 8 +- llvm/test/CodeGen/X86/pr14314.ll | 4 +- llvm/test/CodeGen/X86/pr14333.ll | 14 +- llvm/test/CodeGen/X86/pr14562.ll | 4 +- llvm/test/CodeGen/X86/pr1489.ll | 6 +- llvm/test/CodeGen/X86/pr1505.ll | 4 +- llvm/test/CodeGen/X86/pr1505b.ll | 62 +- llvm/test/CodeGen/X86/pr15267.ll | 16 +- llvm/test/CodeGen/X86/pr15309.ll | 10 +- llvm/test/CodeGen/X86/pr15981.ll | 8 +- llvm/test/CodeGen/X86/pr17631.ll | 4 +- llvm/test/CodeGen/X86/pr18014.ll | 4 +- llvm/test/CodeGen/X86/pr18054.ll | 4 +- llvm/test/CodeGen/X86/pr18162.ll | 21 +- llvm/test/CodeGen/X86/pr18344.ll | 40 +- llvm/test/CodeGen/X86/pr18846.ll | 80 +- llvm/test/CodeGen/X86/pr20011.ll | 9 +- llvm/test/CodeGen/X86/pr20012.ll | 2 +- llvm/test/CodeGen/X86/pr20020.ll | 32 +- llvm/test/CodeGen/X86/pr21099.ll | 4 +- llvm/test/CodeGen/X86/pr2177.ll | 9 +- llvm/test/CodeGen/X86/pr21792.ll | 22 +- llvm/test/CodeGen/X86/pr2182.ll | 18 +- llvm/test/CodeGen/X86/pr22019.ll | 2 +- llvm/test/CodeGen/X86/pr22103.ll | 2 +- llvm/test/CodeGen/X86/pr22473.ll | 4 +- llvm/test/CodeGen/X86/pr22774.ll | 4 +- llvm/test/CodeGen/X86/pr22970.ll | 12 +- llvm/test/CodeGen/X86/pr23103.ll | 4 +- llvm/test/CodeGen/X86/pr23258.ll | 4 +- llvm/test/CodeGen/X86/pr2326.ll | 10 +- llvm/test/CodeGen/X86/pr23273.ll | 2 +- llvm/test/CodeGen/X86/pr23603.ll | 6 +- llvm/test/CodeGen/X86/pr24374.ll | 6 +- llvm/test/CodeGen/X86/pr24602.ll | 8 +- llvm/test/CodeGen/X86/pr25725.ll | 7 +- llvm/test/CodeGen/X86/pr2585.ll | 8 +- llvm/test/CodeGen/X86/pr26350.ll | 2 +- llvm/test/CodeGen/X86/pr2656.ll | 14 +- llvm/test/CodeGen/X86/pr26757.ll | 8 +- llvm/test/CodeGen/X86/pr26870.ll | 22 +- llvm/test/CodeGen/X86/pr27071.ll | 6 +- llvm/test/CodeGen/X86/pr27501.ll | 8 +- llvm/test/CodeGen/X86/pr28444.ll | 4 +- llvm/test/CodeGen/X86/pr28489.ll | 4 +- llvm/test/CodeGen/X86/pr2849.ll | 33 +- llvm/test/CodeGen/X86/pr28515.ll | 8 +- llvm/test/CodeGen/X86/pr28560.ll | 4 +- llvm/test/CodeGen/X86/pr28824.ll | 2 +- llvm/test/CodeGen/X86/pr29022.ll | 4 +- llvm/test/CodeGen/X86/pr29112.ll | 2 +- llvm/test/CodeGen/X86/pr29170.ll | 2 +- llvm/test/CodeGen/X86/pr2924.ll | 14 +- llvm/test/CodeGen/X86/pr2982.ll | 12 +- llvm/test/CodeGen/X86/pr30284.ll | 12 +- llvm/test/CodeGen/X86/pr30290.ll | 13 +- llvm/test/CodeGen/X86/pr30430.ll | 132 +- llvm/test/CodeGen/X86/pr30562.ll | 7 +- llvm/test/CodeGen/X86/pr30813.ll | 8 +- llvm/test/CodeGen/X86/pr31045.ll | 14 +- llvm/test/CodeGen/X86/pr31143.ll | 16 +- llvm/test/CodeGen/X86/pr31271.ll | 10 +- llvm/test/CodeGen/X86/pr3154.ll | 52 +- llvm/test/CodeGen/X86/pr31593.ll | 13 +- llvm/test/CodeGen/X86/pr31956.ll | 4 +- llvm/test/CodeGen/X86/pr3216.ll | 2 +- llvm/test/CodeGen/X86/pr32241.ll | 14 +- llvm/test/CodeGen/X86/pr32256.ll | 4 +- llvm/test/CodeGen/X86/pr32282.ll | 10 +- llvm/test/CodeGen/X86/pr32284.ll | 52 +- llvm/test/CodeGen/X86/pr32329.ll | 16 +- llvm/test/CodeGen/X86/pr32340.ll | 22 +- llvm/test/CodeGen/X86/pr32345.ll | 18 +- llvm/test/CodeGen/X86/pr3241.ll | 2 +- llvm/test/CodeGen/X86/pr32420.ll | 8 +- llvm/test/CodeGen/X86/pr3244.ll | 8 +- llvm/test/CodeGen/X86/pr32451.ll | 41 +- llvm/test/CodeGen/X86/pr32484.ll | 4 +- llvm/test/CodeGen/X86/pr32515.ll | 10 +- llvm/test/CodeGen/X86/pr32588.ll | 8 +- llvm/test/CodeGen/X86/pr32659.ll | 42 +- llvm/test/CodeGen/X86/pr33010.ll | 17 +- llvm/test/CodeGen/X86/pr3317.ll | 60 +- llvm/test/CodeGen/X86/pr33290.ll | 12 +- llvm/test/CodeGen/X86/pr33349.ll | 4 +- llvm/test/CodeGen/X86/pr33396.ll | 8 +- llvm/test/CodeGen/X86/pr3366.ll | 2 +- llvm/test/CodeGen/X86/pr33747.ll | 6 +- llvm/test/CodeGen/X86/pr33828.ll | 2 +- llvm/test/CodeGen/X86/pr33954.ll | 22 +- llvm/test/CodeGen/X86/pr33960.ll | 2 +- llvm/test/CodeGen/X86/pr34080-2.ll | 49 +- llvm/test/CodeGen/X86/pr34080.ll | 12 +- llvm/test/CodeGen/X86/pr34088.ll | 16 +- llvm/test/CodeGen/X86/pr34137.ll | 20 +- llvm/test/CodeGen/X86/pr34139.ll | 10 +- llvm/test/CodeGen/X86/pr34177.ll | 4 +- llvm/test/CodeGen/X86/pr34292.ll | 42 +- llvm/test/CodeGen/X86/pr34381.ll | 10 +- llvm/test/CodeGen/X86/pr34421.ll | 14 +- llvm/test/CodeGen/X86/pr3457.ll | 4 +- llvm/test/CodeGen/X86/pr34605.ll | 40 +- llvm/test/CodeGen/X86/pr34629.ll | 4 +- llvm/test/CodeGen/X86/pr34634.ll | 20 +- llvm/test/CodeGen/X86/pr34657.ll | 4 +- llvm/test/CodeGen/X86/pr34855.ll | 8 +- llvm/test/CodeGen/X86/pr3522.ll | 10 +- llvm/test/CodeGen/X86/pr35316.ll | 46 +- llvm/test/CodeGen/X86/pr35399.ll | 6 +- llvm/test/CodeGen/X86/pr35443.ll | 6 +- llvm/test/CodeGen/X86/pr35636.ll | 2 +- llvm/test/CodeGen/X86/pr35761.ll | 8 +- llvm/test/CodeGen/X86/pr35765.ll | 8 +- llvm/test/CodeGen/X86/pr35918.ll | 30 +- llvm/test/CodeGen/X86/pr35972.ll | 4 +- llvm/test/CodeGen/X86/pr36199.ll | 2 +- llvm/test/CodeGen/X86/pr36274.ll | 13 +- llvm/test/CodeGen/X86/pr36312.ll | 14 +- llvm/test/CodeGen/X86/pr36865.ll | 59 +- llvm/test/CodeGen/X86/pr37025.ll | 26 +- llvm/test/CodeGen/X86/pr37063.ll | 4 +- llvm/test/CodeGen/X86/pr37359.ll | 6 +- llvm/test/CodeGen/X86/pr37820.ll | 6 +- llvm/test/CodeGen/X86/pr37826.ll | 20 +- llvm/test/CodeGen/X86/pr37879.ll | 4 +- llvm/test/CodeGen/X86/pr37916.ll | 10 +- llvm/test/CodeGen/X86/pr38185.ll | 36 +- llvm/test/CodeGen/X86/pr38533.ll | 6 +- llvm/test/CodeGen/X86/pr38539.ll | 32 +- llvm/test/CodeGen/X86/pr38738.ll | 21 +- llvm/test/CodeGen/X86/pr38743.ll | 22 +- llvm/test/CodeGen/X86/pr38762.ll | 7 +- llvm/test/CodeGen/X86/pr38763.ll | 7 +- llvm/test/CodeGen/X86/pr38795.ll | 16 +- llvm/test/CodeGen/X86/pr38803.ll | 6 +- llvm/test/CodeGen/X86/pr38819.ll | 4 +- llvm/test/CodeGen/X86/pr38865-2.ll | 4 +- llvm/test/CodeGen/X86/pr38865-3.ll | 6 +- llvm/test/CodeGen/X86/pr38865.ll | 9 +- llvm/test/CodeGen/X86/pr39098.ll | 6 +- llvm/test/CodeGen/X86/pr39243.ll | 6 +- llvm/test/CodeGen/X86/pr39666.ll | 12 +- llvm/test/CodeGen/X86/pr39733.ll | 10 +- llvm/test/CodeGen/X86/pr39896.ll | 4 +- llvm/test/CodeGen/X86/pr39926.ll | 27 +- llvm/test/CodeGen/X86/pr40289-64bit.ll | 2 +- llvm/test/CodeGen/X86/pr40289.ll | 2 +- llvm/test/CodeGen/X86/pr40539.ll | 4 +- .../CodeGen/X86/pr40631_deadstore_elision.ll | 65 +- llvm/test/CodeGen/X86/pr40737.ll | 4 +- llvm/test/CodeGen/X86/pr40811.ll | 4 +- llvm/test/CodeGen/X86/pr40994.ll | 7 +- llvm/test/CodeGen/X86/pr41619.ll | 4 +- llvm/test/CodeGen/X86/pr41678.ll | 2 +- llvm/test/CodeGen/X86/pr42064.ll | 48 +- llvm/test/CodeGen/X86/pr42452.ll | 2 +- llvm/test/CodeGen/X86/pr42565.ll | 6 +- llvm/test/CodeGen/X86/pr42616.ll | 4 +- llvm/test/CodeGen/X86/pr42727.ll | 27 +- llvm/test/CodeGen/X86/pr42870.ll | 13 +- llvm/test/CodeGen/X86/pr42909.ll | 4 +- llvm/test/CodeGen/X86/pr43529.ll | 9 +- llvm/test/CodeGen/X86/pr43866.ll | 5 +- llvm/test/CodeGen/X86/pr44396.ll | 4 +- llvm/test/CodeGen/X86/pr44915.ll | 4 +- llvm/test/CodeGen/X86/pr45067.ll | 10 +- llvm/test/CodeGen/X86/pr45378.ll | 15 +- llvm/test/CodeGen/X86/pr45563-2.ll | 30 +- llvm/test/CodeGen/X86/pr45563.ll | 6 +- llvm/test/CodeGen/X86/pr45833.ll | 30 +- llvm/test/CodeGen/X86/pr46004.ll | 8 +- llvm/test/CodeGen/X86/pr46455.ll | 14 +- llvm/test/CodeGen/X86/pr46527.ll | 4 +- llvm/test/CodeGen/X86/pr46532.ll | 20 +- llvm/test/CodeGen/X86/pr46585.ll | 4 +- llvm/test/CodeGen/X86/pr46820.ll | 8 +- llvm/test/CodeGen/X86/pr46877.ll | 4 +- llvm/test/CodeGen/X86/pr47000.ll | 8 +- llvm/test/CodeGen/X86/pr47482.ll | 12 +- llvm/test/CodeGen/X86/pr47517.ll | 11 +- llvm/test/CodeGen/X86/pr47857.ll | 167 +- llvm/test/CodeGen/X86/pr47874.ll | 32 +- llvm/test/CodeGen/X86/pr48458.ll | 4 +- llvm/test/CodeGen/X86/pr48727.ll | 42 +- llvm/test/CodeGen/X86/pr48888.ll | 8 +- llvm/test/CodeGen/X86/pr49028.ll | 4 +- llvm/test/CodeGen/X86/pr49076.ll | 2 +- llvm/test/CodeGen/X86/pr49087.ll | 8 +- llvm/test/CodeGen/X86/pr49162.ll | 8 +- llvm/test/CodeGen/X86/pr49393.ll | 4 +- llvm/test/CodeGen/X86/pr49451.ll | 4 +- llvm/test/CodeGen/X86/pr49466.ll | 36 +- llvm/test/CodeGen/X86/pr49467.ll | 16 +- .../CodeGen/X86/pr49839-trapping-aggregate.ll | 2 +- llvm/test/CodeGen/X86/pr50254.ll | 4 +- llvm/test/CodeGen/X86/pr50374.ll | 4 +- llvm/test/CodeGen/X86/pr50431.ll | 4 +- llvm/test/CodeGen/X86/pr50609.ll | 18 +- llvm/test/CodeGen/X86/pr50782.ll | 29 +- llvm/test/CodeGen/X86/pr50823.ll | 13 +- llvm/test/CodeGen/X86/pr50907.ll | 4 +- llvm/test/CodeGen/X86/pr51175.ll | 4 +- llvm/test/CodeGen/X86/pr51371.ll | 16 +- llvm/test/CodeGen/X86/pr5145.ll | 8 +- llvm/test/CodeGen/X86/pr51615.ll | 20 +- .../CodeGen/X86/pr51878_computeAliasing.ll | 12 +- llvm/test/CodeGen/X86/pr53419.ll | 48 +- llvm/test/CodeGen/X86/pr53842.ll | 2 +- .../X86/pr53990-incorrect-machine-sink.ll | 6 +- llvm/test/CodeGen/X86/pr54369.ll | 2 +- llvm/test/CodeGen/X86/pr55846.ll | 7 +- llvm/test/CodeGen/X86/pr7882.ll | 2 +- llvm/test/CodeGen/X86/pr9127.ll | 4 +- llvm/test/CodeGen/X86/pr9517.ll | 26 +- llvm/test/CodeGen/X86/pre-coalesce-2.ll | 102 +- llvm/test/CodeGen/X86/pre-coalesce.ll | 12 +- llvm/test/CodeGen/X86/pre-ra-sched.ll | 29 +- llvm/test/CodeGen/X86/preallocated-nocall.ll | 11 +- llvm/test/CodeGen/X86/preallocated-x64.ll | 9 +- llvm/test/CodeGen/X86/preallocated.ll | 89 +- .../CodeGen/X86/prefer-avx256-mask-extend.ll | 32 +- .../CodeGen/X86/prefer-avx256-mask-shuffle.ll | 6 +- llvm/test/CodeGen/X86/prefer-avx256-mulo.ll | 8 +- llvm/test/CodeGen/X86/prefetch.ll | 20 +- llvm/test/CodeGen/X86/prefixdata.ll | 2 +- llvm/test/CodeGen/X86/private-2.ll | 12 +- llvm/test/CodeGen/X86/private.ll | 2 +- llvm/test/CodeGen/X86/prologuedata.ll | 2 +- llvm/test/CodeGen/X86/promote-assert-zext.ll | 4 +- llvm/test/CodeGen/X86/promote-i16.ll | 10 +- .../test/CodeGen/X86/promote-sra-by-itself.ll | 8 +- llvm/test/CodeGen/X86/promote-trunc.ll | 4 +- llvm/test/CodeGen/X86/promote.ll | 12 +- llvm/test/CodeGen/X86/ps4-noreturn.ll | 6 +- llvm/test/CodeGen/X86/ps4-ssp-nop.ll | 20 +- .../CodeGen/X86/pseudo_cmov_lower-fp16.ll | 22 +- llvm/test/CodeGen/X86/pseudo_cmov_lower.ll | 73 +- llvm/test/CodeGen/X86/pshufb-mask-comments.ll | 16 +- llvm/test/CodeGen/X86/psubus.ll | 46 +- llvm/test/CodeGen/X86/ptr-rotate.ll | 4 +- llvm/test/CodeGen/X86/ptrtoint-constexpr.ll | 4 +- llvm/test/CodeGen/X86/ptrtoint-narrow.ll | 2 +- llvm/test/CodeGen/X86/ptwrite32-intrinsic.ll | 4 +- llvm/test/CodeGen/X86/ptwrite64-intrinsic.ll | 4 +- .../CodeGen/X86/pull-binop-through-shift.ll | 96 +- .../pull-conditional-binop-through-shift.ll | 96 +- llvm/test/CodeGen/X86/push-cfi-obj.ll | 4 +- llvm/test/CodeGen/X86/push-cfi.ll | 42 +- llvm/test/CodeGen/X86/ragreedy-bug.ll | 172 +- llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll | 75 +- .../X86/ragreedy-last-chance-recoloring.ll | 80 +- llvm/test/CodeGen/X86/range-false-deps.ll | 88 +- llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll | 104 +- llvm/test/CodeGen/X86/rdrand-x86_64.ll | 4 +- llvm/test/CodeGen/X86/rdrand.ll | 16 +- llvm/test/CodeGen/X86/rdseed-x86_64.ll | 4 +- llvm/test/CodeGen/X86/rdseed.ll | 8 +- llvm/test/CodeGen/X86/rdtsc-upgrade.ll | 6 +- llvm/test/CodeGen/X86/rdtsc.ll | 9 +- llvm/test/CodeGen/X86/recip-pic.ll | 2 +- llvm/test/CodeGen/X86/red-zone.ll | 2 +- llvm/test/CodeGen/X86/reduce-trunc-shl.ll | 42 +- .../X86/regalloc-advanced-split-cost.ll | 60 +- .../X86/regalloc-reconcile-broken-hints.ll | 64 +- .../CodeGen/X86/regalloc-spill-at-ehpad.ll | 19 +- .../test/CodeGen/X86/regalloc-tight-invoke.ll | 14 +- llvm/test/CodeGen/X86/reghinting.ll | 2 +- llvm/test/CodeGen/X86/regparm.ll | 8 +- llvm/test/CodeGen/X86/regpressure.ll | 120 +- llvm/test/CodeGen/X86/relocimm-small-model.ll | 2 +- llvm/test/CodeGen/X86/relptr-rodata.ll | 10 +- llvm/test/CodeGen/X86/remat-constant.ll | 2 +- llvm/test/CodeGen/X86/remat-fold-load.ll | 53 +- llvm/test/CodeGen/X86/remat-scalar-zero.ll | 134 +- .../CodeGen/X86/replace-load-and-with-bzhi.ll | 16 +- .../replace_unsupported_masked_mem_intrin.ll | 24 +- llvm/test/CodeGen/X86/ret-addr.ll | 20 +- llvm/test/CodeGen/X86/ret-mmx.ll | 2 +- llvm/test/CodeGen/X86/retpoline-external.ll | 25 +- llvm/test/CodeGen/X86/retpoline-regparm.ll | 4 +- llvm/test/CodeGen/X86/retpoline.ll | 165 +- llvm/test/CodeGen/X86/return-ext.ll | 10 +- llvm/test/CodeGen/X86/reverse_branches.ll | 32 +- llvm/test/CodeGen/X86/rip-rel-address.ll | 2 +- llvm/test/CodeGen/X86/rip-rel-lea.ll | 5 +- llvm/test/CodeGen/X86/rodata-relocs.ll | 16 +- llvm/test/CodeGen/X86/rot16.ll | 29 +- llvm/test/CodeGen/X86/rot32.ll | 16 +- llvm/test/CodeGen/X86/rot64.ll | 16 +- llvm/test/CodeGen/X86/rotate.ll | 24 +- llvm/test/CodeGen/X86/rotate4.ll | 48 +- llvm/test/CodeGen/X86/rounding-ops.ll | 16 +- llvm/test/CodeGen/X86/rtm.ll | 2 +- llvm/test/CodeGen/X86/sad_variations.ll | 200 +- llvm/test/CodeGen/X86/sadd_sat_vec.ll | 64 +- llvm/test/CodeGen/X86/safestack.ll | 5 +- llvm/test/CodeGen/X86/safestack_inline.ll | 11 +- llvm/test/CodeGen/X86/safestack_ssp.ll | 5 +- llvm/test/CodeGen/X86/sandybridge-loads.ll | 30 +- llvm/test/CodeGen/X86/sbb-false-dep.ll | 31 +- llvm/test/CodeGen/X86/scalar-extract.ll | 6 +- llvm/test/CodeGen/X86/scalar_widen_div.ll | 50 +- llvm/test/CodeGen/X86/scalarize-bitcast.ll | 6 +- llvm/test/CodeGen/X86/scalarize-fp.ll | 40 +- llvm/test/CodeGen/X86/scatter-schedule.ll | 6 +- llvm/test/CodeGen/X86/scev-interchange.ll | 140 +- .../CodeGen/X86/segmented-stacks-dynamic.ll | 4 +- llvm/test/CodeGen/X86/segmented-stacks.ll | 22 +- llvm/test/CodeGen/X86/seh-catch-all-win32.ll | 38 +- llvm/test/CodeGen/X86/seh-catch-all.ll | 8 +- llvm/test/CodeGen/X86/seh-catchpad.ll | 14 +- llvm/test/CodeGen/X86/seh-except-finally.ll | 59 +- llvm/test/CodeGen/X86/seh-except-restore.ll | 40 +- llvm/test/CodeGen/X86/seh-exception-code.ll | 4 +- .../CodeGen/X86/seh-filter-no-personality.ll | 19 +- llvm/test/CodeGen/X86/seh-finally.ll | 8 +- llvm/test/CodeGen/X86/seh-localaddress.ll | 35 +- llvm/test/CodeGen/X86/seh-no-invokes.ll | 30 +- llvm/test/CodeGen/X86/seh-safe-div-win32.ll | 80 +- llvm/test/CodeGen/X86/seh-safe-div.ll | 68 +- llvm/test/CodeGen/X86/seh-stack-realign.ll | 38 +- .../X86/seh-unwind-inline-asm-codegen.ll | 6 +- llvm/test/CodeGen/X86/select-ext.ll | 60 +- llvm/test/CodeGen/X86/select-lea.ll | 24 +- llvm/test/CodeGen/X86/select-optimize.ll | 72 +- .../CodeGen/X86/select-testb-volatile-load.ll | 10 +- llvm/test/CodeGen/X86/select-with-and-or.ll | 8 +- llvm/test/CodeGen/X86/select.ll | 38 +- llvm/test/CodeGen/X86/selectiondag-cse.ll | 24 +- .../CodeGen/X86/selectiondag-debug-loc.ll | 25 +- .../CodeGen/X86/selectiondag-dominator.ll | 6 +- .../CodeGen/X86/semantic-interposition-asm.ll | 4 +- llvm/test/CodeGen/X86/setcc-combine.ll | 8 +- llvm/test/CodeGen/X86/setcc-freeze.ll | 36 +- llvm/test/CodeGen/X86/setcc-logic.ll | 16 +- llvm/test/CodeGen/X86/setcc-narrowing.ll | 2 +- llvm/test/CodeGen/X86/setcc-wide-types.ll | 96 +- llvm/test/CodeGen/X86/setcc.ll | 2 +- llvm/test/CodeGen/X86/setjmp-spills.ll | 4 +- llvm/test/CodeGen/X86/sext-load.ll | 7 +- llvm/test/CodeGen/X86/sext-ret-val.ll | 8 +- llvm/test/CodeGen/X86/sext-subreg.ll | 8 +- llvm/test/CodeGen/X86/sext-vsetcc.ll | 78 +- llvm/test/CodeGen/X86/sha.ll | 32 +- llvm/test/CodeGen/X86/shadow-stack.ll | 34 +- llvm/test/CodeGen/X86/shift-amount-mod.ll | 84 +- llvm/test/CodeGen/X86/shift-and.ll | 14 +- llvm/test/CodeGen/X86/shift-avx2-crash.ll | 5 +- llvm/test/CodeGen/X86/shift-bmi2.ll | 32 +- llvm/test/CodeGen/X86/shift-by-signext.ll | 4 +- llvm/test/CodeGen/X86/shift-coalesce.ll | 4 +- llvm/test/CodeGen/X86/shift-codegen.ll | 6 +- llvm/test/CodeGen/X86/shift-combine.ll | 58 +- llvm/test/CodeGen/X86/shift-folding.ll | 36 +- llvm/test/CodeGen/X86/shift-i128.ll | 60 +- llvm/test/CodeGen/X86/shift-i256.ll | 4 +- llvm/test/CodeGen/X86/shift-logic.ll | 4 +- llvm/test/CodeGen/X86/shift-one.ll | 4 +- llvm/test/CodeGen/X86/shift-parts.ll | 4 +- llvm/test/CodeGen/X86/shl-anyext.ll | 4 +- .../test/CodeGen/X86/shl-crash-on-legalize.ll | 2 +- llvm/test/CodeGen/X86/shl-i64.ll | 12 +- llvm/test/CodeGen/X86/shl_undef.ll | 14 +- llvm/test/CodeGen/X86/shrink-compare-pgso.ll | 6 +- llvm/test/CodeGen/X86/shrink-compare.ll | 6 +- .../CodeGen/X86/shrink-wrap-chkstk-x86_64.ll | 19 +- llvm/test/CodeGen/X86/shrink-wrap-chkstk.ll | 17 +- llvm/test/CodeGen/X86/shrink-wrapping-vla.ll | 26 +- llvm/test/CodeGen/X86/shrink_vmul.ll | 397 ++-- llvm/test/CodeGen/X86/shrink_vmul_sse.ll | 21 +- llvm/test/CodeGen/X86/shrinkwrap-callbr.ll | 2 +- llvm/test/CodeGen/X86/shrinkwrap-hang.ll | 6 +- .../test/CodeGen/X86/shuffle-combine-crash.ll | 4 +- .../CodeGen/X86/shuffle-extract-subvector.ll | 8 +- .../CodeGen/X86/shuffle-of-splat-multiuses.ll | 20 +- .../X86/shuffle-strided-with-offset-128.ll | 96 +- .../X86/shuffle-strided-with-offset-256.ll | 96 +- .../X86/shuffle-strided-with-offset-512.ll | 96 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-128.ll | 72 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll | 72 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 76 +- llvm/test/CodeGen/X86/sibcall-2.ll | 20 +- llvm/test/CodeGen/X86/sibcall-3.ll | 8 +- llvm/test/CodeGen/X86/sibcall-4.ll | 10 +- llvm/test/CodeGen/X86/sibcall-5.ll | 21 +- llvm/test/CodeGen/X86/sibcall-byval.ll | 12 +- llvm/test/CodeGen/X86/sibcall-win64.ll | 8 +- llvm/test/CodeGen/X86/sibcall.ll | 110 +- llvm/test/CodeGen/X86/simple-zext.ll | 4 +- llvm/test/CodeGen/X86/sink-hoist.ll | 56 +- llvm/test/CodeGen/X86/sink-local-value.ll | 48 +- llvm/test/CodeGen/X86/sink-out-of-loop.ll | 8 +- llvm/test/CodeGen/X86/sjlj-baseptr.ll | 17 +- llvm/test/CodeGen/X86/sjlj-eh-musttail.ll | 12 +- llvm/test/CodeGen/X86/sjlj-eh.ll | 16 +- .../X86/sjlj-unwind-inline-asm-codegen.ll | 10 +- llvm/test/CodeGen/X86/sjlj.ll | 22 +- llvm/test/CodeGen/X86/slow-incdec.ll | 22 +- llvm/test/CodeGen/X86/slow-unaligned-mem.ll | 6 +- llvm/test/CodeGen/X86/small-byval-memcpy.ll | 6 +- llvm/test/CodeGen/X86/smul-with-overflow.ll | 10 +- .../X86/smulo-128-legalisation-lowering.ll | 8 +- llvm/test/CodeGen/X86/soft-fp.ll | 19 +- .../CodeGen/X86/speculation-hardening-sls.ll | 12 +- ...ative-execution-side-effect-suppression.ll | 67 +- ...speculative-load-hardening-call-and-ret.ll | 32 +- .../X86/speculative-load-hardening-gather.ll | 246 +-- .../speculative-load-hardening-indirect.ll | 46 +- .../speculative-load-hardening-no-spill.ll | 4 +- .../CodeGen/X86/speculative-load-hardening.ll | 138 +- llvm/test/CodeGen/X86/splat-for-size.ll | 2 +- llvm/test/CodeGen/X86/split-eh-lpad-edges.ll | 30 +- llvm/test/CodeGen/X86/split-store.ll | 66 +- llvm/test/CodeGen/X86/split-vector-bitcast.ll | 6 +- llvm/test/CodeGen/X86/sqrt-fastmath.ll | 16 +- llvm/test/CodeGen/X86/sret-implicit.ll | 4 +- llvm/test/CodeGen/X86/sse-align-0.ll | 8 +- llvm/test/CodeGen/X86/sse-align-1.ll | 8 +- llvm/test/CodeGen/X86/sse-align-10.ll | 4 +- llvm/test/CodeGen/X86/sse-align-12.ll | 16 +- llvm/test/CodeGen/X86/sse-align-2.ll | 8 +- llvm/test/CodeGen/X86/sse-align-3.ll | 8 +- llvm/test/CodeGen/X86/sse-align-4.ll | 8 +- llvm/test/CodeGen/X86/sse-align-5.ll | 4 +- llvm/test/CodeGen/X86/sse-align-6.ll | 4 +- llvm/test/CodeGen/X86/sse-align-7.ll | 4 +- llvm/test/CodeGen/X86/sse-align-8.ll | 4 +- llvm/test/CodeGen/X86/sse-align-9.ll | 8 +- llvm/test/CodeGen/X86/sse-cvttp2si.ll | 24 +- llvm/test/CodeGen/X86/sse-domains.ll | 10 +- llvm/test/CodeGen/X86/sse-fcopysign.ll | 2 +- llvm/test/CodeGen/X86/sse-fsignum.ll | 36 +- .../CodeGen/X86/sse-insertelt-from-mem.ll | 86 +- llvm/test/CodeGen/X86/sse-intel-ocl.ll | 10 +- .../CodeGen/X86/sse-intrinsics-x86-upgrade.ll | 6 +- llvm/test/CodeGen/X86/sse-intrinsics-x86.ll | 12 +- llvm/test/CodeGen/X86/sse-load-ret.ll | 4 +- llvm/test/CodeGen/X86/sse-only.ll | 6 +- .../CodeGen/X86/sse-unaligned-mem-feature.ll | 4 +- llvm/test/CodeGen/X86/sse1.ll | 2 +- .../X86/sse2-intrinsics-fast-isel-x86_64.ll | 8 +- .../CodeGen/X86/sse2-intrinsics-fast-isel.ll | 154 +- .../X86/sse2-intrinsics-x86-upgrade.ll | 30 +- llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll | 30 +- llvm/test/CodeGen/X86/sse2.ll | 79 +- llvm/test/CodeGen/X86/sse3-avx-addsub.ll | 32 +- .../CodeGen/X86/sse3-intrinsics-fast-isel.ll | 11 +- llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll | 12 +- llvm/test/CodeGen/X86/sse3.ll | 35 +- .../CodeGen/X86/sse41-intrinsics-fast-isel.ll | 7 +- .../X86/sse41-intrinsics-x86-upgrade.ll | 7 +- llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll | 8 +- llvm/test/CodeGen/X86/sse41-pmovxrm.ll | 48 +- llvm/test/CodeGen/X86/sse41.ll | 61 +- llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll | 20 +- .../CodeGen/X86/sse4a-intrinsics-fast-isel.ll | 8 +- llvm/test/CodeGen/X86/sse4a-upgrade.ll | 12 +- llvm/test/CodeGen/X86/sse4a.ll | 16 +- llvm/test/CodeGen/X86/sse_partial_update.ll | 12 +- llvm/test/CodeGen/X86/ssp-data-layout.ll | 194 +- llvm/test/CodeGen/X86/ssp-guard-spill.ll | 23 +- llvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll | 4 +- llvm/test/CodeGen/X86/ssub_sat_vec.ll | 64 +- llvm/test/CodeGen/X86/stack-align-memcpy.ll | 20 +- llvm/test/CodeGen/X86/stack-align.ll | 30 +- .../CodeGen/X86/stack-clash-dynamic-alloca.ll | 6 +- .../X86/stack-clash-large-large-align.ll | 20 +- llvm/test/CodeGen/X86/stack-clash-large.ll | 18 +- ...-medium-natural-probes-mutliple-objects.ll | 10 +- .../X86/stack-clash-medium-natural-probes.ll | 10 +- llvm/test/CodeGen/X86/stack-clash-medium.ll | 6 +- .../stack-clash-small-alloc-medium-align.ll | 26 +- .../X86/stack-clash-small-large-align.ll | 12 +- llvm/test/CodeGen/X86/stack-clash-small.ll | 6 +- .../CodeGen/X86/stack-clash-unknown-call.ll | 4 +- .../CodeGen/X86/stack-folding-adx-x86_64.ll | 54 +- .../CodeGen/X86/stack-folding-avx512bf16.ll | 48 +- .../X86/stack-folding-avx512vp2intersect.ll | 48 +- .../CodeGen/X86/stack-folding-fp-avx512.ll | 126 +- .../X86/stack-folding-fp-avx512fp16-fma.ll | 480 ++-- .../X86/stack-folding-fp-avx512fp16.ll | 248 +-- .../X86/stack-folding-fp-avx512fp16vl-fma.ll | 384 ++-- .../X86/stack-folding-fp-avx512fp16vl.ll | 184 +- .../CodeGen/X86/stack-folding-fp-avx512vl.ll | 4 +- .../CodeGen/X86/stack-folding-int-avx512.ll | 392 ++-- .../CodeGen/X86/stack-folding-int-avx512vl.ll | 60 +- .../X86/stack-folding-int-avx512vnni.ll | 32 +- .../CodeGen/X86/stack-guard-memloc-vararg.ll | 8 +- llvm/test/CodeGen/X86/stack-guard-oob.ll | 190 +- llvm/test/CodeGen/X86/stack-probes.ll | 4 +- llvm/test/CodeGen/X86/stack-protector-3.ll | 17 +- .../CodeGen/X86/stack-protector-dbginfo.ll | 15 +- llvm/test/CodeGen/X86/stack-protector-msvc.ll | 30 +- .../CodeGen/X86/stack-protector-remarks.ll | 12 +- .../stack-protector-strong-macho-win32-xor.ll | 18 +- .../CodeGen/X86/stack-protector-target.ll | 5 +- .../X86/stack-protector-vreg-to-vreg-copy.ll | 11 +- .../CodeGen/X86/stack-protector-weight.ll | 20 +- llvm/test/CodeGen/X86/stack-protector.ll | 1035 ++++----- llvm/test/CodeGen/X86/stack-size-section.ll | 2 +- .../CodeGen/X86/stack-update-frame-opcode.ll | 5 +- llvm/test/CodeGen/X86/stack_guard_remat.ll | 14 +- llvm/test/CodeGen/X86/stackmap-fast-isel.ll | 8 +- llvm/test/CodeGen/X86/stackmap-frame-setup.ll | 8 +- .../X86/stackmap-large-location-size.ll | 20 +- llvm/test/CodeGen/X86/stackmap-liveness.ll | 10 +- llvm/test/CodeGen/X86/stackmap.ll | 64 +- llvm/test/CodeGen/X86/statepoint-allocas.ll | 24 +- .../CodeGen/X86/statepoint-call-lowering.ll | 58 +- .../CodeGen/X86/statepoint-deopt-lowering.ll | 12 +- .../X86/statepoint-duplicates-export.ll | 38 +- llvm/test/CodeGen/X86/statepoint-far-call.ll | 4 +- llvm/test/CodeGen/X86/statepoint-forward.ll | 62 +- llvm/test/CodeGen/X86/statepoint-gc-live.ll | 28 +- .../statepoint-gctransition-call-lowering.ll | 43 +- llvm/test/CodeGen/X86/statepoint-invoke.ll | 117 +- .../CodeGen/X86/statepoint-live-in-remat.ll | 4 +- llvm/test/CodeGen/X86/statepoint-live-in.ll | 46 +- .../CodeGen/X86/statepoint-no-extra-const.ll | 12 +- .../X86/statepoint-no-realign-stack.ll | 30 +- llvm/test/CodeGen/X86/statepoint-ra-no-ls.ll | 36 +- llvm/test/CodeGen/X86/statepoint-ra.ll | 23 +- llvm/test/CodeGen/X86/statepoint-regs.ll | 58 +- .../CodeGen/X86/statepoint-spill-lowering.ll | 28 +- .../statepoint-spill-slot-size-promotion.ll | 8 +- .../CodeGen/X86/statepoint-stack-usage.ll | 72 +- .../CodeGen/X86/statepoint-stackmap-format.ll | 54 +- .../CodeGen/X86/statepoint-stackmap-size.ll | 16 +- .../CodeGen/X86/statepoint-two-results.ll | 12 +- llvm/test/CodeGen/X86/statepoint-uniqueing.ll | 42 +- .../X86/statepoint-vector-bad-spill.ll | 36 +- llvm/test/CodeGen/X86/statepoint-vector.ll | 56 +- .../CodeGen/X86/statepoint-vreg-details.ll | 183 +- .../CodeGen/X86/statepoint-vreg-invoke.ll | 83 +- .../statepoint-vreg-unlimited-tied-opnds.ll | 124 +- llvm/test/CodeGen/X86/statepoint-vreg.ll | 179 +- llvm/test/CodeGen/X86/stdarg.ll | 19 +- llvm/test/CodeGen/X86/stdcall-notailcall.ll | 6 +- llvm/test/CodeGen/X86/stdcall.ll | 17 +- llvm/test/CodeGen/X86/store-empty-member.ll | 2 +- llvm/test/CodeGen/X86/store-fp-constant.ll | 4 +- llvm/test/CodeGen/X86/store-global-address.ll | 6 +- llvm/test/CodeGen/X86/store-narrow.ll | 58 +- .../CodeGen/X86/store-zero-and-minus-one.ll | 64 +- llvm/test/CodeGen/X86/store_op_load_fold.ll | 10 +- llvm/test/CodeGen/X86/store_op_load_fold2.ll | 10 +- llvm/test/CodeGen/X86/stores-merging.ll | 573 +++-- llvm/test/CodeGen/X86/storetrunc-fp.ll | 4 +- .../CodeGen/X86/stride-nine-with-base-reg.ll | 16 +- llvm/test/CodeGen/X86/stride-reuse.ll | 12 +- llvm/test/CodeGen/X86/sttni.ll | 162 +- llvm/test/CodeGen/X86/sub-of-bias.ll | 4 +- llvm/test/CodeGen/X86/sub-with-overflow.ll | 10 +- llvm/test/CodeGen/X86/subcarry.ll | 486 ++-- llvm/test/CodeGen/X86/subreg-to-reg-0.ll | 4 +- llvm/test/CodeGen/X86/subreg-to-reg-2.ll | 26 +- llvm/test/CodeGen/X86/subreg-to-reg-4.ll | 76 +- llvm/test/CodeGen/X86/subreg-to-reg-6.ll | 2 +- llvm/test/CodeGen/X86/subvector-broadcast.ll | 170 +- llvm/test/CodeGen/X86/sunkaddr-ext.ll | 8 +- llvm/test/CodeGen/X86/swap.ll | 109 +- .../test/CodeGen/X86/swift-async-reg-win64.ll | 8 +- llvm/test/CodeGen/X86/swift-async-reg.ll | 8 +- llvm/test/CodeGen/X86/swift-async-win64.ll | 30 +- llvm/test/CodeGen/X86/swift-async.ll | 30 +- .../CodeGen/X86/swift-dynamic-async-frame.ll | 2 +- llvm/test/CodeGen/X86/swift-error.ll | 6 +- llvm/test/CodeGen/X86/swift-return.ll | 28 +- llvm/test/CodeGen/X86/swifterror.ll | 288 ++- llvm/test/CodeGen/X86/swiftself-win64.ll | 32 +- llvm/test/CodeGen/X86/swiftself.ll | 32 +- llvm/test/CodeGen/X86/swifttail-async-i386.ll | 6 +- .../test/CodeGen/X86/swifttail-async-win64.ll | 12 +- llvm/test/CodeGen/X86/swifttail-async.ll | 8 +- llvm/test/CodeGen/X86/swifttail-realign.ll | 4 +- llvm/test/CodeGen/X86/switch-bt.ll | 26 +- .../CodeGen/X86/switch-crit-edge-constant.ll | 36 +- llvm/test/CodeGen/X86/switch-jump-table.ll | 26 +- llvm/test/CodeGen/X86/switch-phi-const.ll | 28 +- llvm/test/CodeGen/X86/switch-zextload.ll | 6 +- llvm/test/CodeGen/X86/switch.ll | 15 +- .../CodeGen/X86/system-intrinsics-64-xsave.ll | 24 +- .../X86/system-intrinsics-64-xsavec.ll | 12 +- .../X86/system-intrinsics-64-xsaveopt.ll | 12 +- .../X86/system-intrinsics-64-xsaves.ll | 24 +- llvm/test/CodeGen/X86/system-intrinsics-64.ll | 24 +- .../CodeGen/X86/system-intrinsics-xsave.ll | 12 +- .../CodeGen/X86/system-intrinsics-xsavec.ll | 6 +- .../CodeGen/X86/system-intrinsics-xsaveopt.ll | 6 +- .../CodeGen/X86/system-intrinsics-xsaves.ll | 12 +- llvm/test/CodeGen/X86/system-intrinsics.ll | 12 +- llvm/test/CodeGen/X86/tagged-globals-pic.ll | 12 +- .../test/CodeGen/X86/tagged-globals-static.ll | 12 +- .../CodeGen/X86/tail-call-mutable-memarg.ll | 18 +- llvm/test/CodeGen/X86/tail-call-win64.ll | 6 +- .../X86/tail-calls-compatible-attrs.ll | 50 +- llvm/test/CodeGen/X86/tail-dup-addr.ll | 10 +- llvm/test/CodeGen/X86/tail-dup-asm-goto.ll | 14 +- llvm/test/CodeGen/X86/tail-dup-catchret.ll | 4 +- llvm/test/CodeGen/X86/tail-dup-debugloc.ll | 8 +- .../X86/tail-dup-multiple-latch-loop.ll | 32 +- llvm/test/CodeGen/X86/tail-dup-partial.ll | 12 +- llvm/test/CodeGen/X86/tail-dup-repeat.ll | 12 +- llvm/test/CodeGen/X86/tail-merge-debugloc.ll | 6 +- llvm/test/CodeGen/X86/tail-merge-identical.ll | 12 +- llvm/test/CodeGen/X86/tail-merge-wineh.ll | 46 +- llvm/test/CodeGen/X86/tail-opts.ll | 121 +- llvm/test/CodeGen/X86/tailcall-3regparm.ll | 15 +- llvm/test/CodeGen/X86/tailcall-64.ll | 47 +- llvm/test/CodeGen/X86/tailcall-assume.ll | 10 +- llvm/test/CodeGen/X86/tailcall-calleesave.ll | 8 +- llvm/test/CodeGen/X86/tailcall-cgp-dup.ll | 33 +- llvm/test/CodeGen/X86/tailcall-fastisel.ll | 8 +- llvm/test/CodeGen/X86/tailcall-largecode.ll | 2 +- .../test/CodeGen/X86/tailcall-lifetime-end.ll | 13 +- .../CodeGen/X86/tailcall-mem-intrinsics.ll | 36 +- .../CodeGen/X86/tailcall-msvc-conventions.ll | 51 +- llvm/test/CodeGen/X86/tailcall-readnone.ll | 8 +- .../CodeGen/X86/tailcall-returndup-void.ll | 26 +- llvm/test/CodeGen/X86/tailcall-ri64.ll | 17 +- .../CodeGen/X86/tailcall-ssp-split-debug.ll | 4 +- llvm/test/CodeGen/X86/tailcall-stackalign.ll | 2 +- llvm/test/CodeGen/X86/tailcall-structret.ll | 6 +- llvm/test/CodeGen/X86/tailcall-swifttailcc.ll | 16 +- llvm/test/CodeGen/X86/tailcall-tailcc.ll | 16 +- llvm/test/CodeGen/X86/tailcall.ll | 16 +- llvm/test/CodeGen/X86/tailcallbyval.ll | 9 +- llvm/test/CodeGen/X86/tailcallbyval64.ll | 10 +- llvm/test/CodeGen/X86/tailcallfp.ll | 2 +- llvm/test/CodeGen/X86/tailcallfp2.ll | 8 +- llvm/test/CodeGen/X86/tailcc-calleesave.ll | 8 +- llvm/test/CodeGen/X86/tailcc-fastisel.ll | 8 +- llvm/test/CodeGen/X86/tailcc-largecode.ll | 2 +- llvm/test/CodeGen/X86/tailcc-ssp.ll | 6 +- llvm/test/CodeGen/X86/tailcc-stackalign.ll | 2 +- llvm/test/CodeGen/X86/tailcc-structret.ll | 6 +- llvm/test/CodeGen/X86/tailccbyval.ll | 9 +- llvm/test/CodeGen/X86/tailccbyval64.ll | 10 +- llvm/test/CodeGen/X86/tailccfp.ll | 2 +- llvm/test/CodeGen/X86/tailccfp2.ll | 8 +- llvm/test/CodeGen/X86/taildup-crash.ll | 2 +- .../test/CodeGen/X86/taildup-heapallocsite.ll | 18 +- llvm/test/CodeGen/X86/tailregccpic.ll | 2 +- .../test/CodeGen/X86/targetLoweringGeneric.ll | 8 +- .../test/CodeGen/X86/tbm-intrinsics-x86_64.ll | 4 +- llvm/test/CodeGen/X86/tbm-intrinsics.ll | 4 +- llvm/test/CodeGen/X86/tbm_patterns.ll | 12 +- llvm/test/CodeGen/X86/test-shrink-bug.ll | 4 +- llvm/test/CodeGen/X86/testb-je-fusion.ll | 16 +- llvm/test/CodeGen/X86/testl-commute.ll | 18 +- llvm/test/CodeGen/X86/this-return-64.ll | 62 +- llvm/test/CodeGen/X86/thread_pointer-error.ll | 8 +- llvm/test/CodeGen/X86/thread_pointer.ll | 17 +- llvm/test/CodeGen/X86/throws-cfi-fp.ll | 45 +- llvm/test/CodeGen/X86/throws-cfi-no-fp.ll | 45 +- .../CodeGen/X86/tls-addr-non-leaf-function.ll | 2 +- llvm/test/CodeGen/X86/tls-android-negative.ll | 16 +- llvm/test/CodeGen/X86/tls-android.ll | 12 +- llvm/test/CodeGen/X86/tls-loads-control3.ll | 26 +- llvm/test/CodeGen/X86/tls-local-dynamic.ll | 12 +- llvm/test/CodeGen/X86/tls-models.ll | 34 +- llvm/test/CodeGen/X86/tls-no-plt.ll | 8 +- llvm/test/CodeGen/X86/tls-pic.ll | 16 +- llvm/test/CodeGen/X86/tls-pie.ll | 12 +- llvm/test/CodeGen/X86/tls-shrink-wrapping.ll | 6 +- llvm/test/CodeGen/X86/tls-windows-itanium.ll | 4 +- llvm/test/CodeGen/X86/tls.ll | 50 +- llvm/test/CodeGen/X86/tlv-1.ll | 12 +- llvm/test/CodeGen/X86/tlv-2.ll | 8 +- llvm/test/CodeGen/X86/token_landingpad.ll | 2 +- llvm/test/CodeGen/X86/trunc-and.ll | 6 +- llvm/test/CodeGen/X86/trunc-ext-ld-st.ll | 36 +- llvm/test/CodeGen/X86/trunc-to-bool.ll | 8 +- llvm/test/CodeGen/X86/trunc-vector-width.ll | 10 +- llvm/test/CodeGen/X86/twoaddr-coalesce-3.ll | 14 +- llvm/test/CodeGen/X86/twoaddr-coalesce.ll | 6 +- llvm/test/CodeGen/X86/twoaddr-lea.ll | 10 +- llvm/test/CodeGen/X86/typeid-alias.ll | 8 +- llvm/test/CodeGen/X86/uadd_inc_iv.ll | 16 +- llvm/test/CodeGen/X86/uadd_sat_vec.ll | 64 +- llvm/test/CodeGen/X86/uint_to_fp-3.ll | 4 +- llvm/test/CodeGen/X86/uint_to_fp.ll | 4 +- llvm/test/CodeGen/X86/umul-with-carry.ll | 6 +- .../CodeGen/X86/unaligned-32-byte-memops.ll | 88 +- llvm/test/CodeGen/X86/unaligned-load.ll | 8 +- .../CodeGen/X86/unaligned-spill-folding.ll | 27 +- llvm/test/CodeGen/X86/undef-label.ll | 4 +- ...-masked-merge-vector-variablemask-const.ll | 128 +- ...unfold-masked-merge-vector-variablemask.ll | 88 +- .../CodeGen/X86/unreachable-loop-sinking.ll | 2 +- llvm/test/CodeGen/X86/unreachableblockelim.ll | 6 +- llvm/test/CodeGen/X86/unused_stackslots.ll | 180 +- .../CodeGen/X86/unwind-inline-asm-codegen.ll | 10 +- llvm/test/CodeGen/X86/unwindraise.ll | 186 +- .../CodeGen/X86/update-terminator-debugloc.ll | 12 +- llvm/test/CodeGen/X86/urem-seteq.ll | 4 +- llvm/test/CodeGen/X86/use-add-flags.ll | 4 +- llvm/test/CodeGen/X86/usub_inc_iv.ll | 116 +- llvm/test/CodeGen/X86/usub_sat_vec.ll | 70 +- llvm/test/CodeGen/X86/utf16-cfstrings.ll | 10 +- llvm/test/CodeGen/X86/uwtables.ll | 25 +- llvm/test/CodeGen/X86/v2f32.ll | 6 +- llvm/test/CodeGen/X86/v4i32load-crash.ll | 10 +- llvm/test/CodeGen/X86/v8i1-masks.ll | 18 +- llvm/test/CodeGen/X86/vaargs-prolog-insert.ll | 6 +- llvm/test/CodeGen/X86/vaargs-win32.ll | 27 +- llvm/test/CodeGen/X86/vaargs.ll | 64 +- llvm/test/CodeGen/X86/var-permute-128.ll | 4 +- llvm/test/CodeGen/X86/var-permute-512.ll | 4 +- .../test/CodeGen/X86/vararg-callee-cleanup.ll | 24 +- llvm/test/CodeGen/X86/vararg_no_start.ll | 2 +- llvm/test/CodeGen/X86/vararg_tailcall.ll | 78 +- llvm/test/CodeGen/X86/varargs-softfloat.ll | 38 +- .../X86/variable-sized-darwin-bzero.ll | 6 +- llvm/test/CodeGen/X86/vastart-defs-eflags.ll | 4 +- .../CodeGen/X86/vec-loadsingles-alignment.ll | 20 +- .../CodeGen/X86/vec-strict-fptoint-128.ll | 8 +- llvm/test/CodeGen/X86/vec-trunc-store.ll | 12 +- llvm/test/CodeGen/X86/vec3-setcc-crash.ll | 6 +- llvm/test/CodeGen/X86/vec_align.ll | 18 +- llvm/test/CodeGen/X86/vec_align_i256.ll | 2 +- llvm/test/CodeGen/X86/vec_anyext.ll | 28 +- llvm/test/CodeGen/X86/vec_extract-avx.ll | 40 +- llvm/test/CodeGen/X86/vec_extract-mmx.ll | 27 +- llvm/test/CodeGen/X86/vec_extract-sse4.ll | 20 +- llvm/test/CodeGen/X86/vec_extract.ll | 20 +- llvm/test/CodeGen/X86/vec_floor.ll | 8 +- llvm/test/CodeGen/X86/vec_fp_to_int.ll | 8 +- llvm/test/CodeGen/X86/vec_fpext.ll | 22 +- llvm/test/CodeGen/X86/vec_fptrunc.ll | 22 +- llvm/test/CodeGen/X86/vec_i64.ll | 8 +- llvm/test/CodeGen/X86/vec_ins_extract.ll | 42 +- llvm/test/CodeGen/X86/vec_insert-5.ll | 20 +- llvm/test/CodeGen/X86/vec_insert-mmx.ll | 6 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 171 +- llvm/test/CodeGen/X86/vec_loadsingles.ll | 109 +- llvm/test/CodeGen/X86/vec_logical.ll | 8 +- llvm/test/CodeGen/X86/vec_saddo.ll | 52 +- llvm/test/CodeGen/X86/vec_set-7.ll | 5 +- llvm/test/CodeGen/X86/vec_set-F.ll | 5 +- llvm/test/CodeGen/X86/vec_set.ll | 4 +- llvm/test/CodeGen/X86/vec_setcc-2.ll | 20 +- llvm/test/CodeGen/X86/vec_setcc.ll | 4 +- llvm/test/CodeGen/X86/vec_shift5.ll | 8 +- llvm/test/CodeGen/X86/vec_smulo.ll | 60 +- llvm/test/CodeGen/X86/vec_ss_load_fold.ll | 24 +- llvm/test/CodeGen/X86/vec_ssubo.ll | 52 +- llvm/test/CodeGen/X86/vec_trunc_sext.ll | 4 +- llvm/test/CodeGen/X86/vec_uaddo.ll | 52 +- llvm/test/CodeGen/X86/vec_umulo.ll | 60 +- llvm/test/CodeGen/X86/vec_usubo.ll | 52 +- llvm/test/CodeGen/X86/vec_zero.ll | 16 +- llvm/test/CodeGen/X86/vec_zero_cse.ll | 16 +- llvm/test/CodeGen/X86/vecloadextract.ll | 12 +- llvm/test/CodeGen/X86/vector-fshl-128.ll | 9 +- llvm/test/CodeGen/X86/vector-fshl-256.ll | 14 +- llvm/test/CodeGen/X86/vector-gep.ll | 76 +- .../CodeGen/X86/vector-half-conversions.ll | 100 +- llvm/test/CodeGen/X86/vector-idiv-v2i32.ll | 80 +- llvm/test/CodeGen/X86/vector-interleave.ll | 24 +- .../vector-interleaved-load-i16-stride-2.ll | 40 +- .../vector-interleaved-load-i16-stride-3.ll | 50 +- .../vector-interleaved-load-i16-stride-4.ll | 60 +- .../vector-interleaved-load-i16-stride-5.ll | 70 +- .../vector-interleaved-load-i16-stride-6.ll | 80 +- .../vector-interleaved-load-i32-stride-2.ll | 40 +- .../vector-interleaved-load-i32-stride-3.ll | 50 +- .../vector-interleaved-load-i32-stride-4.ll | 60 +- .../vector-interleaved-load-i32-stride-6.ll | 64 +- .../vector-interleaved-load-i64-stride-2.ll | 40 +- .../vector-interleaved-load-i64-stride-3.ll | 40 +- .../vector-interleaved-load-i64-stride-4.ll | 48 +- .../vector-interleaved-load-i64-stride-6.ll | 48 +- .../vector-interleaved-load-i8-stride-2.ll | 40 +- .../vector-interleaved-load-i8-stride-3.ll | 50 +- .../vector-interleaved-load-i8-stride-4.ll | 60 +- .../vector-interleaved-load-i8-stride-6.ll | 80 +- .../vector-interleaved-store-i16-stride-2.ll | 40 +- .../vector-interleaved-store-i16-stride-3.ll | 50 +- .../vector-interleaved-store-i16-stride-4.ll | 60 +- .../vector-interleaved-store-i16-stride-5.ll | 70 +- .../vector-interleaved-store-i16-stride-6.ll | 80 +- .../vector-interleaved-store-i32-stride-2.ll | 40 +- .../vector-interleaved-store-i32-stride-3.ll | 50 +- .../vector-interleaved-store-i32-stride-4.ll | 60 +- .../vector-interleaved-store-i32-stride-6.ll | 64 +- .../vector-interleaved-store-i64-stride-2.ll | 40 +- .../vector-interleaved-store-i64-stride-3.ll | 40 +- .../vector-interleaved-store-i64-stride-4.ll | 48 +- .../vector-interleaved-store-i64-stride-6.ll | 48 +- .../vector-interleaved-store-i8-stride-2.ll | 40 +- .../vector-interleaved-store-i8-stride-3.ll | 50 +- .../vector-interleaved-store-i8-stride-4.ll | 60 +- .../vector-interleaved-store-i8-stride-6.ll | 80 +- llvm/test/CodeGen/X86/vector-intrinsics.ll | 20 +- .../X86/vector-merge-store-fp-constants.ll | 33 +- llvm/test/CodeGen/X86/vector-mul.ll | 12 +- llvm/test/CodeGen/X86/vector-narrow-binop.ll | 2 +- llvm/test/CodeGen/X86/vector-pcmp.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-add.ll | 12 +- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 8 +- llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll | 13 +- llvm/test/CodeGen/X86/vector-sext.ll | 96 +- .../X86/vector-shift-by-select-loop.ll | 118 +- .../CodeGen/X86/vector-shuffle-128-v16.ll | 50 +- .../test/CodeGen/X86/vector-shuffle-128-v2.ll | 52 +- .../test/CodeGen/X86/vector-shuffle-128-v4.ll | 58 +- .../test/CodeGen/X86/vector-shuffle-128-v8.ll | 44 +- .../CodeGen/X86/vector-shuffle-256-v16.ll | 40 +- .../CodeGen/X86/vector-shuffle-256-v32.ll | 28 +- .../test/CodeGen/X86/vector-shuffle-256-v4.ll | 44 +- .../test/CodeGen/X86/vector-shuffle-256-v8.ll | 34 +- .../CodeGen/X86/vector-shuffle-512-v16.ll | 41 +- .../CodeGen/X86/vector-shuffle-512-v32.ll | 36 +- .../CodeGen/X86/vector-shuffle-512-v64.ll | 26 +- .../test/CodeGen/X86/vector-shuffle-512-v8.ll | 16 +- .../test/CodeGen/X86/vector-shuffle-avx512.ll | 32 +- .../X86/vector-shuffle-combining-avx.ll | 20 +- .../X86/vector-shuffle-combining-avx2.ll | 6 +- .../vector-shuffle-combining-avx512bwvl.ll | 24 +- .../X86/vector-shuffle-combining-avx512f.ll | 32 +- .../X86/vector-shuffle-combining-sse41.ll | 6 +- .../X86/vector-shuffle-combining-ssse3.ll | 4 +- .../X86/vector-shuffle-combining-xop.ll | 22 +- .../CodeGen/X86/vector-shuffle-combining.ll | 92 +- .../test/CodeGen/X86/vector-shuffle-masked.ll | 104 +- llvm/test/CodeGen/X86/vector-shuffle-mmx.ll | 14 +- llvm/test/CodeGen/X86/vector-shuffle-sse1.ll | 28 +- llvm/test/CodeGen/X86/vector-shuffle-v192.ll | 16 +- llvm/test/CodeGen/X86/vector-shuffle-v48.ll | 4 +- .../X86/vector-shuffle-variable-128.ll | 82 +- .../X86/vector-shuffle-variable-256.ll | 34 +- llvm/test/CodeGen/X86/vector-sqrt.ll | 24 +- llvm/test/CodeGen/X86/vector-trunc-packus.ll | 80 +- llvm/test/CodeGen/X86/vector-trunc-ssat.ll | 84 +- llvm/test/CodeGen/X86/vector-trunc-usat.ll | 80 +- llvm/test/CodeGen/X86/vector-trunc.ll | 60 +- .../CodeGen/X86/vector-truncate-combine.ll | 2 +- llvm/test/CodeGen/X86/vector-unsigned-cmp.ll | 8 +- llvm/test/CodeGen/X86/vector-variable-idx2.ll | 16 +- .../CodeGen/X86/vector-width-store-merge.ll | 18 +- llvm/test/CodeGen/X86/vector-zext.ll | 64 +- llvm/test/CodeGen/X86/vector-zmov.ll | 16 +- llvm/test/CodeGen/X86/vector.ll | 110 +- llvm/test/CodeGen/X86/vectorcall.ll | 60 +- llvm/test/CodeGen/X86/vfcmp.ll | 2 +- llvm/test/CodeGen/X86/viabs.ll | 4 +- llvm/test/CodeGen/X86/visibility.ll | 4 +- llvm/test/CodeGen/X86/visibility2.ll | 8 +- llvm/test/CodeGen/X86/vmaskmov-offset.ll | 28 +- ...ile-memstores-nooverlapping-load-stores.ll | 30 +- llvm/test/CodeGen/X86/volatile.ll | 10 +- llvm/test/CodeGen/X86/vortex-bug.ll | 6 +- .../X86/vp2intersect_multiple_pairs.ll | 4 +- llvm/test/CodeGen/X86/vsel-cmp-load.ll | 32 +- llvm/test/CodeGen/X86/vselect-avx.ll | 29 +- llvm/test/CodeGen/X86/vselect-avx512.ll | 99 +- llvm/test/CodeGen/X86/vselect-pcmp.ll | 11 +- llvm/test/CodeGen/X86/vselect.ll | 10 +- llvm/test/CodeGen/X86/vshift-1.ll | 24 +- llvm/test/CodeGen/X86/vshift-2.ll | 24 +- llvm/test/CodeGen/X86/vshift-3.ll | 20 +- llvm/test/CodeGen/X86/vshift-4.ll | 28 +- llvm/test/CodeGen/X86/vshift-5.ll | 20 +- llvm/test/CodeGen/X86/vshift-6.ll | 6 +- llvm/test/CodeGen/X86/vshift_scalar.ll | 4 +- llvm/test/CodeGen/X86/vshift_split2.ll | 4 +- .../X86/vshli-simplify-demanded-bits.ll | 2 +- llvm/test/CodeGen/X86/vsplit-and.ll | 8 +- llvm/test/CodeGen/X86/vzero-excess.ll | 8 +- llvm/test/CodeGen/X86/waitpkg-intrinsics.ll | 6 +- llvm/test/CodeGen/X86/warn-stack.ll | 11 +- llvm/test/CodeGen/X86/weak-undef.ll | 16 +- llvm/test/CodeGen/X86/weak.ll | 4 +- .../CodeGen/X86/weak_def_can_be_hidden.ll | 12 +- llvm/test/CodeGen/X86/widen_arith-1.ll | 38 +- llvm/test/CodeGen/X86/widen_arith-2.ll | 60 +- llvm/test/CodeGen/X86/widen_arith-3.ll | 40 +- llvm/test/CodeGen/X86/widen_arith-4.ll | 40 +- llvm/test/CodeGen/X86/widen_arith-5.ll | 40 +- llvm/test/CodeGen/X86/widen_arith-6.ll | 42 +- llvm/test/CodeGen/X86/widen_cast-1.ll | 34 +- llvm/test/CodeGen/X86/widen_cast-2.ll | 34 +- llvm/test/CodeGen/X86/widen_cast-3.ll | 4 +- llvm/test/CodeGen/X86/widen_cast-4.ll | 60 +- llvm/test/CodeGen/X86/widen_cast-5.ll | 4 +- llvm/test/CodeGen/X86/widen_compare-1.ll | 10 +- llvm/test/CodeGen/X86/widen_conv-1.ll | 16 +- llvm/test/CodeGen/X86/widen_conv-2.ll | 4 +- llvm/test/CodeGen/X86/widen_conv-3.ll | 10 +- llvm/test/CodeGen/X86/widen_conv-4.ll | 10 +- llvm/test/CodeGen/X86/widen_conversions.ll | 4 +- llvm/test/CodeGen/X86/widen_extract-1.ll | 4 +- llvm/test/CodeGen/X86/widen_load-0.ll | 10 +- llvm/test/CodeGen/X86/widen_load-1.ll | 25 +- llvm/test/CodeGen/X86/widen_load-2.ll | 95 +- llvm/test/CodeGen/X86/widen_load-3.ll | 37 +- llvm/test/CodeGen/X86/widen_shuffle-1.ll | 16 +- llvm/test/CodeGen/X86/widened-broadcast.ll | 104 +- llvm/test/CodeGen/X86/win-alloca-expander.ll | 36 +- llvm/test/CodeGen/X86/win-catchpad-csrs.ll | 24 +- .../CodeGen/X86/win-catchpad-nested-cxx.ll | 6 +- llvm/test/CodeGen/X86/win-catchpad-nested.ll | 2 +- llvm/test/CodeGen/X86/win-catchpad-varargs.ll | 20 +- llvm/test/CodeGen/X86/win-catchpad.ll | 34 +- llvm/test/CodeGen/X86/win-cleanuppad.ll | 18 +- llvm/test/CodeGen/X86/win-funclet-cfi.ll | 4 +- .../CodeGen/X86/win-mixed-ehpersonality.ll | 24 +- .../X86/win32-eh-available-externally.ll | 4 +- llvm/test/CodeGen/X86/win32-eh-states.ll | 34 +- llvm/test/CodeGen/X86/win32-eh.ll | 20 +- llvm/test/CodeGen/X86/win32-preemption.ll | 108 +- .../CodeGen/X86/win32-seh-catchpad-realign.ll | 9 +- llvm/test/CodeGen/X86/win32-seh-catchpad.ll | 74 +- .../CodeGen/X86/win32-seh-nested-finally.ll | 2 +- llvm/test/CodeGen/X86/win32-spill-xmm.ll | 28 +- llvm/test/CodeGen/X86/win32-ssp.ll | 12 +- llvm/test/CodeGen/X86/win32_sret.ll | 54 +- llvm/test/CodeGen/X86/win64-byval.ll | 12 +- llvm/test/CodeGen/X86/win64-eh-empty-block.ll | 69 +- .../X86/win64-eh-trailing-statepoint.ll | 6 +- .../test/CodeGen/X86/win64-funclet-savexmm.ll | 34 +- llvm/test/CodeGen/X86/win64-long-double.ll | 4 +- .../CodeGen/X86/win64_alloca_dynalloca.ll | 6 +- llvm/test/CodeGen/X86/win64_call_epi.ll | 8 +- llvm/test/CodeGen/X86/win64_eh.ll | 46 +- llvm/test/CodeGen/X86/win64_eh_leaf2.ll | 2 +- llvm/test/CodeGen/X86/win64_frame.ll | 47 +- llvm/test/CodeGen/X86/win64_regcall.ll | 2 +- llvm/test/CodeGen/X86/win64_sibcall.ll | 16 +- llvm/test/CodeGen/X86/win64_vararg.ll | 74 +- llvm/test/CodeGen/X86/win_chkstk.ll | 6 +- llvm/test/CodeGen/X86/win_coreclr_chkstk.ll | 6 +- .../CodeGen/X86/windows-itanium-alloca.ll | 4 +- llvm/test/CodeGen/X86/wineh-coreclr.ll | 18 +- .../CodeGen/X86/wineh-exceptionpointer.ll | 11 +- llvm/test/CodeGen/X86/wineh-no-ehpads.ll | 2 +- llvm/test/CodeGen/X86/x32-cet-intrinsics.ll | 24 +- .../CodeGen/X86/x32-function_pointer-1.ll | 14 +- .../CodeGen/X86/x32-function_pointer-2.ll | 8 +- .../CodeGen/X86/x32-function_pointer-3.ll | 2 +- llvm/test/CodeGen/X86/x32-indirectbr.ll | 8 +- llvm/test/CodeGen/X86/x32-landingpad.ll | 12 +- llvm/test/CodeGen/X86/x32-lea-1.ll | 6 +- llvm/test/CodeGen/X86/x32-movtopush64.ll | 22 +- llvm/test/CodeGen/X86/x32-va_start.ll | 49 +- llvm/test/CodeGen/X86/x64-cet-intrinsics.ll | 36 +- llvm/test/CodeGen/X86/x86-16.ll | 2 +- llvm/test/CodeGen/X86/x86-32-intrcc.ll | 48 +- llvm/test/CodeGen/X86/x86-64-asm.ll | 2 +- llvm/test/CodeGen/X86/x86-64-baseptr.ll | 2 +- llvm/test/CodeGen/X86/x86-64-disp.ll | 4 +- llvm/test/CodeGen/X86/x86-64-gv-offset.ll | 6 +- llvm/test/CodeGen/X86/x86-64-intrcc-nosse.ll | 4 +- llvm/test/CodeGen/X86/x86-64-intrcc-uintr.ll | 23 +- llvm/test/CodeGen/X86/x86-64-intrcc.ll | 48 +- llvm/test/CodeGen/X86/x86-64-jumps.ll | 22 +- llvm/test/CodeGen/X86/x86-64-mem.ll | 24 +- llvm/test/CodeGen/X86/x86-64-ms_abi-vararg.ll | 65 +- llvm/test/CodeGen/X86/x86-64-pic-10.ll | 2 +- llvm/test/CodeGen/X86/x86-64-pic-12.ll | 8 +- llvm/test/CodeGen/X86/x86-64-pic-4.ll | 2 +- llvm/test/CodeGen/X86/x86-64-pic-5.ll | 2 +- llvm/test/CodeGen/X86/x86-64-pic-6.ll | 2 +- llvm/test/CodeGen/X86/x86-64-pic-7.ll | 4 +- llvm/test/CodeGen/X86/x86-64-pic-8.ll | 4 +- llvm/test/CodeGen/X86/x86-64-pic-9.ll | 4 +- llvm/test/CodeGen/X86/x86-64-pic.ll | 4 +- .../CodeGen/X86/x86-64-plt-relative-reloc.ll | 8 +- .../test/CodeGen/X86/x86-64-ptr-arg-simple.ll | 10 +- llvm/test/CodeGen/X86/x86-64-sret-return-2.ll | 2 +- llvm/test/CodeGen/X86/x86-64-sret-return.ll | 86 +- .../CodeGen/X86/x86-64-stack-and-frame-ptr.ll | 8 +- .../CodeGen/X86/x86-64-static-relo-movl.ll | 9 +- llvm/test/CodeGen/X86/x86-64-tls-1.ll | 2 +- llvm/test/CodeGen/X86/x86-64-varargs.ll | 54 +- llvm/test/CodeGen/X86/x86-big-ret.ll | 4 +- llvm/test/CodeGen/X86/x86-cmov-converter.ll | 159 +- .../CodeGen/X86/x86-interleaved-access.ll | 124 +- .../test/CodeGen/X86/x86-interleaved-check.ll | 3 +- llvm/test/CodeGen/X86/x86-interrupt_cc.ll | 2 +- llvm/test/CodeGen/X86/x86-interrupt_cld.ll | 2 +- .../CodeGen/X86/x86-interrupt_vzeroupper.ll | 2 +- .../X86/x86-mixed-alignment-dagcombine.ll | 8 +- .../X86/x86-no_callee_saved_registers.ll | 4 +- .../X86/x86-no_caller_saved_registers.ll | 4 +- .../CodeGen/X86/x86-plt-relative-reloc.ll | 6 +- llvm/test/CodeGen/X86/x86-regcall-got.ll | 4 +- .../CodeGen/X86/x86-repmov-copy-eflags.ll | 28 +- .../X86/x86-sanitizer-shrink-wrapping.ll | 6 +- .../X86/x86-setcc-int-to-fp-combine.ll | 12 +- .../CodeGen/X86/x86-shrink-wrap-unwind.ll | 52 +- llvm/test/CodeGen/X86/x86-shrink-wrapping.ll | 107 +- llvm/test/CodeGen/X86/x86-store-gv-addr.ll | 4 +- .../CodeGen/X86/x86-upgrade-avx-vbroadcast.ll | 27 +- .../X86/x86-upgrade-avx2-vbroadcast.ll | 9 +- llvm/test/CodeGen/X86/x87.ll | 8 +- llvm/test/CodeGen/X86/xaluo.ll | 100 +- llvm/test/CodeGen/X86/xaluo128.ll | 16 +- llvm/test/CodeGen/X86/xchg-nofold.ll | 11 +- llvm/test/CodeGen/X86/xmm-vararg-noopt.ll | 24 +- llvm/test/CodeGen/X86/xmulo.ll | 128 +- .../X86/xop-intrinsics-x86_64-upgrade.ll | 28 +- .../test/CodeGen/X86/xop-intrinsics-x86_64.ll | 76 +- llvm/test/CodeGen/X86/xor-icmp.ll | 4 +- .../test/CodeGen/X86/xor-select-i1-combine.ll | 8 +- llvm/test/CodeGen/X86/xor.ll | 13 +- llvm/test/CodeGen/X86/xray-custom-log.ll | 20 +- llvm/test/CodeGen/X86/ymm-ordering.ll | 8 +- llvm/test/CodeGen/X86/zext-demanded.ll | 4 +- llvm/test/CodeGen/X86/zext-extract_subreg.ll | 2 +- .../CodeGen/X86/zext-logicop-shift-load.ll | 32 +- llvm/test/CodeGen/X86/zext-sext.ll | 20 +- llvm/test/CodeGen/X86/zlib-longest-match.ll | 180 +- llvm/test/CodeGen/X86/znver3-gather.ll | 20 +- 2605 files changed, 48396 insertions(+), 50836 deletions(-) diff --git a/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll b/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll index 7fdb070081a1e..79bd0fc5126e7 100644 --- a/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll +++ b/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll @@ -1,22 +1,22 @@ ; RUN: llc < %s -mtriple=i686-- | FileCheck %s -declare i8* @llvm.returnaddress(i32) +declare ptr @llvm.returnaddress(i32) -declare i8* @llvm.frameaddress(i32) +declare ptr @llvm.frameaddress(i32) -define i8* @test1() { +define ptr @test1() { ; CHECK-LABEL: test1: entry: - %X = call i8* @llvm.returnaddress( i32 0 ) - ret i8* %X + %X = call ptr @llvm.returnaddress( i32 0 ) + ret ptr %X ; CHECK: movl {{.*}}(%esp), %eax } -define i8* @test2() { +define ptr @test2() { ; CHECK-LABEL: test2: entry: - %X = call i8* @llvm.frameaddress( i32 0 ) - ret i8* %X + %X = call ptr @llvm.frameaddress( i32 0 ) + ret ptr %X ; CHECK: pushl %ebp ; CHECK: popl %ebp } diff --git a/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll b/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll index 97d8ff5ac1281..ea89d1437cf23 100644 --- a/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll @@ -7,12 +7,12 @@ @GLOBAL = external dso_local global i32 -define i32 @test(i32* %P1, i32* %P2, i32* %P3) nounwind { +define i32 @test(ptr %P1, ptr %P2, ptr %P3) nounwind { ; CHECK-LABEL: test: entry: - %L = load i32, i32* @GLOBAL - store i32 12, i32* %P2 - %Y = load i32, i32* %P3 + %L = load i32, ptr @GLOBAL + store i32 12, ptr %P2 + %Y = load i32, ptr %P3 %Z = sub i32 %Y, %L ret i32 %Z ; CHECK-NOT: {{sub.*GLOBAL}} diff --git a/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll b/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll index 16fea863b494a..b913fc34a526d 100644 --- a/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll +++ b/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=i686-- | FileCheck %s -@A = external global i32 ; [#uses=1] -@Y = global i32* getelementptr (i32, i32* @A, i32 -1) ; [#uses=0] +@A = external global i32 ; [#uses=1] +@Y = global ptr getelementptr (i32, ptr @A, i32 -1) ; [#uses=0] ; CHECK-NOT: 18446744073709551612 diff --git a/llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll b/llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll index 771a5124a1fa9..54ccbf504a5c3 100644 --- a/llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll +++ b/llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll @@ -18,14 +18,14 @@ define i32 @test5(i32 %B, i8 %C) { ; CHECK-NEXT: movl %eax, A ; CHECK-NEXT: retl entry: - %tmp.1 = load i32, i32* @A + %tmp.1 = load i32, ptr @A %shift.upgrd.1 = zext i8 %C to i32 %tmp.2 = shl i32 %tmp.1, %shift.upgrd.1 %tmp.3 = sub i8 32, %C %shift.upgrd.2 = zext i8 %tmp.3 to i32 %tmp.4 = lshr i32 %B, %shift.upgrd.2 %tmp.5 = or i32 %tmp.4, %tmp.2 - store i32 %tmp.5, i32* @A + store i32 %tmp.5, ptr @A ret i32 %tmp.5 } diff --git a/llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll b/llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll index ddcc7e2a6d15c..4e99508cfe16f 100644 --- a/llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll +++ b/llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll @@ -6,7 +6,7 @@ target triple = "i686-apple-darwin8.6.1" %struct.GLTColor4 = type { float, float, float, float } %struct.GLTCoord3 = type { float, float, float } %struct.__GLIContextRec = type { { %struct.anon, { [24 x [16 x float]], [24 x [16 x float]] }, %struct.GLTColor4, { float, float, float, float, %struct.GLTCoord3, float } }, { float, float, float, float, float, float, float, float, [4 x i32], [4 x i32], [4 x i32] } } - %struct.__GLvertex = type { %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTCoord3, float, %struct.GLTColor4, float, float, float, i8, i8, i8, i8, [4 x float], [2 x i8*], i32, i32, [16 x %struct.GLTColor4] } + %struct.__GLvertex = type { %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTCoord3, float, %struct.GLTColor4, float, float, float, i8, i8, i8, i8, [4 x float], [2 x ptr], i32, i32, [16 x %struct.GLTColor4] } %struct.anon = type { float, float, float, float, float, float, float, float } declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) @@ -45,6 +45,6 @@ cond_false183: ; preds = %cond_false, %entry %tmp446 = zext i8 %tmp436 to i32 ; [#uses=1] %tmp447 = shl i32 %tmp446, 24 ; [#uses=1] %tmp449 = or i32 0, %tmp447 ; [#uses=1] - store i32 %tmp449, i32* null + store i32 %tmp449, ptr null ret void } diff --git a/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll b/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll index 982cc9e6e9fce..0044d1c356837 100644 --- a/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll +++ b/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll @@ -1,8 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-apple-darwin8 -relocation-model=static | FileCheck %s -@block = external global i8* ; [#uses=1] -@last = external global i32 ; [#uses=3] +@block = external global ptr ; [#uses=1] +@last = external global i32 ; [#uses=3] define i1 @loadAndRLEsource_no_exit_2E_1_label_2E_0(i32 %tmp.21.reload, i32 %tmp.8) { ; CHECK-LABEL: loadAndRLEsource_no_exit_2E_1_label_2E_0: @@ -37,14 +37,14 @@ label.0.no_exit.1_crit_edge.exitStub: ; preds = %label.0 codeRepl5.exitStub: ; preds = %label.0 ret i1 false label.0: ; preds = %newFuncRoot - %tmp.35 = load i32, i32* @last ; [#uses=1] + %tmp.35 = load i32, ptr @last ; [#uses=1] %inc.1 = add i32 %tmp.35, 1 ; [#uses=2] - store i32 %inc.1, i32* @last - %tmp.36 = load i8*, i8** @block ; [#uses=1] - %tmp.38 = getelementptr i8, i8* %tmp.36, i32 %inc.1 ; [#uses=1] + store i32 %inc.1, ptr @last + %tmp.36 = load ptr, ptr @block ; [#uses=1] + %tmp.38 = getelementptr i8, ptr %tmp.36, i32 %inc.1 ; [#uses=1] %tmp.40 = trunc i32 %tmp.21.reload to i8 ; [#uses=1] - store i8 %tmp.40, i8* %tmp.38 - %tmp.910 = load i32, i32* @last ; [#uses=1] + store i8 %tmp.40, ptr %tmp.38 + %tmp.910 = load i32, ptr @last ; [#uses=1] %tmp.1111 = icmp slt i32 %tmp.910, %tmp.8 ; [#uses=1] %tmp.1412 = icmp ne i32 %tmp.21.reload, 257 ; [#uses=1] %tmp.1613 = and i1 %tmp.1111, %tmp.1412 ; [#uses=1] diff --git a/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll b/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll index 6f2fadbe8ca60..5bc884d290297 100644 --- a/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll +++ b/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll @@ -4,11 +4,11 @@ ; END. -define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %d) { - %tmp44 = load <4 x float>, <4 x float>* %a ; <<4 x float>> [#uses=9] - %tmp46 = load <4 x float>, <4 x float>* %b ; <<4 x float>> [#uses=1] - %tmp48 = load <4 x float>, <4 x float>* %c ; <<4 x float>> [#uses=1] - %tmp50 = load <4 x float>, <4 x float>* %d ; <<4 x float>> [#uses=1] +define i32 @foo(ptr %a, ptr %b, ptr %c, ptr %d) { + %tmp44 = load <4 x float>, ptr %a ; <<4 x float>> [#uses=9] + %tmp46 = load <4 x float>, ptr %b ; <<4 x float>> [#uses=1] + %tmp48 = load <4 x float>, ptr %c ; <<4 x float>> [#uses=1] + %tmp50 = load <4 x float>, ptr %d ; <<4 x float>> [#uses=1] %tmp51 = bitcast <4 x float> %tmp44 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp = shufflevector <4 x i32> %tmp51, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2] %tmp52 = bitcast <4 x i32> %tmp to <4 x float> ; <<4 x float>> [#uses=1] @@ -23,7 +23,7 @@ define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %tmp.upgrd.1 = shufflevector <8 x i16> %tmp102, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1] %tmp105 = shufflevector <8 x i16> %tmp.upgrd.1, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1] %tmp105.upgrd.2 = bitcast <8 x i16> %tmp105 to <4 x float> ; <<4 x float>> [#uses=1] - store <4 x float> %tmp105.upgrd.2, <4 x float>* %a + store <4 x float> %tmp105.upgrd.2, ptr %a %tmp108 = bitcast <4 x float> %tmp46 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp109 = shufflevector <4 x i32> %tmp108, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2] %tmp109.upgrd.3 = bitcast <4 x i32> %tmp109 to <4 x float> ; <<4 x float>> [#uses=1] @@ -38,7 +38,7 @@ define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1] %tmp166 = shufflevector <8 x i16> %tmp164, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1] %tmp166.upgrd.4 = bitcast <8 x i16> %tmp166 to <4 x float> ; <<4 x float>> [#uses=1] - store <4 x float> %tmp166.upgrd.4, <4 x float>* %b + store <4 x float> %tmp166.upgrd.4, ptr %b %tmp169 = bitcast <4 x float> %tmp48 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp170 = shufflevector <4 x i32> %tmp169, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2] %tmp170.upgrd.5 = bitcast <4 x i32> %tmp170 to <4 x float> ; <<4 x float>> [#uses=1] @@ -53,7 +53,7 @@ define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %tmp225 = shufflevector <8 x i16> %tmp224, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1] %tmp227 = shufflevector <8 x i16> %tmp225, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1] %tmp227.upgrd.6 = bitcast <8 x i16> %tmp227 to <4 x float> ; <<4 x float>> [#uses=1] - store <4 x float> %tmp227.upgrd.6, <4 x float>* %c + store <4 x float> %tmp227.upgrd.6, ptr %c %tmp230 = bitcast <4 x float> %tmp50 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp231 = shufflevector <4 x i32> %tmp230, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2] %tmp231.upgrd.7 = bitcast <4 x i32> %tmp231 to <4 x float> ; <<4 x float>> [#uses=1] @@ -68,7 +68,7 @@ define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %tmp286 = shufflevector <8 x i16> %tmp285, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1] %tmp288 = shufflevector <8 x i16> %tmp286, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1] %tmp288.upgrd.8 = bitcast <8 x i16> %tmp288 to <4 x float> ; <<4 x float>> [#uses=1] - store <4 x float> %tmp288.upgrd.8, <4 x float>* %d + store <4 x float> %tmp288.upgrd.8, ptr %d ret i32 0 } diff --git a/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll b/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll index 5600ffa88eca4..8165395c7e655 100644 --- a/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll +++ b/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll @@ -5,22 +5,20 @@ ; It's possible to schedule this in 14 instructions by avoiding ; callee-save registers, but the scheduler isn't currently that ; conervative with registers. -@size20 = external dso_local global i32 ; [#uses=1] -@in5 = external dso_local global i8* ; [#uses=1] +@size20 = external dso_local global i32 ; [#uses=1] +@in5 = external dso_local global ptr ; [#uses=1] -define i32 @compare(i8* %a, i8* %b) nounwind { - %tmp = bitcast i8* %a to i32* ; [#uses=1] - %tmp1 = bitcast i8* %b to i32* ; [#uses=1] - %tmp.upgrd.1 = load i32, i32* @size20 ; [#uses=1] - %tmp.upgrd.2 = load i8*, i8** @in5 ; [#uses=2] - %tmp3 = load i32, i32* %tmp1 ; [#uses=1] +define i32 @compare(ptr %a, ptr %b) nounwind { + %tmp.upgrd.1 = load i32, ptr @size20 ; [#uses=1] + %tmp.upgrd.2 = load ptr, ptr @in5 ; [#uses=2] + %tmp3 = load i32, ptr %b ; [#uses=1] %gep.upgrd.3 = zext i32 %tmp3 to i64 ; [#uses=1] - %tmp4 = getelementptr i8, i8* %tmp.upgrd.2, i64 %gep.upgrd.3 ; [#uses=2] - %tmp7 = load i32, i32* %tmp ; [#uses=1] + %tmp4 = getelementptr i8, ptr %tmp.upgrd.2, i64 %gep.upgrd.3 ; [#uses=2] + %tmp7 = load i32, ptr %a ; [#uses=1] %gep.upgrd.4 = zext i32 %tmp7 to i64 ; [#uses=1] - %tmp8 = getelementptr i8, i8* %tmp.upgrd.2, i64 %gep.upgrd.4 ; [#uses=2] - %tmp.upgrd.5 = tail call i32 @memcmp( i8* %tmp8, i8* %tmp4, i32 %tmp.upgrd.1 ) ; [#uses=1] + %tmp8 = getelementptr i8, ptr %tmp.upgrd.2, i64 %gep.upgrd.4 ; [#uses=2] + %tmp.upgrd.5 = tail call i32 @memcmp( ptr %tmp8, ptr %tmp4, i32 %tmp.upgrd.1 ) ; [#uses=1] ret i32 %tmp.upgrd.5 } -declare i32 @memcmp(i8*, i8*, i32) +declare i32 @memcmp(ptr, ptr, i32) diff --git a/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll b/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll index f5be3a3e2bff5..e311161239388 100644 --- a/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll +++ b/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll @@ -2,23 +2,23 @@ ; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | \ ; RUN: grep asm-printer | grep 13 -define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind { +define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(ptr %tmp435.i, ptr %tmp449.i.out) nounwind { newFuncRoot: br label %cond_true456.i bb459.i.exitStub: ; preds = %cond_true456.i - store i32 %tmp449.i, i32* %tmp449.i.out + store i32 %tmp449.i, ptr %tmp449.i.out ret void cond_true456.i: ; preds = %cond_true456.i, %newFuncRoot - %__s441.2.4.i = phi i8* [ %tmp451.i.upgrd.1, %cond_true456.i ], [ %tmp435.i, %newFuncRoot ] ; [#uses=2] + %__s441.2.4.i = phi ptr [ %tmp451.i.upgrd.1, %cond_true456.i ], [ %tmp435.i, %newFuncRoot ] ; [#uses=2] %__h.2.4.i = phi i32 [ %tmp449.i, %cond_true456.i ], [ 0, %newFuncRoot ] ; [#uses=1] %tmp446.i = mul i32 %__h.2.4.i, 5 ; [#uses=1] - %tmp.i = load i8, i8* %__s441.2.4.i ; [#uses=1] + %tmp.i = load i8, ptr %__s441.2.4.i ; [#uses=1] %tmp448.i = sext i8 %tmp.i to i32 ; [#uses=1] %tmp449.i = add i32 %tmp448.i, %tmp446.i ; [#uses=2] - %tmp450.i = ptrtoint i8* %__s441.2.4.i to i32 ; [#uses=1] + %tmp450.i = ptrtoint ptr %__s441.2.4.i to i32 ; [#uses=1] %tmp451.i = add i32 %tmp450.i, 1 ; [#uses=1] - %tmp451.i.upgrd.1 = inttoptr i32 %tmp451.i to i8* ; [#uses=2] - %tmp45435.i = load i8, i8* %tmp451.i.upgrd.1 ; [#uses=1] + %tmp451.i.upgrd.1 = inttoptr i32 %tmp451.i to ptr ; [#uses=2] + %tmp45435.i = load i8, ptr %tmp451.i.upgrd.1 ; [#uses=1] %tmp45536.i = icmp eq i8 %tmp45435.i, 0 ; [#uses=1] br i1 %tmp45536.i, label %bb459.i.exitStub, label %cond_true456.i } diff --git a/llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll b/llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll index ad2cf25339bb3..88e745491d879 100644 --- a/llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll +++ b/llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll @@ -4,8 +4,8 @@ ; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s -@B = external dso_local global i32 ; [#uses=2] -@C = external dso_local global i16* ; [#uses=2] +@B = external dso_local global i32 ; [#uses=2] +@C = external dso_local global ptr ; [#uses=2] define void @test(i32 %A) { ; CHECK-LABEL: test: @@ -18,17 +18,17 @@ define void @test(i32 %A) { ; CHECK-NEXT: addl %eax, C ; CHECK-NEXT: retl %A.upgrd.1 = trunc i32 %A to i8 ; [#uses=1] - %tmp2 = load i32, i32* @B ; [#uses=1] + %tmp2 = load i32, ptr @B ; [#uses=1] %tmp3 = and i8 %A.upgrd.1, 16 ; [#uses=1] %shift.upgrd.2 = zext i8 %tmp3 to i32 ; [#uses=1] %tmp4 = shl i32 %tmp2, %shift.upgrd.2 ; [#uses=1] - store i32 %tmp4, i32* @B + store i32 %tmp4, ptr @B %tmp6 = lshr i32 %A, 3 ; [#uses=1] - %tmp = load i16*, i16** @C ; [#uses=1] - %tmp8 = ptrtoint i16* %tmp to i32 ; [#uses=1] + %tmp = load ptr, ptr @C ; [#uses=1] + %tmp8 = ptrtoint ptr %tmp to i32 ; [#uses=1] %tmp9 = add i32 %tmp8, %tmp6 ; [#uses=1] - %tmp9.upgrd.3 = inttoptr i32 %tmp9 to i16* ; [#uses=1] - store i16* %tmp9.upgrd.3, i16** @C + %tmp9.upgrd.3 = inttoptr i32 %tmp9 to ptr ; [#uses=1] + store ptr %tmp9.upgrd.3, ptr @C ret void } diff --git a/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll b/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll index 49478c593a7ae..61f97a0224c75 100644 --- a/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll +++ b/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll @@ -1,9 +1,9 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s -@A = external dso_local global i16* ; [#uses=1] -@B = external dso_local global i32 ; [#uses=1] -@C = external dso_local global i32 ; [#uses=2] +@A = external dso_local global ptr ; [#uses=1] +@B = external dso_local global i32 ; [#uses=1] +@C = external dso_local global i32 ; [#uses=2] define void @test() { ; CHECK-LABEL: test: @@ -19,13 +19,13 @@ define void @test() { ; CHECK-NEXT: orl %edx, %eax ; CHECK-NEXT: movl %eax, C ; CHECK-NEXT: retl - %tmp = load i16*, i16** @A ; [#uses=1] - %tmp1 = getelementptr i16, i16* %tmp, i32 1 ; [#uses=1] - %tmp.upgrd.1 = load i16, i16* %tmp1 ; [#uses=1] + %tmp = load ptr, ptr @A ; [#uses=1] + %tmp1 = getelementptr i16, ptr %tmp, i32 1 ; [#uses=1] + %tmp.upgrd.1 = load i16, ptr %tmp1 ; [#uses=1] %tmp3 = zext i16 %tmp.upgrd.1 to i32 ; [#uses=1] - %tmp.upgrd.2 = load i32, i32* @B ; [#uses=1] + %tmp.upgrd.2 = load i32, ptr @B ; [#uses=1] %tmp4 = and i32 %tmp.upgrd.2, 16 ; [#uses=1] - %tmp5 = load i32, i32* @C ; [#uses=1] + %tmp5 = load i32, ptr @C ; [#uses=1] %tmp6 = trunc i32 %tmp4 to i8 ; [#uses=2] %shift.upgrd.3 = zext i8 %tmp6 to i32 ; [#uses=1] %tmp7 = shl i32 %tmp5, %shift.upgrd.3 ; [#uses=1] @@ -33,7 +33,7 @@ define void @test() { %shift.upgrd.4 = zext i8 %tmp9 to i32 ; [#uses=1] %tmp11 = lshr i32 %tmp3, %shift.upgrd.4 ; [#uses=1] %tmp12 = or i32 %tmp11, %tmp7 ; [#uses=1] - store i32 %tmp12, i32* @C + store i32 %tmp12, ptr @C ret void } diff --git a/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll b/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll index d4732a62a4f77..a8fecba27bf3c 100644 --- a/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll +++ b/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll @@ -3,7 +3,7 @@ ; RUN: grep "asm-printer" | grep 33 target datalayout = "e-p:32:32" -define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) nounwind { +define void @foo(ptr %mc, ptr %bp, ptr %ms, ptr %xmb, ptr %mpp, ptr %tpmm, ptr %ip, ptr %tpim, ptr %dpp, ptr %tpdm, ptr %bpi, i32 %M) nounwind { entry: %tmp9 = icmp slt i32 %M, 5 ; [#uses=1] br i1 %tmp9, label %return, label %cond_true @@ -13,21 +13,17 @@ cond_true: ; preds = %cond_true, %entry %tmp. = shl i32 %indvar, 2 ; [#uses=1] %tmp.10 = add nsw i32 %tmp., 1 ; [#uses=2] %tmp31 = add nsw i32 %tmp.10, -1 ; [#uses=4] - %tmp32 = getelementptr i32, i32* %mpp, i32 %tmp31 ; [#uses=1] - %tmp34 = bitcast i32* %tmp32 to <16 x i8>* ; [#uses=1] - %tmp = load <16 x i8>, <16 x i8>* %tmp34, align 1 - %tmp42 = getelementptr i32, i32* %tpmm, i32 %tmp31 ; [#uses=1] - %tmp42.upgrd.1 = bitcast i32* %tmp42 to <4 x i32>* ; <<4 x i32>*> [#uses=1] - %tmp46 = load <4 x i32>, <4 x i32>* %tmp42.upgrd.1 ; <<4 x i32>> [#uses=1] + %tmp32 = getelementptr i32, ptr %mpp, i32 %tmp31 ; [#uses=1] + %tmp = load <16 x i8>, ptr %tmp32, align 1 + %tmp42 = getelementptr i32, ptr %tpmm, i32 %tmp31 ; [#uses=1] + %tmp46 = load <4 x i32>, ptr %tmp42 ; <<4 x i32>> [#uses=1] %tmp54 = bitcast <16 x i8> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp55 = add <4 x i32> %tmp54, %tmp46 ; <<4 x i32>> [#uses=2] %tmp55.upgrd.2 = bitcast <4 x i32> %tmp55 to <2 x i64> ; <<2 x i64>> [#uses=1] - %tmp62 = getelementptr i32, i32* %ip, i32 %tmp31 ; [#uses=1] - %tmp65 = bitcast i32* %tmp62 to <16 x i8>* ; [#uses=1] - %tmp66 = load <16 x i8>, <16 x i8>* %tmp65, align 1 - %tmp73 = getelementptr i32, i32* %tpim, i32 %tmp31 ; [#uses=1] - %tmp73.upgrd.3 = bitcast i32* %tmp73 to <4 x i32>* ; <<4 x i32>*> [#uses=1] - %tmp77 = load <4 x i32>, <4 x i32>* %tmp73.upgrd.3 ; <<4 x i32>> [#uses=1] + %tmp62 = getelementptr i32, ptr %ip, i32 %tmp31 ; [#uses=1] + %tmp66 = load <16 x i8>, ptr %tmp62, align 1 + %tmp73 = getelementptr i32, ptr %tpim, i32 %tmp31 ; [#uses=1] + %tmp77 = load <4 x i32>, ptr %tmp73 ; <<4 x i32>> [#uses=1] %tmp87 = bitcast <16 x i8> %tmp66 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp88 = add <4 x i32> %tmp87, %tmp77 ; <<4 x i32>> [#uses=2] %tmp88.upgrd.4 = bitcast <4 x i32> %tmp88 to <2 x i64> ; <<2 x i64>> [#uses=1] @@ -37,9 +33,8 @@ cond_true: ; preds = %cond_true, %entry %tmp111 = and <2 x i64> %tmp110, %tmp55.upgrd.2 ; <<2 x i64>> [#uses=1] %tmp121 = and <2 x i64> %tmp99.upgrd.5, %tmp88.upgrd.4 ; <<2 x i64>> [#uses=1] %tmp131 = or <2 x i64> %tmp121, %tmp111 ; <<2 x i64>> [#uses=1] - %tmp137 = getelementptr i32, i32* %mc, i32 %tmp.10 ; [#uses=1] - %tmp137.upgrd.7 = bitcast i32* %tmp137 to <2 x i64>* ; <<2 x i64>*> [#uses=1] - store <2 x i64> %tmp131, <2 x i64>* %tmp137.upgrd.7 + %tmp137 = getelementptr i32, ptr %mc, i32 %tmp.10 ; [#uses=1] + store <2 x i64> %tmp131, ptr %tmp137 %tmp147 = add nsw i32 %tmp.10, 8 ; [#uses=1] %tmp.upgrd.8 = icmp ne i32 %tmp147, %M ; [#uses=1] %indvar.next = add i32 %indvar, 1 ; [#uses=1] diff --git a/llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll index 987a229d4271a..069d77ed689e2 100644 --- a/llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll @@ -6,7 +6,7 @@ cond_true12: ; preds = %0 ret i32 0 cond_next33: ; preds = %0 %tmp44.i = call double @foo( double 0.000000e+00, i32 32 ) ; [#uses=1] - %tmp61.i = load i8, i8* null ; [#uses=1] + %tmp61.i = load i8, ptr null ; [#uses=1] %tmp61.i.upgrd.1 = zext i8 %tmp61.i to i32 ; [#uses=1] %tmp58.i = or i32 0, %tmp61.i.upgrd.1 ; [#uses=1] %tmp62.i = or i32 %tmp58.i, 0 ; [#uses=1] diff --git a/llvm/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll b/llvm/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll index fe3c7cfa3d7d7..ff7ffd33b7a39 100644 --- a/llvm/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll +++ b/llvm/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll @@ -6,7 +6,7 @@ target triple = "i686-pc-linux-gnu" define void @_ZN5() { cond_true9: - %tmp3.i.i = call i32 asm sideeffect "lock; cmpxchg $1,$2", "={ax},q,m,0,~{dirflag},~{fpsr},~{flags},~{memory}"( i32 0, i32* null, i32 0 ) ; [#uses=0] + %tmp3.i.i = call i32 asm sideeffect "lock; cmpxchg $1,$2", "={ax},q,m,0,~{dirflag},~{fpsr},~{flags},~{memory}"( i32 0, ptr null, i32 0 ) ; [#uses=0] ret void } diff --git a/llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll b/llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll index 727407897fed1..3eb56ba8dc1b2 100644 --- a/llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll +++ b/llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll @@ -1,23 +1,23 @@ ; RUN: llc < %s -mtriple=i686-- -no-integrated-as ; PR833 -@G = weak global i32 0 ; [#uses=3] +@G = weak global i32 0 ; [#uses=3] define i32 @foo(i32 %X) { entry: - %X_addr = alloca i32 ; [#uses=3] - store i32 %X, i32* %X_addr - call void asm sideeffect "xchg{l} {$0,$1|$1,$0}", "=*m,=*r,m,1,~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) @G, i32* elementtype(i32) %X_addr, i32* @G, i32 %X ) - %tmp1 = load i32, i32* %X_addr ; [#uses=1] + %X_addr = alloca i32 ; [#uses=3] + store i32 %X, ptr %X_addr + call void asm sideeffect "xchg{l} {$0,$1|$1,$0}", "=*m,=*r,m,1,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) @G, ptr elementtype(i32) %X_addr, ptr @G, i32 %X ) + %tmp1 = load i32, ptr %X_addr ; [#uses=1] ret i32 %tmp1 } define i32 @foo2(i32 %X) { entry: - %X_addr = alloca i32 ; [#uses=3] - store i32 %X, i32* %X_addr - call void asm sideeffect "xchg{l} {$0,$1|$1,$0}", "=*m,=*r,1,~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) @G, i32* elementtype(i32) %X_addr, i32 %X ) - %tmp1 = load i32, i32* %X_addr ; [#uses=1] + %X_addr = alloca i32 ; [#uses=3] + store i32 %X, ptr %X_addr + call void asm sideeffect "xchg{l} {$0,$1|$1,$0}", "=*m,=*r,1,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) @G, ptr elementtype(i32) %X_addr, i32 %X ) + %tmp1 = load i32, ptr %X_addr ; [#uses=1] ret i32 %tmp1 } diff --git a/llvm/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll b/llvm/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll index 3819dcf070f15..772e8a04685b8 100644 --- a/llvm/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll +++ b/llvm/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll @@ -2,5 +2,5 @@ ; PR853 ; CHECK: 4294967240 -@X = global i32* inttoptr (i64 -56 to i32*) ; [#uses=0] +@X = global ptr inttoptr (i64 -56 to ptr) ; [#uses=0] diff --git a/llvm/test/CodeGen/X86/2006-08-07-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-08-07-CycleInDAG.ll index 66c79303fa46f..01a20bf71ea1a 100644 --- a/llvm/test/CodeGen/X86/2006-08-07-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-08-07-CycleInDAG.ll @@ -1,21 +1,21 @@ ; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 %struct.foo = type opaque -define fastcc i32 @test(%struct.foo* %v, %struct.foo* %vi) { +define fastcc i32 @test(ptr %v, ptr %vi) { br i1 false, label %ilog2.exit, label %cond_true.i cond_true.i: ; preds = %0 ret i32 0 ilog2.exit: ; preds = %0 - %tmp24.i = load i32, i32* null ; [#uses=1] + %tmp24.i = load i32, ptr null ; [#uses=1] %tmp13.i12.i = tail call double @ldexp( double 0.000000e+00, i32 0 ) ; [#uses=1] %tmp13.i13.i = fptrunc double %tmp13.i12.i to float ; [#uses=1] - %tmp11.s = load i32, i32* null ; [#uses=1] + %tmp11.s = load i32, ptr null ; [#uses=1] %tmp11.i = bitcast i32 %tmp11.s to i32 ; [#uses=1] %n.i = bitcast i32 %tmp24.i to i32 ; [#uses=1] %tmp13.i7 = mul i32 %tmp11.i, %n.i ; [#uses=1] - %tmp.i8 = tail call i8* @calloc( i32 %tmp13.i7, i32 4 ) ; [#uses=0] + %tmp.i8 = tail call ptr @calloc( i32 %tmp13.i7, i32 4 ) ; [#uses=0] br i1 false, label %bb224.preheader.i, label %bb.i bb.i: ; preds = %ilog2.exit @@ -26,6 +26,6 @@ bb224.preheader.i: ; preds = %ilog2.exit ret i32 0 } -declare i8* @calloc(i32, i32) +declare ptr @calloc(i32, i32) declare double @ldexp(double, i32) diff --git a/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll index 20a0163227b82..fbd162117eae2 100644 --- a/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll @@ -1,19 +1,19 @@ ; RUN: llc < %s -mtriple=i686-- - %struct.expr = type { %struct.rtx_def*, i32, %struct.expr*, %struct.occr*, %struct.occr*, %struct.rtx_def* } - %struct.hash_table = type { %struct.expr**, i32, i32, i32 } - %struct.occr = type { %struct.occr*, %struct.rtx_def*, i8, i8 } + %struct.expr = type { ptr, i32, ptr, ptr, ptr, ptr } + %struct.hash_table = type { ptr, i32, i32, i32 } + %struct.occr = type { ptr, ptr, i8, i8 } %struct.rtx_def = type { i16, i8, i8, %struct.u } %struct.u = type { [1 x i64] } define void @test() { - %tmp = load i32, i32* null ; [#uses=1] + %tmp = load i32, ptr null ; [#uses=1] %tmp8 = call i32 @hash_rtx( ) ; [#uses=1] %tmp11 = urem i32 %tmp8, %tmp ; [#uses=1] br i1 false, label %cond_next, label %return cond_next: ; preds = %0 %gep.upgrd.1 = zext i32 %tmp11 to i64 ; [#uses=1] - %tmp17 = getelementptr %struct.expr*, %struct.expr** null, i64 %gep.upgrd.1 ; <%struct.expr**> [#uses=0] + %tmp17 = getelementptr ptr, ptr null, i64 %gep.upgrd.1 ; [#uses=0] ret void return: ; preds = %0 diff --git a/llvm/test/CodeGen/X86/2006-09-01-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-09-01-CycleInDAG.ll index 3c32e1d7c6a3f..d9b82812c1a3b 100644 --- a/llvm/test/CodeGen/X86/2006-09-01-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-09-01-CycleInDAG.ll @@ -2,130 +2,128 @@ target datalayout = "e-p:32:32" target triple = "i686-apple-darwin8" %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } - %struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] } - %struct.VEC_tree = type { i32, i32, [1 x %struct.tree_node*] } + %struct.FILE = type { ptr, i32, i32, i16, i16, %struct.__sbuf, i32, ptr, ptr, ptr, ptr, ptr, %struct.__sbuf, ptr, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } + %struct.VEC_edge = type { i32, i32, [1 x ptr] } + %struct.VEC_tree = type { i32, i32, [1 x ptr] } %struct.__sFILEX = type opaque - %struct.__sbuf = type { i8*, i32 } - %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] } - %struct._var_map = type { %struct.partition_def*, i32*, i32*, %struct.tree_node**, i32, i32, i32* } - %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 } - %struct.bb_ann_d = type { %struct.tree_node*, i8, %struct.edge_prediction* } - %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] } - %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* } - %struct.bitmap_iterator = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, i32 } - %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack } - %struct.block_stmt_iterator = type { %struct.tree_stmt_iterator, %struct.basic_block_def* } - %struct.coalesce_list_d = type { %struct._var_map*, %struct.partition_pair_d**, i1 } + %struct.__sbuf = type { ptr, i32 } + %struct._obstack_chunk = type { ptr, ptr, [4 x i8] } + %struct._var_map = type { ptr, ptr, ptr, ptr, i32, i32, ptr } + %struct.basic_block_def = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, [2 x ptr], ptr, ptr, ptr, ptr, i64, i32, i32, i32, i32 } + %struct.bb_ann_d = type { ptr, i8, ptr } + %struct.bitmap_element_def = type { ptr, ptr, i32, [4 x i32] } + %struct.bitmap_head_def = type { ptr, ptr, i32, ptr } + %struct.bitmap_iterator = type { ptr, ptr, i32, i32 } + %struct.bitmap_obstack = type { ptr, ptr, %struct.obstack } + %struct.block_stmt_iterator = type { %struct.tree_stmt_iterator, ptr } + %struct.coalesce_list_d = type { ptr, ptr, i1 } %struct.conflict_graph_def = type opaque - %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] } - %struct.def_operand_ptr = type { %struct.tree_node** } + %struct.dataflow_d = type { ptr, [2 x ptr] } + %struct.def_operand_ptr = type { ptr } %struct.def_optype_d = type { i32, [1 x %struct.def_operand_ptr] } %struct.die_struct = type opaque - %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.__sbuf*, i32, i32, i64, i32 } - %struct.edge_def_insns = type { %struct.rtx_def* } - %struct.edge_iterator = type { i32, %struct.VEC_edge** } - %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 } + %struct.edge_def = type { ptr, ptr, %struct.edge_def_insns, ptr, ptr, i32, i32, i64, i32 } + %struct.edge_def_insns = type { ptr } + %struct.edge_iterator = type { i32, ptr } + %struct.edge_prediction = type { ptr, ptr, i32, i32 } %struct.eh_status = type opaque %struct.elt_list = type opaque - %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.__sbuf, i32, i8*, %struct.rtx_def** } + %struct.emit_status = type { i32, i32, ptr, ptr, ptr, i32, %struct.__sbuf, i32, ptr, ptr } %struct.et_node = type opaque - %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } - %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i1, i1, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.__sbuf, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 } - %struct.ht_identifier = type { i8*, i32, i32 } + %struct.expr_status = type { i32, i32, i32, ptr, ptr, ptr } + %struct.function = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, %struct.CUMULATIVE_ARGS, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i8, i32, i64, ptr, ptr, ptr, ptr, ptr, i32, ptr, i32, i32, ptr, ptr, i32, i32, i32, ptr, i32, i32, i1, i1, ptr, ptr, i32, i32, i32, i32, %struct.__sbuf, ptr, ptr, i8, i8, i8 } + %struct.ht_identifier = type { ptr, i32, i32 } %struct.initial_value_struct = type opaque %struct.lang_decl = type opaque %struct.lang_type = type opaque %struct.language_function = type opaque - %struct.location_t = type { i8*, i32 } + %struct.location_t = type { ptr, i32 } %struct.loop = type opaque - %struct.machine_function = type { i32, i32, i8*, i32, i32 } - %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 } + %struct.machine_function = type { i32, i32, ptr, i32, i32 } + %struct.obstack = type { i32, ptr, ptr, ptr, ptr, i32, i32, ptr, ptr, ptr, i8 } %struct.partition_def = type { i32, [1 x %struct.partition_elem] } - %struct.partition_elem = type { i32, %struct.partition_elem*, i32 } - %struct.partition_pair_d = type { i32, i32, i32, %struct.partition_pair_d* } - %struct.phi_arg_d = type { %struct.tree_node*, i1 } + %struct.partition_elem = type { i32, ptr, i32 } + %struct.partition_pair_d = type { i32, i32, i32, ptr } + %struct.phi_arg_d = type { ptr, i1 } %struct.pointer_set_t = type opaque - %struct.ptr_info_def = type { i8, %struct.bitmap_head_def*, %struct.tree_node* } + %struct.ptr_info_def = type { i8, ptr, ptr } %struct.real_value = type opaque %struct.reg_info_def = type opaque - %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 } + %struct.reorder_block_def = type { ptr, ptr, ptr, ptr, ptr, i32, i32, i32 } %struct.rtvec_def = type opaque %struct.rtx_def = type opaque - %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } + %struct.sequence_stack = type { ptr, ptr, ptr } %struct.simple_bitmap_def = type { i32, i32, i32, [1 x i64] } - %struct.ssa_op_iter = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.stmt_operands_d*, i1 } - %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, i32 } - %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* } + %struct.ssa_op_iter = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, i1 } + %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, ptr, %struct.stmt_operands_d, ptr, ptr, i32 } + %struct.stmt_operands_d = type { ptr, ptr, ptr, ptr, ptr } %struct.temp_slot = type opaque - %struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* } + %struct.tree_ann_common_d = type { i32, ptr, ptr } %struct.tree_ann_d = type { %struct.stmt_ann_d } - %struct.tree_binfo = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree } - %struct.tree_block = type { %struct.tree_common, i8, [3 x i8], %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* } - %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 } - %struct.tree_complex = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* } - %struct.tree_decl = type { %struct.tree_common, %struct.__sbuf, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* } + %struct.tree_binfo = type { %struct.tree_common, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %struct.VEC_tree } + %struct.tree_block = type { %struct.tree_common, i8, [3 x i8], ptr, ptr, ptr, ptr, ptr, ptr } + %struct.tree_common = type { ptr, ptr, ptr, i8, i8, i8, i8, i8 } + %struct.tree_complex = type { %struct.tree_common, ptr, ptr } + %struct.tree_decl = type { %struct.tree_common, %struct.__sbuf, i32, ptr, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, %struct.tree_decl_u2, ptr, ptr, i64, ptr } %struct.tree_decl_u1 = type { i64 } %struct.tree_decl_u1_a = type { i32 } - %struct.tree_decl_u2 = type { %struct.function* } - %struct.tree_exp = type { %struct.tree_common, %struct.__sbuf*, i32, %struct.tree_node*, [1 x %struct.tree_node*] } + %struct.tree_decl_u2 = type { ptr } + %struct.tree_exp = type { %struct.tree_common, ptr, i32, ptr, [1 x ptr] } %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier } %struct.tree_int_cst = type { %struct.tree_common, %struct.tree_int_cst_lowhi } %struct.tree_int_cst_lowhi = type { i64, i64 } - %struct.tree_list = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* } - %struct.tree_live_info_d = type { %struct._var_map*, %struct.bitmap_head_def*, %struct.bitmap_head_def**, i32, %struct.bitmap_head_def** } + %struct.tree_list = type { %struct.tree_common, ptr, ptr } + %struct.tree_live_info_d = type { ptr, ptr, ptr, i32, ptr } %struct.tree_node = type { %struct.tree_decl } - %struct.tree_partition_associator_d = type { %struct.varray_head_tag*, %struct.varray_head_tag*, i32*, i32*, i32, i32, %struct._var_map* } - %struct.tree_phi_node = type { %struct.tree_common, %struct.tree_node*, i32, i32, i32, %struct.basic_block_def*, %struct.dataflow_d*, [1 x %struct.phi_arg_d] } - %struct.tree_real_cst = type { %struct.tree_common, %struct.real_value* } - %struct.tree_ssa_name = type { %struct.tree_common, %struct.tree_node*, i32, %struct.ptr_info_def*, %struct.tree_node*, i8* } - %struct.tree_statement_list = type { %struct.tree_common, %struct.tree_statement_list_node*, %struct.tree_statement_list_node* } - %struct.tree_statement_list_node = type { %struct.tree_statement_list_node*, %struct.tree_statement_list_node*, %struct.tree_node* } - %struct.tree_stmt_iterator = type { %struct.tree_statement_list_node*, %struct.tree_node* } + %struct.tree_partition_associator_d = type { ptr, ptr, ptr, ptr, i32, i32, ptr } + %struct.tree_phi_node = type { %struct.tree_common, ptr, i32, i32, i32, ptr, ptr, [1 x %struct.phi_arg_d] } + %struct.tree_real_cst = type { %struct.tree_common, ptr } + %struct.tree_ssa_name = type { %struct.tree_common, ptr, i32, ptr, ptr, ptr } + %struct.tree_statement_list = type { %struct.tree_common, ptr, ptr } + %struct.tree_statement_list_node = type { ptr, ptr, ptr } + %struct.tree_stmt_iterator = type { ptr, ptr } %struct.tree_string = type { %struct.tree_common, i32, [1 x i8] } - %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i16, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_decl_u1_a, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_type* } + %struct.tree_type = type { %struct.tree_common, ptr, ptr, ptr, ptr, i32, i16, i8, i8, i32, ptr, ptr, %struct.tree_decl_u1_a, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, ptr } %struct.tree_type_symtab = type { i32 } - %struct.tree_value_handle = type { %struct.tree_common, %struct.value_set*, i32 } - %struct.tree_vec = type { %struct.tree_common, i32, [1 x %struct.tree_node*] } - %struct.tree_vector = type { %struct.tree_common, %struct.tree_node* } - %struct.use_operand_ptr = type { %struct.tree_node** } + %struct.tree_value_handle = type { %struct.tree_common, ptr, i32 } + %struct.tree_vec = type { %struct.tree_common, i32, [1 x ptr] } + %struct.tree_vector = type { %struct.tree_common, ptr } + %struct.use_operand_ptr = type { ptr } %struct.use_optype_d = type { i32, [1 x %struct.def_operand_ptr] } - %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* } + %struct.v_def_use_operand_type_t = type { ptr, ptr } %struct.v_may_def_optype_d = type { i32, [1 x %struct.v_def_use_operand_type_t] } %struct.v_must_def_optype_d = type { i32, [1 x %struct.v_def_use_operand_type_t] } %struct.value_set = type opaque - %struct.var_ann_d = type { %struct.tree_ann_common_d, i8, i8, %struct.tree_node*, %struct.varray_head_tag*, i32, i32, i32, %struct.tree_node*, %struct.tree_node* } - %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* } + %struct.var_ann_d = type { %struct.tree_ann_common_d, i8, i8, ptr, ptr, i32, i32, i32, ptr, ptr } + %struct.var_refs_queue = type { ptr, i32, i32, ptr } %struct.varasm_status = type opaque %struct.varray_data = type { [1 x i64] } - %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.varray_data } - %struct.vuse_optype_d = type { i32, [1 x %struct.tree_node*] } -@basic_block_info = external global %struct.varray_head_tag* ; <%struct.varray_head_tag**> [#uses=1] + %struct.varray_head_tag = type { i32, i32, i32, ptr, %struct.varray_data } + %struct.vuse_optype_d = type { i32, [1 x ptr] } +@basic_block_info = external global ptr ; [#uses=1] -define void @calculate_live_on_entry_cond_true3632(%struct.varray_head_tag* %stack3023.6, i32* %tmp3629, %struct.VEC_edge*** %tmp3397.out) { +define void @calculate_live_on_entry_cond_true3632(ptr %stack3023.6, ptr %tmp3629, ptr %tmp3397.out) { newFuncRoot: br label %cond_true3632 bb3502.exitStub: ; preds = %cond_true3632 - store %struct.VEC_edge** %tmp3397, %struct.VEC_edge*** %tmp3397.out + store ptr %tmp3397, ptr %tmp3397.out ret void cond_true3632: ; preds = %newFuncRoot - %tmp3378 = load i32, i32* %tmp3629 ; [#uses=1] + %tmp3378 = load i32, ptr %tmp3629 ; [#uses=1] %tmp3379 = add i32 %tmp3378, -1 ; [#uses=1] - %tmp3381 = getelementptr %struct.varray_head_tag, %struct.varray_head_tag* %stack3023.6, i32 0, i32 4 ; <%struct.varray_data*> [#uses=1] - %tmp3382 = bitcast %struct.varray_data* %tmp3381 to [1 x i32]* ; <[1 x i32]*> [#uses=1] + %tmp3381 = getelementptr %struct.varray_head_tag, ptr %stack3023.6, i32 0, i32 4 ; [#uses=1] %gep.upgrd.1 = zext i32 %tmp3379 to i64 ; [#uses=1] - %tmp3383 = getelementptr [1 x i32], [1 x i32]* %tmp3382, i32 0, i64 %gep.upgrd.1 ; [#uses=1] - %tmp3384 = load i32, i32* %tmp3383 ; [#uses=1] - %tmp3387 = load i32, i32* %tmp3629 ; [#uses=1] + %tmp3383 = getelementptr [1 x i32], ptr %tmp3381, i32 0, i64 %gep.upgrd.1 ; [#uses=1] + %tmp3384 = load i32, ptr %tmp3383 ; [#uses=1] + %tmp3387 = load i32, ptr %tmp3629 ; [#uses=1] %tmp3388 = add i32 %tmp3387, -1 ; [#uses=1] - store i32 %tmp3388, i32* %tmp3629 - %tmp3391 = load %struct.varray_head_tag*, %struct.varray_head_tag** @basic_block_info ; <%struct.varray_head_tag*> [#uses=1] - %tmp3393 = getelementptr %struct.varray_head_tag, %struct.varray_head_tag* %tmp3391, i32 0, i32 4 ; <%struct.varray_data*> [#uses=1] - %tmp3394 = bitcast %struct.varray_data* %tmp3393 to [1 x %struct.basic_block_def*]* ; <[1 x %struct.basic_block_def*]*> [#uses=1] - %tmp3395 = getelementptr [1 x %struct.basic_block_def*], [1 x %struct.basic_block_def*]* %tmp3394, i32 0, i32 %tmp3384 ; <%struct.basic_block_def**> [#uses=1] - %tmp3396 = load %struct.basic_block_def*, %struct.basic_block_def** %tmp3395 ; <%struct.basic_block_def*> [#uses=1] - %tmp3397 = getelementptr %struct.basic_block_def, %struct.basic_block_def* %tmp3396, i32 0, i32 3 ; <%struct.VEC_edge**> [#uses=1] + store i32 %tmp3388, ptr %tmp3629 + %tmp3391 = load ptr, ptr @basic_block_info ; [#uses=1] + %tmp3393 = getelementptr %struct.varray_head_tag, ptr %tmp3391, i32 0, i32 4 ; [#uses=1] + %tmp3395 = getelementptr [1 x ptr], ptr %tmp3393, i32 0, i32 %tmp3384 ; [#uses=1] + %tmp3396 = load ptr, ptr %tmp3395 ; [#uses=1] + %tmp3397 = getelementptr %struct.basic_block_def, ptr %tmp3396, i32 0, i32 3 ; [#uses=1] br label %bb3502.exitStub } diff --git a/llvm/test/CodeGen/X86/2006-10-09-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-10-09-CycleInDAG.ll index 00726f9b820aa..4eb7c19a82ed3 100644 --- a/llvm/test/CodeGen/X86/2006-10-09-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-10-09-CycleInDAG.ll @@ -1,11 +1,11 @@ ; RUN: llc < %s -mtriple=i686-- define void @_ZN13QFSFileEngine4readEPcx() { - %tmp201 = load i32, i32* null ; [#uses=1] + %tmp201 = load i32, ptr null ; [#uses=1] %tmp201.upgrd.1 = sext i32 %tmp201 to i64 ; [#uses=1] - %tmp202 = load i64, i64* null ; [#uses=1] + %tmp202 = load i64, ptr null ; [#uses=1] %tmp203 = add i64 %tmp201.upgrd.1, %tmp202 ; [#uses=1] - store i64 %tmp203, i64* null + store i64 %tmp203, ptr null ret void } diff --git a/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll b/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll index 0bb920ff24a52..d2b905ef56c55 100644 --- a/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll +++ b/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; Bug in FindModifiedNodeSlot cause tmp14 load to become a zextload and shr 31 ; is then optimized away. -@tree_code_type = external dso_local global [0 x i32] ; <[0 x i32]*> [#uses=1] +@tree_code_type = external dso_local global [0 x i32] ; [#uses=1] define void @copy_if_shared_r() { ; CHECK-LABEL: copy_if_shared_r: @@ -18,14 +18,14 @@ define void @copy_if_shared_r() { ; CHECK-NEXT: testb %al, %al ; CHECK-NEXT: .LBB0_2: # %cond_true17 ; CHECK-NEXT: retl - %tmp = load i32, i32* null ; [#uses=1] + %tmp = load i32, ptr null ; [#uses=1] %tmp56 = and i32 %tmp, 255 ; [#uses=1] %gep.upgrd.1 = zext i32 %tmp56 to i64 ; [#uses=1] - %tmp8 = getelementptr [0 x i32], [0 x i32]* @tree_code_type, i32 0, i64 %gep.upgrd.1 ; [#uses=1] - %tmp9 = load i32, i32* %tmp8 ; [#uses=1] + %tmp8 = getelementptr [0 x i32], ptr @tree_code_type, i32 0, i64 %gep.upgrd.1 ; [#uses=1] + %tmp9 = load i32, ptr %tmp8 ; [#uses=1] %tmp10 = add i32 %tmp9, -1 ; [#uses=1] %tmp.upgrd.2 = icmp ugt i32 %tmp10, 2 ; [#uses=1] - %tmp14 = load i32, i32* null ; [#uses=1] + %tmp14 = load i32, ptr null ; [#uses=1] %tmp15 = lshr i32 %tmp14, 31 ; [#uses=1] %tmp15.upgrd.3 = trunc i32 %tmp15 to i8 ; [#uses=1] %tmp16 = icmp ne i8 %tmp15.upgrd.3, 0 ; [#uses=1] diff --git a/llvm/test/CodeGen/X86/2006-10-12-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-10-12-CycleInDAG.ll index 8b9b91b31d2d9..4c5827ced829f 100644 --- a/llvm/test/CodeGen/X86/2006-10-12-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-10-12-CycleInDAG.ll @@ -1,12 +1,12 @@ ; RUN: llc < %s -mtriple=i686-- %struct.function = type opaque %struct.lang_decl = type opaque - %struct.location_t = type { i8*, i32 } + %struct.location_t = type { ptr, i32 } %struct.rtx_def = type opaque - %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 } - %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* } + %struct.tree_common = type { ptr, ptr, ptr, i8, i8, i8, i8, i8 } + %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, ptr, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, %struct.tree_decl_u2, ptr, ptr, i64, ptr } %struct.tree_decl_u1 = type { i64 } - %struct.tree_decl_u2 = type { %struct.function* } + %struct.tree_decl_u2 = type { ptr } %struct.tree_node = type { %struct.tree_decl } %union.tree_ann_d = type opaque @@ -29,13 +29,12 @@ bb441: ; preds = %cond_next330 ret void cond_next472: ; preds = %cond_next330 - %tmp490 = load %struct.tree_node*, %struct.tree_node** null ; <%struct.tree_node*> [#uses=1] - %tmp492 = getelementptr %struct.tree_node, %struct.tree_node* %tmp490, i32 0, i32 0, i32 0, i32 3 ; [#uses=1] - %tmp492.upgrd.1 = bitcast i8* %tmp492 to i32* ; [#uses=1] - %tmp493 = load i32, i32* %tmp492.upgrd.1 ; [#uses=1] + %tmp490 = load ptr, ptr null ; [#uses=1] + %tmp492 = getelementptr %struct.tree_node, ptr %tmp490, i32 0, i32 0, i32 0, i32 3 ; [#uses=1] + %tmp493 = load i32, ptr %tmp492 ; [#uses=1] %tmp495 = trunc i32 %tmp493 to i8 ; [#uses=1] %tmp496 = icmp eq i8 %tmp495, 11 ; [#uses=1] %tmp496.upgrd.2 = zext i1 %tmp496 to i8 ; [#uses=1] - store i8 %tmp496.upgrd.2, i8* null + store i8 %tmp496.upgrd.2, ptr null ret void } diff --git a/llvm/test/CodeGen/X86/2006-10-13-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-10-13-CycleInDAG.ll index 5c7102be589b8..19f1f9ddd7317 100644 --- a/llvm/test/CodeGen/X86/2006-10-13-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-10-13-CycleInDAG.ll @@ -1,18 +1,18 @@ ; RUN: llc < %s -mtriple=i686-- -@str = external dso_local global [18 x i8] ; <[18 x i8]*> [#uses=1] +@str = external dso_local global [18 x i8] ; [#uses=1] define void @test() { bb.i: - %tmp.i660 = load <4 x float>, <4 x float>* null ; <<4 x float>> [#uses=1] - call void (i32, ...) @printf( i32 0, i8* getelementptr ([18 x i8], [18 x i8]* @str, i32 0, i64 0), double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 ) - %tmp152.i = load <4 x i32>, <4 x i32>* null ; <<4 x i32>> [#uses=1] + %tmp.i660 = load <4 x float>, ptr null ; <<4 x float>> [#uses=1] + call void (i32, ...) @printf( i32 0, ptr @str, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 ) + %tmp152.i = load <4 x i32>, ptr null ; <<4 x i32>> [#uses=1] %tmp156.i = bitcast <4 x i32> %tmp152.i to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp175.i = bitcast <4 x float> %tmp.i660 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp176.i = xor <4 x i32> %tmp156.i, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] %tmp177.i = and <4 x i32> %tmp176.i, %tmp175.i ; <<4 x i32>> [#uses=1] %tmp190.i = or <4 x i32> %tmp177.i, zeroinitializer ; <<4 x i32>> [#uses=1] %tmp191.i = bitcast <4 x i32> %tmp190.i to <4 x float> ; <<4 x float>> [#uses=1] - store <4 x float> %tmp191.i, <4 x float>* null + store <4 x float> %tmp191.i, ptr null ret void } diff --git a/llvm/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll b/llvm/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll index 0e589f2f2e390..c345ca502d64f 100644 --- a/llvm/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll +++ b/llvm/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll @@ -1,9 +1,9 @@ ; RUN: llc < %s -mtriple=i686-- -asm-verbose | FileCheck %s -@str = internal constant [14 x i8] c"Hello world!\0A\00" ; <[14 x i8]*> [#uses=1] -@str.upgrd.1 = internal constant [13 x i8] c"Blah world!\0A\00" ; <[13 x i8]*> [#uses=1] +@str = internal constant [14 x i8] c"Hello world!\0A\00" ; [#uses=1] +@str.upgrd.1 = internal constant [13 x i8] c"Blah world!\0A\00" ; [#uses=1] -define i32 @test(i32 %argc, i8** %argv) nounwind { +define i32 @test(i32 %argc, ptr %argv) nounwind { entry: ; CHECK: cmpl $2 ; CHECK-NEXT: je @@ -15,15 +15,15 @@ entry: ] bb: ; preds = %entry - %tmp1 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([14 x i8], [14 x i8]* @str, i32 0, i64 0) ) ; [#uses=0] + %tmp1 = tail call i32 (ptr, ...) @printf( ptr @str ) ; [#uses=0] ret i32 0 bb2: ; preds = %entry - %tmp4 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([13 x i8], [13 x i8]* @str.upgrd.1, i32 0, i64 0) ) ; [#uses=0] + %tmp4 = tail call i32 (ptr, ...) @printf( ptr @str.upgrd.1 ) ; [#uses=0] ret i32 0 UnifiedReturnBlock: ; preds = %entry ret i32 0 } -declare i32 @printf(i8*, ...) +declare i32 @printf(ptr, ...) diff --git a/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll b/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll index e0b14f2a6b4c0..1fbba1639b963 100644 --- a/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll +++ b/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll @@ -16,7 +16,7 @@ define void @handle_vector_size_attribute() nounwind { ; CHECK-NEXT: .LBB0_2: # %bb84 ; CHECK-NEXT: retq entry: - %tmp69 = load i32, i32* null ; [#uses=1] + %tmp69 = load i32, ptr null ; [#uses=1] switch i32 %tmp69, label %bb84 [ i32 2, label %bb77 i32 1, label %bb77 @@ -24,7 +24,7 @@ entry: bb77: ; preds = %entry, %entry %tmp99 = udiv i64 0, 0 ; [#uses=1] - %tmp = load volatile i8, i8* null ; [#uses=1] + %tmp = load volatile i8, ptr null ; [#uses=1] %tmp114 = icmp eq i64 0, 0 ; [#uses=1] br label %cond_true115 @@ -32,7 +32,7 @@ bb84: ; preds = %entry ret void cond_true115: ; preds = %bb77 - %tmp118 = load volatile i8, i8* null ; [#uses=1] + %tmp118 = load volatile i8, ptr null ; [#uses=1] br label %cond_true120 cond_true120: ; preds = %cond_true115 diff --git a/llvm/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll b/llvm/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll index b08b0e573afc9..e21ed0a7e3f9f 100644 --- a/llvm/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll +++ b/llvm/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll @@ -3,28 +3,28 @@ target datalayout = "e-p:32:32" target triple = "i686-pc-linux-gnu" %struct.QBasicAtomic = type { i32 } - %struct.QByteArray = type { %"struct.QByteArray::Data"* } - %"struct.QByteArray::Data" = type { %struct.QBasicAtomic, i32, i32, i8*, [1 x i8] } + %struct.QByteArray = type { ptr } + %"struct.QByteArray::Data" = type { %struct.QBasicAtomic, i32, i32, ptr, [1 x i8] } %struct.QFactoryLoader = type { %struct.QObject } - %struct.QImageIOHandler = type { i32 (...)**, %struct.QImageIOHandlerPrivate* } + %struct.QImageIOHandler = type { ptr, ptr } %struct.QImageIOHandlerPrivate = type opaque - %struct.QImageWriter = type { %struct.QImageWriterPrivate* } - %struct.QImageWriterPrivate = type { %struct.QByteArray, %struct.QFactoryLoader*, i1, %struct.QImageIOHandler*, i32, float, %struct.QString, %struct.QString, i32, %struct.QString, %struct.QImageWriter* } + %struct.QImageWriter = type { ptr } + %struct.QImageWriterPrivate = type { %struct.QByteArray, ptr, i1, ptr, i32, float, %struct.QString, %struct.QString, i32, %struct.QString, ptr } %"struct.QList" = type { %"struct.QList::._20" } %"struct.QList::._20" = type { %struct.QListData } - %struct.QListData = type { %"struct.QListData::Data"* } - %"struct.QListData::Data" = type { %struct.QBasicAtomic, i32, i32, i32, i8, [1 x i8*] } - %struct.QObject = type { i32 (...)**, %struct.QObjectData* } - %struct.QObjectData = type { i32 (...)**, %struct.QObject*, %struct.QObject*, %"struct.QList", i8, [3 x i8], i32, i32 } - %struct.QString = type { %"struct.QString::Data"* } - %"struct.QString::Data" = type { %struct.QBasicAtomic, i32, i32, i16*, i8, i8, [1 x i16] } + %struct.QListData = type { ptr } + %"struct.QListData::Data" = type { %struct.QBasicAtomic, i32, i32, i32, i8, [1 x ptr] } + %struct.QObject = type { ptr, ptr } + %struct.QObjectData = type { ptr, ptr, ptr, %"struct.QList", i8, [3 x i8], i32, i32 } + %struct.QString = type { ptr } + %"struct.QString::Data" = type { %struct.QBasicAtomic, i32, i32, ptr, i8, i8, [1 x i16] } define i1 @_ZNK12QImageWriter8canWriteEv() { - %tmp62 = load %struct.QImageWriterPrivate*, %struct.QImageWriterPrivate** null ; <%struct.QImageWriterPrivate*> [#uses=1] - %tmp = getelementptr %struct.QImageWriterPrivate, %struct.QImageWriterPrivate* %tmp62, i32 0, i32 9 ; <%struct.QString*> [#uses=1] - %tmp75 = call %struct.QString* @_ZN7QStringaSERKS_( %struct.QString* %tmp, %struct.QString* null ) ; <%struct.QString*> [#uses=0] - call void asm sideeffect "lock\0Adecl $0\0Asetne 1", "=*m"( i32* elementtype( i32) null ) + %tmp62 = load ptr, ptr null ; [#uses=1] + %tmp = getelementptr %struct.QImageWriterPrivate, ptr %tmp62, i32 0, i32 9 ; [#uses=1] + %tmp75 = call ptr @_ZN7QStringaSERKS_( ptr %tmp, ptr null ) ; [#uses=0] + call void asm sideeffect "lock\0Adecl $0\0Asetne 1", "=*m"( ptr elementtype( i32) null ) ret i1 false } -declare %struct.QString* @_ZN7QStringaSERKS_(%struct.QString*, %struct.QString*) +declare ptr @_ZN7QStringaSERKS_(ptr, ptr) diff --git a/llvm/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll b/llvm/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll index 67c4bcd5fb71f..afb22aa7382fd 100644 --- a/llvm/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll +++ b/llvm/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll @@ -4,14 +4,14 @@ ; CHECK: ({{%rdi|%rcx}},%rax,8) ; CHECK-NOT: {{addq.*8}} -define void @foo(double* %y) nounwind { +define void @foo(ptr %y) nounwind { entry: br label %bb bb: %i = phi i64 [ 0, %entry ], [ %k, %bb ] - %j = getelementptr double, double* %y, i64 %i - store double 0.000000e+00, double* %j + %j = getelementptr double, ptr %y, i64 %i + store double 0.000000e+00, ptr %j %k = add i64 %i, 1 %n = icmp eq i64 %k, 0 br i1 %n, label %return, label %bb diff --git a/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll b/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll index 5ad7d50ca1fc6..f187d503dfe71 100644 --- a/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll +++ b/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll @@ -6,7 +6,7 @@ target datalayout = "e-p:64:64" @i6000 = dso_local global [128 x i64] zeroinitializer, align 16 -define dso_local void @foo(i32* %a0, i32* %a1, i32* %a2, i32* %a3, i32* %a4, i32* %a5) { +define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5) { ; CHECK-LABEL: foo: ; CHECK: # %bb.0: # %b ; CHECK-NEXT: pushq %rbp @@ -249,12 +249,12 @@ define dso_local void @foo(i32* %a0, i32* %a1, i32* %a2, i32* %a3, i32* %a4, i32 ; CHECK-NEXT: .cfi_def_cfa %rsp, 8 ; CHECK-NEXT: retq b: - %r = load i32, i32* %a0 - %r2 = load i32, i32* %a1 - %r4 = load i32, i32* %a2 - %r6 = load i32, i32* %a3 - %r8 = load i32, i32* %a4 - %r14 = load i32, i32* %a5 + %r = load i32, ptr %a0 + %r2 = load i32, ptr %a1 + %r4 = load i32, ptr %a2 + %r6 = load i32, ptr %a3 + %r8 = load i32, ptr %a4 + %r14 = load i32, ptr %a5 %rx = sext i32 %r2 to i64 %r9 = sext i32 %r to i64 %r11 = add i64 %rx, 0 @@ -272,13 +272,12 @@ b: %r24 = shl i32 %r23a, 0 %r25 = add i32 %r24, 0 %ras2 = alloca i8, i32 %r25, align 16 - %r28 = getelementptr i8, i8* %ras2, i32 0 %r38 = shl i64 %r12, 0 %s2013 = add i64 %r38, 0 - %c22012 = getelementptr i8, i8* %ras2, i64 %s2013 + %c22012 = getelementptr i8, ptr %ras2, i64 %s2013 %r42 = shl i64 %r12, 0 %s2011 = add i64 %r42, 16 - %c22010 = getelementptr i8, i8* %ras2, i64 %s2011 + %c22010 = getelementptr i8, ptr %ras2, i64 %s2011 %r50 = add i64 %r16, 0 %r51 = icmp slt i64 %r50, 0 %r50sh = shl i64 %r50, 0 @@ -286,7 +285,7 @@ b: %r54 = select i1 %r51, i64 0, i64 %r50j %r56 = mul i64 %r54, %r12 %r28s = add i64 %r56, 16 - %c2 = getelementptr i8, i8* %ras2, i64 %r28s + %c2 = getelementptr i8, ptr %ras2, i64 %r28s %r60 = sub i32 %r2, %r %r61 = icmp slt i32 %r60, 0 br i1 %r61, label %a29b, label %b63 @@ -373,14 +372,14 @@ b341: %d753 = bitcast i64 %w1874 to i64 %r343 = add i64 %s661, 0 %r346 = add i64 %r343, 0 - %r347 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r346 - %r348 = load float, float* %r347 + %r347 = getelementptr float, ptr @i6000, i64 %r346 + %r348 = load float, ptr %r347 %r352 = add i64 %r343, 0 - %r353 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r352 - %r354 = load float, float* %r353 - %r362 = load float, float* bitcast ([128 x i64]* @i6000 to float*) + %r353 = getelementptr float, ptr @i6000, i64 %r352 + %r354 = load float, ptr %r353 + %r362 = load float, ptr @i6000 %r363 = fadd float 0.000000e+00, %r362 - %r370 = load float, float* bitcast ([128 x i64]* @i6000 to float*) + %r370 = load float, ptr @i6000 %r376 = icmp slt i64 %r16, 0 br i1 %r376, label %b377, label %a35b b377: @@ -424,9 +423,9 @@ b535: %s923 = phi i64 [ 0, %b514 ], [ %r799, %b712 ] %s933 = phi i64 [ %r533, %b514 ], [ %r795, %b712 ] %r538 = add i64 %w1855, 0 - %r539 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r538 - %r540 = load float, float* %r539 - %r551 = load float, float* bitcast ([128 x i64]* @i6000 to float*) + %r539 = getelementptr float, ptr @i6000, i64 %r538 + %r540 = load float, ptr %r539 + %r551 = load float, ptr @i6000 %r562 = sub i64 %s933, 0 %r564 = icmp slt i64 %r512, 0 br i1 %r564, label %b565, label %a45b @@ -453,23 +452,23 @@ b712: a45b714: %r717 = add i64 %e944, 0 %r720 = add i64 %r717, 0 - %r721 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r720 - %r722 = load float, float* %r721 + %r721 = getelementptr float, ptr @i6000, i64 %r720 + %r722 = load float, ptr %r721 %r726 = add i64 %r717, 0 - %r727 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r726 - %r728 = load float, float* %r727 + %r727 = getelementptr float, ptr @i6000, i64 %r726 + %r728 = load float, ptr %r727 %r732 = add i64 %r717, 0 - %r733 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r732 - %r734 = load float, float* %r733 + %r733 = getelementptr float, ptr @i6000, i64 %r732 + %r734 = load float, ptr %r733 %r738 = add i64 %r717, 0 - %r739 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r738 - %r740 = load float, float* %r739 + %r739 = getelementptr float, ptr @i6000, i64 %r738 + %r740 = load float, ptr %r739 %r744 = add i64 %r717, 0 - %r745 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r744 - %r746 = load float, float* %r745 + %r745 = getelementptr float, ptr @i6000, i64 %r744 + %r746 = load float, ptr %r745 %r750 = add i64 %r717, 0 - %r751 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r750 - %r752 = load float, float* %r751 + %r751 = getelementptr float, ptr @i6000, i64 %r750 + %r752 = load float, ptr %r751 %r753 = fadd float %r752, %r746 %r754 = fadd float %r728, %r722 %r755 = fadd float %r734, %r754 @@ -477,11 +476,11 @@ a45b714: %r757 = fadd float %r753, %r756 %r759 = fadd float %r757, %r540 %r770 = add i64 %r717, 0 - %r771 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r770 - %r772 = load float, float* %r771 + %r771 = getelementptr float, ptr @i6000, i64 %r770 + %r772 = load float, ptr %r771 %r776 = add i64 %r717, 0 - %r777 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r776 - %r778 = load float, float* %r777 + %r777 = getelementptr float, ptr @i6000, i64 %r776 + %r778 = load float, ptr %r777 %r781 = fadd float %r363, %r772 %r782 = fadd float %r781, %r778 %r783 = fadd float %r551, %r782 @@ -494,7 +493,7 @@ b820: %r844 = add i64 %r16, 0 %r846 = sext i32 %r60 to i64 %r847 = add i64 %r846, 0 - %r851 = load float, float* bitcast ([128 x i64]* @i6000 to float*) + %r851 = load float, ptr @i6000 %r856 = sub i64 %rx, 0 br label %b858 b858: @@ -506,11 +505,11 @@ b858: %s1173 = add i64 %b1902, 0 %r859 = add i64 %r856, 0 %r862 = add i64 %w1891, 0 - %r863 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r862 - %r864 = load float, float* %r863 + %r863 = getelementptr float, ptr @i6000, i64 %r862 + %r864 = load float, ptr %r863 %r868 = add i64 %w1891, 0 - %r869 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r868 - %r870 = load float, float* %r869 + %r869 = getelementptr float, ptr @i6000, i64 %r868 + %r870 = load float, ptr %r869 %r873 = sub i64 %r859, 0 %r876 = sub i64 %s1173, 0 %r878 = icmp slt i64 %r847, 0 @@ -540,16 +539,14 @@ b1016: a53b1019: %w1885 = phi i64 [ 0, %a53b1019q ], [ %v1886, %a53b1019 ] %r1022 = add i64 %r876, 0 - %r1024 = bitcast i8* %c2 to float* %r1025 = add i64 %r1022, 0 - %r1026 = getelementptr float, float* %r1024, i64 %r1025 - %r1027 = load float, float* %r1026 + %r1026 = getelementptr float, ptr %c2, i64 %r1025 + %r1027 = load float, ptr %r1026 %r1032 = add i64 %r873, 0 %r1033 = add i64 %r1032, 0 - %r1034 = getelementptr float, float* %r1024, i64 %r1033 - %r1035 = load float, float* %r1034 - %r1037 = bitcast i8* %c22010 to float* - %r1040 = getelementptr float, float* %r1037, i64 %r1025 + %r1034 = getelementptr float, ptr %c2, i64 %r1033 + %r1035 = load float, ptr %r1034 + %r1040 = getelementptr float, ptr %c22010, i64 %r1025 %r1044 = fadd float %r864, %r1035 %r1046 = fadd float %r870, %r1027 %r1047 = fadd float %r1044, %r1046 @@ -576,11 +573,10 @@ b1117: %d1353 = bitcast i64 %w1915 to i64 %r1120 = add i64 %s661, 0 %r1121 = add i64 %r1120, 0 - %r1122 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1121 - %r1123 = load float, float* %r1122 - %r1132 = bitcast i8* %c22012 to float* - %r1134 = getelementptr float, float* %r1132, i64 %w1915 - %r1135 = load float, float* %r1134 + %r1122 = getelementptr float, ptr @i6000, i64 %r1121 + %r1123 = load float, ptr %r1122 + %r1134 = getelementptr float, ptr %c22012, i64 %w1915 + %r1135 = load float, ptr %r1134 %r1136 = fadd float %r1123, %r1135 %r1138 = icmp slt i64 %r1114, 0 br i1 %r1138, label %b1139, label %a63b @@ -650,8 +646,8 @@ b1342: %r1352 = add i64 %s1523, 0 %r1355 = sub i64 %r1352, 0 %r1370 = add i64 %d1533, 0 - %r1371 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1370 - %r1372 = load float, float* %r1371 + %r1371 = getelementptr float, ptr @i6000, i64 %r1370 + %r1372 = load float, ptr %r1371 br label %a74b a74b: %w1958 = phi i64 [ 0, %b1342 ], [ %v1959, %a74b ] @@ -680,19 +676,18 @@ a97b: %r1613 = add i64 %w1964, 0 %r1614 = mul i64 %r1613, 0 %r1622 = add i64 %r1614, 0 - %r1754 = bitcast i8* %r28 to float* - %r1756 = getelementptr float, float* %r1754, i64 %w1970 - %r1757 = load float, float* %r1756 + %r1756 = getelementptr float, ptr %ras2, i64 %w1970 + %r1757 = load float, ptr %r1756 %r1761 = add i64 %r1622, 0 - %r1762 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1761 - %r1763 = load float, float* %r1762 + %r1762 = getelementptr float, ptr @i6000, i64 %r1761 + %r1763 = load float, ptr %r1762 %r1767 = add i64 %r1622, 0 - %r1768 = getelementptr float, float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1767 + %r1768 = getelementptr float, ptr @i6000, i64 %r1767 %r1772 = fadd float %r1763, 0.000000e+00 %r1773 = fadd float %r1772, 0.000000e+00 %r1809 = fadd float %r1757, 0.000000e+00 %r1810 = fadd float %r1773, %r1809 - store float %r1810, float* %r1768 + store float %r1810, ptr %r1768 %r1818 = add i64 %w1970, 0 %r1826 = icmp slt i64 %r1818, 0 %v1971 = add i64 %w1970, 0 diff --git a/llvm/test/CodeGen/X86/2007-02-04-OrAddrMode.ll b/llvm/test/CodeGen/X86/2007-02-04-OrAddrMode.ll index 660331cabd183..0e61b6df755f8 100644 --- a/llvm/test/CodeGen/X86/2007-02-04-OrAddrMode.ll +++ b/llvm/test/CodeGen/X86/2007-02-04-OrAddrMode.ll @@ -1,17 +1,16 @@ ; RUN: llc < %s -mtriple=i686-- | FileCheck %s ;; This example can't fold the or into an LEA. -define i32 @test(float ** %tmp2, i32 %tmp12) nounwind { +define i32 @test(ptr %tmp2, i32 %tmp12) nounwind { ; CHECK-LABEL: test: ; CHECK-NOT: ret ; CHECK: orl $1, %{{.*}} ; CHECK: ret - %tmp3 = load float*, float** %tmp2 + %tmp3 = load ptr, ptr %tmp2 %tmp132 = shl i32 %tmp12, 2 ; [#uses=1] - %tmp4 = bitcast float* %tmp3 to i8* ; [#uses=1] - %ctg2 = getelementptr i8, i8* %tmp4, i32 %tmp132 ; [#uses=1] - %tmp6 = ptrtoint i8* %ctg2 to i32 ; [#uses=1] + %ctg2 = getelementptr i8, ptr %tmp3, i32 %tmp132 ; [#uses=1] + %tmp6 = ptrtoint ptr %ctg2 to i32 ; [#uses=1] %tmp14 = or i32 %tmp6, 1 ; [#uses=1] ret i32 %tmp14 } diff --git a/llvm/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll b/llvm/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll index 201de30abc0b8..15c8f5e593015 100644 --- a/llvm/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll +++ b/llvm/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll @@ -1,21 +1,21 @@ ; RUN: llc < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic ; PR1027 - %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] } - %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 } -@stderr = external global %struct._IO_FILE* + %struct._IO_FILE = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i16, i8, [1 x i8], ptr, i64, ptr, ptr, ptr, ptr, i32, i32, [40 x i8] } + %struct._IO_marker = type { ptr, ptr, i32 } +@stderr = external global ptr -define void @__eprintf(i8* %string, i8* %expression, i32 %line, i8* %filename) { - %tmp = load %struct._IO_FILE*, %struct._IO_FILE** @stderr - %tmp5 = tail call i32 (%struct._IO_FILE*, i8*, ...) @fprintf( %struct._IO_FILE* %tmp, i8* %string, i8* %expression, i32 %line, i8* %filename ) - %tmp6 = load %struct._IO_FILE*, %struct._IO_FILE** @stderr - %tmp7 = tail call i32 @fflush( %struct._IO_FILE* %tmp6 ) +define void @__eprintf(ptr %string, ptr %expression, i32 %line, ptr %filename) { + %tmp = load ptr, ptr @stderr + %tmp5 = tail call i32 (ptr, ptr, ...) @fprintf( ptr %tmp, ptr %string, ptr %expression, i32 %line, ptr %filename ) + %tmp6 = load ptr, ptr @stderr + %tmp7 = tail call i32 @fflush( ptr %tmp6 ) tail call void @abort( ) unreachable } -declare i32 @fprintf(%struct._IO_FILE*, i8*, ...) +declare i32 @fprintf(ptr, ptr, ...) -declare i32 @fflush(%struct._IO_FILE*) +declare i32 @fflush(ptr) declare void @abort() diff --git a/llvm/test/CodeGen/X86/2007-03-01-SpillerCrash.ll b/llvm/test/CodeGen/X86/2007-03-01-SpillerCrash.ll index 9f48313a5ee08..4f990451f0807 100644 --- a/llvm/test/CodeGen/X86/2007-03-01-SpillerCrash.ll +++ b/llvm/test/CodeGen/X86/2007-03-01-SpillerCrash.ll @@ -9,7 +9,7 @@ define void @test() nounwind { ; CHECK-NEXT: ud2 test.exit: fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:0 [#uses=4] - load <4 x float>, <4 x float>* null ; <<4 x float>>:1 [#uses=1] + load <4 x float>, ptr null ; <<4 x float>>:1 [#uses=1] shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:2 [#uses=1] fmul <4 x float> %0, %2 ; <<4 x float>>:3 [#uses=1] fsub <4 x float> zeroinitializer, %3 ; <<4 x float>>:4 [#uses=1] diff --git a/llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll b/llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll index a9140f505c620..5eeb9ed1c868f 100644 --- a/llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll +++ b/llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=i686-darwin | FileCheck %s -define void @foo(i8** %buf, i32 %size, i32 %col, i8* %p) nounwind { +define void @foo(ptr %buf, i32 %size, i32 %col, ptr %p) nounwind { entry: ; CHECK-LABEL: @foo ; CHECK: push @@ -24,51 +24,51 @@ bb.preheader: ; preds = %entry bb: ; preds = %bb, %bb.preheader %i.073.0 = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %bb ] ; [#uses=3] %p_addr.076.0.rec = mul i32 %i.073.0, 9 ; [#uses=9] - %p_addr.076.0 = getelementptr i8, i8* %p, i32 %p_addr.076.0.rec ; [#uses=1] - %tmp2 = getelementptr i8*, i8** %buf, i32 %i.073.0 ; [#uses=1] - %tmp3 = load i8*, i8** %tmp2 ; [#uses=8] - %tmp5 = getelementptr i8, i8* %tmp3, i32 %col ; [#uses=1] - %tmp7 = load i8, i8* %p_addr.076.0 ; [#uses=1] - store i8 %tmp7, i8* %tmp5 + %p_addr.076.0 = getelementptr i8, ptr %p, i32 %p_addr.076.0.rec ; [#uses=1] + %tmp2 = getelementptr ptr, ptr %buf, i32 %i.073.0 ; [#uses=1] + %tmp3 = load ptr, ptr %tmp2 ; [#uses=8] + %tmp5 = getelementptr i8, ptr %tmp3, i32 %col ; [#uses=1] + %tmp7 = load i8, ptr %p_addr.076.0 ; [#uses=1] + store i8 %tmp7, ptr %tmp5 %p_addr.076.0.sum93 = add i32 %p_addr.076.0.rec, 1 ; [#uses=1] - %tmp11 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum93 ; [#uses=1] - %tmp13 = load i8, i8* %tmp11 ; [#uses=1] - %tmp15 = getelementptr i8, i8* %tmp3, i32 %tmp5.sum72 ; [#uses=1] - store i8 %tmp13, i8* %tmp15 + %tmp11 = getelementptr i8, ptr %p, i32 %p_addr.076.0.sum93 ; [#uses=1] + %tmp13 = load i8, ptr %tmp11 ; [#uses=1] + %tmp15 = getelementptr i8, ptr %tmp3, i32 %tmp5.sum72 ; [#uses=1] + store i8 %tmp13, ptr %tmp15 %p_addr.076.0.sum92 = add i32 %p_addr.076.0.rec, 2 ; [#uses=1] - %tmp17 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum92 ; [#uses=1] - %tmp19 = load i8, i8* %tmp17 ; [#uses=1] - %tmp21 = getelementptr i8, i8* %tmp3, i32 %tmp5.sum71 ; [#uses=1] - store i8 %tmp19, i8* %tmp21 + %tmp17 = getelementptr i8, ptr %p, i32 %p_addr.076.0.sum92 ; [#uses=1] + %tmp19 = load i8, ptr %tmp17 ; [#uses=1] + %tmp21 = getelementptr i8, ptr %tmp3, i32 %tmp5.sum71 ; [#uses=1] + store i8 %tmp19, ptr %tmp21 %p_addr.076.0.sum91 = add i32 %p_addr.076.0.rec, 3 ; [#uses=1] - %tmp23 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum91 ; [#uses=1] - %tmp25 = load i8, i8* %tmp23 ; [#uses=1] - %tmp27 = getelementptr i8, i8* %tmp3, i32 %tmp5.sum70 ; [#uses=1] - store i8 %tmp25, i8* %tmp27 + %tmp23 = getelementptr i8, ptr %p, i32 %p_addr.076.0.sum91 ; [#uses=1] + %tmp25 = load i8, ptr %tmp23 ; [#uses=1] + %tmp27 = getelementptr i8, ptr %tmp3, i32 %tmp5.sum70 ; [#uses=1] + store i8 %tmp25, ptr %tmp27 %p_addr.076.0.sum90 = add i32 %p_addr.076.0.rec, 4 ; [#uses=1] - %tmp29 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum90 ; [#uses=1] - %tmp31 = load i8, i8* %tmp29 ; [#uses=1] - %tmp33 = getelementptr i8, i8* %tmp3, i32 %tmp5.sum69 ; [#uses=2] - store i8 %tmp31, i8* %tmp33 + %tmp29 = getelementptr i8, ptr %p, i32 %p_addr.076.0.sum90 ; [#uses=1] + %tmp31 = load i8, ptr %tmp29 ; [#uses=1] + %tmp33 = getelementptr i8, ptr %tmp3, i32 %tmp5.sum69 ; [#uses=2] + store i8 %tmp31, ptr %tmp33 %p_addr.076.0.sum89 = add i32 %p_addr.076.0.rec, 5 ; [#uses=1] - %tmp35 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum89 ; [#uses=1] - %tmp37 = load i8, i8* %tmp35 ; [#uses=1] - %tmp39 = getelementptr i8, i8* %tmp3, i32 %tmp5.sum68 ; [#uses=1] - store i8 %tmp37, i8* %tmp39 + %tmp35 = getelementptr i8, ptr %p, i32 %p_addr.076.0.sum89 ; [#uses=1] + %tmp37 = load i8, ptr %tmp35 ; [#uses=1] + %tmp39 = getelementptr i8, ptr %tmp3, i32 %tmp5.sum68 ; [#uses=1] + store i8 %tmp37, ptr %tmp39 %p_addr.076.0.sum88 = add i32 %p_addr.076.0.rec, 6 ; [#uses=1] - %tmp41 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum88 ; [#uses=1] - %tmp43 = load i8, i8* %tmp41 ; [#uses=1] - store i8 %tmp43, i8* %tmp33 + %tmp41 = getelementptr i8, ptr %p, i32 %p_addr.076.0.sum88 ; [#uses=1] + %tmp43 = load i8, ptr %tmp41 ; [#uses=1] + store i8 %tmp43, ptr %tmp33 %p_addr.076.0.sum87 = add i32 %p_addr.076.0.rec, 7 ; [#uses=1] - %tmp47 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum87 ; [#uses=1] - %tmp49 = load i8, i8* %tmp47 ; [#uses=1] - %tmp51 = getelementptr i8, i8* %tmp3, i32 %tmp5.sum66 ; [#uses=1] - store i8 %tmp49, i8* %tmp51 + %tmp47 = getelementptr i8, ptr %p, i32 %p_addr.076.0.sum87 ; [#uses=1] + %tmp49 = load i8, ptr %tmp47 ; [#uses=1] + %tmp51 = getelementptr i8, ptr %tmp3, i32 %tmp5.sum66 ; [#uses=1] + store i8 %tmp49, ptr %tmp51 %p_addr.076.0.sum = add i32 %p_addr.076.0.rec, 8 ; [#uses=1] - %tmp53 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum ; [#uses=1] - %tmp55 = load i8, i8* %tmp53 ; [#uses=1] - %tmp57 = getelementptr i8, i8* %tmp3, i32 %tmp5.sum ; [#uses=1] - store i8 %tmp55, i8* %tmp57 + %tmp53 = getelementptr i8, ptr %p, i32 %p_addr.076.0.sum ; [#uses=1] + %tmp55 = load i8, ptr %tmp53 ; [#uses=1] + %tmp57 = getelementptr i8, ptr %tmp3, i32 %tmp5.sum ; [#uses=1] + store i8 %tmp55, ptr %tmp57 %indvar.next = add i32 %i.073.0, 1 ; [#uses=2] icmp eq i32 %indvar.next, %size ; :1 [#uses=1] br i1 %1, label %return, label %bb diff --git a/llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll b/llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll index d04b0966b3a82..cb7e206b4d45c 100644 --- a/llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll +++ b/llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll @@ -4,23 +4,23 @@ define i32 @foo(i32 %A, i32 %B) { entry: - %A_addr = alloca i32 ; [#uses=2] - %B_addr = alloca i32 ; [#uses=1] - %retval = alloca i32, align 4 ; [#uses=2] - %tmp = alloca i32, align 4 ; [#uses=2] - %ret = alloca i32, align 4 ; [#uses=2] - store i32 %A, i32* %A_addr - store i32 %B, i32* %B_addr - %tmp1 = load i32, i32* %A_addr ; [#uses=1] + %A_addr = alloca i32 ; [#uses=2] + %B_addr = alloca i32 ; [#uses=1] + %retval = alloca i32, align 4 ; [#uses=2] + %tmp = alloca i32, align 4 ; [#uses=2] + %ret = alloca i32, align 4 ; [#uses=2] + store i32 %A, ptr %A_addr + store i32 %B, ptr %B_addr + %tmp1 = load i32, ptr %A_addr ; [#uses=1] %tmp2 = call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"( i32 7, i32 %tmp1 ) ; [#uses=1] - store i32 %tmp2, i32* %ret - %tmp3 = load i32, i32* %ret ; [#uses=1] - store i32 %tmp3, i32* %tmp - %tmp4 = load i32, i32* %tmp ; [#uses=1] - store i32 %tmp4, i32* %retval + store i32 %tmp2, ptr %ret + %tmp3 = load i32, ptr %ret ; [#uses=1] + store i32 %tmp3, ptr %tmp + %tmp4 = load i32, ptr %tmp ; [#uses=1] + store i32 %tmp4, ptr %retval br label %return return: ; preds = %entry - %retval5 = load i32, i32* %retval ; [#uses=1] + %retval5 = load i32, ptr %retval ; [#uses=1] ret i32 %retval5 } diff --git a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll index 806b3924b0347..9cc324ab1e5fc 100644 --- a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll +++ b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll @@ -10,7 +10,7 @@ define void @test() { ; CHECK-NEXT: mov %gs:72, %eax ; CHECK-NEXT: ## InlineAsm End ; CHECK-NEXT: retl - %tmp1 = tail call i32* asm sideeffect "mov %gs:${1:P}, $0", "=r,i,~{dirflag},~{fpsr},~{flags}"( i32 72 ) ; <%struct._pthread*> [#uses=1] + %tmp1 = tail call ptr asm sideeffect "mov %gs:${1:P}, $0", "=r,i,~{dirflag},~{fpsr},~{flags}"( i32 72 ) ; [#uses=1] ret void } diff --git a/llvm/test/CodeGen/X86/2007-03-26-CoalescerBug.ll b/llvm/test/CodeGen/X86/2007-03-26-CoalescerBug.ll index 52001f5c21dc1..c39e06639089e 100644 --- a/llvm/test/CodeGen/X86/2007-03-26-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2007-03-26-CoalescerBug.ll @@ -4,7 +4,7 @@ define void @foo(...) { bb1: - %t43 = load i64, i64* getelementptr ([339 x i64], [339 x i64]* @data, i32 0, i64 212), align 4 + %t43 = load i64, ptr getelementptr ([339 x i64], ptr @data, i32 0, i64 212), align 4 br i1 false, label %bb80, label %bb6 bb6: br i1 false, label %bb38, label %bb265 diff --git a/llvm/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll b/llvm/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll index 0b55af9c5ed96..d6af25a41ed36 100644 --- a/llvm/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll +++ b/llvm/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll @@ -4,15 +4,15 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "x86_64-unknown-linux-gnu" %struct.CycleCount = type { i64, i64 } - %struct.bc_struct = type { i32, i32, i32, i32, %struct.bc_struct*, i8*, i8* } -@_programStartTime = external global %struct.CycleCount ; <%struct.CycleCount*> [#uses=1] + %struct.bc_struct = type { i32, i32, i32, i32, ptr, ptr, ptr } +@_programStartTime = external global %struct.CycleCount ; [#uses=1] -define fastcc i32 @bc_divide(%struct.bc_struct* %n1, %struct.bc_struct* %n2, %struct.bc_struct** %quot, i32 %scale) nounwind { +define fastcc i32 @bc_divide(ptr %n1, ptr %n2, ptr %quot, i32 %scale) nounwind { entry: - %tmp7.i46 = tail call i64 asm sideeffect ".byte 0x0f,0x31", "={dx},=*{ax},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) getelementptr (%struct.CycleCount, %struct.CycleCount* @_programStartTime, i32 0, i32 1) ) ; [#uses=0] + %tmp7.i46 = tail call i64 asm sideeffect ".byte 0x0f,0x31", "={dx},=*{ax},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i64) getelementptr (%struct.CycleCount, ptr @_programStartTime, i32 0, i32 1) ) ; [#uses=0] %tmp221 = sdiv i32 10, 0 ; [#uses=1] - tail call fastcc void @_one_mult( i8* null, i32 0, i32 %tmp221, i8* null ) + tail call fastcc void @_one_mult( ptr null, i32 0, i32 %tmp221, ptr null ) ret i32 0 } -declare fastcc void @_one_mult(i8*, i32, i32, i8*) +declare fastcc void @_one_mult(ptr, i32, i32, ptr) diff --git a/llvm/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll b/llvm/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll index 5bf669bb1967f..eaa5a729192b5 100644 --- a/llvm/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll +++ b/llvm/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll @@ -3,7 +3,7 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3 target triple = "i686-apple-darwin8" define void @test(<4 x float> %tmp42i) { - %tmp42 = call <4 x float> asm "movss $1, $0", "=x,m,~{dirflag},~{fpsr},~{flags}"( float* null ) ; <<4 x float>> [#uses=1] + %tmp42 = call <4 x float> asm "movss $1, $0", "=x,m,~{dirflag},~{fpsr},~{flags}"( ptr null ) ; <<4 x float>> [#uses=1] %tmp49 = shufflevector <4 x float> %tmp42, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] br label %bb diff --git a/llvm/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll b/llvm/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll index 3997cfba7f3e1..ab99a7228b2a9 100644 --- a/llvm/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll +++ b/llvm/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll @@ -1,12 +1,12 @@ ; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=pic --frame-pointer=all - %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } + %struct.FILE = type { ptr, i32, i32, i16, i16, %struct.__sbuf, i32, ptr, ptr, ptr, ptr, ptr, %struct.__sbuf, ptr, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } %struct.__sFILEX = type opaque - %struct.__sbuf = type { i8*, i32 } + %struct.__sbuf = type { ptr, i32 } %struct.partition_def = type { i32, [1 x %struct.partition_elem] } - %struct.partition_elem = type { i32, %struct.partition_elem*, i32 } + %struct.partition_elem = type { i32, ptr, i32 } -define void @partition_print(%struct.partition_def* %part) { +define void @partition_print(ptr %part) { entry: br i1 false, label %bb.preheader, label %bb99 @@ -19,9 +19,9 @@ cond_true: ; preds = %bb.preheader bb32: ; preds = %bb32, %cond_true %i.2115.0 = phi i32 [ 0, %cond_true ], [ %indvar.next127, %bb32 ] ; [#uses=1] %c.2112.0 = phi i32 [ 0, %cond_true ], [ %tmp49, %bb32 ] ; [#uses=1] - %tmp43 = getelementptr %struct.partition_def, %struct.partition_def* %part, i32 0, i32 1, i32 %c.2112.0, i32 1 ; <%struct.partition_elem**> [#uses=1] - %tmp44 = load %struct.partition_elem*, %struct.partition_elem** %tmp43 ; <%struct.partition_elem*> [#uses=1] - %tmp4445 = ptrtoint %struct.partition_elem* %tmp44 to i32 ; [#uses=1] + %tmp43 = getelementptr %struct.partition_def, ptr %part, i32 0, i32 1, i32 %c.2112.0, i32 1 ; [#uses=1] + %tmp44 = load ptr, ptr %tmp43 ; [#uses=1] + %tmp4445 = ptrtoint ptr %tmp44 to i32 ; [#uses=1] %tmp48 = sub i32 %tmp4445, 0 ; [#uses=1] %tmp49 = sdiv i32 %tmp48, 12 ; [#uses=1] %indvar.next127 = add i32 %i.2115.0, 1 ; [#uses=2] diff --git a/llvm/test/CodeGen/X86/2007-04-24-Huge-Stack.ll b/llvm/test/CodeGen/X86/2007-04-24-Huge-Stack.ll index b6074053d454a..61a92b767b635 100644 --- a/llvm/test/CodeGen/X86/2007-04-24-Huge-Stack.ll +++ b/llvm/test/CodeGen/X86/2007-04-24-Huge-Stack.ll @@ -5,17 +5,17 @@ %struct.md5_ctx = type { i32, i32, i32, i32, [2 x i32], i32, [128 x i8], [4294967288 x i8] } -define i8* @md5_buffer(i8* %buffer, i64 %len, i8* %resblock) { +define ptr @md5_buffer(ptr %buffer, i64 %len, ptr %resblock) { entry: - %ctx = alloca %struct.md5_ctx, align 16 ; <%struct.md5_ctx*> [#uses=3] - call void @md5_init_ctx( %struct.md5_ctx* %ctx ) - call void @md5_process_bytes( i8* %buffer, i64 %len, %struct.md5_ctx* %ctx ) - %tmp4 = call i8* @md5_finish_ctx( %struct.md5_ctx* %ctx, i8* %resblock ) ; [#uses=1] - ret i8* %tmp4 + %ctx = alloca %struct.md5_ctx, align 16 ; [#uses=3] + call void @md5_init_ctx( ptr %ctx ) + call void @md5_process_bytes( ptr %buffer, i64 %len, ptr %ctx ) + %tmp4 = call ptr @md5_finish_ctx( ptr %ctx, ptr %resblock ) ; [#uses=1] + ret ptr %tmp4 } -declare void @md5_init_ctx(%struct.md5_ctx*) +declare void @md5_init_ctx(ptr) -declare i8* @md5_finish_ctx(%struct.md5_ctx*, i8*) +declare ptr @md5_finish_ctx(ptr, ptr) -declare void @md5_process_bytes(i8*, i64, %struct.md5_ctx*) +declare void @md5_process_bytes(ptr, i64, ptr) diff --git a/llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll b/llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll index e38992d8b3044..a4877fa2becf1 100644 --- a/llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll +++ b/llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll @@ -4,7 +4,7 @@ target triple = "i686-apple-darwin8" declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>) -define void @test(float* %P) { +define void @test(ptr %P) { entry: or <4 x i32> zeroinitializer, and (<4 x i32> bitcast (<4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer) to <4 x i32>), <4 x i32> < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 >) ; <<4 x i32>>:0 [#uses=1] bitcast <4 x i32> %0 to <4 x float> ; <<4 x float>>:1 [#uses=1] @@ -58,6 +58,6 @@ entry: shufflevector <4 x float> %48, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>>:49 [#uses=1] fadd <4 x float> %49, zeroinitializer ; <<4 x float>>:50 [#uses=1] %tmp5845 = extractelement <4 x float> %50, i32 2 ; [#uses=1] - store float %tmp5845, float* %P + store float %tmp5845, ptr %P ret void } diff --git a/llvm/test/CodeGen/X86/2007-05-05-Personality.ll b/llvm/test/CodeGen/X86/2007-05-05-Personality.ll index 3826380e22cc7..d19c5e5f0f481 100644 --- a/llvm/test/CodeGen/X86/2007-05-05-Personality.ll +++ b/llvm/test/CodeGen/X86/2007-05-05-Personality.ll @@ -12,16 +12,16 @@ @error = external global i8 -define void @_ada_x() personality i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*) { +define void @_ada_x() personality ptr @__gnat_eh_personality { entry: invoke void @raise() to label %eh_then unwind label %unwind unwind: ; preds = %entry - %eh_ptr = landingpad { i8*, i32 } - catch i8* @error - %eh_select = extractvalue { i8*, i32 } %eh_ptr, 1 - %eh_typeid = tail call i32 @llvm.eh.typeid.for(i8* @error) + %eh_ptr = landingpad { ptr, i32 } + catch ptr @error + %eh_select = extractvalue { ptr, i32 } %eh_ptr, 1 + %eh_typeid = tail call i32 @llvm.eh.typeid.for(ptr @error) %tmp2 = icmp eq i32 %eh_select, %eh_typeid br i1 %tmp2, label %eh_then, label %Unwind @@ -29,12 +29,12 @@ eh_then: ; preds = %unwind, %entry ret void Unwind: ; preds = %unwind - resume { i8*, i32 } %eh_ptr + resume { ptr, i32 } %eh_ptr } declare void @raise() -declare i32 @llvm.eh.typeid.for(i8*) nounwind +declare i32 @llvm.eh.typeid.for(ptr) nounwind declare i32 @__gnat_eh_personality(...) diff --git a/llvm/test/CodeGen/X86/2007-05-05-VecCastExpand.ll b/llvm/test/CodeGen/X86/2007-05-05-VecCastExpand.ll index 806472581910b..d217660e85c07 100644 --- a/llvm/test/CodeGen/X86/2007-05-05-VecCastExpand.ll +++ b/llvm/test/CodeGen/X86/2007-05-05-VecCastExpand.ll @@ -1,20 +1,20 @@ ; RUN: llc < %s -mtriple=i686-- -mcpu=i386 -mattr=+sse ; PR1371 -@str = external dso_local global [18 x i8] ; <[18 x i8]*> [#uses=1] +@str = external dso_local global [18 x i8] ; [#uses=1] define void @test() { bb.i: - %tmp.i660 = load <4 x float>, <4 x float>* null ; <<4 x float>> [#uses=1] - call void (i32, ...) @printf( i32 0, i8* getelementptr ([18 x i8], [18 x i8]* @str, i32 0, i64 0), double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 ) - %tmp152.i = load <4 x i32>, <4 x i32>* null ; <<4 x i32>> [#uses=1] + %tmp.i660 = load <4 x float>, ptr null ; <<4 x float>> [#uses=1] + call void (i32, ...) @printf( i32 0, ptr @str, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 ) + %tmp152.i = load <4 x i32>, ptr null ; <<4 x i32>> [#uses=1] %tmp156.i = bitcast <4 x i32> %tmp152.i to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp175.i = bitcast <4 x float> %tmp.i660 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp176.i = xor <4 x i32> %tmp156.i, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] %tmp177.i = and <4 x i32> %tmp176.i, %tmp175.i ; <<4 x i32>> [#uses=1] %tmp190.i = or <4 x i32> %tmp177.i, zeroinitializer ; <<4 x i32>> [#uses=1] %tmp191.i = bitcast <4 x i32> %tmp190.i to <4 x float> ; <<4 x float>> [#uses=1] - store <4 x float> %tmp191.i, <4 x float>* null + store <4 x float> %tmp191.i, ptr null ret void } diff --git a/llvm/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll b/llvm/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll index 24044e7ebb947..15e93ef257c15 100644 --- a/llvm/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll +++ b/llvm/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll @@ -1,11 +1,11 @@ ; RUN: llc < %s -mtriple=x86_64-- - %struct.XDesc = type <{ i32, %struct.OpaqueXDataStorageType** }> + %struct.XDesc = type <{ i32, ptr }> %struct.OpaqueXDataStorageType = type opaque -declare signext i16 @GetParamDesc(%struct.XDesc*, i32, i32, %struct.XDesc*) +declare signext i16 @GetParamDesc(ptr, i32, i32, ptr) -declare void @r_raise(i64, i8*, ...) +declare void @r_raise(i64, ptr, ...) define i64 @app_send_event(i64 %self, i64 %event_class, i64 %event_id, i64 %params, i64 %need_retval) { entry: @@ -18,8 +18,8 @@ cond_true109: ; preds = %entry br i1 false, label %cond_next164, label %cond_true239 cond_next164: ; preds = %cond_true109 - %tmp176 = call signext i16 @GetParamDesc( %struct.XDesc* null, i32 1701999219, i32 1413830740, %struct.XDesc* null ) - call void (i64, i8*, ...) @r_raise( i64 0, i8* null ) + %tmp176 = call signext i16 @GetParamDesc( ptr null, i32 1701999219, i32 1413830740, ptr null ) + call void (i64, ptr, ...) @r_raise( i64 0, ptr null ) unreachable cond_true239: ; preds = %cond_true109 diff --git a/llvm/test/CodeGen/X86/2007-05-15-maskmovq.ll b/llvm/test/CodeGen/X86/2007-05-15-maskmovq.ll index 5f1b3f92d9e9f..69f733461efc7 100644 --- a/llvm/test/CodeGen/X86/2007-05-15-maskmovq.ll +++ b/llvm/test/CodeGen/X86/2007-05-15-maskmovq.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah | FileCheck %s -define void @test(<1 x i64> %c64, <1 x i64> %mask1, i8* %P) { +define void @test(<1 x i64> %c64, <1 x i64> %mask1, ptr %P) { ; CHECK-LABEL: test: ; CHECK: ## %bb.0: ## %entry ; CHECK-NEXT: pushl %edi @@ -27,8 +27,8 @@ define void @test(<1 x i64> %c64, <1 x i64> %mask1, i8* %P) { entry: %tmp4 = bitcast <1 x i64> %mask1 to x86_mmx ; [#uses=1] %tmp6 = bitcast <1 x i64> %c64 to x86_mmx ; [#uses=1] - tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp4, x86_mmx %tmp6, i8* %P ) + tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp4, x86_mmx %tmp6, ptr %P ) ret void } -declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, i8*) +declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, ptr) diff --git a/llvm/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll b/llvm/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll index d5b5fa200dadc..d173ef226f9c1 100644 --- a/llvm/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll +++ b/llvm/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll @@ -6,7 +6,7 @@ declare <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) -define fastcc void @test(i32* %src, i32 %sbpr, i32* %dst, i32 %dbpr, i32 %w, i32 %h, i32 %dstalpha, i32 %mask) { +define fastcc void @test(ptr %src, i32 %sbpr, ptr %dst, i32 %dbpr, i32 %w, i32 %h, i32 %dstalpha, i32 %mask) { %tmp633 = shufflevector <8 x i16> zeroinitializer, <8 x i16> undef, <8 x i32> < i32 4, i32 4, i32 5, i32 5, i32 6, i32 6, i32 7, i32 7 > %tmp715 = mul <8 x i16> zeroinitializer, %tmp633 %tmp776 = bitcast <8 x i16> %tmp715 to <4 x i32> @@ -19,6 +19,6 @@ define fastcc void @test(i32* %src, i32 %sbpr, i32* %dst, i32 %dbpr, i32 %w, i32 %tmp1033 = add <4 x i32> zeroinitializer, %tmp1030 %tmp1048 = bitcast <4 x i32> %tmp1033 to <2 x i64> %tmp1049 = or <2 x i64> %tmp1048, zeroinitializer - store <2 x i64> %tmp1049, <2 x i64>* null + store <2 x i64> %tmp1049, ptr null ret void } diff --git a/llvm/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll b/llvm/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll index 7cba4c2531c9a..818c5a0284820 100644 --- a/llvm/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll +++ b/llvm/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll @@ -2,8 +2,8 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep ".align.*3" %struct.A = type { [1024 x i8] } -@_ZN1A1aE = global %struct.A zeroinitializer, align 32 ; <%struct.A*> [#uses=1] -@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [ { i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__I__ZN1A1aE, i8* null } ] ; <[1 x { i32, void ()*, i8* null }]*> [#uses=0] +@_ZN1A1aE = global %struct.A zeroinitializer, align 32 ; [#uses=1] +@llvm.global_ctors = appending global [1 x { i32, ptr, ptr }] [ { i32, ptr, ptr } { i32 65535, ptr @_GLOBAL__I__ZN1A1aE, ptr null } ] ; [#uses=0] define internal void @_GLOBAL__I__ZN1A1aE() section "__TEXT,__StaticInit,regular,pure_instructions" { entry: @@ -12,8 +12,8 @@ entry: bb.i: ; preds = %bb.i, %entry %i.1.i1.0 = phi i32 [ 0, %entry ], [ %indvar.next, %bb.i ] ; [#uses=2] %tmp1012.i = sext i32 %i.1.i1.0 to i64 ; [#uses=1] - %tmp13.i = getelementptr %struct.A, %struct.A* @_ZN1A1aE, i32 0, i32 0, i64 %tmp1012.i ; [#uses=1] - store i8 0, i8* %tmp13.i + %tmp13.i = getelementptr %struct.A, ptr @_ZN1A1aE, i32 0, i32 0, i64 %tmp1012.i ; [#uses=1] + store i8 0, ptr %tmp13.i %indvar.next = add i32 %i.1.i1.0, 1 ; [#uses=2] %exitcond = icmp eq i32 %indvar.next, 1024 ; [#uses=1] br i1 %exitcond, label %_Z41__static_initialization_and_destruction_0ii.exit, label %bb.i @@ -22,7 +22,7 @@ _Z41__static_initialization_and_destruction_0ii.exit: ; preds = %bb.i ret void } -define i32 @main(i32 %argc, i8** %argv) { +define i32 @main(i32 %argc, ptr %argv) { entry: ret i32 0 } diff --git a/llvm/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll b/llvm/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll index bd8917cd76376..8d1c89ab90d93 100644 --- a/llvm/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll +++ b/llvm/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll @@ -1,11 +1,11 @@ ; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -define void @test(<4 x float>* %arg) { - %tmp89 = getelementptr <4 x float>, <4 x float>* %arg, i64 3 +define void @test(ptr %arg) { + %tmp89 = getelementptr <4 x float>, ptr %arg, i64 3 %tmp1144 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, zeroinitializer - store <4 x float> %tmp1144, <4 x float>* null - %tmp1149 = load <4 x float>, <4 x float>* %tmp89 + store <4 x float> %tmp1144, ptr null + %tmp1149 = load <4 x float>, ptr %tmp89 %tmp1150 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp1149 - store <4 x float> %tmp1150, <4 x float>* %tmp89 + store <4 x float> %tmp1150, ptr %tmp89 ret void } diff --git a/llvm/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll b/llvm/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll index 73cb72ca19df0..79b06ba836af2 100644 --- a/llvm/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll +++ b/llvm/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | FileCheck %s -@R = external global x86_mmx ; [#uses=1] +@R = external global x86_mmx ; [#uses=1] define void @foo(<1 x i64> %A, <1 x i64> %B) nounwind { ; CHECK-LABEL: foo: @@ -17,7 +17,7 @@ entry: %tmp4 = bitcast <1 x i64> %B to x86_mmx ; <<4 x i16>> [#uses=1] %tmp6 = bitcast <1 x i64> %A to x86_mmx ; <<4 x i16>> [#uses=1] %tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp6, x86_mmx %tmp4 ) ; [#uses=1] - store x86_mmx %tmp7, x86_mmx* @R + store x86_mmx %tmp7, ptr @R tail call void @llvm.x86.mmx.emms( ) ret void } diff --git a/llvm/test/CodeGen/X86/2007-07-10-StackerAssert.ll b/llvm/test/CodeGen/X86/2007-07-10-StackerAssert.ll index c8660f797e2c6..b36d2bcef9fb1 100644 --- a/llvm/test/CodeGen/X86/2007-07-10-StackerAssert.ll +++ b/llvm/test/CodeGen/X86/2007-07-10-StackerAssert.ll @@ -1,9 +1,9 @@ ; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=athlon -relocation-model=pic ; PR1545 -@.str97 = external constant [56 x i8] ; <[56 x i8]*> [#uses=1] +@.str97 = external constant [56 x i8] ; [#uses=1] -declare void @PR_LogPrint(i8*, ...) +declare void @PR_LogPrint(ptr, ...) define i32 @_ZN13nsPrintEngine19SetupToPrintContentEP16nsIDeviceContextP12nsIDOMWindow() { entry: @@ -22,15 +22,15 @@ cond_true354: ; preds = %bb164 ret i32 0 bb383: ; preds = %bb164 - %tmp408 = load float, float* null ; [#uses=2] + %tmp408 = load float, ptr null ; [#uses=2] br i1 false, label %cond_true425, label %cond_next443 cond_true425: ; preds = %bb383 - %tmp430 = load float, float* null ; [#uses=1] + %tmp430 = load float, ptr null ; [#uses=1] %tmp432 = fsub float %tmp430, %tmp408 ; [#uses=1] %tmp432433 = fpext float %tmp432 to double ; [#uses=1] %tmp434435 = fpext float %tmp408 to double ; [#uses=1] - call void (i8*, ...) @PR_LogPrint( i8* getelementptr ([56 x i8], [56 x i8]* @.str97, i32 0, i32 0), double 0.000000e+00, double %tmp434435, double %tmp432433 ) + call void (ptr, ...) @PR_LogPrint( ptr @.str97, double 0.000000e+00, double %tmp434435, double %tmp432433 ) ret i32 0 cond_next443: ; preds = %bb383 diff --git a/llvm/test/CodeGen/X86/2007-07-18-Vector-Extract.ll b/llvm/test/CodeGen/X86/2007-07-18-Vector-Extract.ll index 63ed4601a04a6..a465ae7e056c7 100644 --- a/llvm/test/CodeGen/X86/2007-07-18-Vector-Extract.ll +++ b/llvm/test/CodeGen/X86/2007-07-18-Vector-Extract.ll @@ -2,16 +2,16 @@ ; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse | FileCheck %s ; CHECK: movq ([[A0:%rdi|%rcx]]), %rax ; CHECK: movq 8([[A0]]), %rax -define i64 @foo_0(<2 x i64>* %val) { +define i64 @foo_0(ptr %val) { entry: - %val12 = getelementptr <2 x i64>, <2 x i64>* %val, i32 0, i32 0 ; [#uses=1] - %tmp7 = load i64, i64* %val12 ; [#uses=1] + %val12 = getelementptr <2 x i64>, ptr %val, i32 0, i32 0 ; [#uses=1] + %tmp7 = load i64, ptr %val12 ; [#uses=1] ret i64 %tmp7 } -define i64 @foo_1(<2 x i64>* %val) { +define i64 @foo_1(ptr %val) { entry: - %tmp2.gep = getelementptr <2 x i64>, <2 x i64>* %val, i32 0, i32 1 ; [#uses=1] - %tmp4 = load i64, i64* %tmp2.gep ; [#uses=1] + %tmp2.gep = getelementptr <2 x i64>, ptr %val, i32 0, i32 1 ; [#uses=1] + %tmp4 = load i64, ptr %tmp2.gep ; [#uses=1] ret i64 %tmp4 } diff --git a/llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll b/llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll index dba27937634a2..3c119c2f09dac 100644 --- a/llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll +++ b/llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll @@ -1,25 +1,25 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s - %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, [4 x i8], i64 } - %struct.PyBoolScalarObject = type { i64, %struct._typeobject*, i8 } - %struct.PyBufferProcs = type { i64 (%struct.PyObject*, i64, i8**)*, i64 (%struct.PyObject*, i64, i8**)*, i64 (%struct.PyObject*, i64*)*, i64 (%struct.PyObject*, i64, i8**)* } - %struct.PyGetSetDef = type { i8*, %struct.PyObject* (%struct.PyObject*, i8*)*, i32 (%struct.PyObject*, %struct.PyObject*, i8*)*, i8*, i8* } - %struct.PyMappingMethods = type { i64 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)* } + %struct.FILE = type { ptr, i32, i32, i16, i16, %struct.__sbuf, i32, ptr, ptr, ptr, ptr, ptr, %struct.__sbuf, ptr, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, [4 x i8], i64 } + %struct.PyBoolScalarObject = type { i64, ptr, i8 } + %struct.PyBufferProcs = type { ptr, ptr, ptr, ptr } + %struct.PyGetSetDef = type { ptr, ptr, ptr, ptr, ptr } + %struct.PyMappingMethods = type { ptr, ptr, ptr } %struct.PyMemberDef = type opaque - %struct.PyMethodDef = type { i8*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, i32, i8* } - %struct.PyNumberMethods = type { %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, i32 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, i32 (%struct.PyObject**, %struct.PyObject**)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)* } - %struct.PyObject = type { i64, %struct._typeobject* } - %struct.PySequenceMethods = type { i64 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, i64)*, %struct.PyObject* (%struct.PyObject*, i64)*, %struct.PyObject* (%struct.PyObject*, i64, i64)*, i32 (%struct.PyObject*, i64, %struct.PyObject*)*, i32 (%struct.PyObject*, i64, i64, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, i64)* } - %struct.PyTupleObject = type { i64, %struct._typeobject*, i64, [1 x %struct.PyObject*] } + %struct.PyMethodDef = type { ptr, ptr, i32, ptr } + %struct.PyNumberMethods = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr } + %struct.PyObject = type { i64, ptr } + %struct.PySequenceMethods = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr } + %struct.PyTupleObject = type { i64, ptr, i64, [1 x ptr] } %struct.__sFILEX = type opaque - %struct.__sbuf = type { i8*, i32 } - %struct._typeobject = type { i64, %struct._typeobject*, i64, i8*, i64, i64, void (%struct.PyObject*)*, i32 (%struct.PyObject*, %struct.FILE*, i32)*, %struct.PyObject* (%struct.PyObject*, i8*)*, i32 (%struct.PyObject*, i8*, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyNumberMethods*, %struct.PySequenceMethods*, %struct.PyMappingMethods*, i64 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyBufferProcs*, i64, i8*, i32 (%struct.PyObject*, i32 (%struct.PyObject*, i8*)*, i8*)*, i32 (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, i32)*, i64, %struct.PyObject* (%struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*)*, %struct.PyMethodDef*, %struct.PyMemberDef*, %struct.PyGetSetDef*, %struct._typeobject*, %struct.PyObject*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, i32 (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, i64, i32 (%struct.PyObject*, %struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct._typeobject*, i64)*, %struct.PyObject* (%struct._typeobject*, %struct.PyObject*, %struct.PyObject*)*, void (i8*)*, i32 (%struct.PyObject*)*, %struct.PyObject*, %struct.PyObject*, %struct.PyObject*, %struct.PyObject*, %struct.PyObject*, void (%struct.PyObject*)* } -@PyArray_API = external global i8** ; [#uses=4] -@PyUFunc_API = external global i8** ; [#uses=4] -@.str5 = external constant [14 x i8] ; <[14 x i8]*> [#uses=1] + %struct.__sbuf = type { ptr, i32 } + %struct._typeobject = type { i64, ptr, i64, ptr, i64, i64, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, ptr, ptr, ptr, ptr, i64, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr } +@PyArray_API = external global ptr ; [#uses=4] +@PyUFunc_API = external global ptr ; [#uses=4] +@.str5 = external constant [14 x i8] ; [#uses=1] -define %struct.PyObject* @ubyte_divmod(%struct.PyObject* %a, %struct.PyObject* %b) { +define ptr @ubyte_divmod(ptr %a, ptr %b) { ; CHECK-LABEL: ubyte_divmod: ; CHECK: ## %bb.0: ## %entry ; CHECK-NEXT: pushq %rbp @@ -190,18 +190,18 @@ define %struct.PyObject* @ubyte_divmod(%struct.PyObject* %a, %struct.PyObject* % ; CHECK-NEXT: popq %rbp ; CHECK-NEXT: retq entry: - %arg1 = alloca i8, align 1 ; [#uses=3] - %arg2 = alloca i8, align 1 ; [#uses=3] - %first = alloca i32, align 4 ; [#uses=2] - %bufsize = alloca i32, align 4 ; [#uses=1] - %errmask = alloca i32, align 4 ; [#uses=2] - %errobj = alloca %struct.PyObject*, align 8 ; <%struct.PyObject**> [#uses=2] - %tmp3.i = call fastcc i32 @_ubyte_convert_to_ctype( %struct.PyObject* %a, i8* %arg1 ) ; [#uses=2] + %arg1 = alloca i8, align 1 ; [#uses=3] + %arg2 = alloca i8, align 1 ; [#uses=3] + %first = alloca i32, align 4 ; [#uses=2] + %bufsize = alloca i32, align 4 ; [#uses=1] + %errmask = alloca i32, align 4 ; [#uses=2] + %errobj = alloca ptr, align 8 ; [#uses=2] + %tmp3.i = call fastcc i32 @_ubyte_convert_to_ctype( ptr %a, ptr %arg1 ) ; [#uses=2] %tmp5.i = icmp slt i32 %tmp3.i, 0 ; [#uses=1] br i1 %tmp5.i, label %_ubyte_convert2_to_ctypes.exit, label %cond_next.i cond_next.i: ; preds = %entry - %tmp11.i = call fastcc i32 @_ubyte_convert_to_ctype( %struct.PyObject* %b, i8* %arg2 ) ; [#uses=2] + %tmp11.i = call fastcc i32 @_ubyte_convert_to_ctype( ptr %b, ptr %arg2 ) ; [#uses=2] %tmp13.i = icmp slt i32 %tmp11.i, 0 ; [#uses=1] %retval.i = select i1 %tmp13.i, i32 %tmp11.i, i32 0 ; [#uses=1] switch i32 %retval.i, label %bb35 [ @@ -216,55 +216,52 @@ _ubyte_convert2_to_ctypes.exit: ; preds = %entry ] bb4: ; preds = %_ubyte_convert2_to_ctypes.exit, %cond_next.i - %tmp5 = load i8**, i8*** @PyArray_API, align 8 ; [#uses=1] - %tmp6 = getelementptr i8*, i8** %tmp5, i64 2 ; [#uses=1] - %tmp7 = load i8*, i8** %tmp6 ; [#uses=1] - %tmp78 = bitcast i8* %tmp7 to %struct._typeobject* ; <%struct._typeobject*> [#uses=1] - %tmp9 = getelementptr %struct._typeobject, %struct._typeobject* %tmp78, i32 0, i32 12 ; <%struct.PyNumberMethods**> [#uses=1] - %tmp10 = load %struct.PyNumberMethods*, %struct.PyNumberMethods** %tmp9 ; <%struct.PyNumberMethods*> [#uses=1] - %tmp11 = getelementptr %struct.PyNumberMethods, %struct.PyNumberMethods* %tmp10, i32 0, i32 5 ; <%struct.PyObject* (%struct.PyObject*, %struct.PyObject*)**> [#uses=1] - %tmp12 = load %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)** %tmp11 ; <%struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*> [#uses=1] - %tmp15 = call %struct.PyObject* %tmp12( %struct.PyObject* %a, %struct.PyObject* %b ) ; <%struct.PyObject*> [#uses=1] - ret %struct.PyObject* %tmp15 + %tmp5 = load ptr, ptr @PyArray_API, align 8 ; [#uses=1] + %tmp6 = getelementptr ptr, ptr %tmp5, i64 2 ; [#uses=1] + %tmp7 = load ptr, ptr %tmp6 ; [#uses=1] + %tmp9 = getelementptr %struct._typeobject, ptr %tmp7, i32 0, i32 12 ; [#uses=1] + %tmp10 = load ptr, ptr %tmp9 ; [#uses=1] + %tmp11 = getelementptr %struct.PyNumberMethods, ptr %tmp10, i32 0, i32 5 ; [#uses=1] + %tmp12 = load ptr, ptr %tmp11 ; [#uses=1] + %tmp15 = call ptr %tmp12( ptr %a, ptr %b ) ; [#uses=1] + ret ptr %tmp15 bb17: ; preds = %_ubyte_convert2_to_ctypes.exit, %cond_next.i - %tmp18 = call %struct.PyObject* @PyErr_Occurred( ) ; <%struct.PyObject*> [#uses=1] - %tmp19 = icmp eq %struct.PyObject* %tmp18, null ; [#uses=1] + %tmp18 = call ptr @PyErr_Occurred( ) ; [#uses=1] + %tmp19 = icmp eq ptr %tmp18, null ; [#uses=1] br i1 %tmp19, label %cond_next, label %UnifiedReturnBlock cond_next: ; preds = %bb17 - %tmp22 = load i8**, i8*** @PyArray_API, align 8 ; [#uses=1] - %tmp23 = getelementptr i8*, i8** %tmp22, i64 10 ; [#uses=1] - %tmp24 = load i8*, i8** %tmp23 ; [#uses=1] - %tmp2425 = bitcast i8* %tmp24 to %struct._typeobject* ; <%struct._typeobject*> [#uses=1] - %tmp26 = getelementptr %struct._typeobject, %struct._typeobject* %tmp2425, i32 0, i32 12 ; <%struct.PyNumberMethods**> [#uses=1] - %tmp27 = load %struct.PyNumberMethods*, %struct.PyNumberMethods** %tmp26 ; <%struct.PyNumberMethods*> [#uses=1] - %tmp28 = getelementptr %struct.PyNumberMethods, %struct.PyNumberMethods* %tmp27, i32 0, i32 5 ; <%struct.PyObject* (%struct.PyObject*, %struct.PyObject*)**> [#uses=1] - %tmp29 = load %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*, %struct.PyObject* (%struct.PyObject*, %struct.PyObject*)** %tmp28 ; <%struct.PyObject* (%struct.PyObject*, %struct.PyObject*)*> [#uses=1] - %tmp32 = call %struct.PyObject* %tmp29( %struct.PyObject* %a, %struct.PyObject* %b ) ; <%struct.PyObject*> [#uses=1] - ret %struct.PyObject* %tmp32 + %tmp22 = load ptr, ptr @PyArray_API, align 8 ; [#uses=1] + %tmp23 = getelementptr ptr, ptr %tmp22, i64 10 ; [#uses=1] + %tmp24 = load ptr, ptr %tmp23 ; [#uses=1] + %tmp26 = getelementptr %struct._typeobject, ptr %tmp24, i32 0, i32 12 ; [#uses=1] + %tmp27 = load ptr, ptr %tmp26 ; [#uses=1] + %tmp28 = getelementptr %struct.PyNumberMethods, ptr %tmp27, i32 0, i32 5 ; [#uses=1] + %tmp29 = load ptr, ptr %tmp28 ; [#uses=1] + %tmp32 = call ptr %tmp29( ptr %a, ptr %b ) ; [#uses=1] + ret ptr %tmp32 bb35: ; preds = %_ubyte_convert2_to_ctypes.exit, %cond_next.i - %tmp36 = load i8**, i8*** @PyUFunc_API, align 8 ; [#uses=1] - %tmp37 = getelementptr i8*, i8** %tmp36, i64 27 ; [#uses=1] - %tmp38 = load i8*, i8** %tmp37 ; [#uses=1] - %tmp3839 = bitcast i8* %tmp38 to void ()* ; [#uses=1] - call void %tmp3839( ) - %tmp40 = load i8, i8* %arg2, align 1 ; [#uses=4] + %tmp36 = load ptr, ptr @PyUFunc_API, align 8 ; [#uses=1] + %tmp37 = getelementptr ptr, ptr %tmp36, i64 27 ; [#uses=1] + %tmp38 = load ptr, ptr %tmp37 ; [#uses=1] + call void %tmp38( ) + %tmp40 = load i8, ptr %arg2, align 1 ; [#uses=4] %tmp1.i = icmp eq i8 %tmp40, 0 ; [#uses=2] br i1 %tmp1.i, label %cond_true.i, label %cond_false.i cond_true.i: ; preds = %bb35 %tmp3.i196 = call i32 @feraiseexcept( i32 4 ) ; [#uses=0] - %tmp46207 = load i8, i8* %arg2, align 1 ; [#uses=3] - %tmp48208 = load i8, i8* %arg1, align 1 ; [#uses=2] + %tmp46207 = load i8, ptr %arg2, align 1 ; [#uses=3] + %tmp48208 = load i8, ptr %arg1, align 1 ; [#uses=2] %tmp1.i197210 = icmp eq i8 %tmp48208, 0 ; [#uses=1] %tmp4.i212 = icmp eq i8 %tmp46207, 0 ; [#uses=1] %tmp7.i198213 = or i1 %tmp1.i197210, %tmp4.i212 ; [#uses=1] br i1 %tmp7.i198213, label %cond_true.i200, label %cond_next17.i cond_false.i: ; preds = %bb35 - %tmp42 = load i8, i8* %arg1, align 1 ; [#uses=3] + %tmp42 = load i8, ptr %arg1, align 1 ; [#uses=3] %tmp7.i = udiv i8 %tmp42, %tmp40 ; [#uses=2] %tmp1.i197 = icmp eq i8 %tmp42, 0 ; [#uses=1] %tmp7.i198 = or i1 %tmp1.i197, %tmp1.i ; [#uses=1] @@ -290,116 +287,108 @@ cond_next17.i: ; preds = %cond_false.i, %cond_true.i ubyte_ctype_remainder.exit: ; preds = %cond_next17.i, %cond_true14.i, %cond_true.i200 %out2.0 = phi i8 [ %tmp20.i, %cond_next17.i ], [ 0, %cond_true14.i ], [ 0, %cond_true.i200 ] ; [#uses=1] %out.2 = phi i8 [ %out.1, %cond_next17.i ], [ %out.0, %cond_true14.i ], [ %out.0, %cond_true.i200 ] ; [#uses=1] - %tmp52 = load i8**, i8*** @PyUFunc_API, align 8 ; [#uses=1] - %tmp53 = getelementptr i8*, i8** %tmp52, i64 28 ; [#uses=1] - %tmp54 = load i8*, i8** %tmp53 ; [#uses=1] - %tmp5455 = bitcast i8* %tmp54 to i32 ()* ; [#uses=1] - %tmp56 = call i32 %tmp5455( ) ; [#uses=2] + %tmp52 = load ptr, ptr @PyUFunc_API, align 8 ; [#uses=1] + %tmp53 = getelementptr ptr, ptr %tmp52, i64 28 ; [#uses=1] + %tmp54 = load ptr, ptr %tmp53 ; [#uses=1] + %tmp56 = call i32 %tmp54( ) ; [#uses=2] %tmp58 = icmp eq i32 %tmp56, 0 ; [#uses=1] br i1 %tmp58, label %cond_next89, label %cond_true61 cond_true61: ; preds = %ubyte_ctype_remainder.exit - %tmp62 = load i8**, i8*** @PyUFunc_API, align 8 ; [#uses=1] - %tmp63 = getelementptr i8*, i8** %tmp62, i64 25 ; [#uses=1] - %tmp64 = load i8*, i8** %tmp63 ; [#uses=1] - %tmp6465 = bitcast i8* %tmp64 to i32 (i8*, i32*, i32*, %struct.PyObject**)* ; [#uses=1] - %tmp67 = call i32 %tmp6465( i8* getelementptr ([14 x i8], [14 x i8]* @.str5, i32 0, i64 0), i32* %bufsize, i32* %errmask, %struct.PyObject** %errobj ) ; [#uses=1] + %tmp62 = load ptr, ptr @PyUFunc_API, align 8 ; [#uses=1] + %tmp63 = getelementptr ptr, ptr %tmp62, i64 25 ; [#uses=1] + %tmp64 = load ptr, ptr %tmp63 ; [#uses=1] + %tmp67 = call i32 %tmp64( ptr @.str5, ptr %bufsize, ptr %errmask, ptr %errobj ) ; [#uses=1] %tmp68 = icmp slt i32 %tmp67, 0 ; [#uses=1] br i1 %tmp68, label %UnifiedReturnBlock, label %cond_next73 cond_next73: ; preds = %cond_true61 - store i32 1, i32* %first, align 4 - %tmp74 = load i8**, i8*** @PyUFunc_API, align 8 ; [#uses=1] - %tmp75 = getelementptr i8*, i8** %tmp74, i64 29 ; [#uses=1] - %tmp76 = load i8*, i8** %tmp75 ; [#uses=1] - %tmp7677 = bitcast i8* %tmp76 to i32 (i32, %struct.PyObject*, i32, i32*)* ; [#uses=1] - %tmp79 = load %struct.PyObject*, %struct.PyObject** %errobj, align 8 ; <%struct.PyObject*> [#uses=1] - %tmp80 = load i32, i32* %errmask, align 4 ; [#uses=1] - %tmp82 = call i32 %tmp7677( i32 %tmp80, %struct.PyObject* %tmp79, i32 %tmp56, i32* %first ) ; [#uses=1] + store i32 1, ptr %first, align 4 + %tmp74 = load ptr, ptr @PyUFunc_API, align 8 ; [#uses=1] + %tmp75 = getelementptr ptr, ptr %tmp74, i64 29 ; [#uses=1] + %tmp76 = load ptr, ptr %tmp75 ; [#uses=1] + %tmp79 = load ptr, ptr %errobj, align 8 ; [#uses=1] + %tmp80 = load i32, ptr %errmask, align 4 ; [#uses=1] + %tmp82 = call i32 %tmp76( i32 %tmp80, ptr %tmp79, i32 %tmp56, ptr %first ) ; [#uses=1] %tmp83 = icmp eq i32 %tmp82, 0 ; [#uses=1] br i1 %tmp83, label %cond_next89, label %UnifiedReturnBlock cond_next89: ; preds = %cond_next73, %ubyte_ctype_remainder.exit - %tmp90 = call %struct.PyObject* @PyTuple_New( i64 2 ) ; <%struct.PyObject*> [#uses=9] - %tmp92 = icmp eq %struct.PyObject* %tmp90, null ; [#uses=1] + %tmp90 = call ptr @PyTuple_New( i64 2 ) ; [#uses=9] + %tmp92 = icmp eq ptr %tmp90, null ; [#uses=1] br i1 %tmp92, label %UnifiedReturnBlock, label %cond_next97 cond_next97: ; preds = %cond_next89 - %tmp98 = load i8**, i8*** @PyArray_API, align 8 ; [#uses=1] - %tmp99 = getelementptr i8*, i8** %tmp98, i64 25 ; [#uses=1] - %tmp100 = load i8*, i8** %tmp99 ; [#uses=1] - %tmp100101 = bitcast i8* %tmp100 to %struct._typeobject* ; <%struct._typeobject*> [#uses=2] - %tmp102 = getelementptr %struct._typeobject, %struct._typeobject* %tmp100101, i32 0, i32 38 ; <%struct.PyObject* (%struct._typeobject*, i64)**> [#uses=1] - %tmp103 = load %struct.PyObject* (%struct._typeobject*, i64)*, %struct.PyObject* (%struct._typeobject*, i64)** %tmp102 ; <%struct.PyObject* (%struct._typeobject*, i64)*> [#uses=1] - %tmp108 = call %struct.PyObject* %tmp103( %struct._typeobject* %tmp100101, i64 0 ) ; <%struct.PyObject*> [#uses=3] - %tmp110 = icmp eq %struct.PyObject* %tmp108, null ; [#uses=1] + %tmp98 = load ptr, ptr @PyArray_API, align 8 ; [#uses=1] + %tmp99 = getelementptr ptr, ptr %tmp98, i64 25 ; [#uses=1] + %tmp100 = load ptr, ptr %tmp99 ; [#uses=1] + %tmp102 = getelementptr %struct._typeobject, ptr %tmp100, i32 0, i32 38 ; [#uses=1] + %tmp103 = load ptr, ptr %tmp102 ; [#uses=1] + %tmp108 = call ptr %tmp103( ptr %tmp100, i64 0 ) ; [#uses=3] + %tmp110 = icmp eq ptr %tmp108, null ; [#uses=1] br i1 %tmp110, label %cond_true113, label %cond_next135 cond_true113: ; preds = %cond_next97 - %tmp115 = getelementptr %struct.PyObject, %struct.PyObject* %tmp90, i32 0, i32 0 ; [#uses=2] - %tmp116 = load i64, i64* %tmp115 ; [#uses=1] + %tmp115 = getelementptr %struct.PyObject, ptr %tmp90, i32 0, i32 0 ; [#uses=2] + %tmp116 = load i64, ptr %tmp115 ; [#uses=1] %tmp117 = add i64 %tmp116, -1 ; [#uses=2] - store i64 %tmp117, i64* %tmp115 + store i64 %tmp117, ptr %tmp115 %tmp123 = icmp eq i64 %tmp117, 0 ; [#uses=1] br i1 %tmp123, label %cond_true126, label %UnifiedReturnBlock cond_true126: ; preds = %cond_true113 - %tmp128 = getelementptr %struct.PyObject, %struct.PyObject* %tmp90, i32 0, i32 1 ; <%struct._typeobject**> [#uses=1] - %tmp129 = load %struct._typeobject*, %struct._typeobject** %tmp128 ; <%struct._typeobject*> [#uses=1] - %tmp130 = getelementptr %struct._typeobject, %struct._typeobject* %tmp129, i32 0, i32 6 ; [#uses=1] - %tmp131 = load void (%struct.PyObject*)*, void (%struct.PyObject*)** %tmp130 ; [#uses=1] - call void %tmp131( %struct.PyObject* %tmp90 ) - ret %struct.PyObject* null + %tmp128 = getelementptr %struct.PyObject, ptr %tmp90, i32 0, i32 1 ; [#uses=1] + %tmp129 = load ptr, ptr %tmp128 ; [#uses=1] + %tmp130 = getelementptr %struct._typeobject, ptr %tmp129, i32 0, i32 6 ; [#uses=1] + %tmp131 = load ptr, ptr %tmp130 ; [#uses=1] + call void %tmp131( ptr %tmp90 ) + ret ptr null cond_next135: ; preds = %cond_next97 - %tmp136137 = bitcast %struct.PyObject* %tmp108 to %struct.PyBoolScalarObject* ; <%struct.PyBoolScalarObject*> [#uses=1] - %tmp139 = getelementptr %struct.PyBoolScalarObject, %struct.PyBoolScalarObject* %tmp136137, i32 0, i32 2 ; [#uses=1] - store i8 %out.2, i8* %tmp139 - %tmp140141 = bitcast %struct.PyObject* %tmp90 to %struct.PyTupleObject* ; <%struct.PyTupleObject*> [#uses=2] - %tmp143 = getelementptr %struct.PyTupleObject, %struct.PyTupleObject* %tmp140141, i32 0, i32 3, i64 0 ; <%struct.PyObject**> [#uses=1] - store %struct.PyObject* %tmp108, %struct.PyObject** %tmp143 - %tmp145 = load i8**, i8*** @PyArray_API, align 8 ; [#uses=1] - %tmp146 = getelementptr i8*, i8** %tmp145, i64 25 ; [#uses=1] - %tmp147 = load i8*, i8** %tmp146 ; [#uses=1] - %tmp147148 = bitcast i8* %tmp147 to %struct._typeobject* ; <%struct._typeobject*> [#uses=2] - %tmp149 = getelementptr %struct._typeobject, %struct._typeobject* %tmp147148, i32 0, i32 38 ; <%struct.PyObject* (%struct._typeobject*, i64)**> [#uses=1] - %tmp150 = load %struct.PyObject* (%struct._typeobject*, i64)*, %struct.PyObject* (%struct._typeobject*, i64)** %tmp149 ; <%struct.PyObject* (%struct._typeobject*, i64)*> [#uses=1] - %tmp155 = call %struct.PyObject* %tmp150( %struct._typeobject* %tmp147148, i64 0 ) ; <%struct.PyObject*> [#uses=3] - %tmp157 = icmp eq %struct.PyObject* %tmp155, null ; [#uses=1] + %tmp139 = getelementptr %struct.PyBoolScalarObject, ptr %tmp108, i32 0, i32 2 ; [#uses=1] + store i8 %out.2, ptr %tmp139 + %tmp143 = getelementptr %struct.PyTupleObject, ptr %tmp90, i32 0, i32 3, i64 0 ; [#uses=1] + store ptr %tmp108, ptr %tmp143 + %tmp145 = load ptr, ptr @PyArray_API, align 8 ; [#uses=1] + %tmp146 = getelementptr ptr, ptr %tmp145, i64 25 ; [#uses=1] + %tmp147 = load ptr, ptr %tmp146 ; [#uses=1] + %tmp149 = getelementptr %struct._typeobject, ptr %tmp147, i32 0, i32 38 ; [#uses=1] + %tmp150 = load ptr, ptr %tmp149 ; [#uses=1] + %tmp155 = call ptr %tmp150( ptr %tmp147, i64 0 ) ; [#uses=3] + %tmp157 = icmp eq ptr %tmp155, null ; [#uses=1] br i1 %tmp157, label %cond_true160, label %cond_next182 cond_true160: ; preds = %cond_next135 - %tmp162 = getelementptr %struct.PyObject, %struct.PyObject* %tmp90, i32 0, i32 0 ; [#uses=2] - %tmp163 = load i64, i64* %tmp162 ; [#uses=1] + %tmp162 = getelementptr %struct.PyObject, ptr %tmp90, i32 0, i32 0 ; [#uses=2] + %tmp163 = load i64, ptr %tmp162 ; [#uses=1] %tmp164 = add i64 %tmp163, -1 ; [#uses=2] - store i64 %tmp164, i64* %tmp162 + store i64 %tmp164, ptr %tmp162 %tmp170 = icmp eq i64 %tmp164, 0 ; [#uses=1] br i1 %tmp170, label %cond_true173, label %UnifiedReturnBlock cond_true173: ; preds = %cond_true160 - %tmp175 = getelementptr %struct.PyObject, %struct.PyObject* %tmp90, i32 0, i32 1 ; <%struct._typeobject**> [#uses=1] - %tmp176 = load %struct._typeobject*, %struct._typeobject** %tmp175 ; <%struct._typeobject*> [#uses=1] - %tmp177 = getelementptr %struct._typeobject, %struct._typeobject* %tmp176, i32 0, i32 6 ; [#uses=1] - %tmp178 = load void (%struct.PyObject*)*, void (%struct.PyObject*)** %tmp177 ; [#uses=1] - call void %tmp178( %struct.PyObject* %tmp90 ) - ret %struct.PyObject* null + %tmp175 = getelementptr %struct.PyObject, ptr %tmp90, i32 0, i32 1 ; [#uses=1] + %tmp176 = load ptr, ptr %tmp175 ; [#uses=1] + %tmp177 = getelementptr %struct._typeobject, ptr %tmp176, i32 0, i32 6 ; [#uses=1] + %tmp178 = load ptr, ptr %tmp177 ; [#uses=1] + call void %tmp178( ptr %tmp90 ) + ret ptr null cond_next182: ; preds = %cond_next135 - %tmp183184 = bitcast %struct.PyObject* %tmp155 to %struct.PyBoolScalarObject* ; <%struct.PyBoolScalarObject*> [#uses=1] - %tmp186 = getelementptr %struct.PyBoolScalarObject, %struct.PyBoolScalarObject* %tmp183184, i32 0, i32 2 ; [#uses=1] - store i8 %out2.0, i8* %tmp186 - %tmp190 = getelementptr %struct.PyTupleObject, %struct.PyTupleObject* %tmp140141, i32 0, i32 3, i64 1 ; <%struct.PyObject**> [#uses=1] - store %struct.PyObject* %tmp155, %struct.PyObject** %tmp190 - ret %struct.PyObject* %tmp90 + %tmp186 = getelementptr %struct.PyBoolScalarObject, ptr %tmp155, i32 0, i32 2 ; [#uses=1] + store i8 %out2.0, ptr %tmp186 + %tmp190 = getelementptr %struct.PyTupleObject, ptr %tmp90, i32 0, i32 3, i64 1 ; [#uses=1] + store ptr %tmp155, ptr %tmp190 + ret ptr %tmp90 UnifiedReturnBlock: ; preds = %cond_true160, %cond_true113, %cond_next89, %cond_next73, %cond_true61, %bb17 - ret %struct.PyObject* null + ret ptr null } declare i32 @feraiseexcept(i32) -declare fastcc i32 @_ubyte_convert_to_ctype(%struct.PyObject*, i8*) +declare fastcc i32 @_ubyte_convert_to_ctype(ptr, ptr) -declare %struct.PyObject* @PyErr_Occurred() +declare ptr @PyErr_Occurred() -declare %struct.PyObject* @PyTuple_New(i64) +declare ptr @PyTuple_New(i64) diff --git a/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll b/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll index 749172083414d..9f1b5f7358b9c 100644 --- a/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll +++ b/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-- | FileCheck %s -@X = global i32 0 ; [#uses=1] +@X = global i32 0 ; [#uses=1] define i32 @_Z3fooi(i32 %x) { ; CHECK-LABEL: _Z3fooi: @@ -11,7 +11,7 @@ define i32 @_Z3fooi(i32 %x) { ; CHECK-NEXT: movsbl %al, %eax ; CHECK-NEXT: retl entry: - store i32 %x, i32* @X, align 4 + store i32 %x, ptr @X, align 4 %retval67 = trunc i32 %x to i8 ; [#uses=1] %retval = sext i8 %retval67 to i32 ret i32 %retval diff --git a/llvm/test/CodeGen/X86/2007-09-05-InvalidAsm.ll b/llvm/test/CodeGen/X86/2007-09-05-InvalidAsm.ll index eb715125b17d9..9b6b90da9f6c2 100644 --- a/llvm/test/CodeGen/X86/2007-09-05-InvalidAsm.ll +++ b/llvm/test/CodeGen/X86/2007-09-05-InvalidAsm.ll @@ -1,50 +1,46 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin -x86-asm-syntax=intel | FileCheck %s ; CHECK-NOT: lea R - %struct.AGenericCall = type { %struct.AGenericManager*, %struct.ComponentParameters*, i32* } + %struct.AGenericCall = type { ptr, ptr, ptr } %struct.AGenericManager = type <{ i8 }> %struct.ComponentInstanceRecord = type opaque %struct.ComponentParameters = type { [1 x i64] } -define i32 @_ZN12AGenericCall10MapIDPtrAtEsRP23ComponentInstanceRecord(%struct.AGenericCall* %this, i16 signext %param, %struct.ComponentInstanceRecord** %instance) { +define i32 @_ZN12AGenericCall10MapIDPtrAtEsRP23ComponentInstanceRecord(ptr %this, i16 signext %param, ptr %instance) { entry: %tmp4 = icmp slt i16 %param, 0 ; [#uses=1] br i1 %tmp4, label %cond_true, label %cond_next cond_true: ; preds = %entry %tmp1415 = shl i16 %param, 3 ; [#uses=1] - %tmp17 = getelementptr %struct.AGenericCall, %struct.AGenericCall* %this, i32 0, i32 1 ; <%struct.ComponentParameters**> [#uses=1] - %tmp18 = load %struct.ComponentParameters*, %struct.ComponentParameters** %tmp17, align 8 ; <%struct.ComponentParameters*> [#uses=1] - %tmp1920 = bitcast %struct.ComponentParameters* %tmp18 to i8* ; [#uses=1] + %tmp17 = getelementptr %struct.AGenericCall, ptr %this, i32 0, i32 1 ; [#uses=1] + %tmp18 = load ptr, ptr %tmp17, align 8 ; [#uses=1] %tmp212223 = sext i16 %tmp1415 to i64 ; [#uses=1] - %tmp24 = getelementptr i8, i8* %tmp1920, i64 %tmp212223 ; [#uses=1] - %tmp2425 = bitcast i8* %tmp24 to i64* ; [#uses=1] - %tmp28 = load i64, i64* %tmp2425, align 8 ; [#uses=1] - %tmp2829 = inttoptr i64 %tmp28 to i32* ; [#uses=1] - %tmp31 = getelementptr %struct.AGenericCall, %struct.AGenericCall* %this, i32 0, i32 2 ; [#uses=1] - store i32* %tmp2829, i32** %tmp31, align 8 + %tmp24 = getelementptr i8, ptr %tmp18, i64 %tmp212223 ; [#uses=1] + %tmp28 = load i64, ptr %tmp24, align 8 ; [#uses=1] + %tmp2829 = inttoptr i64 %tmp28 to ptr ; [#uses=1] + %tmp31 = getelementptr %struct.AGenericCall, ptr %this, i32 0, i32 2 ; [#uses=1] + store ptr %tmp2829, ptr %tmp31, align 8 br label %cond_next cond_next: ; preds = %cond_true, %entry %tmp4243 = shl i16 %param, 3 ; [#uses=1] - %tmp46 = getelementptr %struct.AGenericCall, %struct.AGenericCall* %this, i32 0, i32 1 ; <%struct.ComponentParameters**> [#uses=1] - %tmp47 = load %struct.ComponentParameters*, %struct.ComponentParameters** %tmp46, align 8 ; <%struct.ComponentParameters*> [#uses=1] - %tmp4849 = bitcast %struct.ComponentParameters* %tmp47 to i8* ; [#uses=1] + %tmp46 = getelementptr %struct.AGenericCall, ptr %this, i32 0, i32 1 ; [#uses=1] + %tmp47 = load ptr, ptr %tmp46, align 8 ; [#uses=1] %tmp505152 = sext i16 %tmp4243 to i64 ; [#uses=1] - %tmp53 = getelementptr i8, i8* %tmp4849, i64 %tmp505152 ; [#uses=1] - %tmp5354 = bitcast i8* %tmp53 to i64* ; [#uses=1] - %tmp58 = load i64, i64* %tmp5354, align 8 ; [#uses=1] + %tmp53 = getelementptr i8, ptr %tmp47, i64 %tmp505152 ; [#uses=1] + %tmp58 = load i64, ptr %tmp53, align 8 ; [#uses=1] %tmp59 = icmp eq i64 %tmp58, 0 ; [#uses=1] br i1 %tmp59, label %UnifiedReturnBlock, label %cond_true63 cond_true63: ; preds = %cond_next - %tmp65 = getelementptr %struct.AGenericCall, %struct.AGenericCall* %this, i32 0, i32 0 ; <%struct.AGenericManager**> [#uses=1] - %tmp66 = load %struct.AGenericManager*, %struct.AGenericManager** %tmp65, align 8 ; <%struct.AGenericManager*> [#uses=1] - %tmp69 = tail call i32 @_ZN15AGenericManager24DefaultComponentInstanceERP23ComponentInstanceRecord( %struct.AGenericManager* %tmp66, %struct.ComponentInstanceRecord** %instance ) ; [#uses=1] + %tmp65 = getelementptr %struct.AGenericCall, ptr %this, i32 0, i32 0 ; [#uses=1] + %tmp66 = load ptr, ptr %tmp65, align 8 ; [#uses=1] + %tmp69 = tail call i32 @_ZN15AGenericManager24DefaultComponentInstanceERP23ComponentInstanceRecord( ptr %tmp66, ptr %instance ) ; [#uses=1] ret i32 %tmp69 UnifiedReturnBlock: ; preds = %cond_next ret i32 undef } -declare i32 @_ZN15AGenericManager24DefaultComponentInstanceERP23ComponentInstanceRecord(%struct.AGenericManager*, %struct.ComponentInstanceRecord**) +declare i32 @_ZN15AGenericManager24DefaultComponentInstanceERP23ComponentInstanceRecord(ptr, ptr) diff --git a/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll b/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll index 52e83a177bf5a..d59953fb4e37d 100644 --- a/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll +++ b/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll @@ -1,8 +1,8 @@ ; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s -@__gthrw_pthread_once = weak alias i32 (i32*, void ()*), i32 (i32*, void ()*)* @pthread_once ; [#uses=0] +@__gthrw_pthread_once = weak alias i32 (ptr, ptr), ptr @pthread_once ; [#uses=0] -define weak i32 @pthread_once(i32*, void ()*) { +define weak i32 @pthread_once(ptr, ptr) { ret i32 0 } diff --git a/llvm/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll b/llvm/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll index 9e6a17a3900b0..eb94a3958ab65 100644 --- a/llvm/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll +++ b/llvm/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll @@ -1,10 +1,10 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-- | FileCheck %s - %struct.gl_texture_image = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8* } - %struct.gl_texture_object = type { i32, i32, i32, float, [4 x i32], i32, i32, i32, i32, i32, float, [11 x %struct.gl_texture_image*], [1024 x i8], i32, i32, i32, i8, i8*, i8, void (%struct.gl_texture_object*, i32, float*, float*, float*, float*, i8*, i8*, i8*, i8*)*, %struct.gl_texture_object* } + %struct.gl_texture_image = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr } + %struct.gl_texture_object = type { i32, i32, i32, float, [4 x i32], i32, i32, i32, i32, i32, float, [11 x ptr], [1024 x i8], i32, i32, i32, i8, ptr, i8, ptr, ptr } -define fastcc void @sample_3d_linear(%struct.gl_texture_object* %tObj, %struct.gl_texture_image* %img, float %s, float %t, float %r, i8* %red, i8* %green, i8* %blue, i8* %alpha) { +define fastcc void @sample_3d_linear(ptr %tObj, ptr %img, float %s, float %t, float %r, ptr %red, ptr %green, ptr %blue, ptr %alpha) { ; CHECK-LABEL: sample_3d_linear: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: pushl %esi @@ -22,7 +22,7 @@ define fastcc void @sample_3d_linear(%struct.gl_texture_object* %tObj, %struct.g ; CHECK-NEXT: .cfi_def_cfa_offset 4 ; CHECK-NEXT: retl entry: - %tmp15 = load i32, i32* null, align 4 ; [#uses=1] + %tmp15 = load i32, ptr null, align 4 ; [#uses=1] %tmp16 = icmp eq i32 %tmp15, 10497 ; [#uses=1] %tmp2152 = call float @floorf( float 0.000000e+00 ) ; [#uses=0] br i1 %tmp16, label %cond_true, label %cond_false diff --git a/llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll b/llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll index 51dbeea2bb785..2f75ab29e708f 100644 --- a/llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll +++ b/llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-- | FileCheck %s -define signext i16 @f(i32* %bp, i32* %ss) { +define signext i16 @f(ptr %bp, ptr %ss) { ; CHECK-LABEL: f: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: pushl %esi @@ -30,15 +30,15 @@ entry: cond_next127: ; preds = %cond_next391, %entry %v.1 = phi i32 [ undef, %entry ], [ %tmp411, %cond_next391 ] ; [#uses=1] %tmp149 = mul i32 0, %v.1 ; [#uses=0] - %tmpss = load i32, i32* %ss, align 4 ; [#uses=1] - %tmpbp = load i32, i32* %bp, align 4 ; [#uses=2] + %tmpss = load i32, ptr %ss, align 4 ; [#uses=1] + %tmpbp = load i32, ptr %bp, align 4 ; [#uses=2] %tmp254 = and i32 %tmpss, 15 ; [#uses=1] %tmp256 = and i32 %tmpbp, 15 ; [#uses=2] br label %cond_next391 cond_next391: ; preds = %cond_next127 - %tmp393 = load i32, i32* %ss, align 4 ; [#uses=1] - %tmp395 = load i32, i32* %bp, align 4 ; [#uses=2] + %tmp393 = load i32, ptr %ss, align 4 ; [#uses=1] + %tmp395 = load i32, ptr %bp, align 4 ; [#uses=2] %tmp396 = shl i32 %tmp393, %tmp395 ; [#uses=2] %tmp398 = sub i32 32, %tmp256 ; [#uses=2] %tmp399 = lshr i32 %tmp396, %tmp398 ; [#uses=1] @@ -48,7 +48,7 @@ cond_next391: ; preds = %cond_next127 %tmp411 = sub i32 %tmp399, %tmp409 ; [#uses=1] %tmp422445 = add i32 %tmp254, 0 ; [#uses=1] %tmp426447 = add i32 %tmp395, %tmp256 ; [#uses=1] - store i32 %tmp426447, i32* %bp, align 4 + store i32 %tmp426447, ptr %bp, align 4 %tmp429448 = icmp ult i32 %tmp422445, 63 ; [#uses=1] br i1 %tmp429448, label %cond_next127, label %UnifiedReturnBlock diff --git a/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll b/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll index 3f89964ab03ba..d77d4352f8336 100644 --- a/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll +++ b/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s -define fastcc void @fht(float* %fz, i16 signext %n) { +define fastcc void @fht(ptr %fz, i16 signext %n) { ; CHECK-LABEL: fht: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero @@ -36,20 +36,20 @@ entry: bb171.preheader: ; preds = %entry %tmp176 = fadd float 0.000000e+00, 1.000000e+00 ; [#uses=2] - %gi.1 = getelementptr float, float* %fz, i32 0 ; [#uses=2] - %tmp240 = load float, float* %gi.1, align 4 ; [#uses=1] + %gi.1 = getelementptr float, ptr %fz, i32 0 ; [#uses=2] + %tmp240 = load float, ptr %gi.1, align 4 ; [#uses=1] %tmp242 = fsub float %tmp240, 0.000000e+00 ; [#uses=2] - %tmp251 = getelementptr float, float* %fz, i32 0 ; [#uses=1] - %tmp252 = load float, float* %tmp251, align 4 ; [#uses=1] - %tmp258 = getelementptr float, float* %fz, i32 0 ; [#uses=2] - %tmp259 = load float, float* %tmp258, align 4 ; [#uses=2] + %tmp251 = getelementptr float, ptr %fz, i32 0 ; [#uses=1] + %tmp252 = load float, ptr %tmp251, align 4 ; [#uses=1] + %tmp258 = getelementptr float, ptr %fz, i32 0 ; [#uses=2] + %tmp259 = load float, ptr %tmp258, align 4 ; [#uses=2] %tmp261 = fmul float %tmp259, %tmp176 ; [#uses=1] %tmp262 = fsub float 0.000000e+00, %tmp261 ; [#uses=2] %tmp269 = fmul float %tmp252, %tmp176 ; [#uses=1] %tmp276 = fmul float %tmp259, 0.000000e+00 ; [#uses=1] %tmp277 = fadd float %tmp269, %tmp276 ; [#uses=2] - %tmp281 = getelementptr float, float* %fz, i32 0 ; [#uses=1] - %tmp282 = load float, float* %tmp281, align 4 ; [#uses=2] + %tmp281 = getelementptr float, ptr %fz, i32 0 ; [#uses=1] + %tmp282 = load float, ptr %tmp281, align 4 ; [#uses=2] %tmp284 = fsub float %tmp282, %tmp277 ; [#uses=1] %tmp291 = fadd float %tmp282, %tmp277 ; [#uses=1] %tmp298 = fsub float 0.000000e+00, %tmp262 ; [#uses=1] @@ -58,16 +58,16 @@ bb171.preheader: ; preds = %entry %tmp318 = fmul float 0.000000e+00, %tmp298 ; [#uses=1] %tmp319 = fadd float %tmp315, %tmp318 ; [#uses=1] %tmp329 = fadd float 0.000000e+00, %tmp319 ; [#uses=1] - store float %tmp329, float* null, align 4 + store float %tmp329, ptr null, align 4 %tmp336 = fsub float %tmp242, 0.000000e+00 ; [#uses=1] - store float %tmp336, float* %tmp258, align 4 + store float %tmp336, ptr %tmp258, align 4 %tmp343 = fadd float %tmp242, 0.000000e+00 ; [#uses=1] - store float %tmp343, float* null, align 4 + store float %tmp343, ptr null, align 4 %tmp355 = fmul float 0.000000e+00, %tmp305 ; [#uses=1] %tmp358 = fmul float 0.000000e+00, %tmp284 ; [#uses=1] %tmp359 = fadd float %tmp355, %tmp358 ; [#uses=1] %tmp369 = fadd float 0.000000e+00, %tmp359 ; [#uses=1] - store float %tmp369, float* %gi.1, align 4 + store float %tmp369, ptr %gi.1, align 4 ret void bb431: ; preds = %entry diff --git a/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll b/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll index 5805a136d0cb5..f9996e2df50e0 100644 --- a/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll +++ b/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s -define signext i16 @t(i16* %qmatrix, i16* %dct, i16* %acBaseTable, i16* %acExtTable, i16 signext %acBaseRes, i16 signext %acMaskRes, i16 signext %acExtRes, i32* %bitptr, i32* %source, i32 %markerPrefix, i8** %byteptr, i32 %scale, i32 %round, i32 %bits) { +define signext i16 @t(ptr %qmatrix, ptr %dct, ptr %acBaseTable, ptr %acExtTable, i16 signext %acBaseRes, i16 signext %acMaskRes, i16 signext %acExtRes, ptr %bitptr, ptr %source, i32 %markerPrefix, ptr %byteptr, i32 %scale, i32 %round, i32 %bits) { ; CHECK-LABEL: t: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax @@ -38,14 +38,14 @@ cond_next245: ; preds = %cond_next127 br i1 false, label %cond_true267, label %cond_next391 cond_true267: ; preds = %cond_next245 - %tmp269 = load i8*, i8** %byteptr, align 4 ; [#uses=3] - %tmp270 = load i8, i8* %tmp269, align 1 ; [#uses=1] + %tmp269 = load ptr, ptr %byteptr, align 4 ; [#uses=3] + %tmp270 = load i8, ptr %tmp269, align 1 ; [#uses=1] %tmp270271 = zext i8 %tmp270 to i32 ; [#uses=1] - %tmp272 = getelementptr i8, i8* %tmp269, i32 1 ; [#uses=2] - store i8* %tmp272, i8** %byteptr, align 4 - %tmp276 = load i8, i8* %tmp272, align 1 ; [#uses=1] - %tmp278 = getelementptr i8, i8* %tmp269, i32 2 ; [#uses=1] - store i8* %tmp278, i8** %byteptr, align 4 + %tmp272 = getelementptr i8, ptr %tmp269, i32 1 ; [#uses=2] + store ptr %tmp272, ptr %byteptr, align 4 + %tmp276 = load i8, ptr %tmp272, align 1 ; [#uses=1] + %tmp278 = getelementptr i8, ptr %tmp269, i32 2 ; [#uses=1] + store ptr %tmp278, ptr %byteptr, align 4 %tmp286 = icmp eq i32 %tmp270271, %markerPrefix ; [#uses=1] %cond = icmp eq i8 %tmp276, 0 ; [#uses=1] %bothcond = and i1 %tmp286, %cond ; [#uses=1] @@ -58,9 +58,9 @@ cond_next327: ; preds = %cond_true267 br i1 false, label %cond_true343, label %cond_next391 cond_true343: ; preds = %cond_next327 - %tmp345 = load i8*, i8** %byteptr, align 4 ; [#uses=1] - store i8* null, i8** %byteptr, align 4 - store i8* %tmp345, i8** %byteptr, align 4 + %tmp345 = load ptr, ptr %byteptr, align 4 ; [#uses=1] + store ptr null, ptr %byteptr, align 4 + store ptr %tmp345, ptr %byteptr, align 4 br label %cond_next391 cond_next391: ; preds = %cond_true343, %cond_next327, %cond_next245 diff --git a/llvm/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll b/llvm/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll index 941925987fd44..0bbfae38357bd 100644 --- a/llvm/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll +++ b/llvm/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll @@ -2,7 +2,7 @@ %struct._Unwind_Context = type { } -define i32 @execute_stack_op(i8* %op_ptr, i8* %op_end, %struct._Unwind_Context* %context, i64 %initial) { +define i32 @execute_stack_op(ptr %op_ptr, ptr %op_end, ptr %context, i64 %initial) { entry: br i1 false, label %bb, label %return @@ -10,8 +10,8 @@ bb: ; preds = %bb31, %entry br i1 false, label %bb6, label %bb31 bb6: ; preds = %bb - %tmp10 = load i64, i64* null, align 8 ; [#uses=1] - %tmp16 = load i64, i64* null, align 8 ; [#uses=1] + %tmp10 = load i64, ptr null, align 8 ; [#uses=1] + %tmp16 = load i64, ptr null, align 8 ; [#uses=1] br i1 false, label %bb23, label %bb31 bb23: ; preds = %bb6 diff --git a/llvm/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll b/llvm/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll index 5cdf4dec3c54e..511b8abe1ef99 100644 --- a/llvm/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll +++ b/llvm/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll @@ -2,307 +2,307 @@ ; PR1729 %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] } - %struct.VEC_tree = type { i32, i32, [1 x %struct.tree_node*] } - %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i64, i32, [20 x i8] } - %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 } - %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] } + %struct.VEC_edge = type { i32, i32, [1 x ptr] } + %struct.VEC_tree = type { i32, i32, [1 x ptr] } + %struct._IO_FILE = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i64, i16, i8, [1 x i8], ptr, i64, ptr, ptr, ptr, ptr, i64, i32, [20 x i8] } + %struct._IO_marker = type { ptr, ptr, i32 } + %struct._obstack_chunk = type { ptr, ptr, [4 x i8] } %struct.addr_diff_vec_flags = type <{ i8, i8, i8, i8 }> - %struct.alloc_pool_def = type { i8*, i64, i64, %struct.alloc_pool_list_def*, i64, i64, i64, %struct.alloc_pool_list_def*, i64, i64 } - %struct.alloc_pool_list_def = type { %struct.alloc_pool_list_def* } - %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 } + %struct.alloc_pool_def = type { ptr, i64, i64, ptr, i64, i64, i64, ptr, i64, i64 } + %struct.alloc_pool_list_def = type { ptr } + %struct.basic_block_def = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, [2 x ptr], ptr, ptr, ptr, ptr, i64, i32, i32, i32, i32 } %struct.bb_ann_d = type opaque - %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [2 x i64] } - %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* } - %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack } + %struct.bitmap_element_def = type { ptr, ptr, i32, [2 x i64] } + %struct.bitmap_head_def = type { ptr, ptr, i32, ptr } + %struct.bitmap_obstack = type { ptr, ptr, %struct.obstack } %struct.cselib_val_struct = type opaque %struct.dataflow_d = type opaque %struct.die_struct = type opaque - %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.location_t*, i32, i32, i64, i32 } - %struct.edge_def_insns = type { %struct.rtx_def* } - %struct.edge_iterator = type { i32, %struct.VEC_edge** } + %struct.edge_def = type { ptr, ptr, %struct.edge_def_insns, ptr, ptr, i32, i32, i64, i32 } + %struct.edge_def_insns = type { ptr } + %struct.edge_iterator = type { i32, ptr } %struct.eh_status = type opaque %struct.elt_list = type opaque - %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** } + %struct.emit_status = type { i32, i32, ptr, ptr, ptr, i32, %struct.location_t, i32, ptr, ptr } %struct.et_node = type opaque - %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } - %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, %struct.tree_node*, i8, i8, i8 } - %struct.ht_identifier = type { i8*, i32, i32 } + %struct.expr_status = type { i32, i32, i32, ptr, ptr, ptr } + %struct.function = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, %struct.CUMULATIVE_ARGS, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i8, i32, i64, ptr, ptr, ptr, ptr, ptr, i32, ptr, i32, i32, ptr, ptr, i32, i32, i32, ptr, i32, i32, i8, i8, ptr, ptr, i32, i32, i32, i32, %struct.location_t, ptr, ptr, ptr, i8, i8, i8 } + %struct.ht_identifier = type { ptr, i32, i32 } %struct.initial_value_struct = type opaque %struct.lang_decl = type opaque %struct.lang_type = type opaque %struct.language_function = type opaque - %struct.location_t = type { i8*, i32 } + %struct.location_t = type { ptr, i32 } %struct.loop = type opaque - %struct.machine_function = type { %struct.stack_local_entry*, i8*, %struct.rtx_def*, i32, i32, i32, i32, i32 } - %struct.mem_attrs = type { i64, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, i32 } - %struct.obstack = type { i64, %struct._obstack_chunk*, i8*, i8*, i8*, i64, i32, %struct._obstack_chunk* (i8*, i64)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 } - %struct.phi_arg_d = type { %struct.tree_node*, i8 } + %struct.machine_function = type { ptr, ptr, ptr, i32, i32, i32, i32, i32 } + %struct.mem_attrs = type { i64, ptr, ptr, ptr, i32 } + %struct.obstack = type { i64, ptr, ptr, ptr, ptr, i64, i32, ptr, ptr, ptr, i8 } + %struct.phi_arg_d = type { ptr, i8 } %struct.ptr_info_def = type opaque %struct.real_value = type opaque - %struct.reg_attrs = type { %struct.tree_node*, i64 } + %struct.reg_attrs = type { ptr, i64 } %struct.reg_info_def = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 } - %struct.rtunion = type { i8* } - %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] } + %struct.reorder_block_def = type { ptr, ptr, ptr, ptr, ptr, i32, i32, i32 } + %struct.rtunion = type { ptr } + %struct.rtvec_def = type { i32, [1 x ptr] } %struct.rtx_def = type { i16, i8, i8, %struct.u } - %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } + %struct.sequence_stack = type { ptr, ptr, ptr } %struct.simple_bitmap_def = type { i32, i32, i32, [1 x i64] } %struct.stack_local_entry = type opaque %struct.temp_slot = type opaque - %struct.tree_binfo = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree } - %struct.tree_block = type { %struct.tree_common, i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* } - %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 } - %struct.tree_complex = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* } - %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* } + %struct.tree_binfo = type { %struct.tree_common, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %struct.VEC_tree } + %struct.tree_block = type { %struct.tree_common, i32, ptr, ptr, ptr, ptr, ptr, ptr } + %struct.tree_common = type { ptr, ptr, ptr, i8, i8, i8, i8, i8 } + %struct.tree_complex = type { %struct.tree_common, ptr, ptr } + %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, ptr, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, %struct.tree_decl_u2, ptr, ptr, i64, ptr } %struct.tree_decl_u1 = type { i64 } %struct.tree_decl_u1_a = type <{ i32 }> - %struct.tree_decl_u2 = type { %struct.function* } - %struct.tree_exp = type { %struct.tree_common, %struct.location_t*, i32, %struct.tree_node*, [1 x %struct.tree_node*] } + %struct.tree_decl_u2 = type { ptr } + %struct.tree_exp = type { %struct.tree_common, ptr, i32, ptr, [1 x ptr] } %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier } %struct.tree_int_cst = type { %struct.tree_common, %struct.tree_int_cst_lowhi } %struct.tree_int_cst_lowhi = type { i64, i64 } - %struct.tree_list = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* } + %struct.tree_list = type { %struct.tree_common, ptr, ptr } %struct.tree_node = type { %struct.tree_decl } - %struct.tree_phi_node = type { %struct.tree_common, %struct.tree_node*, i32, i32, i32, %struct.basic_block_def*, %struct.dataflow_d*, [1 x %struct.phi_arg_d] } - %struct.tree_real_cst = type { %struct.tree_common, %struct.real_value* } - %struct.tree_ssa_name = type { %struct.tree_common, %struct.tree_node*, i32, %struct.ptr_info_def*, %struct.tree_node*, i8* } - %struct.tree_statement_list = type { %struct.tree_common, %struct.tree_statement_list_node*, %struct.tree_statement_list_node* } - %struct.tree_statement_list_node = type { %struct.tree_statement_list_node*, %struct.tree_statement_list_node*, %struct.tree_node* } + %struct.tree_phi_node = type { %struct.tree_common, ptr, i32, i32, i32, ptr, ptr, [1 x %struct.phi_arg_d] } + %struct.tree_real_cst = type { %struct.tree_common, ptr } + %struct.tree_ssa_name = type { %struct.tree_common, ptr, i32, ptr, ptr, ptr } + %struct.tree_statement_list = type { %struct.tree_common, ptr, ptr } + %struct.tree_statement_list_node = type { ptr, ptr, ptr } %struct.tree_string = type { %struct.tree_common, i32, [1 x i8] } - %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i16, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.rtunion, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_type* } - %struct.tree_type_symtab = type { i8* } - %struct.tree_value_handle = type { %struct.tree_common, %struct.value_set*, i32 } - %struct.tree_vec = type { %struct.tree_common, i32, [1 x %struct.tree_node*] } - %struct.tree_vector = type { %struct.tree_common, %struct.tree_node* } + %struct.tree_type = type { %struct.tree_common, ptr, ptr, ptr, ptr, i32, i16, i8, i8, i32, ptr, ptr, %struct.rtunion, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, ptr } + %struct.tree_type_symtab = type { ptr } + %struct.tree_value_handle = type { %struct.tree_common, ptr, i32 } + %struct.tree_vec = type { %struct.tree_common, i32, [1 x ptr] } + %struct.tree_vector = type { %struct.tree_common, ptr } %struct.u = type { [1 x %struct.rtunion] } %struct.value_set = type opaque - %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* } + %struct.var_refs_queue = type { ptr, i32, i32, ptr } %struct.varasm_status = type opaque %struct.varray_data = type { [1 x i64] } - %struct.varray_head_tag = type { i64, i64, i32, i8*, %struct.varray_data } + %struct.varray_head_tag = type { i64, i64, i32, ptr, %struct.varray_data } %union.tree_ann_d = type opaque -@first_edge_aux_obj = external global i8* ; [#uses=0] -@first_block_aux_obj = external global i8* ; [#uses=0] -@n_edges = external global i32 ; [#uses=0] -@ENTRY_BLOCK_PTR = external global %struct.basic_block_def* ; <%struct.basic_block_def**> [#uses=0] -@EXIT_BLOCK_PTR = external global %struct.basic_block_def* ; <%struct.basic_block_def**> [#uses=0] -@n_basic_blocks = external global i32 ; [#uses=0] -@.str = external constant [9 x i8] ; <[9 x i8]*> [#uses=0] -@rbi_pool = external global %struct.alloc_pool_def* ; <%struct.alloc_pool_def**> [#uses=0] -@__FUNCTION__.19643 = external constant [18 x i8] ; <[18 x i8]*> [#uses=0] -@.str1 = external constant [20 x i8] ; <[20 x i8]*> [#uses=0] -@__FUNCTION__.19670 = external constant [15 x i8] ; <[15 x i8]*> [#uses=0] -@basic_block_info = external global %struct.varray_head_tag* ; <%struct.varray_head_tag**> [#uses=0] -@last_basic_block = external global i32 ; [#uses=0] -@__FUNCTION__.19696 = external constant [14 x i8] ; <[14 x i8]*> [#uses=0] -@__FUNCTION__.20191 = external constant [20 x i8] ; <[20 x i8]*> [#uses=0] -@block_aux_obstack = external global %struct.obstack ; <%struct.obstack*> [#uses=0] -@__FUNCTION__.20301 = external constant [20 x i8] ; <[20 x i8]*> [#uses=0] -@__FUNCTION__.20316 = external constant [19 x i8] ; <[19 x i8]*> [#uses=0] -@edge_aux_obstack = external global %struct.obstack ; <%struct.obstack*> [#uses=0] -@stderr = external global %struct._IO_FILE* ; <%struct._IO_FILE**> [#uses=0] -@__FUNCTION__.20463 = external constant [11 x i8] ; <[11 x i8]*> [#uses=0] -@.str2 = external constant [7 x i8] ; <[7 x i8]*> [#uses=0] -@.str3 = external constant [6 x i8] ; <[6 x i8]*> [#uses=0] -@.str4 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] -@.str5 = external constant [11 x i8] ; <[11 x i8]*> [#uses=0] -@.str6 = external constant [8 x i8] ; <[8 x i8]*> [#uses=0] -@.str7 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] -@bitnames.20157 = external constant [13 x i8*] ; <[13 x i8*]*> [#uses=0] -@.str8 = external constant [9 x i8] ; <[9 x i8]*> [#uses=0] -@.str9 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] -@.str10 = external constant [7 x i8] ; <[7 x i8]*> [#uses=0] -@.str11 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] -@.str12 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0] -@.str13 = external constant [9 x i8] ; <[9 x i8]*> [#uses=0] -@.str14 = external constant [13 x i8] ; <[13 x i8]*> [#uses=0] -@.str15 = external constant [12 x i8] ; <[12 x i8]*> [#uses=0] -@.str16 = external constant [8 x i8] ; <[8 x i8]*> [#uses=0] -@.str17 = external constant [10 x i8] ; <[10 x i8]*> [#uses=0] -@.str18 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0] -@.str19 = external constant [6 x i8] ; <[6 x i8]*> [#uses=0] -@.str20 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0] -@.str21 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] -@.str22 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] -@__FUNCTION__.19709 = external constant [20 x i8] ; <[20 x i8]*> [#uses=0] -@.str23 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0] -@.str24 = external constant [10 x i8] ; <[10 x i8]*> [#uses=0] -@__FUNCTION__.19813 = external constant [19 x i8] ; <[19 x i8]*> [#uses=0] -@.str25 = external constant [7 x i8] ; <[7 x i8]*> [#uses=0] -@.str26 = external constant [6 x i8] ; <[6 x i8]*> [#uses=0] -@initialized.20241.b = external global i1 ; [#uses=0] -@__FUNCTION__.20244 = external constant [21 x i8] ; <[21 x i8]*> [#uses=0] -@__FUNCTION__.19601 = external constant [12 x i8] ; <[12 x i8]*> [#uses=0] -@__FUNCTION__.14571 = external constant [8 x i8] ; <[8 x i8]*> [#uses=0] -@__FUNCTION__.14535 = external constant [13 x i8] ; <[13 x i8]*> [#uses=0] -@.str27 = external constant [28 x i8] ; <[28 x i8]*> [#uses=0] -@__FUNCTION__.14589 = external constant [8 x i8] ; <[8 x i8]*> [#uses=0] -@__FUNCTION__.19792 = external constant [12 x i8] ; <[12 x i8]*> [#uses=0] -@__FUNCTION__.19851 = external constant [19 x i8] ; <[19 x i8]*> [#uses=0] -@profile_status = external global i32 ; [#uses=0] -@.str29 = external constant [46 x i8] ; <[46 x i8]*> [#uses=0] -@.str30 = external constant [49 x i8] ; <[49 x i8]*> [#uses=0] -@.str31 = external constant [54 x i8] ; <[54 x i8]*> [#uses=0] -@.str32 = external constant [49 x i8] ; <[49 x i8]*> [#uses=1] -@__FUNCTION__.19948 = external constant [15 x i8] ; <[15 x i8]*> [#uses=0] -@reg_n_info = external global %struct.varray_head_tag* ; <%struct.varray_head_tag**> [#uses=0] -@reload_completed = external global i32 ; [#uses=0] -@.str33 = external constant [15 x i8] ; <[15 x i8]*> [#uses=0] -@.str34 = external constant [43 x i8] ; <[43 x i8]*> [#uses=0] -@.str35 = external constant [13 x i8] ; <[13 x i8]*> [#uses=0] -@.str36 = external constant [1 x i8] ; <[1 x i8]*> [#uses=0] -@.str37 = external constant [2 x i8] ; <[2 x i8]*> [#uses=0] -@.str38 = external constant [16 x i8] ; <[16 x i8]*> [#uses=0] -@cfun = external global %struct.function* ; <%struct.function**> [#uses=0] -@.str39 = external constant [14 x i8] ; <[14 x i8]*> [#uses=0] -@.str40 = external constant [11 x i8] ; <[11 x i8]*> [#uses=0] -@.str41 = external constant [20 x i8] ; <[20 x i8]*> [#uses=0] -@.str42 = external constant [17 x i8] ; <[17 x i8]*> [#uses=0] -@.str43 = external constant [19 x i8] ; <[19 x i8]*> [#uses=0] -@mode_size = external global [48 x i8] ; <[48 x i8]*> [#uses=0] -@target_flags = external global i32 ; [#uses=0] -@.str44 = external constant [11 x i8] ; <[11 x i8]*> [#uses=0] -@reg_class_names = external global [0 x i8*] ; <[0 x i8*]*> [#uses=0] -@.str45 = external constant [10 x i8] ; <[10 x i8]*> [#uses=0] -@.str46 = external constant [13 x i8] ; <[13 x i8]*> [#uses=0] -@.str47 = external constant [19 x i8] ; <[19 x i8]*> [#uses=0] -@.str48 = external constant [12 x i8] ; <[12 x i8]*> [#uses=0] -@.str49 = external constant [10 x i8] ; <[10 x i8]*> [#uses=0] -@.str50 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] -@.str51 = external constant [29 x i8] ; <[29 x i8]*> [#uses=0] -@.str52 = external constant [17 x i8] ; <[17 x i8]*> [#uses=0] -@.str53 = external constant [19 x i8] ; <[19 x i8]*> [#uses=0] -@.str54 = external constant [22 x i8] ; <[22 x i8]*> [#uses=0] -@.str55 = external constant [10 x i8] ; <[10 x i8]*> [#uses=0] -@.str56 = external constant [12 x i8] ; <[12 x i8]*> [#uses=0] -@.str57 = external constant [26 x i8] ; <[26 x i8]*> [#uses=0] -@.str58 = external constant [15 x i8] ; <[15 x i8]*> [#uses=0] -@.str59 = external constant [14 x i8] ; <[14 x i8]*> [#uses=0] -@.str60 = external constant [26 x i8] ; <[26 x i8]*> [#uses=0] -@.str61 = external constant [24 x i8] ; <[24 x i8]*> [#uses=0] -@initialized.20366.b = external global i1 ; [#uses=0] -@__FUNCTION__.20369 = external constant [20 x i8] ; <[20 x i8]*> [#uses=0] -@__FUNCTION__.20442 = external constant [19 x i8] ; <[19 x i8]*> [#uses=0] -@bb_bitnames.20476 = external constant [6 x i8*] ; <[6 x i8*]*> [#uses=0] -@.str62 = external constant [6 x i8] ; <[6 x i8]*> [#uses=0] -@.str63 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0] -@.str64 = external constant [10 x i8] ; <[10 x i8]*> [#uses=0] -@.str65 = external constant [8 x i8] ; <[8 x i8]*> [#uses=0] -@.str66 = external constant [17 x i8] ; <[17 x i8]*> [#uses=0] -@.str67 = external constant [11 x i8] ; <[11 x i8]*> [#uses=0] -@.str68 = external constant [15 x i8] ; <[15 x i8]*> [#uses=0] -@.str69 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] -@.str70 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0] -@__FUNCTION__.20520 = external constant [32 x i8] ; <[32 x i8]*> [#uses=0] -@dump_file = external global %struct._IO_FILE* ; <%struct._IO_FILE**> [#uses=0] -@.str71 = external constant [86 x i8] ; <[86 x i8]*> [#uses=0] -@.str72 = external constant [94 x i8] ; <[94 x i8]*> [#uses=0] -@reg_obstack = external global %struct.bitmap_obstack ; <%struct.bitmap_obstack*> [#uses=0] +@first_edge_aux_obj = external global ptr ; [#uses=0] +@first_block_aux_obj = external global ptr ; [#uses=0] +@n_edges = external global i32 ; [#uses=0] +@ENTRY_BLOCK_PTR = external global ptr ; [#uses=0] +@EXIT_BLOCK_PTR = external global ptr ; [#uses=0] +@n_basic_blocks = external global i32 ; [#uses=0] +@.str = external constant [9 x i8] ; [#uses=0] +@rbi_pool = external global ptr ; [#uses=0] +@__FUNCTION__.19643 = external constant [18 x i8] ; [#uses=0] +@.str1 = external constant [20 x i8] ; [#uses=0] +@__FUNCTION__.19670 = external constant [15 x i8] ; [#uses=0] +@basic_block_info = external global ptr ; [#uses=0] +@last_basic_block = external global i32 ; [#uses=0] +@__FUNCTION__.19696 = external constant [14 x i8] ; [#uses=0] +@__FUNCTION__.20191 = external constant [20 x i8] ; [#uses=0] +@block_aux_obstack = external global %struct.obstack ; [#uses=0] +@__FUNCTION__.20301 = external constant [20 x i8] ; [#uses=0] +@__FUNCTION__.20316 = external constant [19 x i8] ; [#uses=0] +@edge_aux_obstack = external global %struct.obstack ; [#uses=0] +@stderr = external global ptr ; [#uses=0] +@__FUNCTION__.20463 = external constant [11 x i8] ; [#uses=0] +@.str2 = external constant [7 x i8] ; [#uses=0] +@.str3 = external constant [6 x i8] ; [#uses=0] +@.str4 = external constant [4 x i8] ; [#uses=0] +@.str5 = external constant [11 x i8] ; [#uses=0] +@.str6 = external constant [8 x i8] ; [#uses=0] +@.str7 = external constant [4 x i8] ; [#uses=0] +@bitnames.20157 = external constant [13 x ptr] ; [#uses=0] +@.str8 = external constant [9 x i8] ; [#uses=0] +@.str9 = external constant [3 x i8] ; [#uses=0] +@.str10 = external constant [7 x i8] ; [#uses=0] +@.str11 = external constant [3 x i8] ; [#uses=0] +@.str12 = external constant [5 x i8] ; [#uses=0] +@.str13 = external constant [9 x i8] ; [#uses=0] +@.str14 = external constant [13 x i8] ; [#uses=0] +@.str15 = external constant [12 x i8] ; [#uses=0] +@.str16 = external constant [8 x i8] ; [#uses=0] +@.str17 = external constant [10 x i8] ; [#uses=0] +@.str18 = external constant [5 x i8] ; [#uses=0] +@.str19 = external constant [6 x i8] ; [#uses=0] +@.str20 = external constant [5 x i8] ; [#uses=0] +@.str21 = external constant [3 x i8] ; [#uses=0] +@.str22 = external constant [3 x i8] ; [#uses=0] +@__FUNCTION__.19709 = external constant [20 x i8] ; [#uses=0] +@.str23 = external constant [5 x i8] ; [#uses=0] +@.str24 = external constant [10 x i8] ; [#uses=0] +@__FUNCTION__.19813 = external constant [19 x i8] ; [#uses=0] +@.str25 = external constant [7 x i8] ; [#uses=0] +@.str26 = external constant [6 x i8] ; [#uses=0] +@initialized.20241.b = external global i1 ; [#uses=0] +@__FUNCTION__.20244 = external constant [21 x i8] ; [#uses=0] +@__FUNCTION__.19601 = external constant [12 x i8] ; [#uses=0] +@__FUNCTION__.14571 = external constant [8 x i8] ; [#uses=0] +@__FUNCTION__.14535 = external constant [13 x i8] ; [#uses=0] +@.str27 = external constant [28 x i8] ; [#uses=0] +@__FUNCTION__.14589 = external constant [8 x i8] ; [#uses=0] +@__FUNCTION__.19792 = external constant [12 x i8] ; [#uses=0] +@__FUNCTION__.19851 = external constant [19 x i8] ; [#uses=0] +@profile_status = external global i32 ; [#uses=0] +@.str29 = external constant [46 x i8] ; [#uses=0] +@.str30 = external constant [49 x i8] ; [#uses=0] +@.str31 = external constant [54 x i8] ; [#uses=0] +@.str32 = external constant [49 x i8] ; [#uses=1] +@__FUNCTION__.19948 = external constant [15 x i8] ; [#uses=0] +@reg_n_info = external global ptr ; [#uses=0] +@reload_completed = external global i32 ; [#uses=0] +@.str33 = external constant [15 x i8] ; [#uses=0] +@.str34 = external constant [43 x i8] ; [#uses=0] +@.str35 = external constant [13 x i8] ; [#uses=0] +@.str36 = external constant [1 x i8] ; [#uses=0] +@.str37 = external constant [2 x i8] ; [#uses=0] +@.str38 = external constant [16 x i8] ; [#uses=0] +@cfun = external global ptr ; [#uses=0] +@.str39 = external constant [14 x i8] ; [#uses=0] +@.str40 = external constant [11 x i8] ; [#uses=0] +@.str41 = external constant [20 x i8] ; [#uses=0] +@.str42 = external constant [17 x i8] ; [#uses=0] +@.str43 = external constant [19 x i8] ; [#uses=0] +@mode_size = external global [48 x i8] ; [#uses=0] +@target_flags = external global i32 ; [#uses=0] +@.str44 = external constant [11 x i8] ; [#uses=0] +@reg_class_names = external global [0 x ptr] ; [#uses=0] +@.str45 = external constant [10 x i8] ; [#uses=0] +@.str46 = external constant [13 x i8] ; [#uses=0] +@.str47 = external constant [19 x i8] ; [#uses=0] +@.str48 = external constant [12 x i8] ; [#uses=0] +@.str49 = external constant [10 x i8] ; [#uses=0] +@.str50 = external constant [3 x i8] ; [#uses=0] +@.str51 = external constant [29 x i8] ; [#uses=0] +@.str52 = external constant [17 x i8] ; [#uses=0] +@.str53 = external constant [19 x i8] ; [#uses=0] +@.str54 = external constant [22 x i8] ; [#uses=0] +@.str55 = external constant [10 x i8] ; [#uses=0] +@.str56 = external constant [12 x i8] ; [#uses=0] +@.str57 = external constant [26 x i8] ; [#uses=0] +@.str58 = external constant [15 x i8] ; [#uses=0] +@.str59 = external constant [14 x i8] ; [#uses=0] +@.str60 = external constant [26 x i8] ; [#uses=0] +@.str61 = external constant [24 x i8] ; [#uses=0] +@initialized.20366.b = external global i1 ; [#uses=0] +@__FUNCTION__.20369 = external constant [20 x i8] ; [#uses=0] +@__FUNCTION__.20442 = external constant [19 x i8] ; [#uses=0] +@bb_bitnames.20476 = external constant [6 x ptr] ; [#uses=0] +@.str62 = external constant [6 x i8] ; [#uses=0] +@.str63 = external constant [4 x i8] ; [#uses=0] +@.str64 = external constant [10 x i8] ; [#uses=0] +@.str65 = external constant [8 x i8] ; [#uses=0] +@.str66 = external constant [17 x i8] ; [#uses=0] +@.str67 = external constant [11 x i8] ; [#uses=0] +@.str68 = external constant [15 x i8] ; [#uses=0] +@.str69 = external constant [3 x i8] ; [#uses=0] +@.str70 = external constant [3 x i8] ; [#uses=0] +@__FUNCTION__.20520 = external constant [32 x i8] ; [#uses=0] +@dump_file = external global ptr ; [#uses=0] +@.str71 = external constant [86 x i8] ; [#uses=0] +@.str72 = external constant [94 x i8] ; [#uses=0] +@reg_obstack = external global %struct.bitmap_obstack ; [#uses=0] declare void @init_flow() -declare i8* @ggc_alloc_cleared_stat(i64) +declare ptr @ggc_alloc_cleared_stat(i64) -declare fastcc void @free_edge(%struct.edge_def*) +declare fastcc void @free_edge(ptr) -declare void @ggc_free(i8*) +declare void @ggc_free(ptr) -declare %struct.basic_block_def* @alloc_block() +declare ptr @alloc_block() declare void @alloc_rbi_pool() -declare %struct.alloc_pool_def* @create_alloc_pool(i8*, i64, i64) +declare ptr @create_alloc_pool(ptr, i64, i64) declare void @free_rbi_pool() -declare void @free_alloc_pool(%struct.alloc_pool_def*) +declare void @free_alloc_pool(ptr) -declare void @initialize_bb_rbi(%struct.basic_block_def*) +declare void @initialize_bb_rbi(ptr) -declare void @fancy_abort(i8*, i32, i8*) +declare void @fancy_abort(ptr, i32, ptr) -declare i8* @pool_alloc(%struct.alloc_pool_def*) +declare ptr @pool_alloc(ptr) -declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) +declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) -declare void @link_block(%struct.basic_block_def*, %struct.basic_block_def*) +declare void @link_block(ptr, ptr) -declare void @unlink_block(%struct.basic_block_def*) +declare void @unlink_block(ptr) declare void @compact_blocks() -declare void @varray_check_failed(%struct.varray_head_tag*, i64, i8*, i32, i8*) +declare void @varray_check_failed(ptr, i64, ptr, i32, ptr) -declare void @expunge_block(%struct.basic_block_def*) +declare void @expunge_block(ptr) declare void @clear_bb_flags() -declare void @alloc_aux_for_block(%struct.basic_block_def*, i32) +declare void @alloc_aux_for_block(ptr, i32) -declare void @_obstack_newchunk(%struct.obstack*, i32) +declare void @_obstack_newchunk(ptr, i32) declare void @clear_aux_for_blocks() declare void @free_aux_for_blocks() -declare void @obstack_free(%struct.obstack*, i8*) +declare void @obstack_free(ptr, ptr) -declare void @alloc_aux_for_edge(%struct.edge_def*, i32) +declare void @alloc_aux_for_edge(ptr, i32) -declare void @debug_bb(%struct.basic_block_def*) +declare void @debug_bb(ptr) -declare void @dump_bb(%struct.basic_block_def*, %struct._IO_FILE*, i32) +declare void @dump_bb(ptr, ptr, i32) -declare %struct.basic_block_def* @debug_bb_n(i32) +declare ptr @debug_bb_n(i32) -declare void @dump_edge_info(%struct._IO_FILE*, %struct.edge_def*, i32) +declare void @dump_edge_info(ptr, ptr, i32) -declare i32 @fputs_unlocked(i8* noalias , %struct._IO_FILE* noalias ) +declare i32 @fputs_unlocked(ptr noalias , ptr noalias ) -declare i32 @fprintf(%struct._IO_FILE* noalias , i8* noalias , ...) +declare i32 @fprintf(ptr noalias , ptr noalias , ...) -declare i64 @fwrite(i8*, i64, i64, i8*) +declare i64 @fwrite(ptr, i64, i64, ptr) -declare i32 @__overflow(%struct._IO_FILE*, i32) +declare i32 @__overflow(ptr, i32) -declare %struct.edge_def* @unchecked_make_edge(%struct.basic_block_def*, %struct.basic_block_def*, i32) +declare ptr @unchecked_make_edge(ptr, ptr, i32) -declare i8* @vec_gc_p_reserve(i8*, i32) +declare ptr @vec_gc_p_reserve(ptr, i32) -declare void @vec_assert_fail(i8*, i8*, i8*, i32, i8*) +declare void @vec_assert_fail(ptr, ptr, ptr, i32, ptr) -declare void @execute_on_growing_pred(%struct.edge_def*) +declare void @execute_on_growing_pred(ptr) -declare %struct.edge_def* @make_edge(%struct.basic_block_def*, %struct.basic_block_def*, i32) +declare ptr @make_edge(ptr, ptr, i32) -declare %struct.edge_def* @find_edge(%struct.basic_block_def*, %struct.basic_block_def*) +declare ptr @find_edge(ptr, ptr) -declare %struct.edge_def* @make_single_succ_edge(%struct.basic_block_def*, %struct.basic_block_def*, i32) +declare ptr @make_single_succ_edge(ptr, ptr, i32) -declare %struct.edge_def* @cached_make_edge(%struct.simple_bitmap_def**, %struct.basic_block_def*, %struct.basic_block_def*, i32) +declare ptr @cached_make_edge(ptr, ptr, ptr, i32) -declare void @redirect_edge_succ(%struct.edge_def*, %struct.basic_block_def*) +declare void @redirect_edge_succ(ptr, ptr) -declare void @execute_on_shrinking_pred(%struct.edge_def*) +declare void @execute_on_shrinking_pred(ptr) declare void @alloc_aux_for_blocks(i32) -declare i8* @xmalloc(i64) +declare ptr @xmalloc(i64) -declare i32 @_obstack_begin(%struct.obstack*, i32, i32, i8* (i64)*, void (i8*)*) +declare i32 @_obstack_begin(ptr, i32, i32, ptr, ptr) -declare void @free(i8*) +declare void @free(ptr) declare void @clear_edges() -declare void @remove_edge(%struct.edge_def*) +declare void @remove_edge(ptr) -declare %struct.edge_def* @redirect_edge_succ_nodup(%struct.edge_def*, %struct.basic_block_def*) +declare ptr @redirect_edge_succ_nodup(ptr, ptr) -declare void @redirect_edge_pred(%struct.edge_def*, %struct.basic_block_def*) +declare void @redirect_edge_pred(ptr, ptr) -define void @check_bb_profile(%struct.basic_block_def* %bb, %struct._IO_FILE* %file) { +define void @check_bb_profile(ptr %bb, ptr %file) { entry: br i1 false, label %cond_false759.preheader, label %cond_false149.preheader @@ -354,7 +354,7 @@ cond_true1071: ; preds = %cond_next1056 ret void cond_next1150: ; preds = %cond_next1056 - %tmp1156 = icmp eq %struct.edge_def* null, null ; [#uses=1] + %tmp1156 = icmp eq ptr null, null ; [#uses=1] br i1 %tmp1156, label %bb1159, label %bb929 bb1159: ; preds = %cond_next1150 @@ -362,28 +362,28 @@ bb1159: ; preds = %cond_next1150 cond_true1169: ; preds = %bb1159 %tmp11741175 = trunc i64 %lsum.11225.0 to i32 ; [#uses=1] - %tmp1178 = tail call i32 (%struct._IO_FILE* , i8* , ...) @fprintf( %struct._IO_FILE* noalias %file , i8* getelementptr ([49 x i8], [49 x i8]* @.str32, i32 0, i64 0) , i32 %tmp11741175, i32 0 ) ; [#uses=0] + %tmp1178 = tail call i32 (ptr , ptr , ...) @fprintf( ptr noalias %file , ptr @.str32 , i32 %tmp11741175, i32 0 ) ; [#uses=0] ret void UnifiedReturnBlock: ; preds = %bb1159 ret void } -declare void @dump_flow_info(%struct._IO_FILE*) +declare void @dump_flow_info(ptr) declare i32 @max_reg_num() -declare void @rtl_check_failed_flag(i8*, %struct.rtx_def*, i8*, i32, i8*) +declare void @rtl_check_failed_flag(ptr, ptr, ptr, i32, ptr) declare i32 @reg_preferred_class(i32) declare i32 @reg_alternate_class(i32) -declare zeroext i8 @maybe_hot_bb_p(%struct.basic_block_def*) +declare zeroext i8 @maybe_hot_bb_p(ptr) -declare zeroext i8 @probably_never_executed_bb_p(%struct.basic_block_def*) +declare zeroext i8 @probably_never_executed_bb_p(ptr) -declare void @dump_regset(%struct.bitmap_head_def*, %struct._IO_FILE*) +declare void @dump_regset(ptr, ptr) declare void @debug_flow_info() @@ -393,8 +393,8 @@ declare void @clear_aux_for_edges() declare void @free_aux_for_edges() -declare void @brief_dump_cfg(%struct._IO_FILE*) +declare void @brief_dump_cfg(ptr) -declare i32 @fputc(i32, i8*) +declare i32 @fputc(i32, ptr) -declare void @update_bb_profile_for_threading(%struct.basic_block_def*, i32, i64, %struct.edge_def*) +declare void @update_bb_profile_for_threading(ptr, i32, i64, ptr) diff --git a/llvm/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll b/llvm/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll index a1bc764e22ec5..827c9af7efc37 100644 --- a/llvm/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll +++ b/llvm/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll @@ -4,7 +4,7 @@ ; CHECK-NOT: PTR ; CHECK: {{$}} -define signext i16 @t(i32* %bitptr, i32* %source, i8** %byteptr, i32 %scale, i32 %round) { +define signext i16 @t(ptr %bitptr, ptr %source, ptr %byteptr, i32 %scale, i32 %round) { entry: br label %bb @@ -14,8 +14,8 @@ bb: ; preds = %cond_next391, %entry br i1 false, label %cond_true, label %cond_next127 cond_true: ; preds = %bb - store i8* null, i8** %byteptr, align 4 - store i8* null, i8** %byteptr, align 4 + store ptr null, ptr %byteptr, align 4 + store ptr null, ptr %byteptr, align 4 br label %cond_next127 cond_next127: ; preds = %cond_true, %bb @@ -25,7 +25,7 @@ cond_next127: ; preds = %cond_true, %bb %tmp154155156 = sext i16 %tmp154155 to i32 ; [#uses=1] %tmp158 = xor i32 %tmp154155156, %tmp153 ; [#uses=1] %tmp160 = or i32 %tmp158, %cnt.0 ; [#uses=1] - %tmp171 = load i32, i32* %bitptr, align 4 ; [#uses=1] + %tmp171 = load i32, ptr %bitptr, align 4 ; [#uses=1] %tmp180181 = sext i16 0 to i32 ; [#uses=3] %tmp183 = add i32 %tmp160, 1 ; [#uses=1] br i1 false, label %cond_true188, label %cond_next245 @@ -43,8 +43,8 @@ cond_next245: ; preds = %cond_next127 br i1 %tmp264, label %cond_true267, label %cond_next391 cond_true267: ; preds = %cond_next245 - store i8* null, i8** %byteptr, align 4 - store i8* null, i8** %byteptr, align 4 + store ptr null, ptr %byteptr, align 4 + store ptr null, ptr %byteptr, align 4 br i1 false, label %cond_true289, label %cond_next327 cond_true289: ; preds = %cond_true267 @@ -54,12 +54,12 @@ cond_next327: ; preds = %cond_true267 br i1 false, label %cond_true343, label %cond_next385 cond_true343: ; preds = %cond_next327 - %tmp345 = load i8*, i8** %byteptr, align 4 ; [#uses=1] - store i8* null, i8** %byteptr, align 4 + %tmp345 = load ptr, ptr %byteptr, align 4 ; [#uses=1] + store ptr null, ptr %byteptr, align 4 br i1 false, label %cond_next385, label %cond_true352 cond_true352: ; preds = %cond_true343 - store i8* %tmp345, i8** %byteptr, align 4 + store ptr %tmp345, ptr %byteptr, align 4 br i1 false, label %cond_true364, label %cond_next385 cond_true364: ; preds = %cond_true352 @@ -69,8 +69,8 @@ cond_next385: ; preds = %cond_true352, %cond_true343, %cond_next327 br label %cond_next391 cond_next391: ; preds = %cond_next385, %cond_next245 - %tmp393 = load i32, i32* %source, align 4 ; [#uses=1] - %tmp395 = load i32, i32* %bitptr, align 4 ; [#uses=2] + %tmp393 = load i32, ptr %source, align 4 ; [#uses=1] + %tmp395 = load i32, ptr %bitptr, align 4 ; [#uses=2] %tmp396 = shl i32 %tmp393, %tmp395 ; [#uses=1] %tmp398 = sub i32 32, %tmp256 ; [#uses=1] %tmp405 = lshr i32 %tmp396, 31 ; [#uses=1] @@ -79,7 +79,7 @@ cond_next391: ; preds = %cond_next385, %cond_next245 %tmp411 = sub i32 0, %tmp409 ; [#uses=1] %tmp422445 = add i32 %tmp254, %tmp183 ; [#uses=2] %tmp426447 = add i32 %tmp395, %tmp256 ; [#uses=1] - store i32 %tmp426447, i32* %bitptr, align 4 + store i32 %tmp426447, ptr %bitptr, align 4 %tmp429448 = icmp ult i32 %tmp422445, 63 ; [#uses=1] br i1 %tmp429448, label %bb, label %UnifiedReturnBlock diff --git a/llvm/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll b/llvm/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll index 21872289dfade..335c0bcd5e411 100644 --- a/llvm/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll +++ b/llvm/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll @@ -3,9 +3,9 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" -define i32 @kernel_init(i8* %unused) { +define i32 @kernel_init(ptr %unused) { entry: - call void asm sideeffect "foo ${0:q}", "=*imr"( i64* elementtype( i64) null ) + call void asm sideeffect "foo ${0:q}", "=*imr"( ptr elementtype( i64) null ) ret i32 0 } diff --git a/llvm/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll b/llvm/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll index 1feb098022fc6..503afa8803a43 100644 --- a/llvm/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll +++ b/llvm/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll @@ -9,7 +9,7 @@ define signext i16 @t() { ; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: retl entry: - %tmp180 = load i16, i16* null, align 2 ; [#uses=3] + %tmp180 = load i16, ptr null, align 2 ; [#uses=3] %tmp180181 = sext i16 %tmp180 to i32 ; [#uses=1] %tmp185 = icmp slt i16 %tmp180, 0 ; [#uses=1] br i1 %tmp185, label %cond_true188, label %cond_next245 diff --git a/llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll b/llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll index 10cb826944b12..f49ce39bf245a 100644 --- a/llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll +++ b/llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=i686-- -define i32 @unique(i8* %full, i32 %p, i32 %len, i32 %mode, i32 %verbos, i32 %flags) { +define i32 @unique(ptr %full, i32 %p, i32 %len, i32 %mode, i32 %verbos, i32 %flags) { entry: br i1 false, label %cond_true15, label %cond_next107 @@ -19,7 +19,7 @@ bb76.split: ; preds = %bb69.outer.split.split, %bb69.us208 bb69.outer: ; preds = %bb76.split, %bb98.preheader %from.0.reg2mem.0.ph.rec = phi i32 [ %tmp75.rec, %bb76.split ], [ 0, %bb98.preheader ] ; [#uses=1] %tmp75.rec = add i32 %from.0.reg2mem.0.ph.rec, 1 ; [#uses=2] - %tmp75 = getelementptr i8, i8* null, i32 %tmp75.rec ; [#uses=6] + %tmp75 = getelementptr i8, ptr null, i32 %tmp75.rec ; [#uses=6] br i1 false, label %bb69.us208, label %bb69.outer.split.split bb69.us208: ; preds = %bb69.outer @@ -37,7 +37,7 @@ bb69.outer.split.split: ; preds = %bb69.outer ] bb89: ; preds = %bb69.outer.split.split, %bb69.outer.split.split, %bb69.outer.split.split, %bb69.us208, %bb69.us208, %bb69.us208 - %tmp75.lcssa189 = phi i8* [ %tmp75, %bb69.us208 ], [ %tmp75, %bb69.us208 ], [ %tmp75, %bb69.us208 ], [ %tmp75, %bb69.outer.split.split ], [ %tmp75, %bb69.outer.split.split ], [ %tmp75, %bb69.outer.split.split ] ; [#uses=0] + %tmp75.lcssa189 = phi ptr [ %tmp75, %bb69.us208 ], [ %tmp75, %bb69.us208 ], [ %tmp75, %bb69.us208 ], [ %tmp75, %bb69.outer.split.split ], [ %tmp75, %bb69.outer.split.split ], [ %tmp75, %bb69.outer.split.split ] ; [#uses=0] ret i32 0 bb103: ; preds = %bb76.split, %bb98.preheader diff --git a/llvm/test/CodeGen/X86/2007-10-31-extractelement-i64.ll b/llvm/test/CodeGen/X86/2007-10-31-extractelement-i64.ll index 2a562458e855e..137fe8ce99ab8 100644 --- a/llvm/test/CodeGen/X86/2007-10-31-extractelement-i64.ll +++ b/llvm/test/CodeGen/X86/2007-10-31-extractelement-i64.ll @@ -5,78 +5,78 @@ target triple = "i686-apple-darwin8" define <1 x i64> @a(<2 x i64> %__A) { entry: - %__A_addr = alloca <2 x i64> ; <<2 x i64>*> [#uses=2] - %retval = alloca <1 x i64>, align 8 ; <<1 x i64>*> [#uses=3] + %__A_addr = alloca <2 x i64> ; [#uses=2] + %retval = alloca <1 x i64>, align 8 ; [#uses=3] %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] - store <2 x i64> %__A, <2 x i64>* %__A_addr - %tmp = load <2 x i64>, <2 x i64>* %__A_addr, align 16 ; <<2 x i64>> [#uses=1] + store <2 x i64> %__A, ptr %__A_addr + %tmp = load <2 x i64>, ptr %__A_addr, align 16 ; <<2 x i64>> [#uses=1] %tmp1 = bitcast <2 x i64> %tmp to <2 x i64> ; <<2 x i64>> [#uses=1] %tmp2 = extractelement <2 x i64> %tmp1, i32 0 ; [#uses=1] %tmp3 = bitcast i64 %tmp2 to <1 x i64> ; <<1 x i64>> [#uses=1] - store <1 x i64> %tmp3, <1 x i64>* %retval, align 8 - %tmp4 = load <1 x i64>, <1 x i64>* %retval, align 8 ; <<1 x i64>> [#uses=0] + store <1 x i64> %tmp3, ptr %retval, align 8 + %tmp4 = load <1 x i64>, ptr %retval, align 8 ; <<1 x i64>> [#uses=0] br label %return return: ; preds = %entry - %retval5 = load <1 x i64>, <1 x i64>* %retval ; <<1 x i64>> [#uses=1] + %retval5 = load <1 x i64>, ptr %retval ; <<1 x i64>> [#uses=1] ret <1 x i64> %retval5 } define <1 x i64> @b(<2 x i64> %__A) { entry: - %__A_addr = alloca <2 x i64> ; <<2 x i64>*> [#uses=2] - %retval = alloca <1 x i64>, align 8 ; <<1 x i64>*> [#uses=3] + %__A_addr = alloca <2 x i64> ; [#uses=2] + %retval = alloca <1 x i64>, align 8 ; [#uses=3] %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] - store <2 x i64> %__A, <2 x i64>* %__A_addr - %tmp = load <2 x i64>, <2 x i64>* %__A_addr, align 16 ; <<2 x i64>> [#uses=1] + store <2 x i64> %__A, ptr %__A_addr + %tmp = load <2 x i64>, ptr %__A_addr, align 16 ; <<2 x i64>> [#uses=1] %tmp1 = bitcast <2 x i64> %tmp to <2 x i64> ; <<2 x i64>> [#uses=1] %tmp2 = extractelement <2 x i64> %tmp1, i32 1 ; [#uses=1] %tmp3 = bitcast i64 %tmp2 to <1 x i64> ; <<1 x i64>> [#uses=1] - store <1 x i64> %tmp3, <1 x i64>* %retval, align 8 - %tmp4 = load <1 x i64>, <1 x i64>* %retval, align 8 ; <<1 x i64>> [#uses=0] + store <1 x i64> %tmp3, ptr %retval, align 8 + %tmp4 = load <1 x i64>, ptr %retval, align 8 ; <<1 x i64>> [#uses=0] br label %return return: ; preds = %entry - %retval5 = load <1 x i64>, <1 x i64>* %retval ; <<1 x i64>> [#uses=1] + %retval5 = load <1 x i64>, ptr %retval ; <<1 x i64>> [#uses=1] ret <1 x i64> %retval5 } define i64 @c(<2 x i64> %__A) { entry: - %__A_addr = alloca <2 x i64> ; <<2 x i64>*> [#uses=2] - %retval = alloca i64, align 8 ; [#uses=2] - %tmp = alloca i64, align 8 ; [#uses=2] + %__A_addr = alloca <2 x i64> ; [#uses=2] + %retval = alloca i64, align 8 ; [#uses=2] + %tmp = alloca i64, align 8 ; [#uses=2] %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] - store <2 x i64> %__A, <2 x i64>* %__A_addr - %tmp1 = load <2 x i64>, <2 x i64>* %__A_addr, align 16 ; <<2 x i64>> [#uses=1] + store <2 x i64> %__A, ptr %__A_addr + %tmp1 = load <2 x i64>, ptr %__A_addr, align 16 ; <<2 x i64>> [#uses=1] %tmp2 = bitcast <2 x i64> %tmp1 to <2 x i64> ; <<2 x i64>> [#uses=1] %tmp3 = extractelement <2 x i64> %tmp2, i32 0 ; [#uses=1] - store i64 %tmp3, i64* %tmp, align 8 - %tmp4 = load i64, i64* %tmp, align 8 ; [#uses=1] - store i64 %tmp4, i64* %retval, align 8 + store i64 %tmp3, ptr %tmp, align 8 + %tmp4 = load i64, ptr %tmp, align 8 ; [#uses=1] + store i64 %tmp4, ptr %retval, align 8 br label %return return: ; preds = %entry - %retval5 = load i64, i64* %retval ; [#uses=1] + %retval5 = load i64, ptr %retval ; [#uses=1] ret i64 %retval5 } define i64 @d(<2 x i64> %__A) { entry: - %__A_addr = alloca <2 x i64> ; <<2 x i64>*> [#uses=2] - %retval = alloca i64, align 8 ; [#uses=2] - %tmp = alloca i64, align 8 ; [#uses=2] + %__A_addr = alloca <2 x i64> ; [#uses=2] + %retval = alloca i64, align 8 ; [#uses=2] + %tmp = alloca i64, align 8 ; [#uses=2] %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] - store <2 x i64> %__A, <2 x i64>* %__A_addr - %tmp1 = load <2 x i64>, <2 x i64>* %__A_addr, align 16 ; <<2 x i64>> [#uses=1] + store <2 x i64> %__A, ptr %__A_addr + %tmp1 = load <2 x i64>, ptr %__A_addr, align 16 ; <<2 x i64>> [#uses=1] %tmp2 = bitcast <2 x i64> %tmp1 to <2 x i64> ; <<2 x i64>> [#uses=1] %tmp3 = extractelement <2 x i64> %tmp2, i32 1 ; [#uses=1] - store i64 %tmp3, i64* %tmp, align 8 - %tmp4 = load i64, i64* %tmp, align 8 ; [#uses=1] - store i64 %tmp4, i64* %retval, align 8 + store i64 %tmp3, ptr %tmp, align 8 + %tmp4 = load i64, ptr %tmp, align 8 ; [#uses=1] + store i64 %tmp4, ptr %retval, align 8 br label %return return: ; preds = %entry - %retval5 = load i64, i64* %retval ; [#uses=1] + %retval5 = load i64, ptr %retval ; [#uses=1] ret i64 %retval5 } diff --git a/llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll b/llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll index d0c7a62590261..269231d66a4e8 100644 --- a/llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll +++ b/llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll @@ -3,10 +3,10 @@ %"struct.K::JL" = type <{ i8 }> %struct.jv = type { i64 } -declare fastcc i64 @f(i32, %"struct.K::JL"*, i8*, i8*, %struct.jv*) +declare fastcc i64 @f(i32, ptr, ptr, ptr, ptr) -define void @t(%"struct.K::JL"* %obj, i8* %name, i8* %sig, %struct.jv* %args) { +define void @t(ptr %obj, ptr %name, ptr %sig, ptr %args) { entry: - %tmp5 = tail call fastcc i64 @f( i32 1, %"struct.K::JL"* %obj, i8* %name, i8* %sig, %struct.jv* %args ) ; [#uses=0] + %tmp5 = tail call fastcc i64 @f( i32 1, ptr %obj, ptr %name, ptr %sig, ptr %args ) ; [#uses=0] ret void } diff --git a/llvm/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll b/llvm/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll index a81e2701e2e92..8c5023c5cb098 100644 --- a/llvm/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll +++ b/llvm/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll @@ -4,6 +4,6 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "x86_64-unknown-linux-gnu" define void @yield() { - %tmp9 = call i64 asm sideeffect "xchgb ${0:b},$1", "=q,*m,0,~{dirflag},~{fpsr},~{flags},~{memory}"( i64* elementtype( i64) null, i64 0 ) ; + %tmp9 = call i64 asm sideeffect "xchgb ${0:b},$1", "=q,*m,0,~{dirflag},~{fpsr},~{flags},~{memory}"( ptr elementtype( i64) null, i64 0 ) ; ret void } diff --git a/llvm/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll b/llvm/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll index a20fb47d7b10d..9e32efce48de2 100644 --- a/llvm/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll +++ b/llvm/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll @@ -1,18 +1,18 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu ; PR1766 - %struct.dentry = type { %struct.dentry_operations* } - %struct.dentry_operations = type { i32 (%struct.dentry*, %struct.qstr*)* } - %struct.qstr = type { i32, i32, i8* } + %struct.dentry = type { ptr } + %struct.dentry_operations = type { ptr } + %struct.qstr = type { i32, i32, ptr } -define %struct.dentry* @d_hash_and_lookup(%struct.dentry* %dir, %struct.qstr* %name) { +define ptr @d_hash_and_lookup(ptr %dir, ptr %name) { entry: br i1 false, label %bb37, label %bb bb: ; preds = %bb, %entry %name8.0.reg2mem.0.rec = phi i64 [ %indvar.next, %bb ], [ 0, %entry ] ; [#uses=1] %hash.0.reg2mem.0 = phi i64 [ %tmp27, %bb ], [ 0, %entry ] ; [#uses=1] - %tmp13 = load i8, i8* null, align 1 ; [#uses=1] + %tmp13 = load i8, ptr null, align 1 ; [#uses=1] %tmp1314 = zext i8 %tmp13 to i64 ; [#uses=1] %tmp25 = lshr i64 %tmp1314, 4 ; [#uses=1] %tmp22 = add i64 %tmp25, %hash.0.reg2mem.0 ; [#uses=1] @@ -28,10 +28,10 @@ bb37.loopexit: ; preds = %bb bb37: ; preds = %bb37.loopexit, %entry %hash.0.reg2mem.1 = phi i32 [ %phitmp, %bb37.loopexit ], [ 0, %entry ] ; [#uses=1] - store i32 %hash.0.reg2mem.1, i32* null, align 8 - %tmp75 = tail call i32 null( %struct.dentry* %dir, %struct.qstr* %name ) ; [#uses=0] - %tmp84 = tail call i32 (...) @d_lookup( %struct.dentry* %dir, %struct.qstr* %name ) ; [#uses=0] - ret %struct.dentry* null + store i32 %hash.0.reg2mem.1, ptr null, align 8 + %tmp75 = tail call i32 null( ptr %dir, ptr %name ) ; [#uses=0] + %tmp84 = tail call i32 (...) @d_lookup( ptr %dir, ptr %name ) ; [#uses=0] + ret ptr null } declare i32 @d_lookup(...) diff --git a/llvm/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll b/llvm/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll index 8331c34bc32a1..1c9e2787447d7 100644 --- a/llvm/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll +++ b/llvm/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll @@ -1,15 +1,15 @@ ; RUN: llc -no-integrated-as < %s -mtriple=x86_64-unknown-linux-gnu ; PR1767 -define void @xor_sse_2(i64 %bytes, i64* %p1, i64* %p2) { +define void @xor_sse_2(i64 %bytes, ptr %p1, ptr %p2) { entry: - %p2_addr = alloca i64* ; [#uses=2] - %lines = alloca i32 ; [#uses=2] - store i64* %p2, i64** %p2_addr, align 8 + %p2_addr = alloca ptr ; [#uses=2] + %lines = alloca i32 ; [#uses=2] + store ptr %p2, ptr %p2_addr, align 8 %tmp1 = lshr i64 %bytes, 8 ; [#uses=1] %tmp12 = trunc i64 %tmp1 to i32 ; [#uses=2] - store i32 %tmp12, i32* %lines, align 4 - %tmp6 = call i64* asm sideeffect "foo", -"=r,=*r,=*r,r,0,1,2,~{dirflag},~{fpsr},~{flags},~{memory}"(i64** elementtype(i64*) %p2_addr, i32* elementtype(i32) %lines, i64 256, i64* %p1, i64* %p2, i32 %tmp12 ) ; [#uses=0] + store i32 %tmp12, ptr %lines, align 4 + %tmp6 = call ptr asm sideeffect "foo", +"=r,=*r,=*r,r,0,1,2,~{dirflag},~{fpsr},~{flags},~{memory}"(ptr elementtype(ptr) %p2_addr, ptr elementtype(i32) %lines, i64 256, ptr %p1, ptr %p2, i32 %tmp12 ) ; [#uses=0] ret void } diff --git a/llvm/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll b/llvm/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll index 4618e4b689809..ed2000e89946a 100644 --- a/llvm/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll +++ b/llvm/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll @@ -2,12 +2,12 @@ ; PR1761 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-pc-linux" -@str = internal constant [12 x i8] c"init/main.c\00" ; <[12 x i8]*> [#uses=1] +@str = internal constant [12 x i8] c"init/main.c\00" ; [#uses=1] ; CHECK: {{foo str$}} define i32 @unknown_bootoption() { entry: - tail call void asm sideeffect "foo ${0:c}\0A", "i,~{dirflag},~{fpsr},~{flags}"( i8* getelementptr ([12 x i8], [12 x i8]* @str, i32 0, i64 0) ) + tail call void asm sideeffect "foo ${0:c}\0A", "i,~{dirflag},~{fpsr},~{flags}"( ptr @str ) ret i32 undef } diff --git a/llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll b/llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll index d073aad4a5c35..750d06d9e6031 100644 --- a/llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll +++ b/llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s -define float @foo(i32* %x, float* %y, i32 %c) nounwind { +define float @foo(ptr %x, ptr %y, i32 %c) nounwind { ; CHECK-LABEL: foo: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: pushl %esi @@ -40,11 +40,11 @@ entry: bb18: ; preds = %bb18, %entry %i.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %tmp17, %bb18 ] ; [#uses=3] %res.0.reg2mem.0 = phi float [ 0.000000e+00, %entry ], [ %tmp14, %bb18 ] ; [#uses=1] - %tmp3 = getelementptr i32, i32* %x, i32 %i.0.reg2mem.0 ; [#uses=1] - %tmp4 = load i32, i32* %tmp3, align 4 ; [#uses=1] + %tmp3 = getelementptr i32, ptr %x, i32 %i.0.reg2mem.0 ; [#uses=1] + %tmp4 = load i32, ptr %tmp3, align 4 ; [#uses=1] %tmp45 = sitofp i32 %tmp4 to float ; [#uses=1] - %tmp8 = getelementptr float, float* %y, i32 %i.0.reg2mem.0 ; [#uses=1] - %tmp9 = load float, float* %tmp8, align 4 ; [#uses=1] + %tmp8 = getelementptr float, ptr %y, i32 %i.0.reg2mem.0 ; [#uses=1] + %tmp9 = load float, ptr %tmp8, align 4 ; [#uses=1] %tmp11 = fmul float %tmp9, %tmp45 ; [#uses=1] %tmp14 = fadd float %tmp11, %res.0.reg2mem.0 ; [#uses=2] %tmp17 = add i32 %i.0.reg2mem.0, 1 ; [#uses=2] diff --git a/llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll b/llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll index aa6408d31b19d..de8aea85896ce 100644 --- a/llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll +++ b/llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll @@ -1,12 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-- | FileCheck %s - %struct.eebb = type { %struct.eebb*, i16* } - %struct.hf = type { %struct.hf*, i16*, i8*, i32, i32, %struct.eebb*, i32, i32, i8*, i8*, i8*, i8*, i16*, i8*, i16*, %struct.ri, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [30 x i32], %struct.eebb, i32, i8* } - %struct.foo_data = type { i32, i32, i32, i32*, i32, i32, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i16*, i16*, i16*, i16*, i32, i32, i32, %struct.ri*, i8*, %struct.hf* } - %struct.ri = type { %struct.ri*, i32, i8*, i16*, i32*, i32 } + %struct.eebb = type { ptr, ptr } + %struct.hf = type { ptr, ptr, ptr, i32, i32, ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %struct.ri, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [30 x i32], %struct.eebb, i32, ptr } + %struct.foo_data = type { i32, i32, i32, ptr, i32, i32, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, ptr, ptr, ptr } + %struct.ri = type { ptr, i32, ptr, ptr, ptr, i32 } -define fastcc i32 @foo(i16* %eptr, i8* %ecode, %struct.foo_data* %md, i32 %ims) { +define fastcc i32 @foo(ptr %eptr, ptr %ecode, ptr %md, i32 %ims) { ; CHECK-LABEL: foo: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: cmpl $0, 0 @@ -21,7 +21,7 @@ define fastcc i32 @foo(i16* %eptr, i8* %ecode, %struct.foo_data* %md, i32 %ims) ; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: retl entry: - %tmp36 = load i32, i32* null, align 4 ; [#uses=1] + %tmp36 = load i32, ptr null, align 4 ; [#uses=1] %tmp37 = icmp ult i32 0, %tmp36 ; [#uses=1] br i1 %tmp37, label %cond_next79, label %cond_true @@ -29,7 +29,7 @@ cond_true: ; preds = %entry ret i32 0 cond_next79: ; preds = %entry - %tmp85 = load i32, i32* null, align 4 ; [#uses=1] + %tmp85 = load i32, ptr null, align 4 ; [#uses=1] %tmp86 = icmp ult i32 0, %tmp85 ; [#uses=1] br i1 %tmp86, label %cond_next130, label %cond_true89 diff --git a/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll b/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll index 4a95c4b72ea66..79b47f638a269 100644 --- a/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll +++ b/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll @@ -3,9 +3,9 @@ ; Increment in loop bb.i28.i adjusted to 2, to prevent loop reversal from ; kicking in. -declare fastcc void @rdft(i32, i32, double*, i32*, double*) +declare fastcc void @rdft(i32, i32, ptr, ptr, ptr) -define fastcc void @mp_sqrt(i32 %n, i32 %radix, i32* %in, i32* %out, i32* %tmp1, i32* %tmp2, i32 %nfft, double* %tmp1fft, double* %tmp2fft, i32* %ip, double* %w) nounwind { +define fastcc void @mp_sqrt(i32 %n, i32 %radix, ptr %in, ptr %out, ptr %tmp1, ptr %tmp2, i32 %nfft, ptr %tmp1fft, ptr %tmp2fft, ptr %ip, ptr %w) nounwind { ; CHECK-LABEL: mp_sqrt: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: pushl %ebp @@ -144,7 +144,7 @@ cond_true29.i: ; preds = %cond_next.i ret void cond_next36.i: ; preds = %cond_next.i - store i32 %tmp22.i, i32* null, align 4 + store i32 %tmp22.i, ptr null, align 4 %tmp8.i14.i = select i1 %foo, i32 1, i32 0 ; [#uses=1] br label %bb.i28.i @@ -164,36 +164,36 @@ bb.i28.i: ; preds = %bb.i28.i, %cond_next36.i mp_unexp_d2mp.exit29.i: ; preds = %bb.i28.i %tmp46.i = sub i32 0, %tmp22.i ; [#uses=1] - store i32 %tmp46.i, i32* null, align 4 + store i32 %tmp46.i, ptr null, align 4 br i1 %exitcond40.i, label %bb.i.i, label %mp_sqrt_init.exit bb.i.i: ; preds = %bb.i.i, %mp_unexp_d2mp.exit29.i br label %bb.i.i mp_sqrt_init.exit: ; preds = %mp_unexp_d2mp.exit29.i - tail call fastcc void @mp_mul_csqu( i32 0, double* %tmp1fft ) - tail call fastcc void @rdft( i32 0, i32 -1, double* null, i32* %ip, double* %w ) - tail call fastcc void @mp_mul_d2i( i32 0, i32 %radix, i32 0, double* %tmp1fft, i32* %tmp2 ) + tail call fastcc void @mp_mul_csqu( i32 0, ptr %tmp1fft ) + tail call fastcc void @rdft( i32 0, i32 -1, ptr null, ptr %ip, ptr %w ) + tail call fastcc void @mp_mul_d2i( i32 0, i32 %radix, i32 0, ptr %tmp1fft, ptr %tmp2 ) br i1 %exitcond40.i, label %cond_false.i, label %cond_true36.i cond_true36.i: ; preds = %mp_sqrt_init.exit ret void cond_false.i: ; preds = %mp_sqrt_init.exit - tail call fastcc void @mp_round( i32 0, i32 %radix, i32 0, i32* %out ) - tail call fastcc void @mp_add( i32 0, i32 %radix, i32* %tmp1, i32* %tmp2, i32* %tmp1 ) - tail call fastcc void @mp_sub( i32 0, i32 %radix, i32* %in, i32* %tmp2, i32* %tmp2 ) - tail call fastcc void @mp_round( i32 0, i32 %radix, i32 0, i32* %tmp1 ) - tail call fastcc void @mp_mul_d2i( i32 0, i32 %radix, i32 %tmp7.i3, double* %tmp2fft, i32* %tmp2 ) + tail call fastcc void @mp_round( i32 0, i32 %radix, i32 0, ptr %out ) + tail call fastcc void @mp_add( i32 0, i32 %radix, ptr %tmp1, ptr %tmp2, ptr %tmp1 ) + tail call fastcc void @mp_sub( i32 0, i32 %radix, ptr %in, ptr %tmp2, ptr %tmp2 ) + tail call fastcc void @mp_round( i32 0, i32 %radix, i32 0, ptr %tmp1 ) + tail call fastcc void @mp_mul_d2i( i32 0, i32 %radix, i32 %tmp7.i3, ptr %tmp2fft, ptr %tmp2 ) ret void } -declare fastcc void @mp_add(i32, i32, i32*, i32*, i32*) +declare fastcc void @mp_add(i32, i32, ptr, ptr, ptr) -declare fastcc void @mp_sub(i32, i32, i32*, i32*, i32*) +declare fastcc void @mp_sub(i32, i32, ptr, ptr, ptr) -declare fastcc void @mp_round(i32, i32, i32, i32*) +declare fastcc void @mp_round(i32, i32, i32, ptr) -declare fastcc void @mp_mul_csqu(i32, double*) +declare fastcc void @mp_mul_csqu(i32, ptr) -declare fastcc void @mp_mul_d2i(i32, i32, i32, double*, i32*) +declare fastcc void @mp_mul_d2i(i32, i32, i32, ptr, ptr) diff --git a/llvm/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll b/llvm/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll index 3404fe61fc123..566665d4b600a 100644 --- a/llvm/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll +++ b/llvm/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll @@ -2,27 +2,26 @@ ; PR1799 %struct.c34007g__designated___XUB = type { i32, i32, i32, i32 } - %struct.c34007g__pkg__parent = type { i32*, %struct.c34007g__designated___XUB* } + %struct.c34007g__pkg__parent = type { ptr, ptr } define void @_ada_c34007g() { entry: - %x8 = alloca %struct.c34007g__pkg__parent, align 8 ; <%struct.c34007g__pkg__parent*> [#uses=2] + %x8 = alloca %struct.c34007g__pkg__parent, align 8 ; [#uses=2] br i1 true, label %bb1271, label %bb848 bb848: ; preds = %entry ret void bb1271: ; preds = %bb898 - %tmp1272 = getelementptr %struct.c34007g__pkg__parent, %struct.c34007g__pkg__parent* %x8, i32 0, i32 0 ; [#uses=1] - %x82167 = bitcast %struct.c34007g__pkg__parent* %x8 to i64* ; [#uses=1] + %tmp1272 = getelementptr %struct.c34007g__pkg__parent, ptr %x8, i32 0, i32 0 ; [#uses=1] br i1 true, label %bb4668, label %bb848 bb4668: ; preds = %bb4648 - %tmp5464 = load i64, i64* %x82167, align 8 ; [#uses=1] + %tmp5464 = load i64, ptr %x8, align 8 ; [#uses=1] %tmp5467 = icmp ne i64 0, %tmp5464 ; [#uses=1] - %tmp5470 = load i32*, i32** %tmp1272, align 8 ; [#uses=1] - %tmp5471 = icmp eq i32* %tmp5470, null ; [#uses=1] - call fastcc void @c34007g__pkg__create.311( %struct.c34007g__pkg__parent* null, i32 7, i32 9, i32 2, i32 4, i32 1 ) + %tmp5470 = load ptr, ptr %tmp1272, align 8 ; [#uses=1] + %tmp5471 = icmp eq ptr %tmp5470, null ; [#uses=1] + call fastcc void @c34007g__pkg__create.311( ptr null, i32 7, i32 9, i32 2, i32 4, i32 1 ) %tmp5475 = or i1 %tmp5471, %tmp5467 ; [#uses=1] %tmp5497 = or i1 %tmp5475, false ; [#uses=1] br i1 %tmp5497, label %bb848, label %bb5507 @@ -32,4 +31,4 @@ bb5507: ; preds = %bb4668 } -declare fastcc void @c34007g__pkg__create.311(%struct.c34007g__pkg__parent*, i32, i32, i32, i32, i32) +declare fastcc void @c34007g__pkg__create.311(ptr, i32, i32, i32, i32, i32) diff --git a/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll b/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll index d839ed6df0036..4482c5aec8e81 100644 --- a/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll +++ b/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll @@ -3,7 +3,7 @@ ; PR1872 %struct.c34007g__designated___XUB = type { i32, i32, i32, i32 } - %struct.c34007g__pkg__parent = type { i32*, %struct.c34007g__designated___XUB* } + %struct.c34007g__pkg__parent = type { ptr, ptr } define void @_ada_c34007g() { ; CHECK-LABEL: _ada_c34007g: @@ -30,16 +30,15 @@ define void @_ada_c34007g() { ; CHECK-NEXT: .cfi_def_cfa %esp, 4 ; CHECK-NEXT: retl entry: - %x8 = alloca %struct.c34007g__pkg__parent, align 8 ; <%struct.c34007g__pkg__parent*> [#uses=2] - %tmp1272 = getelementptr %struct.c34007g__pkg__parent, %struct.c34007g__pkg__parent* %x8, i32 0, i32 0 ; [#uses=1] - %x82167 = bitcast %struct.c34007g__pkg__parent* %x8 to i64* ; [#uses=1] + %x8 = alloca %struct.c34007g__pkg__parent, align 8 ; [#uses=2] + %tmp1272 = getelementptr %struct.c34007g__pkg__parent, ptr %x8, i32 0, i32 0 ; [#uses=1] br i1 true, label %bb4668, label %bb848 bb4668: ; preds = %bb4648 - %tmp5464 = load i64, i64* %x82167, align 8 ; [#uses=1] + %tmp5464 = load i64, ptr %x8, align 8 ; [#uses=1] %tmp5467 = icmp ne i64 0, %tmp5464 ; [#uses=1] - %tmp5470 = load i32*, i32** %tmp1272, align 8 ; [#uses=1] - %tmp5471 = icmp eq i32* %tmp5470, null ; [#uses=1] + %tmp5470 = load ptr, ptr %tmp1272, align 8 ; [#uses=1] + %tmp5471 = icmp eq ptr %tmp5470, null ; [#uses=1] %tmp5475 = or i1 %tmp5471, %tmp5467 ; [#uses=1] %tmp5497 = or i1 %tmp5475, false ; [#uses=1] br i1 %tmp5497, label %bb848, label %bb5507 diff --git a/llvm/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll b/llvm/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll index 2246c98940967..c90219676a63f 100644 --- a/llvm/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll +++ b/llvm/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll @@ -8,7 +8,7 @@ ; CHECK-NOT: cmp ; CHECK: cmov - %struct.indexentry = type { i32, i8*, i8*, i8*, i8*, i8* } + %struct.indexentry = type { i32, ptr, ptr, ptr, ptr, ptr } define i32 @_bfd_stab_section_find_nearest_line(i32 %offset, i1 %cond) nounwind { entry: @@ -20,14 +20,14 @@ bb917: ; preds = %entry bb951: ; preds = %bb986, %entry %tmp955 = sdiv i32 %offset, 2 ; [#uses=3] - %tmp961 = getelementptr %struct.indexentry, %struct.indexentry* null, i32 %tmp955, i32 0 ; [#uses=1] + %tmp961 = getelementptr %struct.indexentry, ptr null, i32 %tmp955, i32 0 ; [#uses=1] br i1 %cond, label %bb986, label %bb967 bb967: ; preds = %bb951 ret i32 0 bb986: ; preds = %bb951 - %tmp993 = load i32, i32* %tmp961, align 4 ; [#uses=1] + %tmp993 = load i32, ptr %tmp961, align 4 ; [#uses=1] %tmp995 = icmp ugt i32 %tmp993, %tmp910 ; [#uses=2] %tmp1002 = add i32 %tmp955, 1 ; [#uses=1] %low.0 = select i1 %tmp995, i32 0, i32 %tmp1002 ; [#uses=1] diff --git a/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll b/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll index eb8439fc1795e..de07b353e41d9 100644 --- a/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll +++ b/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll @@ -1,34 +1,34 @@ ; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -regalloc=fast -optimize-regalloc=0 -define void @SolveCubic(double %a, double %b, double %c, double %d, i32* %solutions, double* %x) { +define void @SolveCubic(double %a, double %b, double %c, double %d, ptr %solutions, ptr %x) { entry: - %tmp71 = load x86_fp80, x86_fp80* null, align 16 ; [#uses=1] + %tmp71 = load x86_fp80, ptr null, align 16 ; [#uses=1] %tmp72 = fdiv x86_fp80 %tmp71, 0xKC000C000000000000000 ; [#uses=1] %tmp73 = fadd x86_fp80 0xK00000000000000000000, %tmp72 ; [#uses=1] %tmp7374 = fptrunc x86_fp80 %tmp73 to double ; [#uses=1] - store double %tmp7374, double* null, align 8 - %tmp81 = load double, double* null, align 8 ; [#uses=1] + store double %tmp7374, ptr null, align 8 + %tmp81 = load double, ptr null, align 8 ; [#uses=1] %tmp82 = fadd double %tmp81, 0x401921FB54442D18 ; [#uses=1] %tmp83 = fdiv double %tmp82, 3.000000e+00 ; [#uses=1] %tmp84 = call double @cos( double %tmp83 ) ; [#uses=1] %tmp85 = fmul double 0.000000e+00, %tmp84 ; [#uses=1] %tmp8586 = fpext double %tmp85 to x86_fp80 ; [#uses=1] - %tmp87 = load x86_fp80, x86_fp80* null, align 16 ; [#uses=1] + %tmp87 = load x86_fp80, ptr null, align 16 ; [#uses=1] %tmp88 = fdiv x86_fp80 %tmp87, 0xKC000C000000000000000 ; [#uses=1] %tmp89 = fadd x86_fp80 %tmp8586, %tmp88 ; [#uses=1] %tmp8990 = fptrunc x86_fp80 %tmp89 to double ; [#uses=1] - store double %tmp8990, double* null, align 8 - %tmp97 = load double, double* null, align 8 ; [#uses=1] + store double %tmp8990, ptr null, align 8 + %tmp97 = load double, ptr null, align 8 ; [#uses=1] %tmp98 = fadd double %tmp97, 0x402921FB54442D18 ; [#uses=1] %tmp99 = fdiv double %tmp98, 3.000000e+00 ; [#uses=1] %tmp100 = call double @cos( double %tmp99 ) ; [#uses=1] %tmp101 = fmul double 0.000000e+00, %tmp100 ; [#uses=1] %tmp101102 = fpext double %tmp101 to x86_fp80 ; [#uses=1] - %tmp103 = load x86_fp80, x86_fp80* null, align 16 ; [#uses=1] + %tmp103 = load x86_fp80, ptr null, align 16 ; [#uses=1] %tmp104 = fdiv x86_fp80 %tmp103, 0xKC000C000000000000000 ; [#uses=1] %tmp105 = fadd x86_fp80 %tmp101102, %tmp104 ; [#uses=1] %tmp105106 = fptrunc x86_fp80 %tmp105 to double ; [#uses=1] - store double %tmp105106, double* null, align 8 + store double %tmp105106, ptr null, align 8 ret void } diff --git a/llvm/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll b/llvm/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll index a08fc1cbd052f..bd1dba617ccf1 100644 --- a/llvm/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll +++ b/llvm/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll @@ -1,30 +1,30 @@ ; RUN: llc < %s -mtriple=i686-- | not grep IMPLICIT_DEF - %struct.node_t = type { double*, %struct.node_t*, %struct.node_t**, double**, double*, i32, i32 } + %struct.node_t = type { ptr, ptr, ptr, ptr, ptr, i32, i32 } -define void @localize_local_bb19_bb(%struct.node_t** %cur_node) { +define void @localize_local_bb19_bb(ptr %cur_node) { newFuncRoot: - %tmp1 = load %struct.node_t*, %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1] - %tmp2 = getelementptr %struct.node_t, %struct.node_t* %tmp1, i32 0, i32 4 ; [#uses=1] - %tmp3 = load double*, double** %tmp2, align 4 ; [#uses=1] - %tmp4 = load %struct.node_t*, %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1] - %tmp5 = getelementptr %struct.node_t, %struct.node_t* %tmp4, i32 0, i32 4 ; [#uses=1] - store double* %tmp3, double** %tmp5, align 4 - %tmp6 = load %struct.node_t*, %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1] - %tmp7 = getelementptr %struct.node_t, %struct.node_t* %tmp6, i32 0, i32 3 ; [#uses=1] - %tmp8 = load double**, double*** %tmp7, align 4 ; [#uses=1] - %tmp9 = load %struct.node_t*, %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1] - %tmp10 = getelementptr %struct.node_t, %struct.node_t* %tmp9, i32 0, i32 3 ; [#uses=1] - store double** %tmp8, double*** %tmp10, align 4 - %tmp11 = load %struct.node_t*, %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1] - %tmp12 = getelementptr %struct.node_t, %struct.node_t* %tmp11, i32 0, i32 0 ; [#uses=1] - %tmp13 = load double*, double** %tmp12, align 4 ; [#uses=1] - %tmp14 = load %struct.node_t*, %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1] - %tmp15 = getelementptr %struct.node_t, %struct.node_t* %tmp14, i32 0, i32 0 ; [#uses=1] - store double* %tmp13, double** %tmp15, align 4 - %tmp16 = load %struct.node_t*, %struct.node_t** %cur_node, align 4 ; <%struct.node_t*> [#uses=1] - %tmp17 = getelementptr %struct.node_t, %struct.node_t* %tmp16, i32 0, i32 1 ; <%struct.node_t**> [#uses=1] - %tmp18 = load %struct.node_t*, %struct.node_t** %tmp17, align 4 ; <%struct.node_t*> [#uses=1] - store %struct.node_t* %tmp18, %struct.node_t** %cur_node, align 4 + %tmp1 = load ptr, ptr %cur_node, align 4 ; [#uses=1] + %tmp2 = getelementptr %struct.node_t, ptr %tmp1, i32 0, i32 4 ; [#uses=1] + %tmp3 = load ptr, ptr %tmp2, align 4 ; [#uses=1] + %tmp4 = load ptr, ptr %cur_node, align 4 ; [#uses=1] + %tmp5 = getelementptr %struct.node_t, ptr %tmp4, i32 0, i32 4 ; [#uses=1] + store ptr %tmp3, ptr %tmp5, align 4 + %tmp6 = load ptr, ptr %cur_node, align 4 ; [#uses=1] + %tmp7 = getelementptr %struct.node_t, ptr %tmp6, i32 0, i32 3 ; [#uses=1] + %tmp8 = load ptr, ptr %tmp7, align 4 ; [#uses=1] + %tmp9 = load ptr, ptr %cur_node, align 4 ; [#uses=1] + %tmp10 = getelementptr %struct.node_t, ptr %tmp9, i32 0, i32 3 ; [#uses=1] + store ptr %tmp8, ptr %tmp10, align 4 + %tmp11 = load ptr, ptr %cur_node, align 4 ; [#uses=1] + %tmp12 = getelementptr %struct.node_t, ptr %tmp11, i32 0, i32 0 ; [#uses=1] + %tmp13 = load ptr, ptr %tmp12, align 4 ; [#uses=1] + %tmp14 = load ptr, ptr %cur_node, align 4 ; [#uses=1] + %tmp15 = getelementptr %struct.node_t, ptr %tmp14, i32 0, i32 0 ; [#uses=1] + store ptr %tmp13, ptr %tmp15, align 4 + %tmp16 = load ptr, ptr %cur_node, align 4 ; [#uses=1] + %tmp17 = getelementptr %struct.node_t, ptr %tmp16, i32 0, i32 1 ; [#uses=1] + %tmp18 = load ptr, ptr %tmp17, align 4 ; [#uses=1] + store ptr %tmp18, ptr %cur_node, align 4 ret void } diff --git a/llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll b/llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll index c41481d716009..8863b9a0bf45e 100644 --- a/llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll +++ b/llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll @@ -1,12 +1,12 @@ ; RUN: llc < %s -mtriple=i686-- ; PR1975 -@nodes = external dso_local global i64 ; [#uses=2] +@nodes = external dso_local global i64 ; [#uses=2] define fastcc i32 @ab(i32 %alpha, i32 %beta) nounwind { entry: - %tmp1 = load i64, i64* @nodes, align 8 ; [#uses=1] + %tmp1 = load i64, ptr @nodes, align 8 ; [#uses=1] %tmp2 = add i64 %tmp1, 1 ; [#uses=1] - store i64 %tmp2, i64* @nodes, align 8 + store i64 %tmp2, ptr @nodes, align 8 ret i32 0 } diff --git a/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll b/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll index 050c12c9c0a5d..2033ee01b6b8b 100644 --- a/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll +++ b/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll @@ -1,21 +1,21 @@ ; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s ; CHECK: xorps {{.*}}{{LCPI0_0|__xmm@}} -define void @casin({ double, double }* sret({ double, double }) %agg.result, double %z.0, double %z.1) nounwind { +define void @casin(ptr sret({ double, double }) %agg.result, double %z.0, double %z.1) nounwind { entry: - %memtmp = alloca { double, double }, align 8 ; <{ double, double }*> [#uses=3] + %memtmp = alloca { double, double }, align 8 ; [#uses=3] %tmp4 = fsub double -0.000000e+00, %z.1 ; [#uses=1] - call void @casinh( { double, double }* sret({ double, double }) %memtmp, double %tmp4, double %z.0 ) nounwind - %tmp19 = getelementptr { double, double }, { double, double }* %memtmp, i32 0, i32 0 ; [#uses=1] - %tmp20 = load double, double* %tmp19, align 8 ; [#uses=1] - %tmp22 = getelementptr { double, double }, { double, double }* %memtmp, i32 0, i32 1 ; [#uses=1] - %tmp23 = load double, double* %tmp22, align 8 ; [#uses=1] + call void @casinh( ptr sret({ double, double }) %memtmp, double %tmp4, double %z.0 ) nounwind + %tmp19 = getelementptr { double, double }, ptr %memtmp, i32 0, i32 0 ; [#uses=1] + %tmp20 = load double, ptr %tmp19, align 8 ; [#uses=1] + %tmp22 = getelementptr { double, double }, ptr %memtmp, i32 0, i32 1 ; [#uses=1] + %tmp23 = load double, ptr %tmp22, align 8 ; [#uses=1] %tmp32 = fsub double -0.000000e+00, %tmp20 ; [#uses=1] - %tmp37 = getelementptr { double, double }, { double, double }* %agg.result, i32 0, i32 0 ; [#uses=1] - store double %tmp23, double* %tmp37, align 8 - %tmp40 = getelementptr { double, double }, { double, double }* %agg.result, i32 0, i32 1 ; [#uses=1] - store double %tmp32, double* %tmp40, align 8 + %tmp37 = getelementptr { double, double }, ptr %agg.result, i32 0, i32 0 ; [#uses=1] + store double %tmp23, ptr %tmp37, align 8 + %tmp40 = getelementptr { double, double }, ptr %agg.result, i32 0, i32 1 ; [#uses=1] + store double %tmp32, ptr %tmp40, align 8 ret void } -declare void @casinh({ double, double }* sret({ double, double }) , double, double) nounwind +declare void @casinh(ptr sret({ double, double }) , double, double) nounwind diff --git a/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll b/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll index 9f11ecd8bb029..dd60e641df254 100644 --- a/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll +++ b/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll @@ -2,17 +2,17 @@ ; RUN: llc < %s -mtriple=i686-- -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 16 ; PR1909 -@.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <[48 x i8]*> [#uses=1] +@.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; [#uses=1] -define void @minmax(float* %result) nounwind optsize { +define void @minmax(ptr %result) nounwind optsize { entry: - %tmp2 = load float, float* %result, align 4 ; [#uses=6] - %tmp4 = getelementptr float, float* %result, i32 2 ; [#uses=5] - %tmp5 = load float, float* %tmp4, align 4 ; [#uses=10] - %tmp7 = getelementptr float, float* %result, i32 4 ; [#uses=5] - %tmp8 = load float, float* %tmp7, align 4 ; [#uses=8] - %tmp10 = getelementptr float, float* %result, i32 6 ; [#uses=3] - %tmp11 = load float, float* %tmp10, align 4 ; [#uses=8] + %tmp2 = load float, ptr %result, align 4 ; [#uses=6] + %tmp4 = getelementptr float, ptr %result, i32 2 ; [#uses=5] + %tmp5 = load float, ptr %tmp4, align 4 ; [#uses=10] + %tmp7 = getelementptr float, ptr %result, i32 4 ; [#uses=5] + %tmp8 = load float, ptr %tmp7, align 4 ; [#uses=8] + %tmp10 = getelementptr float, ptr %result, i32 6 ; [#uses=3] + %tmp11 = load float, ptr %tmp10, align 4 ; [#uses=8] %tmp12 = fcmp olt float %tmp8, %tmp11 ; [#uses=5] br i1 %tmp12, label %bb, label %bb21 @@ -45,21 +45,21 @@ bb59: ; preds = %bb50, %bb40, %bb26 bb72: ; preds = %bb59 %tmp82475 = fcmp olt float %tmp5, %tmp8 ; [#uses=2] %brmerge786 = or i1 %tmp82475, %tmp12 ; [#uses=1] - %tmp4.mux787 = select i1 %tmp82475, float* %tmp4, float* %tmp7 ; [#uses=1] + %tmp4.mux787 = select i1 %tmp82475, ptr %tmp4, ptr %tmp7 ; [#uses=1] br i1 %brmerge786, label %bb111, label %bb103 bb80: ; preds = %bb59 %tmp82 = fcmp olt float %tmp5, %tmp11 ; [#uses=2] %brmerge = or i1 %tmp82, %tmp12 ; [#uses=1] - %tmp4.mux = select i1 %tmp82, float* %tmp4, float* %tmp7 ; [#uses=1] + %tmp4.mux = select i1 %tmp82, ptr %tmp4, ptr %tmp7 ; [#uses=1] br i1 %brmerge, label %bb111, label %bb103 bb103: ; preds = %bb80, %bb72 br label %bb111 bb111: ; preds = %bb103, %bb80, %bb72, %bb50, %bb40, %bb26 - %iftmp.0.0.in = phi float* [ %tmp10, %bb103 ], [ %result, %bb26 ], [ %result, %bb40 ], [ %result, %bb50 ], [ %tmp4.mux, %bb80 ], [ %tmp4.mux787, %bb72 ] ; [#uses=1] - %iftmp.0.0 = load float, float* %iftmp.0.0.in ; [#uses=1] + %iftmp.0.0.in = phi ptr [ %tmp10, %bb103 ], [ %result, %bb26 ], [ %result, %bb40 ], [ %result, %bb50 ], [ %tmp4.mux, %bb80 ], [ %tmp4.mux787, %bb72 ] ; [#uses=1] + %iftmp.0.0 = load float, ptr %iftmp.0.0.in ; [#uses=1] %tmp125 = fcmp ogt float %tmp8, %tmp11 ; [#uses=5] br i1 %tmp125, label %bb128, label %bb136 @@ -92,29 +92,29 @@ bb174: ; preds = %bb165, %bb155, %bb141 bb187: ; preds = %bb174 %tmp197483 = fcmp ogt float %tmp5, %tmp8 ; [#uses=2] %brmerge790 = or i1 %tmp197483, %tmp125 ; [#uses=1] - %tmp4.mux791 = select i1 %tmp197483, float* %tmp4, float* %tmp7 ; [#uses=1] + %tmp4.mux791 = select i1 %tmp197483, ptr %tmp4, ptr %tmp7 ; [#uses=1] br i1 %brmerge790, label %bb226, label %bb218 bb195: ; preds = %bb174 %tmp197 = fcmp ogt float %tmp5, %tmp11 ; [#uses=2] %brmerge788 = or i1 %tmp197, %tmp125 ; [#uses=1] - %tmp4.mux789 = select i1 %tmp197, float* %tmp4, float* %tmp7 ; [#uses=1] + %tmp4.mux789 = select i1 %tmp197, ptr %tmp4, ptr %tmp7 ; [#uses=1] br i1 %brmerge788, label %bb226, label %bb218 bb218: ; preds = %bb195, %bb187 br label %bb226 bb226: ; preds = %bb218, %bb195, %bb187, %bb165, %bb155, %bb141 - %iftmp.7.0.in = phi float* [ %tmp10, %bb218 ], [ %result, %bb141 ], [ %result, %bb155 ], [ %result, %bb165 ], [ %tmp4.mux789, %bb195 ], [ %tmp4.mux791, %bb187 ] ; [#uses=1] - %iftmp.7.0 = load float, float* %iftmp.7.0.in ; [#uses=1] - %tmp229 = getelementptr float, float* %result, i32 1 ; [#uses=7] - %tmp230 = load float, float* %tmp229, align 4 ; [#uses=6] - %tmp232 = getelementptr float, float* %result, i32 3 ; [#uses=5] - %tmp233 = load float, float* %tmp232, align 4 ; [#uses=10] - %tmp235 = getelementptr float, float* %result, i32 5 ; [#uses=5] - %tmp236 = load float, float* %tmp235, align 4 ; [#uses=8] - %tmp238 = getelementptr float, float* %result, i32 7 ; [#uses=3] - %tmp239 = load float, float* %tmp238, align 4 ; [#uses=8] + %iftmp.7.0.in = phi ptr [ %tmp10, %bb218 ], [ %result, %bb141 ], [ %result, %bb155 ], [ %result, %bb165 ], [ %tmp4.mux789, %bb195 ], [ %tmp4.mux791, %bb187 ] ; [#uses=1] + %iftmp.7.0 = load float, ptr %iftmp.7.0.in ; [#uses=1] + %tmp229 = getelementptr float, ptr %result, i32 1 ; [#uses=7] + %tmp230 = load float, ptr %tmp229, align 4 ; [#uses=6] + %tmp232 = getelementptr float, ptr %result, i32 3 ; [#uses=5] + %tmp233 = load float, ptr %tmp232, align 4 ; [#uses=10] + %tmp235 = getelementptr float, ptr %result, i32 5 ; [#uses=5] + %tmp236 = load float, ptr %tmp235, align 4 ; [#uses=8] + %tmp238 = getelementptr float, ptr %result, i32 7 ; [#uses=3] + %tmp239 = load float, ptr %tmp238, align 4 ; [#uses=8] %tmp240 = fcmp olt float %tmp236, %tmp239 ; [#uses=5] br i1 %tmp240, label %bb243, label %bb251 @@ -147,21 +147,21 @@ bb289: ; preds = %bb280, %bb270, %bb256 bb302: ; preds = %bb289 %tmp312491 = fcmp olt float %tmp233, %tmp236 ; [#uses=2] %brmerge793 = or i1 %tmp312491, %tmp240 ; [#uses=1] - %tmp232.mux794 = select i1 %tmp312491, float* %tmp232, float* %tmp235 ; [#uses=1] + %tmp232.mux794 = select i1 %tmp312491, ptr %tmp232, ptr %tmp235 ; [#uses=1] br i1 %brmerge793, label %bb341, label %bb333 bb310: ; preds = %bb289 %tmp312 = fcmp olt float %tmp233, %tmp239 ; [#uses=2] %brmerge792 = or i1 %tmp312, %tmp240 ; [#uses=1] - %tmp232.mux = select i1 %tmp312, float* %tmp232, float* %tmp235 ; [#uses=1] + %tmp232.mux = select i1 %tmp312, ptr %tmp232, ptr %tmp235 ; [#uses=1] br i1 %brmerge792, label %bb341, label %bb333 bb333: ; preds = %bb310, %bb302 br label %bb341 bb341: ; preds = %bb333, %bb310, %bb302, %bb280, %bb270, %bb256 - %iftmp.14.0.in = phi float* [ %tmp238, %bb333 ], [ %tmp229, %bb280 ], [ %tmp229, %bb270 ], [ %tmp229, %bb256 ], [ %tmp232.mux, %bb310 ], [ %tmp232.mux794, %bb302 ] ; [#uses=1] - %iftmp.14.0 = load float, float* %iftmp.14.0.in ; [#uses=1] + %iftmp.14.0.in = phi ptr [ %tmp238, %bb333 ], [ %tmp229, %bb280 ], [ %tmp229, %bb270 ], [ %tmp229, %bb256 ], [ %tmp232.mux, %bb310 ], [ %tmp232.mux794, %bb302 ] ; [#uses=1] + %iftmp.14.0 = load float, ptr %iftmp.14.0.in ; [#uses=1] %tmp355 = fcmp ogt float %tmp236, %tmp239 ; [#uses=5] br i1 %tmp355, label %bb358, label %bb366 @@ -194,27 +194,27 @@ bb404: ; preds = %bb395, %bb385, %bb371 bb417: ; preds = %bb404 %tmp427499 = fcmp ogt float %tmp233, %tmp236 ; [#uses=2] %brmerge797 = or i1 %tmp427499, %tmp355 ; [#uses=1] - %tmp232.mux798 = select i1 %tmp427499, float* %tmp232, float* %tmp235 ; [#uses=1] + %tmp232.mux798 = select i1 %tmp427499, ptr %tmp232, ptr %tmp235 ; [#uses=1] br i1 %brmerge797, label %bb456, label %bb448 bb425: ; preds = %bb404 %tmp427 = fcmp ogt float %tmp233, %tmp239 ; [#uses=2] %brmerge795 = or i1 %tmp427, %tmp355 ; [#uses=1] - %tmp232.mux796 = select i1 %tmp427, float* %tmp232, float* %tmp235 ; [#uses=1] + %tmp232.mux796 = select i1 %tmp427, ptr %tmp232, ptr %tmp235 ; [#uses=1] br i1 %brmerge795, label %bb456, label %bb448 bb448: ; preds = %bb425, %bb417 br label %bb456 bb456: ; preds = %bb448, %bb425, %bb417, %bb395, %bb385, %bb371 - %iftmp.21.0.in = phi float* [ %tmp238, %bb448 ], [ %tmp229, %bb395 ], [ %tmp229, %bb385 ], [ %tmp229, %bb371 ], [ %tmp232.mux796, %bb425 ], [ %tmp232.mux798, %bb417 ] ; [#uses=1] - %iftmp.21.0 = load float, float* %iftmp.21.0.in ; [#uses=1] + %iftmp.21.0.in = phi ptr [ %tmp238, %bb448 ], [ %tmp229, %bb395 ], [ %tmp229, %bb385 ], [ %tmp229, %bb371 ], [ %tmp232.mux796, %bb425 ], [ %tmp232.mux798, %bb417 ] ; [#uses=1] + %iftmp.21.0 = load float, ptr %iftmp.21.0.in ; [#uses=1] %tmp458459 = fpext float %iftmp.21.0 to double ; [#uses=1] %tmp460461 = fpext float %iftmp.7.0 to double ; [#uses=1] %tmp462463 = fpext float %iftmp.14.0 to double ; [#uses=1] %tmp464465 = fpext float %iftmp.0.0 to double ; [#uses=1] - %tmp467 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([48 x i8], [48 x i8]* @.str, i32 0, i32 0), double %tmp464465, double %tmp462463, double %tmp460461, double %tmp458459 ) nounwind ; [#uses=0] + %tmp467 = tail call i32 (ptr, ...) @printf( ptr @.str, double %tmp464465, double %tmp462463, double %tmp460461, double %tmp458459 ) nounwind ; [#uses=0] ret void } -declare i32 @printf(i8*, ...) nounwind +declare i32 @printf(ptr, ...) nounwind diff --git a/llvm/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll b/llvm/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll index b3f303f8fd857..268bfcc4a9ac4 100644 --- a/llvm/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll +++ b/llvm/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll @@ -4,13 +4,13 @@ ; allocated to the input/output register. target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" -@pixels = weak global i32 0 ; [#uses=2] +@pixels = weak global i32 0 ; [#uses=2] define void @test() nounwind { entry: - %tmp = load i32, i32* @pixels, align 4 ; [#uses=1] + %tmp = load i32, ptr @pixels, align 4 ; [#uses=1] %tmp1 = tail call i32 asm sideeffect "a: $0 $1", "=r,0,~{dirflag},~{fpsr},~{flags},~{ax}"( i32 %tmp ) nounwind ; [#uses=1] - store i32 %tmp1, i32* @pixels, align 4 + store i32 %tmp1, ptr @pixels, align 4 ret void } @@ -18,10 +18,10 @@ entry: ; CHECK-NOT: ax ; CHECK: {{$}} -define void @test2(i16* %block, i8* %pixels, i32 %line_size) nounwind { +define void @test2(ptr %block, ptr %pixels, i32 %line_size) nounwind { entry: - %tmp1 = getelementptr i16, i16* %block, i32 64 ; [#uses=1] - %tmp3 = tail call i8* asm sideeffect "b: $0 $1 $2", "=r,r,0,~{dirflag},~{fpsr},~{flags},~{ax}"( i16* %tmp1, i8* %pixels ) nounwind ; [#uses=0] + %tmp1 = getelementptr i16, ptr %block, i32 64 ; [#uses=1] + %tmp3 = tail call ptr asm sideeffect "b: $0 $1 $2", "=r,r,0,~{dirflag},~{fpsr},~{flags},~{ax}"( ptr %tmp1, ptr %pixels ) nounwind ; [#uses=0] ret void } diff --git a/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll b/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll index bac724d9edeaa..788d2da789bfe 100644 --- a/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll +++ b/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll @@ -3,7 +3,7 @@ ; PR2082 ; Local register allocator was refusing to use ESI, EDI, and EBP so it ran out of ; registers. -define void @transpose4x4(i8* %dst, i8* %src, i32 %dst_stride, i32 %src_stride) { +define void @transpose4x4(ptr %dst, ptr %src, i32 %dst_stride, i32 %src_stride) { ; CHECK-LABEL: transpose4x4: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: pushl %ebx @@ -47,50 +47,42 @@ define void @transpose4x4(i8* %dst, i8* %src, i32 %dst_stride, i32 %src_stride) ; CHECK-NEXT: .cfi_def_cfa_offset 4 ; CHECK-NEXT: retl entry: - %dst_addr = alloca i8* ; [#uses=5] - %src_addr = alloca i8* ; [#uses=5] - %dst_stride_addr = alloca i32 ; [#uses=4] - %src_stride_addr = alloca i32 ; [#uses=4] + %dst_addr = alloca ptr ; [#uses=5] + %src_addr = alloca ptr ; [#uses=5] + %dst_stride_addr = alloca i32 ; [#uses=4] + %src_stride_addr = alloca i32 ; [#uses=4] %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] - store i8* %dst, i8** %dst_addr - store i8* %src, i8** %src_addr - store i32 %dst_stride, i32* %dst_stride_addr - store i32 %src_stride, i32* %src_stride_addr - %tmp = load i8*, i8** %dst_addr, align 4 ; [#uses=1] - %tmp1 = getelementptr i8, i8* %tmp, i32 0 ; [#uses=1] - %tmp12 = bitcast i8* %tmp1 to i32* ; [#uses=1] - %tmp3 = load i8*, i8** %dst_addr, align 4 ; [#uses=1] - %tmp4 = load i32, i32* %dst_stride_addr, align 4 ; [#uses=1] - %tmp5 = getelementptr i8, i8* %tmp3, i32 %tmp4 ; [#uses=1] - %tmp56 = bitcast i8* %tmp5 to i32* ; [#uses=1] - %tmp7 = load i32, i32* %dst_stride_addr, align 4 ; [#uses=1] + store ptr %dst, ptr %dst_addr + store ptr %src, ptr %src_addr + store i32 %dst_stride, ptr %dst_stride_addr + store i32 %src_stride, ptr %src_stride_addr + %tmp = load ptr, ptr %dst_addr, align 4 ; [#uses=1] + %tmp1 = getelementptr i8, ptr %tmp, i32 0 ; [#uses=1] + %tmp3 = load ptr, ptr %dst_addr, align 4 ; [#uses=1] + %tmp4 = load i32, ptr %dst_stride_addr, align 4 ; [#uses=1] + %tmp5 = getelementptr i8, ptr %tmp3, i32 %tmp4 ; [#uses=1] + %tmp7 = load i32, ptr %dst_stride_addr, align 4 ; [#uses=1] %tmp8 = mul i32 %tmp7, 2 ; [#uses=1] - %tmp9 = load i8*, i8** %dst_addr, align 4 ; [#uses=1] - %tmp10 = getelementptr i8, i8* %tmp9, i32 %tmp8 ; [#uses=1] - %tmp1011 = bitcast i8* %tmp10 to i32* ; [#uses=1] - %tmp13 = load i32, i32* %dst_stride_addr, align 4 ; [#uses=1] + %tmp9 = load ptr, ptr %dst_addr, align 4 ; [#uses=1] + %tmp10 = getelementptr i8, ptr %tmp9, i32 %tmp8 ; [#uses=1] + %tmp13 = load i32, ptr %dst_stride_addr, align 4 ; [#uses=1] %tmp14 = mul i32 %tmp13, 3 ; [#uses=1] - %tmp15 = load i8*, i8** %dst_addr, align 4 ; [#uses=1] - %tmp16 = getelementptr i8, i8* %tmp15, i32 %tmp14 ; [#uses=1] - %tmp1617 = bitcast i8* %tmp16 to i32* ; [#uses=1] - %tmp18 = load i8*, i8** %src_addr, align 4 ; [#uses=1] - %tmp19 = getelementptr i8, i8* %tmp18, i32 0 ; [#uses=1] - %tmp1920 = bitcast i8* %tmp19 to i32* ; [#uses=1] - %tmp21 = load i8*, i8** %src_addr, align 4 ; [#uses=1] - %tmp22 = load i32, i32* %src_stride_addr, align 4 ; [#uses=1] - %tmp23 = getelementptr i8, i8* %tmp21, i32 %tmp22 ; [#uses=1] - %tmp2324 = bitcast i8* %tmp23 to i32* ; [#uses=1] - %tmp25 = load i32, i32* %src_stride_addr, align 4 ; [#uses=1] + %tmp15 = load ptr, ptr %dst_addr, align 4 ; [#uses=1] + %tmp16 = getelementptr i8, ptr %tmp15, i32 %tmp14 ; [#uses=1] + %tmp18 = load ptr, ptr %src_addr, align 4 ; [#uses=1] + %tmp19 = getelementptr i8, ptr %tmp18, i32 0 ; [#uses=1] + %tmp21 = load ptr, ptr %src_addr, align 4 ; [#uses=1] + %tmp22 = load i32, ptr %src_stride_addr, align 4 ; [#uses=1] + %tmp23 = getelementptr i8, ptr %tmp21, i32 %tmp22 ; [#uses=1] + %tmp25 = load i32, ptr %src_stride_addr, align 4 ; [#uses=1] %tmp26 = mul i32 %tmp25, 2 ; [#uses=1] - %tmp27 = load i8*, i8** %src_addr, align 4 ; [#uses=1] - %tmp28 = getelementptr i8, i8* %tmp27, i32 %tmp26 ; [#uses=1] - %tmp2829 = bitcast i8* %tmp28 to i32* ; [#uses=1] - %tmp30 = load i32, i32* %src_stride_addr, align 4 ; [#uses=1] + %tmp27 = load ptr, ptr %src_addr, align 4 ; [#uses=1] + %tmp28 = getelementptr i8, ptr %tmp27, i32 %tmp26 ; [#uses=1] + %tmp30 = load i32, ptr %src_stride_addr, align 4 ; [#uses=1] %tmp31 = mul i32 %tmp30, 3 ; [#uses=1] - %tmp32 = load i8*, i8** %src_addr, align 4 ; [#uses=1] - %tmp33 = getelementptr i8, i8* %tmp32, i32 %tmp31 ; [#uses=1] - %tmp3334 = bitcast i8* %tmp33 to i32* ; [#uses=1] - call void asm sideeffect "movd $4, %mm0 \0A\09movd $5, %mm1 \0A\09movd $6, %mm2 \0A\09movd $7, %mm3 \0A\09punpcklbw %mm1, %mm0 \0A\09punpcklbw %mm3, %mm2 \0A\09movq %mm0, %mm1 \0A\09punpcklwd %mm2, %mm0 \0A\09punpckhwd %mm2, %mm1 \0A\09movd %mm0, $0 \0A\09punpckhdq %mm0, %mm0 \0A\09movd %mm0, $1 \0A\09movd %mm1, $2 \0A\09punpckhdq %mm1, %mm1 \0A\09movd %mm1, $3 \0A\09", "=*m,=*m,=*m,=*m,*m,*m,*m,*m,~{dirflag},~{fpsr},~{flags}"( i32* elementtype( i32) %tmp12, i32* elementtype(i32) %tmp56, i32* elementtype(i32) %tmp1011, i32* elementtype(i32) %tmp1617, i32* elementtype(i32) %tmp1920, i32* elementtype(i32) %tmp2324, i32* elementtype(i32) %tmp2829, i32* elementtype(i32) %tmp3334 ) nounwind + %tmp32 = load ptr, ptr %src_addr, align 4 ; [#uses=1] + %tmp33 = getelementptr i8, ptr %tmp32, i32 %tmp31 ; [#uses=1] + call void asm sideeffect "movd $4, %mm0 \0A\09movd $5, %mm1 \0A\09movd $6, %mm2 \0A\09movd $7, %mm3 \0A\09punpcklbw %mm1, %mm0 \0A\09punpcklbw %mm3, %mm2 \0A\09movq %mm0, %mm1 \0A\09punpcklwd %mm2, %mm0 \0A\09punpckhwd %mm2, %mm1 \0A\09movd %mm0, $0 \0A\09punpckhdq %mm0, %mm0 \0A\09movd %mm0, $1 \0A\09movd %mm1, $2 \0A\09punpckhdq %mm1, %mm1 \0A\09movd %mm1, $3 \0A\09", "=*m,=*m,=*m,=*m,*m,*m,*m,*m,~{dirflag},~{fpsr},~{flags}"( ptr elementtype( i32) %tmp1, ptr elementtype(i32) %tmp5, ptr elementtype(i32) %tmp10, ptr elementtype(i32) %tmp16, ptr elementtype(i32) %tmp19, ptr elementtype(i32) %tmp23, ptr elementtype(i32) %tmp28, ptr elementtype(i32) %tmp33 ) nounwind br label %return return: ; preds = %entry diff --git a/llvm/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll b/llvm/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll index 822b79d97efe2..b28de3f523d11 100644 --- a/llvm/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll +++ b/llvm/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll @@ -1,11 +1,11 @@ ; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mattr=+sse2 ; PR2076 -define void @h264_h_loop_filter_luma_mmx2(i8* %pix, i32 %stride, i32 %alpha, i32 %beta, i8* %tc0) nounwind { +define void @h264_h_loop_filter_luma_mmx2(ptr %pix, i32 %stride, i32 %alpha, i32 %beta, ptr %tc0) nounwind { entry: - %tmp164 = getelementptr [16 x i32], [16 x i32]* null, i32 0, i32 11 ; [#uses=1] - %tmp169 = getelementptr [16 x i32], [16 x i32]* null, i32 0, i32 13 ; [#uses=1] - %tmp174 = getelementptr [16 x i32], [16 x i32]* null, i32 0, i32 15 ; [#uses=1] + %tmp164 = getelementptr [16 x i32], ptr null, i32 0, i32 11 ; [#uses=1] + %tmp169 = getelementptr [16 x i32], ptr null, i32 0, i32 13 ; [#uses=1] + %tmp174 = getelementptr [16 x i32], ptr null, i32 0, i32 15 ; [#uses=1] %tmp154.sum317 = add i32 0, %stride ; [#uses=1] %tmp154.sum315 = mul i32 %stride, 6 ; [#uses=1] %tmp154.sum = mul i32 %stride, 7 ; [#uses=1] @@ -14,18 +14,14 @@ entry: bb32: ; preds = %entry %pix_addr.0327.sum340 = add i32 %pix_addr.0327.rec, 0 ; [#uses=1] - %tmp154 = getelementptr i8, i8* %pix, i32 %pix_addr.0327.sum340 ; [#uses=1] - %tmp177178 = bitcast i8* %tmp154 to i32* ; [#uses=1] + %tmp154 = getelementptr i8, ptr %pix, i32 %pix_addr.0327.sum340 ; [#uses=1] %pix_addr.0327.sum339 = add i32 %pix_addr.0327.rec, %tmp154.sum317 ; [#uses=1] - %tmp181 = getelementptr i8, i8* %pix, i32 %pix_addr.0327.sum339 ; [#uses=1] - %tmp181182 = bitcast i8* %tmp181 to i32* ; [#uses=1] + %tmp181 = getelementptr i8, ptr %pix, i32 %pix_addr.0327.sum339 ; [#uses=1] %pix_addr.0327.sum338 = add i32 %pix_addr.0327.rec, %tmp154.sum315 ; [#uses=1] - %tmp186 = getelementptr i8, i8* %pix, i32 %pix_addr.0327.sum338 ; [#uses=1] - %tmp186187 = bitcast i8* %tmp186 to i32* ; [#uses=1] + %tmp186 = getelementptr i8, ptr %pix, i32 %pix_addr.0327.sum338 ; [#uses=1] %pix_addr.0327.sum337 = add i32 %pix_addr.0327.rec, %tmp154.sum ; [#uses=1] - %tmp191 = getelementptr i8, i8* %pix, i32 %pix_addr.0327.sum337 ; [#uses=1] - %tmp191192 = bitcast i8* %tmp191 to i32* ; [#uses=1] - call void asm sideeffect "movd $4, %mm0 \0A\09movd $5, %mm1 \0A\09movd $6, %mm2 \0A\09movd $7, %mm3 \0A\09punpcklbw %mm1, %mm0 \0A\09punpcklbw %mm3, %mm2 \0A\09movq %mm0, %mm1 \0A\09punpcklwd %mm2, %mm0 \0A\09punpckhwd %mm2, %mm1 \0A\09movd %mm0, $0 \0A\09punpckhdq %mm0, %mm0 \0A\09movd %mm0, $1 \0A\09movd %mm1, $2 \0A\09punpckhdq %mm1, %mm1 \0A\09movd %mm1, $3 \0A\09", "=*m,=*m,=*m,=*m,*m,*m,*m,*m,~{dirflag},~{fpsr},~{flags}"( i32* elementtype( i32) null, i32* elementtype(i32) %tmp164, i32* elementtype(i32) %tmp169, i32* elementtype(i32) %tmp174, i32* elementtype(i32) %tmp177178, i32* elementtype(i32) %tmp181182, i32* elementtype(i32) %tmp186187, i32* elementtype(i32) %tmp191192 ) nounwind + %tmp191 = getelementptr i8, ptr %pix, i32 %pix_addr.0327.sum337 ; [#uses=1] + call void asm sideeffect "movd $4, %mm0 \0A\09movd $5, %mm1 \0A\09movd $6, %mm2 \0A\09movd $7, %mm3 \0A\09punpcklbw %mm1, %mm0 \0A\09punpcklbw %mm3, %mm2 \0A\09movq %mm0, %mm1 \0A\09punpcklwd %mm2, %mm0 \0A\09punpckhwd %mm2, %mm1 \0A\09movd %mm0, $0 \0A\09punpckhdq %mm0, %mm0 \0A\09movd %mm0, $1 \0A\09movd %mm1, $2 \0A\09punpckhdq %mm1, %mm1 \0A\09movd %mm1, $3 \0A\09", "=*m,=*m,=*m,=*m,*m,*m,*m,*m,~{dirflag},~{fpsr},~{flags}"( ptr elementtype( i32) null, ptr elementtype(i32) %tmp164, ptr elementtype(i32) %tmp169, ptr elementtype(i32) %tmp174, ptr elementtype(i32) %tmp154, ptr elementtype(i32) %tmp181, ptr elementtype(i32) %tmp186, ptr elementtype(i32) %tmp191 ) nounwind unreachable bb292: ; preds = %entry diff --git a/llvm/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll index 7614b40cf9a40..6d187b1aaaed6 100644 --- a/llvm/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll @@ -4,25 +4,24 @@ %struct.YY = type { i64 } %struct.ZZ = type opaque -define signext i8 @f(%struct.XX*** %fontMap, %struct.XX* %uen) { +define signext i8 @f(ptr %fontMap, ptr %uen) { entry: %tmp45 = add i16 0, 1 ; [#uses=2] br i1 false, label %bb124, label %bb53 bb53: ; preds = %entry - %tmp55 = call %struct.YY** @AA( i64 1, %struct.XX* %uen ) ; <%struct.YY**> [#uses=3] - %tmp2728128 = load %struct.XX*, %struct.XX** null ; <%struct.XX*> [#uses=1] - %tmp61 = load %struct.YY*, %struct.YY** %tmp55, align 8 ; <%struct.YY*> [#uses=1] - %tmp62 = getelementptr %struct.YY, %struct.YY* %tmp61, i32 0, i32 0 ; [#uses=1] - %tmp63 = load i64, i64* %tmp62, align 8 ; [#uses=1] + %tmp55 = call ptr @AA( i64 1, ptr %uen ) ; [#uses=3] + %tmp2728128 = load ptr, ptr null ; [#uses=1] + %tmp61 = load ptr, ptr %tmp55, align 8 ; [#uses=1] + %tmp62 = getelementptr %struct.YY, ptr %tmp61, i32 0, i32 0 ; [#uses=1] + %tmp63 = load i64, ptr %tmp62, align 8 ; [#uses=1] %tmp6566 = zext i16 %tmp45 to i64 ; [#uses=1] %tmp67 = shl i64 %tmp6566, 1 ; [#uses=1] - call void @BB( %struct.YY** %tmp55, i64 %tmp67, i8 signext 0, %struct.XX* %uen ) + call void @BB( ptr %tmp55, i64 %tmp67, i8 signext 0, ptr %uen ) %tmp121131 = icmp eq i16 %tmp45, 1 ; [#uses=1] br i1 %tmp121131, label %bb124, label %bb70.preheader bb70.preheader: ; preds = %bb53 - %tmp72 = bitcast %struct.XX* %tmp2728128 to %struct.ZZ*** ; <%struct.ZZ***> [#uses=1] br label %bb70 bb70: ; preds = %bb119, %bb70.preheader @@ -30,14 +29,14 @@ bb70: ; preds = %bb119, %bb70.preheader %tmp.135 = trunc i64 %tmp63 to i32 ; [#uses=1] %tmp136 = shl i32 %indvar133, 1 ; [#uses=1] %DD = add i32 %tmp136, %tmp.135 ; [#uses=1] - %tmp73 = load %struct.ZZ**, %struct.ZZ*** %tmp72, align 8 ; <%struct.ZZ**> [#uses=0] + %tmp73 = load ptr, ptr %tmp2728128, align 8 ; [#uses=0] br i1 false, label %bb119, label %bb77 bb77: ; preds = %bb70 %tmp8384 = trunc i32 %DD to i16 ; [#uses=1] %tmp85 = sub i16 0, %tmp8384 ; [#uses=1] - store i16 %tmp85, i16* null, align 8 - call void @CC( %struct.YY** %tmp55, i64 0, i64 2, i8* null, %struct.XX* %uen ) + store i16 %tmp85, ptr null, align 8 + call void @CC( ptr %tmp55, i64 0, i64 2, ptr null, ptr %uen ) ret i8 0 bb119: ; preds = %bb70 @@ -48,8 +47,8 @@ bb124: ; preds = %bb53, %entry ret i8 undef } -declare %struct.YY** @AA(i64, %struct.XX*) +declare ptr @AA(i64, ptr) -declare void @BB(%struct.YY**, i64, i8 signext , %struct.XX*) +declare void @BB(ptr, i64, i8 signext , ptr) -declare void @CC(%struct.YY**, i64, i64, i8*, %struct.XX*) +declare void @CC(ptr, i64, i64, ptr, ptr) diff --git a/llvm/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll b/llvm/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll index 2589dbcbbf500..767f9dbbb2ae7 100644 --- a/llvm/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll +++ b/llvm/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll @@ -3,7 +3,7 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i386-pc-linux-gnu" -define void @dct_unquantize_h263_intra_mmx(i16* %block, i32 %n, i32 %qscale) nounwind { +define void @dct_unquantize_h263_intra_mmx(ptr %block, i32 %n, i32 %qscale) nounwind { entry: %tmp1 = shl i32 %qscale, 1 ; [#uses=1] br i1 false, label %bb46, label %bb59 @@ -12,6 +12,6 @@ bb46: ; preds = %entry ret void bb59: ; preds = %entry - tail call void asm sideeffect "movd $1, %mm6 \0A\09packssdw %mm6, %mm6 \0A\09packssdw %mm6, %mm6 \0A\09movd $2, %mm5 \0A\09pxor %mm7, %mm7 \0A\09packssdw %mm5, %mm5 \0A\09packssdw %mm5, %mm5 \0A\09psubw %mm5, %mm7 \0A\09pxor %mm4, %mm4 \0A\09.align 1<<4\0A\091: \0A\09movq ($0, $3), %mm0 \0A\09movq 8($0, $3), %mm1 \0A\09pmullw %mm6, %mm0 \0A\09pmullw %mm6, %mm1 \0A\09movq ($0, $3), %mm2 \0A\09movq 8($0, $3), %mm3 \0A\09pcmpgtw %mm4, %mm2 \0A\09pcmpgtw %mm4, %mm3 \0A\09pxor %mm2, %mm0 \0A\09pxor %mm3, %mm1 \0A\09paddw %mm7, %mm0 \0A\09paddw %mm7, %mm1 \0A\09pxor %mm0, %mm2 \0A\09pxor %mm1, %mm3 \0A\09pcmpeqw %mm7, %mm0 \0A\09pcmpeqw %mm7, %mm1 \0A\09pandn %mm2, %mm0 \0A\09pandn %mm3, %mm1 \0A\09movq %mm0, ($0, $3) \0A\09movq %mm1, 8($0, $3) \0A\09add $$16, $3 \0A\09jng 1b \0A\09", "r,imr,imr,r,~{dirflag},~{fpsr},~{flags},~{memory}"( i16* null, i32 %tmp1, i32 0, i32 0 ) nounwind + tail call void asm sideeffect "movd $1, %mm6 \0A\09packssdw %mm6, %mm6 \0A\09packssdw %mm6, %mm6 \0A\09movd $2, %mm5 \0A\09pxor %mm7, %mm7 \0A\09packssdw %mm5, %mm5 \0A\09packssdw %mm5, %mm5 \0A\09psubw %mm5, %mm7 \0A\09pxor %mm4, %mm4 \0A\09.align 1<<4\0A\091: \0A\09movq ($0, $3), %mm0 \0A\09movq 8($0, $3), %mm1 \0A\09pmullw %mm6, %mm0 \0A\09pmullw %mm6, %mm1 \0A\09movq ($0, $3), %mm2 \0A\09movq 8($0, $3), %mm3 \0A\09pcmpgtw %mm4, %mm2 \0A\09pcmpgtw %mm4, %mm3 \0A\09pxor %mm2, %mm0 \0A\09pxor %mm3, %mm1 \0A\09paddw %mm7, %mm0 \0A\09paddw %mm7, %mm1 \0A\09pxor %mm0, %mm2 \0A\09pxor %mm1, %mm3 \0A\09pcmpeqw %mm7, %mm0 \0A\09pcmpeqw %mm7, %mm1 \0A\09pandn %mm2, %mm0 \0A\09pandn %mm3, %mm1 \0A\09movq %mm0, ($0, $3) \0A\09movq %mm1, 8($0, $3) \0A\09add $$16, $3 \0A\09jng 1b \0A\09", "r,imr,imr,r,~{dirflag},~{fpsr},~{flags},~{memory}"( ptr null, i32 %tmp1, i32 0, i32 0 ) nounwind ret void } diff --git a/llvm/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll b/llvm/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll index de13ebf8b6663..914f19e5f365a 100644 --- a/llvm/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll +++ b/llvm/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll @@ -4,18 +4,17 @@ %struct.Lattice = type { %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, i32, i32, i32 } %struct.Position = type { double, double, double } -define fastcc %struct.CompAtom* @_ZNK7Lattice6createEP8CompAtomii(%struct.Lattice* %this, %struct.CompAtom* %d, i32 %n, i32 %i) { +define fastcc ptr @_ZNK7Lattice6createEP8CompAtomii(ptr %this, ptr %d, i32 %n, i32 %i) { entry: - %tmp18 = tail call i8* @_Znam( i32 0 ) ; [#uses=1] - %tmp1819 = bitcast i8* %tmp18 to %struct.CompAtom* ; <%struct.CompAtom*> [#uses=4] + %tmp18 = tail call ptr @_Znam( i32 0 ) ; [#uses=1] %tmp3286 = icmp eq i32 %n, 0 ; [#uses=1] br i1 %tmp3286, label %bb35, label %bb24 bb24: ; preds = %bb24, %entry %tmp9.0.reg2mem.0.rec = phi i32 [ %indvar.next, %bb24 ], [ 0, %entry ] ; [#uses=3] - %tmp3.i.i = getelementptr %struct.CompAtom, %struct.CompAtom* %tmp1819, i32 %tmp9.0.reg2mem.0.rec, i32 0, i32 1 ; [#uses=0] - %tmp5.i.i = getelementptr %struct.CompAtom, %struct.CompAtom* %tmp1819, i32 %tmp9.0.reg2mem.0.rec, i32 0, i32 2 ; [#uses=1] - store double -9.999900e+04, double* %tmp5.i.i, align 4 + %tmp3.i.i = getelementptr %struct.CompAtom, ptr %tmp18, i32 %tmp9.0.reg2mem.0.rec, i32 0, i32 1 ; [#uses=0] + %tmp5.i.i = getelementptr %struct.CompAtom, ptr %tmp18, i32 %tmp9.0.reg2mem.0.rec, i32 0, i32 2 ; [#uses=1] + store double -9.999900e+04, ptr %tmp5.i.i, align 4 %indvar.next = add i32 %tmp9.0.reg2mem.0.rec, 1 ; [#uses=2] %exitcond = icmp eq i32 %indvar.next, %n ; [#uses=1] br i1 %exitcond, label %bb35, label %bb24 @@ -33,8 +32,8 @@ bb35: ; preds = %bb24, %entry %tmp55 = srem i32 %i, 3 ; [#uses=1] %tmp56 = add i32 %tmp55, -1 ; [#uses=1] %tmp5657 = sitofp i32 %tmp56 to double ; [#uses=1] - %tmp15.i49 = getelementptr %struct.Lattice, %struct.Lattice* %this, i32 0, i32 0, i32 0 ; [#uses=1] - %tmp16.i50 = load double, double* %tmp15.i49, align 4 ; [#uses=1] + %tmp15.i49 = getelementptr %struct.Lattice, ptr %this, i32 0, i32 0, i32 0 ; [#uses=1] + %tmp16.i50 = load double, ptr %tmp15.i49, align 4 ; [#uses=1] %tmp17.i = fmul double %tmp5657, %tmp16.i50 ; [#uses=1] %tmp20.i39 = fadd double %tmp17.i, %tmp17.i63 ; [#uses=1] %tmp20.i23 = fadd double %tmp20.i39, %tmp17.i76 ; [#uses=1] @@ -45,22 +44,22 @@ bb58.preheader: ; preds = %bb35 br label %bb58 bb58: ; preds = %bb58, %bb58.preheader - %tmp20.i7 = getelementptr %struct.CompAtom, %struct.CompAtom* %d, i32 0, i32 2 ; [#uses=2] - %tmp25.i = getelementptr %struct.CompAtom, %struct.CompAtom* %tmp1819, i32 0, i32 2 ; [#uses=2] - %tmp74.i = load i32, i32* %tmp20.i7, align 1 ; [#uses=1] + %tmp20.i7 = getelementptr %struct.CompAtom, ptr %d, i32 0, i32 2 ; [#uses=2] + %tmp25.i = getelementptr %struct.CompAtom, ptr %tmp18, i32 0, i32 2 ; [#uses=2] + %tmp74.i = load i32, ptr %tmp20.i7, align 1 ; [#uses=1] %tmp82.i = and i32 %tmp74.i, 134217728 ; [#uses=1] %tmp85.i = or i32 0, %tmp82.i ; [#uses=1] - store i32 %tmp85.i, i32* %tmp25.i, align 1 - %tmp88.i = load i32, i32* %tmp20.i7, align 1 ; [#uses=1] + store i32 %tmp85.i, ptr %tmp25.i, align 1 + %tmp88.i = load i32, ptr %tmp20.i7, align 1 ; [#uses=1] %tmp95.i = and i32 %tmp88.i, -268435456 ; [#uses=1] %tmp97.i = or i32 0, %tmp95.i ; [#uses=1] - store i32 %tmp97.i, i32* %tmp25.i, align 1 + store i32 %tmp97.i, ptr %tmp25.i, align 1 %tmp6.i = fadd double 0.000000e+00, %tmp20.i23 ; [#uses=0] %exitcond96 = icmp eq i32 0, %smax ; [#uses=1] br i1 %exitcond96, label %bb81, label %bb58 bb81: ; preds = %bb58, %bb35 - ret %struct.CompAtom* %tmp1819 + ret ptr %tmp18 } -declare i8* @_Znam(i32) +declare ptr @_Znam(i32) diff --git a/llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll b/llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll index 0c25cb77c3cdb..a7257daa4bea4 100644 --- a/llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll +++ b/llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll @@ -4,16 +4,16 @@ %struct.CONSTRAINT = type { i32, i32, i32, i32 } %struct.FIRST_UNION = type { %struct.anon } %struct.FOURTH_UNION = type { %struct.CONSTRAINT } - %struct.LIST = type { %struct.rec*, %struct.rec* } + %struct.LIST = type { ptr, ptr } %struct.SECOND_UNION = type { { i16, i8, i8 } } %struct.THIRD_UNION = type { { [2 x i32], [2 x i32] } } %struct.anon = type { i8, i8, i32 } - %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, { %struct.rec* }, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 } + %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, ptr, { ptr }, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32 } %struct.rec = type { %struct.head_type } - %struct.symbol_type = type <{ [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i16, i16, i8, i8, i8, i8 }> + %struct.symbol_type = type <{ [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i16, i16, i8, i8, i8, i8 }> %struct.word_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, [4 x i8] } -define void @InsertSym_bb1163(%struct.rec** %s) { +define void @InsertSym_bb1163(ptr %s) { ; CHECK-LABEL: InsertSym_bb1163: ; CHECK: # %bb.0: # %newFuncRoot ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax @@ -29,77 +29,65 @@ newFuncRoot: bb1233.exitStub: ; preds = %bb1163 ret void bb1163: ; preds = %newFuncRoot - %tmp1164 = load %struct.rec*, %struct.rec** %s, align 4 ; <%struct.rec*> [#uses=1] - %tmp1165 = getelementptr %struct.rec, %struct.rec* %tmp1164, i32 0, i32 0 ; <%struct.head_type*> [#uses=1] - %tmp11651166 = bitcast %struct.head_type* %tmp1165 to %struct.symbol_type* ; <%struct.symbol_type*> [#uses=1] - %tmp1167 = getelementptr %struct.symbol_type, %struct.symbol_type* %tmp11651166, i32 0, i32 3 ; <%struct.rec**> [#uses=1] - %tmp1168 = load %struct.rec*, %struct.rec** %tmp1167, align 1 ; <%struct.rec*> [#uses=2] - %tmp1169 = load %struct.rec*, %struct.rec** %s, align 4 ; <%struct.rec*> [#uses=1] - %tmp1170 = getelementptr %struct.rec, %struct.rec* %tmp1169, i32 0, i32 0 ; <%struct.head_type*> [#uses=1] - %tmp11701171 = bitcast %struct.head_type* %tmp1170 to %struct.symbol_type* ; <%struct.symbol_type*> [#uses=1] - %tmp1172 = getelementptr %struct.symbol_type, %struct.symbol_type* %tmp11701171, i32 0, i32 3 ; <%struct.rec**> [#uses=1] - %tmp1173 = load %struct.rec*, %struct.rec** %tmp1172, align 1 ; <%struct.rec*> [#uses=2] - %tmp1174 = getelementptr %struct.rec, %struct.rec* %tmp1173, i32 0, i32 0 ; <%struct.head_type*> [#uses=1] - %tmp11741175 = bitcast %struct.head_type* %tmp1174 to %struct.word_type* ; <%struct.word_type*> [#uses=1] - %tmp1176 = getelementptr %struct.word_type, %struct.word_type* %tmp11741175, i32 0, i32 2 ; <%struct.SECOND_UNION*> [#uses=1] - %tmp1177 = getelementptr %struct.SECOND_UNION, %struct.SECOND_UNION* %tmp1176, i32 0, i32 0 ; <{ i16, i8, i8 }*> [#uses=1] - %tmp11771178 = bitcast { i16, i8, i8 }* %tmp1177 to <{ i8, i8, i8, i8 }>* ; <<{ i8, i8, i8, i8 }>*> [#uses=1] - %tmp1179 = getelementptr <{ i8, i8, i8, i8 }>, <{ i8, i8, i8, i8 }>* %tmp11771178, i32 0, i32 2 ; [#uses=2] + %tmp1164 = load ptr, ptr %s, align 4 ; [#uses=1] + %tmp1165 = getelementptr %struct.rec, ptr %tmp1164, i32 0, i32 0 ; [#uses=1] + %tmp1167 = getelementptr %struct.symbol_type, ptr %tmp1165, i32 0, i32 3 ; [#uses=1] + %tmp1168 = load ptr, ptr %tmp1167, align 1 ; [#uses=2] + %tmp1169 = load ptr, ptr %s, align 4 ; [#uses=1] + %tmp1170 = getelementptr %struct.rec, ptr %tmp1169, i32 0, i32 0 ; [#uses=1] + %tmp1172 = getelementptr %struct.symbol_type, ptr %tmp1170, i32 0, i32 3 ; [#uses=1] + %tmp1173 = load ptr, ptr %tmp1172, align 1 ; [#uses=2] + %tmp1174 = getelementptr %struct.rec, ptr %tmp1173, i32 0, i32 0 ; [#uses=1] + %tmp1176 = getelementptr %struct.word_type, ptr %tmp1174, i32 0, i32 2 ; [#uses=1] + %tmp1177 = getelementptr %struct.SECOND_UNION, ptr %tmp1176, i32 0, i32 0 ; [#uses=1] + %tmp1179 = getelementptr <{ i8, i8, i8, i8 }>, ptr %tmp1177, i32 0, i32 2 ; [#uses=2] %mask1180 = and i8 1, 1 ; [#uses=2] - %tmp1181 = load i8, i8* %tmp1179, align 1 ; [#uses=1] + %tmp1181 = load i8, ptr %tmp1179, align 1 ; [#uses=1] %tmp1182 = shl i8 %mask1180, 7 ; [#uses=1] %tmp1183 = and i8 %tmp1181, 127 ; [#uses=1] %tmp1184 = or i8 %tmp1183, %tmp1182 ; [#uses=1] - store i8 %tmp1184, i8* %tmp1179, align 1 + store i8 %tmp1184, ptr %tmp1179, align 1 %mask1185 = and i8 %mask1180, 1 ; [#uses=0] - %tmp1186 = getelementptr %struct.rec, %struct.rec* %tmp1173, i32 0, i32 0 ; <%struct.head_type*> [#uses=1] - %tmp11861187 = bitcast %struct.head_type* %tmp1186 to %struct.word_type* ; <%struct.word_type*> [#uses=1] - %tmp1188 = getelementptr %struct.word_type, %struct.word_type* %tmp11861187, i32 0, i32 2 ; <%struct.SECOND_UNION*> [#uses=1] - %tmp1189 = getelementptr %struct.SECOND_UNION, %struct.SECOND_UNION* %tmp1188, i32 0, i32 0 ; <{ i16, i8, i8 }*> [#uses=1] - %tmp11891190 = bitcast { i16, i8, i8 }* %tmp1189 to <{ i8, i8, i8, i8 }>* ; <<{ i8, i8, i8, i8 }>*> [#uses=1] - %tmp1191 = getelementptr <{ i8, i8, i8, i8 }>, <{ i8, i8, i8, i8 }>* %tmp11891190, i32 0, i32 2 ; [#uses=1] - %tmp1192 = load i8, i8* %tmp1191, align 1 ; [#uses=1] + %tmp1186 = getelementptr %struct.rec, ptr %tmp1173, i32 0, i32 0 ; [#uses=1] + %tmp1188 = getelementptr %struct.word_type, ptr %tmp1186, i32 0, i32 2 ; [#uses=1] + %tmp1189 = getelementptr %struct.SECOND_UNION, ptr %tmp1188, i32 0, i32 0 ; [#uses=1] + %tmp1191 = getelementptr <{ i8, i8, i8, i8 }>, ptr %tmp1189, i32 0, i32 2 ; [#uses=1] + %tmp1192 = load i8, ptr %tmp1191, align 1 ; [#uses=1] %tmp1193 = lshr i8 %tmp1192, 7 ; [#uses=1] %mask1194 = and i8 %tmp1193, 1 ; [#uses=2] %mask1195 = and i8 %mask1194, 1 ; [#uses=0] - %tmp1196 = getelementptr %struct.rec, %struct.rec* %tmp1168, i32 0, i32 0 ; <%struct.head_type*> [#uses=1] - %tmp11961197 = bitcast %struct.head_type* %tmp1196 to %struct.word_type* ; <%struct.word_type*> [#uses=1] - %tmp1198 = getelementptr %struct.word_type, %struct.word_type* %tmp11961197, i32 0, i32 2 ; <%struct.SECOND_UNION*> [#uses=1] - %tmp1199 = getelementptr %struct.SECOND_UNION, %struct.SECOND_UNION* %tmp1198, i32 0, i32 0 ; <{ i16, i8, i8 }*> [#uses=1] - %tmp11991200 = bitcast { i16, i8, i8 }* %tmp1199 to <{ i8, i8, i8, i8 }>* ; <<{ i8, i8, i8, i8 }>*> [#uses=1] - %tmp1201 = getelementptr <{ i8, i8, i8, i8 }>, <{ i8, i8, i8, i8 }>* %tmp11991200, i32 0, i32 1 ; [#uses=2] + %tmp1196 = getelementptr %struct.rec, ptr %tmp1168, i32 0, i32 0 ; [#uses=1] + %tmp1198 = getelementptr %struct.word_type, ptr %tmp1196, i32 0, i32 2 ; [#uses=1] + %tmp1199 = getelementptr %struct.SECOND_UNION, ptr %tmp1198, i32 0, i32 0 ; [#uses=1] + %tmp1201 = getelementptr <{ i8, i8, i8, i8 }>, ptr %tmp1199, i32 0, i32 1 ; [#uses=2] %mask1202 = and i8 %mask1194, 1 ; [#uses=2] - %tmp1203 = load i8, i8* %tmp1201, align 1 ; [#uses=1] + %tmp1203 = load i8, ptr %tmp1201, align 1 ; [#uses=1] %tmp1204 = shl i8 %mask1202, 1 ; [#uses=1] %tmp1205 = and i8 %tmp1204, 2 ; [#uses=1] %tmp1206 = and i8 %tmp1203, -3 ; [#uses=1] %tmp1207 = or i8 %tmp1206, %tmp1205 ; [#uses=1] - store i8 %tmp1207, i8* %tmp1201, align 1 + store i8 %tmp1207, ptr %tmp1201, align 1 %mask1208 = and i8 %mask1202, 1 ; [#uses=0] - %tmp1209 = getelementptr %struct.rec, %struct.rec* %tmp1168, i32 0, i32 0 ; <%struct.head_type*> [#uses=1] - %tmp12091210 = bitcast %struct.head_type* %tmp1209 to %struct.word_type* ; <%struct.word_type*> [#uses=1] - %tmp1211 = getelementptr %struct.word_type, %struct.word_type* %tmp12091210, i32 0, i32 2 ; <%struct.SECOND_UNION*> [#uses=1] - %tmp1212 = getelementptr %struct.SECOND_UNION, %struct.SECOND_UNION* %tmp1211, i32 0, i32 0 ; <{ i16, i8, i8 }*> [#uses=1] - %tmp12121213 = bitcast { i16, i8, i8 }* %tmp1212 to <{ i8, i8, i8, i8 }>* ; <<{ i8, i8, i8, i8 }>*> [#uses=1] - %tmp1214 = getelementptr <{ i8, i8, i8, i8 }>, <{ i8, i8, i8, i8 }>* %tmp12121213, i32 0, i32 1 ; [#uses=1] - %tmp1215 = load i8, i8* %tmp1214, align 1 ; [#uses=1] + %tmp1209 = getelementptr %struct.rec, ptr %tmp1168, i32 0, i32 0 ; [#uses=1] + %tmp1211 = getelementptr %struct.word_type, ptr %tmp1209, i32 0, i32 2 ; [#uses=1] + %tmp1212 = getelementptr %struct.SECOND_UNION, ptr %tmp1211, i32 0, i32 0 ; [#uses=1] + %tmp1214 = getelementptr <{ i8, i8, i8, i8 }>, ptr %tmp1212, i32 0, i32 1 ; [#uses=1] + %tmp1215 = load i8, ptr %tmp1214, align 1 ; [#uses=1] %tmp1216 = shl i8 %tmp1215, 6 ; [#uses=1] %tmp1217 = lshr i8 %tmp1216, 7 ; [#uses=1] %mask1218 = and i8 %tmp1217, 1 ; [#uses=2] %mask1219 = and i8 %mask1218, 1 ; [#uses=0] - %tmp1220 = load %struct.rec*, %struct.rec** %s, align 4 ; <%struct.rec*> [#uses=1] - %tmp1221 = getelementptr %struct.rec, %struct.rec* %tmp1220, i32 0, i32 0 ; <%struct.head_type*> [#uses=1] - %tmp12211222 = bitcast %struct.head_type* %tmp1221 to %struct.word_type* ; <%struct.word_type*> [#uses=1] - %tmp1223 = getelementptr %struct.word_type, %struct.word_type* %tmp12211222, i32 0, i32 2 ; <%struct.SECOND_UNION*> [#uses=1] - %tmp1224 = getelementptr %struct.SECOND_UNION, %struct.SECOND_UNION* %tmp1223, i32 0, i32 0 ; <{ i16, i8, i8 }*> [#uses=1] - %tmp12241225 = bitcast { i16, i8, i8 }* %tmp1224 to <{ i8, i8, i8, i8 }>* ; <<{ i8, i8, i8, i8 }>*> [#uses=1] - %tmp1226 = getelementptr <{ i8, i8, i8, i8 }>, <{ i8, i8, i8, i8 }>* %tmp12241225, i32 0, i32 1 ; [#uses=2] + %tmp1220 = load ptr, ptr %s, align 4 ; [#uses=1] + %tmp1221 = getelementptr %struct.rec, ptr %tmp1220, i32 0, i32 0 ; [#uses=1] + %tmp1223 = getelementptr %struct.word_type, ptr %tmp1221, i32 0, i32 2 ; [#uses=1] + %tmp1224 = getelementptr %struct.SECOND_UNION, ptr %tmp1223, i32 0, i32 0 ; [#uses=1] + %tmp1226 = getelementptr <{ i8, i8, i8, i8 }>, ptr %tmp1224, i32 0, i32 1 ; [#uses=2] %mask1227 = and i8 %mask1218, 1 ; [#uses=2] - %tmp1228 = load i8, i8* %tmp1226, align 1 ; [#uses=1] + %tmp1228 = load i8, ptr %tmp1226, align 1 ; [#uses=1] %tmp1229 = and i8 %mask1227, 1 ; [#uses=1] %tmp1230 = and i8 %tmp1228, -2 ; [#uses=1] %tmp1231 = or i8 %tmp1230, %tmp1229 ; [#uses=1] - store i8 %tmp1231, i8* %tmp1226, align 1 + store i8 %tmp1231, ptr %tmp1226, align 1 %mask1232 = and i8 %mask1227, 1 ; [#uses=0] br label %bb1233.exitStub } diff --git a/llvm/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll b/llvm/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll index 00423d6d6259f..558c2156e8bb2 100644 --- a/llvm/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll +++ b/llvm/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -mtriple=i386-pc-linux-gnu -relocation-model=pic -frame-pointer=all ; PR2134 -declare fastcc i8* @w_addchar(i8*, i32*, i32*, i8 signext ) nounwind +declare fastcc ptr @w_addchar(ptr, ptr, ptr, i8 signext ) nounwind -define x86_stdcallcc i32 @parse_backslash(i8** inreg %word, i32* inreg %word_length, i32* inreg %max_length) nounwind { +define x86_stdcallcc i32 @parse_backslash(ptr inreg %word, ptr inreg %word_length, ptr inreg %max_length) nounwind { entry: - %tmp6 = load i8, i8* null, align 1 ; [#uses=1] + %tmp6 = load i8, ptr null, align 1 ; [#uses=1] br label %bb13 bb13: ; preds = %entry - %tmp26 = call fastcc i8* @w_addchar( i8* null, i32* %word_length, i32* %max_length, i8 signext %tmp6 ) nounwind ; [#uses=1] - store i8* %tmp26, i8** %word, align 4 + %tmp26 = call fastcc ptr @w_addchar( ptr null, ptr %word_length, ptr %max_length, i8 signext %tmp6 ) nounwind ; [#uses=1] + store ptr %tmp26, ptr %word, align 4 ret i32 0 } diff --git a/llvm/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll b/llvm/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll index 2ca003e052aa6..13d8c0df042ab 100644 --- a/llvm/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll +++ b/llvm/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll @@ -5,23 +5,23 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i386-pc-linux-gnu" %struct.__res_state = type { i32 } -@__resp = thread_local global %struct.__res_state* @_res ; <%struct.__res_state**> [#uses=1] -@_res = global %struct.__res_state zeroinitializer, section ".bss" ; <%struct.__res_state*> [#uses=1] +@__resp = thread_local global ptr @_res ; [#uses=1] +@_res = global %struct.__res_state zeroinitializer, section ".bss" ; [#uses=1] -@__libc_resp = hidden thread_local alias %struct.__res_state*, %struct.__res_state** @__resp ; <%struct.__res_state**> [#uses=2] +@__libc_resp = hidden thread_local alias ptr, ptr @__resp ; [#uses=2] define i32 @foo() { ; CHECK-LABEL: foo: ; CHECK: leal __libc_resp@TLSLD entry: - %retval = alloca i32 ; [#uses=1] + %retval = alloca i32 ; [#uses=1] %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] - %tmp = load %struct.__res_state*, %struct.__res_state** @__libc_resp, align 4 ; <%struct.__res_state*> [#uses=1] - %tmp1 = getelementptr %struct.__res_state, %struct.__res_state* %tmp, i32 0, i32 0 ; [#uses=1] - store i32 0, i32* %tmp1, align 4 + %tmp = load ptr, ptr @__libc_resp, align 4 ; [#uses=1] + %tmp1 = getelementptr %struct.__res_state, ptr %tmp, i32 0, i32 0 ; [#uses=1] + store i32 0, ptr %tmp1, align 4 br label %return return: ; preds = %entry - %retval2 = load i32, i32* %retval ; [#uses=1] + %retval2 = load i32, ptr %retval ; [#uses=1] ret i32 %retval2 } @@ -29,13 +29,13 @@ define i32 @bar() { ; CHECK-LABEL: bar: ; CHECK: leal __libc_resp@TLSLD entry: - %retval = alloca i32 ; [#uses=1] + %retval = alloca i32 ; [#uses=1] %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] - %tmp = load %struct.__res_state*, %struct.__res_state** @__libc_resp, align 4 ; <%struct.__res_state*> [#uses=1] - %tmp1 = getelementptr %struct.__res_state, %struct.__res_state* %tmp, i32 0, i32 0 ; [#uses=1] - store i32 1, i32* %tmp1, align 4 + %tmp = load ptr, ptr @__libc_resp, align 4 ; [#uses=1] + %tmp1 = getelementptr %struct.__res_state, ptr %tmp, i32 0, i32 0 ; [#uses=1] + store i32 1, ptr %tmp1, align 4 br label %return return: ; preds = %entry - %retval2 = load i32, i32* %retval ; [#uses=1] + %retval2 = load i32, ptr %retval ; [#uses=1] ret i32 %retval2 } diff --git a/llvm/test/CodeGen/X86/2008-03-14-SpillerCrash.ll b/llvm/test/CodeGen/X86/2008-03-14-SpillerCrash.ll index d484b45a57637..c4bb72d7bde2d 100644 --- a/llvm/test/CodeGen/X86/2008-03-14-SpillerCrash.ll +++ b/llvm/test/CodeGen/X86/2008-03-14-SpillerCrash.ll @@ -1,17 +1,17 @@ ; RUN: llc < %s -mtriple=i386-pc-linux-gnu ; PR2138 - %struct.__locale_struct = type { [13 x %struct.locale_data*], i16*, i32*, i32*, [13 x i8*] } - %struct.anon = type { i8* } - %struct.locale_data = type { i8*, i8*, i32, i32, { void (%struct.locale_data*)*, %struct.anon }, i32, i32, i32, [0 x %struct.locale_data_value] } - %struct.locale_data_value = type { i32* } + %struct.__locale_struct = type { [13 x ptr], ptr, ptr, ptr, [13 x ptr] } + %struct.anon = type { ptr } + %struct.locale_data = type { ptr, ptr, i32, i32, { ptr, %struct.anon }, i32, i32, i32, [0 x %struct.locale_data_value] } + %struct.locale_data_value = type { ptr } -@wcstoll_l = alias i64 (i32*, i32**, i32, %struct.__locale_struct*), i64 (i32*, i32**, i32, %struct.__locale_struct*)* @__wcstoll_l +@wcstoll_l = alias i64 (ptr, ptr, i32, ptr), ptr @__wcstoll_l -define i64 @____wcstoll_l_internal(i32* %nptr, i32** %endptr, i32 %base, i32 %group, %struct.__locale_struct* %loc) nounwind { +define i64 @____wcstoll_l_internal(ptr %nptr, ptr %endptr, i32 %base, i32 %group, ptr %loc) nounwind { entry: - %tmp27 = load i32, i32* null, align 4 ; [#uses=1] - %tmp83 = getelementptr i32, i32* %nptr, i32 1 ; [#uses=1] + %tmp27 = load i32, ptr null, align 4 ; [#uses=1] + %tmp83 = getelementptr i32, ptr %nptr, i32 1 ; [#uses=1] %tmp233 = add i32 0, -48 ; [#uses=1] br label %bb271.us bb271.us: ; preds = %entry @@ -24,16 +24,16 @@ bb327.split: ; preds = %bb314.us bb374.outer: ; preds = %bb311.split, %bb271.us %tmp370371552.pn.in = phi i32 [ %tmp233, %bb271.us ], [ %tmp313, %bb311.split ] ; [#uses=1] %tmp278279.pn = phi i64 [ 0, %bb271.us ], [ %tmp373.reg2mem.0.ph, %bb311.split ] ; [#uses=1] - %s.5.ph = phi i32* [ null, %bb271.us ], [ %tmp376.us, %bb311.split ] ; [#uses=1] + %s.5.ph = phi ptr [ null, %bb271.us ], [ %tmp376.us, %bb311.split ] ; [#uses=1] %tmp366367550.pn = sext i32 %base to i64 ; [#uses=1] %tmp370371552.pn = zext i32 %tmp370371552.pn.in to i64 ; [#uses=1] %tmp369551.pn = mul i64 %tmp278279.pn, %tmp366367550.pn ; [#uses=1] %tmp373.reg2mem.0.ph = add i64 %tmp370371552.pn, %tmp369551.pn ; [#uses=1] br label %bb374.us bb374.us: ; preds = %bb314.us, %bb374.outer - %tmp376.us = getelementptr i32, i32* %s.5.ph, i32 0 ; [#uses=3] - %tmp378.us = load i32, i32* %tmp376.us, align 4 ; [#uses=2] - %tmp302.us = icmp eq i32* %tmp376.us, %tmp83 ; [#uses=1] + %tmp376.us = getelementptr i32, ptr %s.5.ph, i32 0 ; [#uses=3] + %tmp378.us = load i32, ptr %tmp376.us, align 4 ; [#uses=2] + %tmp302.us = icmp eq ptr %tmp376.us, %tmp83 ; [#uses=1] %bothcond484.us = or i1 false, %tmp302.us ; [#uses=1] br i1 %bothcond484.us, label %bb383, label %bb305.us bb305.us: ; preds = %bb374.us @@ -45,6 +45,6 @@ bb383: ; preds = %bb374.us, %bb311.split ret i64 0 } -define i64 @__wcstoll_l(i32*, i32**, i32, %struct.__locale_struct*) nounwind { +define i64 @__wcstoll_l(ptr, ptr, i32, ptr) nounwind { ret i64 0 } diff --git a/llvm/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll b/llvm/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll index 3e55390de9f19..16b2755720598 100644 --- a/llvm/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll +++ b/llvm/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll @@ -1,49 +1,45 @@ ; RUN: llc < %s -mtriple=i386-apple-darwin -asm-verbose | grep "#" | not grep -v "##" - %struct.AGenericCall = type { %struct.AGenericManager*, %struct.ComponentParameters*, i32* } + %struct.AGenericCall = type { ptr, ptr, ptr } %struct.AGenericManager = type <{ i8 }> %struct.ComponentInstanceRecord = type opaque %struct.ComponentParameters = type { [1 x i64] } -define i32 @_ZN12AGenericCall10MapIDPtrAtEsRP23ComponentInstanceRecord(%struct.AGenericCall* %this, i16 signext %param, %struct.ComponentInstanceRecord** %instance) { +define i32 @_ZN12AGenericCall10MapIDPtrAtEsRP23ComponentInstanceRecord(ptr %this, i16 signext %param, ptr %instance) { entry: %tmp4 = icmp slt i16 %param, 0 ; [#uses=1] br i1 %tmp4, label %cond_true, label %cond_next cond_true: ; preds = %entry %tmp1415 = shl i16 %param, 3 ; [#uses=1] - %tmp17 = getelementptr %struct.AGenericCall, %struct.AGenericCall* %this, i32 0, i32 1 ; <%struct.ComponentParameters**> [#uses=1] - %tmp18 = load %struct.ComponentParameters*, %struct.ComponentParameters** %tmp17, align 8 ; <%struct.ComponentParameters*> [#uses=1] - %tmp1920 = bitcast %struct.ComponentParameters* %tmp18 to i8* ; [#uses=1] + %tmp17 = getelementptr %struct.AGenericCall, ptr %this, i32 0, i32 1 ; [#uses=1] + %tmp18 = load ptr, ptr %tmp17, align 8 ; [#uses=1] %tmp212223 = sext i16 %tmp1415 to i64 ; [#uses=1] - %tmp24 = getelementptr i8, i8* %tmp1920, i64 %tmp212223 ; [#uses=1] - %tmp2425 = bitcast i8* %tmp24 to i64* ; [#uses=1] - %tmp28 = load i64, i64* %tmp2425, align 8 ; [#uses=1] - %tmp2829 = inttoptr i64 %tmp28 to i32* ; [#uses=1] - %tmp31 = getelementptr %struct.AGenericCall, %struct.AGenericCall* %this, i32 0, i32 2 ; [#uses=1] - store i32* %tmp2829, i32** %tmp31, align 8 + %tmp24 = getelementptr i8, ptr %tmp18, i64 %tmp212223 ; [#uses=1] + %tmp28 = load i64, ptr %tmp24, align 8 ; [#uses=1] + %tmp2829 = inttoptr i64 %tmp28 to ptr ; [#uses=1] + %tmp31 = getelementptr %struct.AGenericCall, ptr %this, i32 0, i32 2 ; [#uses=1] + store ptr %tmp2829, ptr %tmp31, align 8 br label %cond_next cond_next: ; preds = %cond_true, %entry %tmp4243 = shl i16 %param, 3 ; [#uses=1] - %tmp46 = getelementptr %struct.AGenericCall, %struct.AGenericCall* %this, i32 0, i32 1 ; <%struct.ComponentParameters**> [#uses=1] - %tmp47 = load %struct.ComponentParameters*, %struct.ComponentParameters** %tmp46, align 8 ; <%struct.ComponentParameters*> [#uses=1] - %tmp4849 = bitcast %struct.ComponentParameters* %tmp47 to i8* ; [#uses=1] + %tmp46 = getelementptr %struct.AGenericCall, ptr %this, i32 0, i32 1 ; [#uses=1] + %tmp47 = load ptr, ptr %tmp46, align 8 ; [#uses=1] %tmp505152 = sext i16 %tmp4243 to i64 ; [#uses=1] - %tmp53 = getelementptr i8, i8* %tmp4849, i64 %tmp505152 ; [#uses=1] - %tmp5354 = bitcast i8* %tmp53 to i64* ; [#uses=1] - %tmp58 = load i64, i64* %tmp5354, align 8 ; [#uses=1] + %tmp53 = getelementptr i8, ptr %tmp47, i64 %tmp505152 ; [#uses=1] + %tmp58 = load i64, ptr %tmp53, align 8 ; [#uses=1] %tmp59 = icmp eq i64 %tmp58, 0 ; [#uses=1] br i1 %tmp59, label %UnifiedReturnBlock, label %cond_true63 cond_true63: ; preds = %cond_next - %tmp65 = getelementptr %struct.AGenericCall, %struct.AGenericCall* %this, i32 0, i32 0 ; <%struct.AGenericManager**> [#uses=1] - %tmp66 = load %struct.AGenericManager*, %struct.AGenericManager** %tmp65, align 8 ; <%struct.AGenericManager*> [#uses=1] - %tmp69 = tail call i32 @_ZN15AGenericManager24DefaultComponentInstanceERP23ComponentInstanceRecord( %struct.AGenericManager* %tmp66, %struct.ComponentInstanceRecord** %instance ) ; [#uses=1] + %tmp65 = getelementptr %struct.AGenericCall, ptr %this, i32 0, i32 0 ; [#uses=1] + %tmp66 = load ptr, ptr %tmp65, align 8 ; [#uses=1] + %tmp69 = tail call i32 @_ZN15AGenericManager24DefaultComponentInstanceERP23ComponentInstanceRecord( ptr %tmp66, ptr %instance ) ; [#uses=1] ret i32 %tmp69 UnifiedReturnBlock: ; preds = %cond_next ret i32 undef } -declare i32 @_ZN15AGenericManager24DefaultComponentInstanceERP23ComponentInstanceRecord(%struct.AGenericManager*, %struct.ComponentInstanceRecord**) +declare i32 @_ZN15AGenericManager24DefaultComponentInstanceERP23ComponentInstanceRecord(ptr, ptr) diff --git a/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll b/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll index c7ba60a717425..66d6efdc35fa0 100644 --- a/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll +++ b/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll @@ -19,6 +19,6 @@ entry: %tmp678 = shufflevector <4 x float> %tmp662, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>> [#uses=1] %tmp753 = fmul <4 x float> zeroinitializer, %tmp678 ; <<4 x float>> [#uses=1] %tmp754 = fsub <4 x float> zeroinitializer, %tmp753 ; <<4 x float>> [#uses=1] - store <4 x float> %tmp754, <4 x float>* null, align 16 + store <4 x float> %tmp754, ptr null, align 16 unreachable } diff --git a/llvm/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll b/llvm/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll index 9d3c4484ff77f..180d6719837b2 100644 --- a/llvm/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll +++ b/llvm/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll @@ -2,17 +2,17 @@ ; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -frame-pointer=all | FileCheck %s ; Don't fold re-materialized load into a two address instruction - %"struct.Smarts::Runnable" = type { i32 (...)**, i32 } - %struct.__sbuf = type { i8*, i32 } - %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %struct.__sbuf, [8 x %struct.__sbuf], i32, %struct.__sbuf*, %"struct.std::locale" } - %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 } - %"struct.std::locale" = type { %"struct.std::locale::_Impl"* } - %"struct.std::locale::_Impl" = type { i32, %"struct.Smarts::Runnable"**, i32, %"struct.Smarts::Runnable"**, i8** } -@_ZTVSt9basic_iosIcSt11char_traitsIcEE = external constant [4 x i32 (...)*] ; <[4 x i32 (...)*]*> [#uses=1] -@_ZTTSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE = external constant [4 x i8*] ; <[4 x i8*]*> [#uses=1] -@_ZTVSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE = external constant [10 x i32 (...)*] ; <[10 x i32 (...)*]*> [#uses=2] -@_ZTVSt15basic_streambufIcSt11char_traitsIcEE = external constant [16 x i32 (...)*] ; <[16 x i32 (...)*]*> [#uses=1] -@_ZTVSt15basic_stringbufIcSt11char_traitsIcESaIcEE = external constant [16 x i32 (...)*] ; <[16 x i32 (...)*]*> [#uses=1] + %"struct.Smarts::Runnable" = type { ptr, i32 } + %struct.__sbuf = type { ptr, i32 } + %"struct.std::ios_base" = type { ptr, i32, i32, i32, i32, i32, ptr, %struct.__sbuf, [8 x %struct.__sbuf], i32, ptr, %"struct.std::locale" } + %"struct.std::ios_base::_Callback_list" = type { ptr, ptr, i32, i32 } + %"struct.std::locale" = type { ptr } + %"struct.std::locale::_Impl" = type { i32, ptr, i32, ptr, ptr } +@_ZTVSt9basic_iosIcSt11char_traitsIcEE = external constant [4 x ptr] ; [#uses=1] +@_ZTTSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE = external constant [4 x ptr] ; [#uses=1] +@_ZTVSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE = external constant [10 x ptr] ; [#uses=2] +@_ZTVSt15basic_streambufIcSt11char_traitsIcEE = external constant [16 x ptr] ; [#uses=1] +@_ZTVSt15basic_stringbufIcSt11char_traitsIcESaIcEE = external constant [16 x ptr] ; [#uses=1] define void @_GLOBAL__I__ZN5Pooma5pinfoE() nounwind { ; CHECK-LABEL: _GLOBAL__I__ZN5Pooma5pinfoE: @@ -47,26 +47,23 @@ define void @_GLOBAL__I__ZN5Pooma5pinfoE() nounwind { ; CHECK-NEXT: movl %eax, 0 ; CHECK-NEXT: ud2 entry: - store i32 (...)** getelementptr ([10 x i32 (...)*], [10 x i32 (...)*]* @_ZTVSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE, i32 0, i32 8), i32 (...)*** null, align 4 - %tmp96.i.i142.i = call i8* @_Znwm( i32 180 ) nounwind ; [#uses=2] - call void @_ZNSt8ios_baseC2Ev( %"struct.std::ios_base"* null ) nounwind - store i32 (...)** getelementptr ([4 x i32 (...)*], [4 x i32 (...)*]* @_ZTVSt9basic_iosIcSt11char_traitsIcEE, i32 0, i32 2), i32 (...)*** null, align 4 - store i32 (...)** null, i32 (...)*** null, align 4 - %ctg2242.i.i163.i = getelementptr i8, i8* %tmp96.i.i142.i, i32 0 ; [#uses=1] - %tmp150.i.i164.i = load i8*, i8** getelementptr ([4 x i8*], [4 x i8*]* @_ZTTSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE, i32 0, i64 2), align 4 ; [#uses=1] - %tmp150151.i.i165.i = bitcast i8* %tmp150.i.i164.i to i32 (...)** ; [#uses=1] - %tmp153.i.i166.i = bitcast i8* %ctg2242.i.i163.i to i32 (...)*** ; [#uses=1] - store i32 (...)** %tmp150151.i.i165.i, i32 (...)*** %tmp153.i.i166.i, align 4 - %tmp159.i.i167.i = bitcast i8* %tmp96.i.i142.i to i32 (...)*** ; [#uses=1] - store i32 (...)** getelementptr ([10 x i32 (...)*], [10 x i32 (...)*]* @_ZTVSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE, i32 0, i32 3), i32 (...)*** %tmp159.i.i167.i, align 4 - store i32 (...)** getelementptr ([16 x i32 (...)*], [16 x i32 (...)*]* @_ZTVSt15basic_streambufIcSt11char_traitsIcEE, i32 0, i32 2), i32 (...)*** null, align 4 - call void @_ZNSt6localeC1Ev( %"struct.std::locale"* null ) nounwind - store i32 (...)** getelementptr ([16 x i32 (...)*], [16 x i32 (...)*]* @_ZTVSt15basic_stringbufIcSt11char_traitsIcESaIcEE, i32 0, i32 2), i32 (...)*** null, align 4 + store ptr getelementptr ([10 x ptr], ptr @_ZTVSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE, i32 0, i32 8), ptr null, align 4 + %tmp96.i.i142.i = call ptr @_Znwm( i32 180 ) nounwind ; [#uses=2] + call void @_ZNSt8ios_baseC2Ev( ptr null ) nounwind + store ptr getelementptr ([4 x ptr], ptr @_ZTVSt9basic_iosIcSt11char_traitsIcEE, i32 0, i32 2), ptr null, align 4 + store ptr null, ptr null, align 4 + %ctg2242.i.i163.i = getelementptr i8, ptr %tmp96.i.i142.i, i32 0 ; [#uses=1] + %tmp150.i.i164.i = load ptr, ptr getelementptr ([4 x ptr], ptr @_ZTTSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE, i32 0, i64 2), align 4 ; [#uses=1] + store ptr %tmp150.i.i164.i, ptr %ctg2242.i.i163.i, align 4 + store ptr getelementptr ([10 x ptr], ptr @_ZTVSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE, i32 0, i32 3), ptr %tmp96.i.i142.i, align 4 + store ptr getelementptr ([16 x ptr], ptr @_ZTVSt15basic_streambufIcSt11char_traitsIcEE, i32 0, i32 2), ptr null, align 4 + call void @_ZNSt6localeC1Ev( ptr null ) nounwind + store ptr getelementptr ([16 x ptr], ptr @_ZTVSt15basic_stringbufIcSt11char_traitsIcESaIcEE, i32 0, i32 2), ptr null, align 4 unreachable } -declare i8* @_Znwm(i32) +declare ptr @_Znwm(i32) -declare void @_ZNSt8ios_baseC2Ev(%"struct.std::ios_base"*) +declare void @_ZNSt8ios_baseC2Ev(ptr) -declare void @_ZNSt6localeC1Ev(%"struct.std::locale"*) nounwind +declare void @_ZNSt6localeC1Ev(ptr) nounwind diff --git a/llvm/test/CodeGen/X86/2008-04-09-BranchFolding.ll b/llvm/test/CodeGen/X86/2008-04-09-BranchFolding.ll index 94fab368054b8..878af85c51c1a 100644 --- a/llvm/test/CodeGen/X86/2008-04-09-BranchFolding.ll +++ b/llvm/test/CodeGen/X86/2008-04-09-BranchFolding.ll @@ -2,13 +2,13 @@ ; RUN: llc < %s -mtriple=i686-- | FileCheck %s %struct..0anon = type { i32 } - %struct.binding_level = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.binding_level*, i8, i8, i8, i8, i8, i32, %struct.tree_node* } + %struct.binding_level = type { ptr, ptr, ptr, ptr, ptr, ptr, i8, i8, i8, i8, i8, i32, ptr } %struct.lang_decl = type opaque %struct.rtx_def = type { i16, i8, i8, [1 x %struct..0anon] } - %struct.tree_decl = type { [12 x i8], i8*, i32, %struct.tree_node*, i32, i8, i8, i8, i8, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct..0anon, { %struct.rtx_def* }, %struct.tree_node*, %struct.lang_decl* } + %struct.tree_decl = type { [12 x i8], ptr, i32, ptr, i32, i8, i8, i8, i8, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %struct..0anon, { ptr }, ptr, ptr } %struct.tree_node = type { %struct.tree_decl } -define fastcc %struct.tree_node* @pushdecl(%struct.tree_node* %x) nounwind { +define fastcc ptr @pushdecl(ptr %x) nounwind { ; CHECK-LABEL: pushdecl: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movb $1, %al @@ -23,40 +23,40 @@ define fastcc %struct.tree_node* @pushdecl(%struct.tree_node* %x) nounwind { ; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: retl entry: - %tmp3.i40 = icmp eq %struct.binding_level* null, null ; [#uses=2] + %tmp3.i40 = icmp eq ptr null, null ; [#uses=2] br label %bb140 bb140: ; preds = %entry br i1 %tmp3.i40, label %bb160, label %bb17.i bb17.i: ; preds = %bb140 - ret %struct.tree_node* null + ret ptr null bb143: ; preds = %entry - %tmp8.i43 = load %struct.tree_node*, %struct.tree_node** null, align 4 ; <%struct.tree_node*> [#uses=1] + %tmp8.i43 = load ptr, ptr null, align 4 ; [#uses=1] br i1 %tmp3.i40, label %bb160, label %bb9.i48 bb9.i48: ; preds = %bb143 - ret %struct.tree_node* null + ret ptr null bb160: ; preds = %bb143, %bb140 - %t.0.reg2mem.0 = phi %struct.tree_node* [ null, %bb140 ], [ %tmp8.i43, %bb143 ] ; <%struct.tree_node*> [#uses=1] - %tmp162 = icmp eq %struct.tree_node* %t.0.reg2mem.0, null ; [#uses=2] + %t.0.reg2mem.0 = phi ptr [ null, %bb140 ], [ %tmp8.i43, %bb143 ] ; [#uses=1] + %tmp162 = icmp eq ptr %t.0.reg2mem.0, null ; [#uses=2] br i1 %tmp162, label %bb174, label %bb165 bb165: ; preds = %bb160 br label %bb174 bb174: ; preds = %bb165, %bb160 %line.0 = phi i32 [ 0, %bb165 ], [ undef, %bb160 ] ; [#uses=1] - %file.0 = phi i8* [ null, %bb165 ], [ undef, %bb160 ] ; [#uses=1] + %file.0 = phi ptr [ null, %bb165 ], [ undef, %bb160 ] ; [#uses=1] br i1 %tmp162, label %bb344, label %bb73.i bb73.i: ; preds = %bb174 br i1 false, label %bb226.i, label %bb220.i bb220.i: ; preds = %bb73.i - ret %struct.tree_node* null + ret ptr null bb226.i: ; preds = %bb73.i br i1 false, label %bb260, label %bb273.i bb273.i: ; preds = %bb226.i - ret %struct.tree_node* null + ret ptr null bb260: ; preds = %bb226.i - tail call void (i8*, i32, ...) @pedwarn_with_file_and_line( i8* %file.0, i32 %line.0, i8* null ) nounwind - ret %struct.tree_node* null + tail call void (ptr, i32, ...) @pedwarn_with_file_and_line( ptr %file.0, i32 %line.0, ptr null ) nounwind + ret ptr null bb344: ; preds = %bb174 - ret %struct.tree_node* null + ret ptr null } -declare void @pedwarn_with_file_and_line(i8*, i32, ...) nounwind +declare void @pedwarn_with_file_and_line(ptr, i32, ...) nounwind diff --git a/llvm/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll b/llvm/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll index 175f1d98ff3d5..d2490f5613ecb 100644 --- a/llvm/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll +++ b/llvm/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll @@ -4,25 +4,25 @@ %struct.CGPoint = type { double, double } %struct.NSArray = type { %struct.NSObject } - %struct.NSAssertionHandler = type { %struct.NSObject, i8* } - %struct.NSDockTile = type { %struct.NSObject, %struct.NSObject*, i8*, %struct.NSView*, %struct.NSView*, %struct.NSView*, %struct.NSArray*, %struct._SPFlags, %struct.CGPoint, [5 x %struct.NSObject*] } - %struct.NSDocument = type { %struct.NSObject, %struct.NSWindow*, %struct.NSObject*, %struct.NSURL*, %struct.NSArray*, %struct.NSPrintInfo*, i64, %struct.NSView*, %struct.NSObject*, %struct.NSObject*, %struct.NSUndoManager*, %struct._BCFlags2, %struct.NSArray* } - %struct.AA = type { %struct.NSObject, %struct.NSDocument*, %struct.NSURL*, %struct.NSArray*, %struct.NSArray* } - %struct.NSError = type { %struct.NSObject, i8*, i64, %struct.NSArray*, %struct.NSArray* } - %struct.NSImage = type { %struct.NSObject, %struct.NSArray*, %struct.CGPoint, %struct._BCFlags2, %struct.NSObject*, %struct._NSImageAuxiliary* } + %struct.NSAssertionHandler = type { %struct.NSObject, ptr } + %struct.NSDockTile = type { %struct.NSObject, ptr, ptr, ptr, ptr, ptr, ptr, %struct._SPFlags, %struct.CGPoint, [5 x ptr] } + %struct.NSDocument = type { %struct.NSObject, ptr, ptr, ptr, ptr, ptr, i64, ptr, ptr, ptr, ptr, %struct._BCFlags2, ptr } + %struct.AA = type { %struct.NSObject, ptr, ptr, ptr, ptr } + %struct.NSError = type { %struct.NSObject, ptr, i64, ptr, ptr } + %struct.NSImage = type { %struct.NSObject, ptr, %struct.CGPoint, %struct._BCFlags2, ptr, ptr } %struct.NSMutableArray = type { %struct.NSArray } - %struct.NSObject = type { %struct.NSObject* } - %struct.NSPrintInfo = type { %struct.NSObject, %struct.NSMutableArray*, %struct.NSObject* } + %struct.NSObject = type { ptr } + %struct.NSPrintInfo = type { %struct.NSObject, ptr, ptr } %struct.NSRect = type { %struct.CGPoint, %struct.CGPoint } %struct.NSRegion = type opaque - %struct.NSResponder = type { %struct.NSObject, %struct.NSObject* } - %struct.NSToolbar = type { %struct.NSObject, %struct.NSArray*, %struct.NSMutableArray*, %struct.NSMutableArray*, %struct.NSArray*, %struct.NSObject*, %struct.NSArray*, i8*, %struct.NSObject*, %struct.NSWindow*, %struct.NSObject*, %struct.NSObject*, i64, %struct._BCFlags2, i64, %struct.NSObject* } - %struct.NSURL = type { %struct.NSObject, %struct.NSArray*, %struct.NSURL*, i8*, i8* } - %struct.NSUndoManager = type { %struct.NSObject, %struct.NSObject*, %struct.NSObject*, %struct.NSArray*, i64, %struct._SPFlags, %struct.NSObject*, i8*, i8*, i8* } - %struct.NSView = type { %struct.NSResponder, %struct.NSRect, %struct.NSRect, %struct.NSObject*, %struct.NSObject*, %struct.NSWindow*, %struct.NSObject*, %struct.NSObject*, %struct.NSObject*, %struct.NSObject*, %struct._NSViewAuxiliary*, %struct._BCFlags, %struct._SPFlags } - %struct.NSWindow = type { %struct.NSResponder, %struct.NSRect, %struct.NSObject*, %struct.NSObject*, %struct.NSResponder*, %struct.NSView*, %struct.NSView*, %struct.NSObject*, %struct.NSObject*, i32, i64, i32, %struct.NSArray*, %struct.NSObject*, i8, i8, i8, i8, i8*, i8*, %struct.NSImage*, i32, %struct.NSMutableArray*, %struct.NSURL*, %struct.CGPoint*, %struct.NSArray*, %struct.NSArray*, %struct.__wFlags, %struct.NSObject*, %struct.NSView*, %struct.NSWindowAuxiliary* } - %struct.NSWindowAuxiliary = type { %struct.NSObject, %struct.NSArray*, %struct.NSDockTile*, %struct._NSWindowAnimator*, %struct.NSRect, i32, %struct.NSAssertionHandler*, %struct.NSUndoManager*, %struct.NSWindowController*, %struct.NSAssertionHandler*, %struct.NSObject*, i32, %struct.__CFRunLoopObserver*, %struct.__CFRunLoopObserver*, %struct.NSArray*, %struct.NSArray*, %struct.NSView*, %struct.NSRegion*, %struct.NSWindow*, %struct.NSWindow*, %struct.NSArray*, %struct.NSMutableArray*, %struct.NSArray*, %struct.NSWindow*, %struct.CGPoint, %struct.NSObject*, i8*, i8*, i32, %struct.NSObject*, %struct.NSArray*, double, %struct.CGPoint, %struct.NSArray*, %struct.NSMutableArray*, %struct.NSMutableArray*, %struct.NSWindow*, %struct.NSView*, %struct.NSArray*, %struct.__auxWFlags, i32, i8*, double, %struct.NSObject*, %struct.NSObject*, %struct.__CFArray*, %struct.NSRegion*, %struct.NSArray*, %struct.NSRect, %struct.NSToolbar*, %struct.NSRect, %struct.NSMutableArray* } - %struct.NSWindowController = type { %struct.NSResponder, %struct.NSWindow*, %struct.NSArray*, %struct.NSDocument*, %struct.NSArray*, %struct.NSObject*, %struct._SPFlags, %struct.NSArray*, %struct.NSObject* } + %struct.NSResponder = type { %struct.NSObject, ptr } + %struct.NSToolbar = type { %struct.NSObject, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, %struct._BCFlags2, i64, ptr } + %struct.NSURL = type { %struct.NSObject, ptr, ptr, ptr, ptr } + %struct.NSUndoManager = type { %struct.NSObject, ptr, ptr, ptr, i64, %struct._SPFlags, ptr, ptr, ptr, ptr } + %struct.NSView = type { %struct.NSResponder, %struct.NSRect, %struct.NSRect, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %struct._BCFlags, %struct._SPFlags } + %struct.NSWindow = type { %struct.NSResponder, %struct.NSRect, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i64, i32, ptr, ptr, i8, i8, i8, i8, ptr, ptr, ptr, i32, ptr, ptr, ptr, ptr, ptr, %struct.__wFlags, ptr, ptr, ptr } + %struct.NSWindowAuxiliary = type { %struct.NSObject, ptr, ptr, ptr, %struct.NSRect, i32, ptr, ptr, ptr, ptr, ptr, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %struct.CGPoint, ptr, ptr, ptr, i32, ptr, ptr, double, %struct.CGPoint, ptr, ptr, ptr, ptr, ptr, ptr, %struct.__auxWFlags, i32, ptr, double, ptr, ptr, ptr, ptr, ptr, %struct.NSRect, ptr, %struct.NSRect, ptr } + %struct.NSWindowController = type { %struct.NSResponder, ptr, ptr, ptr, ptr, ptr, %struct._SPFlags, ptr, ptr } %struct._BCFlags = type <{ i8, i8, i8, i8 }> %struct._BCFlags2 = type <{ i8, [3 x i8] }> %struct._NSImageAuxiliary = type opaque @@ -33,18 +33,18 @@ %struct.__CFRunLoopObserver = type opaque %struct.__auxWFlags = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i16 } %struct.__wFlags = type <{ i8, i8, i8, i8, i8, i8, i8, i8 }> - %struct._message_ref_t = type { %struct.NSObject* (%struct.NSObject*, %struct._message_ref_t*, ...)*, %struct.objc_selector* } + %struct._message_ref_t = type { ptr, ptr } %struct.objc_selector = type opaque -@"\01L_OBJC_MESSAGE_REF_228" = internal global %struct._message_ref_t zeroinitializer ; <%struct._message_ref_t*> [#uses=1] -@llvm.used1 = appending global [1 x i8*] [ i8* bitcast (void (%struct.AA*, %struct._message_ref_t*, %struct.NSError*, i64, %struct.NSObject*, %struct.objc_selector*, i8*)* @"-[AA BB:optionIndex:delegate:CC:contextInfo:]" to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] +@"\01L_OBJC_MESSAGE_REF_228" = internal global %struct._message_ref_t zeroinitializer ; [#uses=1] +@llvm.used1 = appending global [1 x ptr] [ ptr @"-[AA BB:optionIndex:delegate:CC:contextInfo:]" ], section "llvm.metadata" ; [#uses=0] -define void @"-[AA BB:optionIndex:delegate:CC:contextInfo:]"(%struct.AA* %self, %struct._message_ref_t* %_cmd, %struct.NSError* %inError, i64 %inOptionIndex, %struct.NSObject* %inDelegate, %struct.objc_selector* %inDidRecoverSelector, i8* %inContextInfo) { +define void @"-[AA BB:optionIndex:delegate:CC:contextInfo:]"(ptr %self, ptr %_cmd, ptr %inError, i64 %inOptionIndex, ptr %inDelegate, ptr %inDidRecoverSelector, ptr %inContextInfo) { entry: - %tmp105 = load %struct.NSArray*, %struct.NSArray** null, align 8 ; <%struct.NSArray*> [#uses=1] - %tmp107 = load %struct.NSObject*, %struct.NSObject** null, align 8 ; <%struct.NSObject*> [#uses=1] - call void null( %struct.NSObject* %tmp107, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_228", %struct.NSArray* %tmp105, i8 signext 0 ) - %tmp111 = call %struct.NSObject* (%struct.NSObject*, %struct.objc_selector*, ...) @objc_msgSend( %struct.NSObject* null, %struct.objc_selector* null, i32 0, i8* null ) ; <%struct.NSObject*> [#uses=0] + %tmp105 = load ptr, ptr null, align 8 ; [#uses=1] + %tmp107 = load ptr, ptr null, align 8 ; [#uses=1] + call void null( ptr %tmp107, ptr @"\01L_OBJC_MESSAGE_REF_228", ptr %tmp105, i8 signext 0 ) + %tmp111 = call ptr (ptr, ptr, ...) @objc_msgSend( ptr null, ptr null, i32 0, ptr null ) ; [#uses=0] ret void } -declare %struct.NSObject* @objc_msgSend(%struct.NSObject*, %struct.objc_selector*, ...) +declare ptr @objc_msgSend(ptr, ptr, ...) diff --git a/llvm/test/CodeGen/X86/2008-04-16-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-04-16-CoalescerBug.ll index b2106873af4ae..685cd3c87e7a3 100644 --- a/llvm/test/CodeGen/X86/2008-04-16-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2008-04-16-CoalescerBug.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=i686-- -define void @Hubba(i8* %saveunder, i32 %firstBlob, i32 %select) nounwind { +define void @Hubba(ptr %saveunder, i32 %firstBlob, i32 %select) nounwind { entry: br i1 false, label %bb53.us, label %bb53 bb53.us: ; preds = %bb94.us, %bb53.us, %entry @@ -19,10 +19,10 @@ bb94.us: ; preds = %bb71.us, %bb53.us %tmp111112.us = trunc i32 %tmp101.us to i16 ; [#uses=1] %tmp110.us = or i16 %tmp109.us, %tmp111112.us ; [#uses=1] %tmp113.us = or i16 %tmp110.us, %tmp106.us ; [#uses=1] - store i16 %tmp113.us, i16* null, align 2 + store i16 %tmp113.us, ptr null, align 2 br label %bb53.us bb71.us: ; preds = %bb53.us - %tmp80.us = load i8, i8* null, align 1 ; [#uses=1] + %tmp80.us = load i8, ptr null, align 1 ; [#uses=1] %tmp8081.us = zext i8 %tmp80.us to i32 ; [#uses=1] %tmp87.us = mul i32 %tmp8081.us, 0 ; [#uses=1] %tmp92.us = add i32 0, %tmp87.us ; [#uses=1] diff --git a/llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll b/llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll index 8002d621cfd5e..c5e1ff6689220 100644 --- a/llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll +++ b/llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll @@ -1,13 +1,13 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i386-apple-darwin -disable-cgp-branch-opts | FileCheck %s - %struct.DBC_t = type { i32, i8*, i16, %struct.DBC_t*, i8*, i8*, i8*, i8*, i8*, %struct.DBC_t*, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32*, i8, i16, %struct.DRVOPT*, i16 } - %struct.DRVOPT = type { i16, i32, i8, %struct.DRVOPT* } - %struct.GENV_t = type { i32, i8*, i16, i8*, i8*, i32, i32, i32, i32, %struct.DBC_t*, i16 } + %struct.DBC_t = type { i32, ptr, i16, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, ptr, i8, i16, ptr, i16 } + %struct.DRVOPT = type { i16, i32, i8, ptr } + %struct.GENV_t = type { i32, ptr, i16, ptr, ptr, i32, i32, i32, i32, ptr, i16 } %struct.pthread_mutex_t = type { i32, [40 x i8] } -@iodbcdm_global_lock = external global %struct.pthread_mutex_t ; <%struct.pthread_mutex_t*> [#uses=1] +@iodbcdm_global_lock = external global %struct.pthread_mutex_t ; [#uses=1] -define i16 @SQLDriversW(i8* %henv, i16 zeroext %fDir, i32* %szDrvDesc, i16 signext %cbDrvDescMax, i16* %pcbDrvDesc, i32* %szDrvAttr, i16 signext %cbDrvAttrMax, i16* %pcbDrvAttr) nounwind { +define i16 @SQLDriversW(ptr %henv, i16 zeroext %fDir, ptr %szDrvDesc, i16 signext %cbDrvDescMax, ptr %pcbDrvDesc, ptr %szDrvAttr, i16 signext %cbDrvAttrMax, ptr %pcbDrvAttr) nounwind { ; CHECK-LABEL: SQLDriversW: ; CHECK: ## %bb.0: ## %entry ; CHECK-NEXT: pushl %ebp @@ -92,22 +92,21 @@ define i16 @SQLDriversW(i8* %henv, i16 zeroext %fDir, i32* %szDrvDesc, i16 sign ; CHECK-NEXT: popl %ebp ; CHECK-NEXT: retl entry: - %tmp12 = bitcast i8* %henv to %struct.GENV_t* ; <%struct.GENV_t*> [#uses=1] br i1 true, label %bb28, label %bb bb: ; preds = %entry ret i16 0 bb28: ; preds = %entry br i1 false, label %bb37, label %done bb37: ; preds = %bb28 - %tmp46 = getelementptr %struct.GENV_t, %struct.GENV_t* %tmp12, i32 0, i32 10 ; [#uses=1] - store i16 0, i16* %tmp46, align 4 + %tmp46 = getelementptr %struct.GENV_t, ptr %henv, i32 0, i32 10 ; [#uses=1] + store i16 0, ptr %tmp46, align 4 br i1 false, label %bb74, label %bb92 bb74: ; preds = %bb37 br label %bb92 bb92: ; preds = %bb74, %bb37 %tmp95180 = shl i16 %cbDrvAttrMax, 2 ; [#uses=1] %tmp100178 = shl i16 %cbDrvDescMax, 2 ; [#uses=1] - %tmp113 = tail call i16 @SQLDrivers_Internal( i8* %henv, i16 zeroext %fDir, i8* null, i16 signext %tmp100178, i16* %pcbDrvDesc, i8* null, i16 signext %tmp95180, i16* %pcbDrvAttr, i8 zeroext 87 ) nounwind ; [#uses=1] + %tmp113 = tail call i16 @SQLDrivers_Internal( ptr %henv, i16 zeroext %fDir, ptr null, i16 signext %tmp100178, ptr %pcbDrvDesc, ptr null, i16 signext %tmp95180, ptr %pcbDrvAttr, i8 zeroext 87 ) nounwind ; [#uses=1] br i1 false, label %done, label %bb137 bb137: ; preds = %bb92 ret i16 0 @@ -116,15 +115,15 @@ done: ; preds = %bb92, %bb28 br i1 false, label %bb167, label %bb150 bb150: ; preds = %done %tmp157158 = sext i16 %retcode.0 to i32 ; [#uses=1] - tail call void @trace_SQLDriversW( i32 1, i32 %tmp157158, i8* %henv, i16 zeroext %fDir, i32* %szDrvDesc, i16 signext %cbDrvDescMax, i16* %pcbDrvDesc, i32* %szDrvAttr, i16 signext %cbDrvAttrMax, i16* %pcbDrvAttr ) nounwind + tail call void @trace_SQLDriversW( i32 1, i32 %tmp157158, ptr %henv, i16 zeroext %fDir, ptr %szDrvDesc, i16 signext %cbDrvDescMax, ptr %pcbDrvDesc, ptr %szDrvAttr, i16 signext %cbDrvAttrMax, ptr %pcbDrvAttr ) nounwind ret i16 0 bb167: ; preds = %done - %tmp168 = tail call i32 @pthread_mutex_unlock( %struct.pthread_mutex_t* @iodbcdm_global_lock ) nounwind ; [#uses=0] + %tmp168 = tail call i32 @pthread_mutex_unlock( ptr @iodbcdm_global_lock ) nounwind ; [#uses=0] ret i16 %retcode.0 } -declare i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*) +declare i32 @pthread_mutex_unlock(ptr) -declare i16 @SQLDrivers_Internal(i8*, i16 zeroext , i8*, i16 signext , i16*, i8*, i16 signext , i16*, i8 zeroext ) nounwind +declare i16 @SQLDrivers_Internal(ptr, i16 zeroext , ptr, i16 signext , ptr, ptr, i16 signext , ptr, i8 zeroext ) nounwind -declare void @trace_SQLDriversW(i32, i32, i8*, i16 zeroext , i32*, i16 signext , i16*, i32*, i16 signext , i16*) +declare void @trace_SQLDriversW(i32, i32, ptr, i16 zeroext , ptr, i16 signext , ptr, ptr, i16 signext , ptr) diff --git a/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll index c6623a3bd529e..3a700db4b6721 100644 --- a/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll @@ -1,19 +1,19 @@ ; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s ; Make sure xorl operands are 32-bit registers. - %struct.tm = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8* } + %struct.tm = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr } %struct.wxDateTime = type { %struct.wxLongLong } %"struct.wxDateTime::TimeZone" = type { i32 } %struct.wxLongLong = type { i64 } %struct.wxString = type { %struct.wxStringBase } - %struct.wxStringBase = type { i32* } -@.str = external constant [27 x i32] ; <[27 x i32]*> [#uses=1] -@.str4 = external constant [14 x i32] ; <[14 x i32]*> [#uses=1] -@_ZZNK10wxDateTime5GetTmERKNS_8TimeZoneEE12__FUNCTION__ = external constant [6 x i8] ; <[6 x i8]*> [#uses=1] -@.str33 = external constant [29 x i32] ; <[29 x i32]*> [#uses=1] -@.str89 = external constant [5 x i32] ; <[5 x i32]*> [#uses=1] + %struct.wxStringBase = type { ptr } +@.str = external constant [27 x i32] ; [#uses=1] +@.str4 = external constant [14 x i32] ; [#uses=1] +@_ZZNK10wxDateTime5GetTmERKNS_8TimeZoneEE12__FUNCTION__ = external constant [6 x i8] ; [#uses=1] +@.str33 = external constant [29 x i32] ; [#uses=1] +@.str89 = external constant [5 x i32] ; [#uses=1] -define void @_ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE(%struct.wxString* noalias sret(%struct.wxString) %agg.result, %struct.wxDateTime* %this, i32* %format, %"struct.wxDateTime::TimeZone"* %tz, i1 %foo) personality i32 (...)* @__gxx_personality_v0 { +define void @_ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE(ptr noalias sret(%struct.wxString) %agg.result, ptr %this, ptr %format, ptr %tz, i1 %foo) personality ptr @__gxx_personality_v0 { ; CHECK-LABEL: _ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE: ; CHECK: ## %bb.0: ## %entry ; CHECK-NEXT: pushl %ebp @@ -190,16 +190,16 @@ bb161.i: ; preds = %bb142.i bb182.i: ; preds = %bb142.i ret void bb3261: ; preds = %bb7834, %bb161.i - %tmp3263 = load i32, i32* null, align 4 ; [#uses=1] + %tmp3263 = load i32, ptr null, align 4 ; [#uses=1] %tmp3264 = icmp eq i32 %tmp3263, 37 ; [#uses=1] br i1 %tmp3264, label %bb3306, label %bb3267 bb3267: ; preds = %bb3261 ret void bb3306: ; preds = %bb3261 - %tmp3310 = invoke %struct.wxStringBase* @_ZN12wxStringBaseaSEPKw( %struct.wxStringBase* null, i32* getelementptr ([5 x i32], [5 x i32]* @.str89, i32 0, i32 0) ) - to label %bb3314 unwind label %lpad ; <%struct.wxStringBase*> [#uses=0] + %tmp3310 = invoke ptr @_ZN12wxStringBaseaSEPKw( ptr null, ptr @.str89 ) + to label %bb3314 unwind label %lpad ; [#uses=0] bb3314: ; preds = %bb3306 - %tmp3316 = load i32, i32* null, align 4 ; [#uses=1] + %tmp3316 = load i32, ptr null, align 4 ; [#uses=1] switch i32 %tmp3316, label %bb7595 [ i32 0, label %bb7819 i32 37, label %bb7806 @@ -232,7 +232,7 @@ bb5334: ; preds = %bb3314 bb5484: ; preds = %bb3314 ret void bb5657: ; preds = %bb3314 - %tmp5661 = invoke zeroext i16 @_ZNK10wxDateTime12GetDayOfYearERKNS_8TimeZoneE( %struct.wxDateTime* %this, %"struct.wxDateTime::TimeZone"* %tz ) + %tmp5661 = invoke zeroext i16 @_ZNK10wxDateTime12GetDayOfYearERKNS_8TimeZoneE( ptr %this, ptr %tz ) to label %invcont5660 unwind label %lpad ; [#uses=0] invcont5660: ; preds = %bb5657 ret void @@ -246,10 +246,10 @@ bb115.critedge.i.i8492: ; preds = %bb5809 bb91.i8504: ; preds = %bb5809 br i1 %foo, label %bb155.i8541, label %bb182.i8560 bb155.i8541: ; preds = %bb91.i8504 - %tmp156.i85398700 = invoke %struct.tm* @gmtime_r( i32* null, %struct.tm* null ) - to label %bb182.i8560 unwind label %lpad ; <%struct.tm*> [#uses=1] + %tmp156.i85398700 = invoke ptr @gmtime_r( ptr null, ptr null ) + to label %bb182.i8560 unwind label %lpad ; [#uses=1] bb182.i8560: ; preds = %bb155.i8541, %bb91.i8504 - %tm48.0.i8558 = phi %struct.tm* [ null, %bb91.i8504 ], [ %tmp156.i85398700, %bb155.i8541 ] ; <%struct.tm*> [#uses=0] + %tm48.0.i8558 = phi ptr [ null, %bb91.i8504 ], [ %tmp156.i85398700, %bb155.i8541 ] ; [#uses=0] br i1 %foo, label %bb278.i8617, label %bb187.i8591 bb187.i8591: ; preds = %bb182.i8560 %tmp245.i8588 = srem i64 0, 86400000 ; [#uses=1] @@ -265,7 +265,7 @@ bb278.i8617: ; preds = %bb182.i8560 %timeOnly50.0.i8622 = add i32 0, 0 ; [#uses=1] br i1 %foo, label %bb440.i8663, label %bb448.i8694 bb440.i8663: ; preds = %bb278.i8617 - invoke void @_Z10wxOnAssertPKwiPKcS0_S0_( i32* getelementptr ([27 x i32], [27 x i32]* @.str, i32 0, i32 0), i32 1717, i8* getelementptr ([6 x i8], [6 x i8]* @_ZZNK10wxDateTime5GetTmERKNS_8TimeZoneEE12__FUNCTION__, i32 0, i32 0), i32* getelementptr ([29 x i32], [29 x i32]* @.str33, i32 0, i32 0), i32* getelementptr ([14 x i32], [14 x i32]* @.str4, i32 0, i32 0) ) + invoke void @_Z10wxOnAssertPKwiPKcS0_S0_( ptr @.str, i32 1717, ptr @_ZZNK10wxDateTime5GetTmERKNS_8TimeZoneEE12__FUNCTION__, ptr @.str33, ptr @.str4 ) to label %bb448.i8694 unwind label %lpad bb448.i8694: ; preds = %bb440.i8663, %bb278.i8617 %tmp477.i8669 = srem i32 %timeOnly50.0.i8622, 1000 ; [#uses=1] @@ -274,13 +274,13 @@ bb448.i8694: ; preds = %bb440.i8663, %bb278.i8617 invcont5814: ; preds = %bb448.i8694, %bb265.i8606 %tmp812.0.0 = phi i16 [ %tmp477478.i8670, %bb448.i8694 ], [ %tmp273274.i8595, %bb265.i8606 ] ; [#uses=1] %tmp58165817 = zext i16 %tmp812.0.0 to i32 ; [#uses=1] - invoke void (%struct.wxString*, i32*, ...) @_ZN8wxString6FormatEPKwz(%struct.wxString* noalias sret(%struct.wxString) null, i32* null, i32 %tmp58165817 ) + invoke void (ptr, ptr, ...) @_ZN8wxString6FormatEPKwz(ptr noalias sret(%struct.wxString) null, ptr null, i32 %tmp58165817 ) to label %invcont5831 unwind label %lpad invcont5831: ; preds = %invcont5814 - %tmp5862 = invoke zeroext i8 @_ZN12wxStringBase10ConcatSelfEmPKwm(%struct.wxStringBase* null, i32 0, i32* null, i32 0 ) + %tmp5862 = invoke zeroext i8 @_ZN12wxStringBase10ConcatSelfEmPKwm(ptr null, i32 0, ptr null, i32 0 ) to label %bb7834 unwind label %lpad8185 ; [#uses=0] bb5968: ; preds = %bb3314 - invoke void (%struct.wxString*, i32*, ...) @_ZN8wxString6FormatEPKwz(%struct.wxString* noalias sret(%struct.wxString) null, i32* null, i32 0 ) + invoke void (ptr, ptr, ...) @_ZN8wxString6FormatEPKwz(ptr noalias sret(%struct.wxString) null, ptr null, i32 0 ) to label %invcont5981 unwind label %lpad invcont5981: ; preds = %bb5968 ret void @@ -301,34 +301,34 @@ bb7308: ; preds = %bb3314 bb7595: ; preds = %bb3314 ret void bb7806: ; preds = %bb3314 - %tmp7814 = invoke %struct.wxStringBase* @_ZN12wxStringBase6appendEmw( %struct.wxStringBase* null, i32 1, i32 0 ) - to label %bb7834 unwind label %lpad ; <%struct.wxStringBase*> [#uses=0] + %tmp7814 = invoke ptr @_ZN12wxStringBase6appendEmw( ptr null, i32 1, i32 0 ) + to label %bb7834 unwind label %lpad ; [#uses=0] bb7819: ; preds = %bb3314 ret void bb7834: ; preds = %bb7806, %invcont5831 br label %bb3261 lpad: ; preds = %bb7806, %bb5968, %invcont5814, %bb440.i8663, %bb155.i8541, %bb5657, %bb3306 - %exn = landingpad {i8*, i32} + %exn = landingpad {ptr, i32} cleanup ret void lpad8185: ; preds = %invcont5831 - %exn8185 = landingpad {i8*, i32} + %exn8185 = landingpad {ptr, i32} cleanup ret void } -declare void @_Z10wxOnAssertPKwiPKcS0_S0_(i32*, i32, i8*, i32*, i32*) +declare void @_Z10wxOnAssertPKwiPKcS0_S0_(ptr, i32, ptr, ptr, ptr) -declare zeroext i8 @_ZN12wxStringBase10ConcatSelfEmPKwm(%struct.wxStringBase*, i32, i32*, i32) +declare zeroext i8 @_ZN12wxStringBase10ConcatSelfEmPKwm(ptr, i32, ptr, i32) -declare %struct.tm* @gmtime_r(i32*, %struct.tm*) +declare ptr @gmtime_r(ptr, ptr) -declare zeroext i16 @_ZNK10wxDateTime12GetDayOfYearERKNS_8TimeZoneE(%struct.wxDateTime*, %"struct.wxDateTime::TimeZone"*) +declare zeroext i16 @_ZNK10wxDateTime12GetDayOfYearERKNS_8TimeZoneE(ptr, ptr) -declare %struct.wxStringBase* @_ZN12wxStringBase6appendEmw(%struct.wxStringBase*, i32, i32) +declare ptr @_ZN12wxStringBase6appendEmw(ptr, i32, i32) -declare %struct.wxStringBase* @_ZN12wxStringBaseaSEPKw(%struct.wxStringBase*, i32*) +declare ptr @_ZN12wxStringBaseaSEPKw(ptr, ptr) -declare void @_ZN8wxString6FormatEPKwz(%struct.wxString* noalias sret(%struct.wxString) , i32*, ...) +declare void @_ZN8wxString6FormatEPKwz(ptr noalias sret(%struct.wxString) , ptr, ...) declare i32 @__gxx_personality_v0(...) diff --git a/llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll b/llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll index 3b52c57dca20f..92cebeeccb3e7 100644 --- a/llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll +++ b/llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll @@ -3,9 +3,9 @@ ; Don't accidentally add the offset twice for trailing bytes. %struct.S63 = type { [63 x i8] } -@g1s63 = external dso_local global %struct.S63 ; <%struct.S63*> [#uses=1] +@g1s63 = external dso_local global %struct.S63 ; [#uses=1] -declare void @test63(%struct.S63* byval(%struct.S63) align 4 ) nounwind +declare void @test63(ptr byval(%struct.S63) align 4 ) nounwind define void @testit63_entry_2E_ce() nounwind { ; CHECK-LABEL: testit63_entry_2E_ce: @@ -26,6 +26,6 @@ define void @testit63_entry_2E_ce() nounwind { ; CHECK-NEXT: popl %esi ; CHECK-NEXT: popl %edi ; CHECK-NEXT: retl - tail call void @test63(%struct.S63* byval(%struct.S63) align 4 @g1s63) nounwind + tail call void @test63(ptr byval(%struct.S63) align 4 @g1s63) nounwind ret void } diff --git a/llvm/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll b/llvm/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll index 06f7907fec9e7..7e781b8a1fb87 100644 --- a/llvm/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll +++ b/llvm/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll @@ -6,7 +6,7 @@ target triple = "i386-apple-darwin8" define i32 @main() nounwind { entry: - %tmp122 = load <2 x i64>, <2 x i64>* null, align 16 ; <<2 x i64>> [#uses=1] + %tmp122 = load <2 x i64>, ptr null, align 16 ; <<2 x i64>> [#uses=1] %tmp126 = bitcast <2 x i64> %tmp122 to <8 x i16> ; <<8 x i16>> [#uses=1] %tmp129 = call <8 x i16> @llvm.x86.sse41.pblendw( <8 x i16> zeroinitializer, <8 x i16> %tmp126, i32 2 ) nounwind ; <<8 x i16>> [#uses=0] ret i32 0 diff --git a/llvm/test/CodeGen/X86/2008-04-28-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-04-28-CoalescerBug.ll index f64789f9f9bbc..0682817531a40 100644 --- a/llvm/test/CodeGen/X86/2008-04-28-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2008-04-28-CoalescerBug.ll @@ -1,14 +1,14 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s - %struct.BITMAP = type { i16, i16, i32, i32, i32, i32, i32, i32, i8*, i8* } + %struct.BITMAP = type { i16, i16, i32, i32, i32, i32, i32, i32, ptr, ptr } %struct.BltData = type { float, float, float, float } - %struct.BltDepth = type { i32, i8**, i32, %struct.BITMAP* (%struct.BltDepth**, %struct.BITMAP*, i32, i32, float*, float, i32)*, i32 (%struct.BltDepth**, %struct.BltOp*)*, i32 (%struct.BltDepth**, %struct.BltOp*, %struct.BltImg*)*, i32 (%struct.BltDepth**, %struct.BltOp*, %struct.BltSh*)*, [28 x [2 x [2 x i32]]]*, %struct.BltData* } - %struct.BltImg = type { i32, i8, i8, i8, float, float*, float*, i32, i32, float*, i32 (i8*, i8*, i8**, i32*, i8**, i32*)*, i8* } - %struct.BltOp = type { i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i8* } - %struct.BltSh = type { i8, i8, i8, i8, float, float*, float*, float*, float*, i32, i32, float*, float*, float* } + %struct.BltDepth = type { i32, ptr, i32, ptr, ptr, ptr, ptr, ptr, ptr } + %struct.BltImg = type { i32, i8, i8, i8, float, ptr, ptr, i32, i32, ptr, ptr, ptr } + %struct.BltOp = type { i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, ptr } + %struct.BltSh = type { i8, i8, i8, i8, float, ptr, ptr, ptr, ptr, i32, i32, ptr, ptr, ptr } -define void @t(%struct.BltDepth* %depth, %struct.BltOp* %bop, i32 %mode) nounwind { +define void @t(ptr %depth, ptr %bop, i32 %mode) nounwind { ; CHECK-LABEL: t: ; CHECK: ## %bb.0: ## %entry ; CHECK-NEXT: cmpl $18, %edx @@ -83,7 +83,7 @@ bb13101: ; preds = %bb13088 bb13107: ; preds = %bb13101, %bb13088 %iftmp.684.0 = phi i32 [ 0, %bb13101 ], [ 65535, %bb13088 ] ; [#uses=2] - %tmp13111 = load i64, i64* null, align 8 ; [#uses=3] + %tmp13111 = load i64, ptr null, align 8 ; [#uses=3] %tmp13116 = lshr i64 %tmp13111, 16 ; [#uses=1] %tmp1311613117 = trunc i64 %tmp13116 to i32 ; [#uses=1] %tmp13118 = and i32 %tmp1311613117, 65535 ; [#uses=1] @@ -209,7 +209,7 @@ bb13567: ; preds = %bb13435, %bb13236 br i1 %tmp13238, label %bb13088, label %bb13572 bb13572: ; preds = %bb13567 - store i16 %tsp1040.1.0, i16* null, align 2 + store i16 %tsp1040.1.0, ptr null, align 2 br label %bb13088 return: ; preds = %entry diff --git a/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll b/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll index d1e458e38378a..5478b1c180ce8 100644 --- a/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll +++ b/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=i686-- - %struct.V = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x i32>, float*, float*, float*, float*, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 } + %struct.V = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x i32>, ptr, ptr, ptr, ptr, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 } define fastcc void @t() nounwind { entry: @@ -14,7 +14,7 @@ bb23821: ; preds = %entry br i1 false, label %bb23830, label %bb23827 bb23827: ; preds = %bb23821 - %tmp23829 = getelementptr %struct.V, %struct.V* null, i32 0, i32 42 ; [#uses=0] + %tmp23829 = getelementptr %struct.V, ptr null, i32 0, i32 42 ; [#uses=0] br label %bb23830 bb23830: ; preds = %bb23827, %bb23821, %bb23816.preheader diff --git a/llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll b/llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll index 19faab66fa33c..a20aeac7a3a89 100644 --- a/llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll +++ b/llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll @@ -1,10 +1,10 @@ ; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 define fastcc void @glgVectorFloatConversion() nounwind { - %tmp12745 = load <4 x float>, <4 x float>* null, align 16 ; <<4 x float>> [#uses=1] + %tmp12745 = load <4 x float>, ptr null, align 16 ; <<4 x float>> [#uses=1] %tmp12773 = insertelement <4 x float> %tmp12745, float 1.000000e+00, i32 1 ; <<4 x float>> [#uses=1] %tmp12774 = insertelement <4 x float> %tmp12773, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1] %tmp12775 = insertelement <4 x float> %tmp12774, float 1.000000e+00, i32 3 ; <<4 x float>> [#uses=1] - store <4 x float> %tmp12775, <4 x float>* null, align 16 + store <4 x float> %tmp12775, ptr null, align 16 unreachable } diff --git a/llvm/test/CodeGen/X86/2008-05-12-tailmerge-5.ll b/llvm/test/CodeGen/X86/2008-05-12-tailmerge-5.ll index 4e17e996ca446..4014387677e37 100644 --- a/llvm/test/CodeGen/X86/2008-05-12-tailmerge-5.ll +++ b/llvm/test/CodeGen/X86/2008-05-12-tailmerge-5.ll @@ -56,45 +56,41 @@ define void @passing2(i64 %str.0, i64 %str.1, i16 signext %s, i32 %j, i8 signex ; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: callq _abort entry: - %str_addr = alloca %struct.BoundaryAlignment ; <%struct.BoundaryAlignment*> [#uses=7] - %s_addr = alloca i16 ; [#uses=1] - %j_addr = alloca i32 ; [#uses=2] - %c_addr = alloca i8 ; [#uses=2] - %t_addr = alloca i16 ; [#uses=2] - %u_addr = alloca i16 ; [#uses=2] - %d_addr = alloca i8 ; [#uses=2] + %str_addr = alloca %struct.BoundaryAlignment ; [#uses=7] + %s_addr = alloca i16 ; [#uses=1] + %j_addr = alloca i32 ; [#uses=2] + %c_addr = alloca i8 ; [#uses=2] + %t_addr = alloca i16 ; [#uses=2] + %u_addr = alloca i16 ; [#uses=2] + %d_addr = alloca i8 ; [#uses=2] %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] - %tmp = bitcast %struct.BoundaryAlignment* %str_addr to { i64, i64 }* ; <{ i64, i64 }*> [#uses=1] - %tmp1 = getelementptr { i64, i64 }, { i64, i64 }* %tmp, i32 0, i32 0 ; [#uses=1] - store i64 %str.0, i64* %tmp1 - %tmp2 = bitcast %struct.BoundaryAlignment* %str_addr to { i64, i64 }* ; <{ i64, i64 }*> [#uses=1] - %tmp3 = getelementptr { i64, i64 }, { i64, i64 }* %tmp2, i32 0, i32 1 ; [#uses=1] - %bc = bitcast i64* %tmp3 to i8* ; [#uses=2] + %tmp1 = getelementptr { i64, i64 }, ptr %str_addr, i32 0, i32 0 ; [#uses=1] + store i64 %str.0, ptr %tmp1 + %tmp3 = getelementptr { i64, i64 }, ptr %str_addr, i32 0, i32 1 ; [#uses=1] %byte = trunc i64 %str.1 to i8 ; [#uses=1] - store i8 %byte, i8* %bc + store i8 %byte, ptr %tmp3 %shft = lshr i64 %str.1, 8 ; [#uses=2] - %Loc = getelementptr i8, i8* %bc, i32 1 ; [#uses=2] + %Loc = getelementptr i8, ptr %tmp3, i32 1 ; [#uses=2] %byte4 = trunc i64 %shft to i8 ; [#uses=1] - store i8 %byte4, i8* %Loc + store i8 %byte4, ptr %Loc %shft5 = lshr i64 %shft, 8 ; [#uses=2] - %Loc6 = getelementptr i8, i8* %Loc, i32 1 ; [#uses=2] + %Loc6 = getelementptr i8, ptr %Loc, i32 1 ; [#uses=2] %byte7 = trunc i64 %shft5 to i8 ; [#uses=1] - store i8 %byte7, i8* %Loc6 + store i8 %byte7, ptr %Loc6 %shft8 = lshr i64 %shft5, 8 ; [#uses=2] - %Loc9 = getelementptr i8, i8* %Loc6, i32 1 ; [#uses=2] + %Loc9 = getelementptr i8, ptr %Loc6, i32 1 ; [#uses=2] %byte10 = trunc i64 %shft8 to i8 ; [#uses=1] - store i8 %byte10, i8* %Loc9 + store i8 %byte10, ptr %Loc9 %shft11 = lshr i64 %shft8, 8 ; [#uses=0] - %Loc12 = getelementptr i8, i8* %Loc9, i32 1 ; [#uses=0] - store i16 %s, i16* %s_addr - store i32 %j, i32* %j_addr - store i8 %c, i8* %c_addr - store i16 %t, i16* %t_addr - store i16 %u, i16* %u_addr - store i8 %d, i8* %d_addr - %tmp13 = getelementptr %struct.BoundaryAlignment, %struct.BoundaryAlignment* %str_addr, i32 0, i32 0 ; <[3 x i8]*> [#uses=1] - %tmp1314 = bitcast [3 x i8]* %tmp13 to i32* ; [#uses=1] - %tmp15 = load i32, i32* %tmp1314, align 4 ; [#uses=1] + %Loc12 = getelementptr i8, ptr %Loc9, i32 1 ; [#uses=0] + store i16 %s, ptr %s_addr + store i32 %j, ptr %j_addr + store i8 %c, ptr %c_addr + store i16 %t, ptr %t_addr + store i16 %u, ptr %u_addr + store i8 %d, ptr %d_addr + %tmp13 = getelementptr %struct.BoundaryAlignment, ptr %str_addr, i32 0, i32 0 ; [#uses=1] + %tmp15 = load i32, ptr %tmp13, align 4 ; [#uses=1] %tmp16 = shl i32 %tmp15, 14 ; [#uses=1] %tmp17 = ashr i32 %tmp16, 23 ; [#uses=1] %tmp1718 = trunc i32 %tmp17 to i16 ; [#uses=1] @@ -105,7 +101,7 @@ entry: %sextl21 = shl i16 %sextr, 7 ; [#uses=1] %sextr22 = ashr i16 %sextl21, 7 ; [#uses=1] %sextr2223 = sext i16 %sextr22 to i32 ; [#uses=1] - %tmp24 = load i32, i32* %j_addr, align 4 ; [#uses=1] + %tmp24 = load i32, ptr %j_addr, align 4 ; [#uses=1] %tmp25 = icmp ne i32 %sextr2223, %tmp24 ; [#uses=1] %tmp2526 = zext i1 %tmp25 to i8 ; [#uses=1] %toBool = icmp ne i8 %tmp2526, 0 ; [#uses=1] @@ -116,9 +112,9 @@ bb: ; preds = %entry unreachable bb27: ; preds = %entry - %tmp28 = getelementptr %struct.BoundaryAlignment, %struct.BoundaryAlignment* %str_addr, i32 0, i32 1 ; [#uses=1] - %tmp29 = load i8, i8* %tmp28, align 4 ; [#uses=1] - %tmp30 = load i8, i8* %c_addr, align 1 ; [#uses=1] + %tmp28 = getelementptr %struct.BoundaryAlignment, ptr %str_addr, i32 0, i32 1 ; [#uses=1] + %tmp29 = load i8, ptr %tmp28, align 4 ; [#uses=1] + %tmp30 = load i8, ptr %c_addr, align 1 ; [#uses=1] %tmp31 = icmp ne i8 %tmp29, %tmp30 ; [#uses=1] %tmp3132 = zext i1 %tmp31 to i8 ; [#uses=1] %toBool33 = icmp ne i8 %tmp3132, 0 ; [#uses=1] @@ -129,8 +125,8 @@ bb34: ; preds = %bb27 unreachable bb35: ; preds = %bb27 - %tmp36 = getelementptr %struct.BoundaryAlignment, %struct.BoundaryAlignment* %str_addr, i32 0, i32 2 ; [#uses=1] - %tmp37 = load i16, i16* %tmp36, align 4 ; [#uses=1] + %tmp36 = getelementptr %struct.BoundaryAlignment, ptr %str_addr, i32 0, i32 2 ; [#uses=1] + %tmp37 = load i16, ptr %tmp36, align 4 ; [#uses=1] %tmp38 = shl i16 %tmp37, 7 ; [#uses=1] %tmp39 = ashr i16 %tmp38, 7 ; [#uses=1] %sextl40 = shl i16 %tmp39, 7 ; [#uses=1] @@ -139,7 +135,7 @@ bb35: ; preds = %bb27 %sextr43 = ashr i16 %sextl42, 7 ; [#uses=0] %sextl44 = shl i16 %sextr41, 7 ; [#uses=1] %sextr45 = ashr i16 %sextl44, 7 ; [#uses=1] - %tmp46 = load i16, i16* %t_addr, align 2 ; [#uses=1] + %tmp46 = load i16, ptr %t_addr, align 2 ; [#uses=1] %tmp47 = icmp ne i16 %sextr45, %tmp46 ; [#uses=1] %tmp4748 = zext i1 %tmp47 to i8 ; [#uses=1] %toBool49 = icmp ne i8 %tmp4748, 0 ; [#uses=1] @@ -150,8 +146,8 @@ bb50: ; preds = %bb35 unreachable bb51: ; preds = %bb35 - %tmp52 = getelementptr %struct.BoundaryAlignment, %struct.BoundaryAlignment* %str_addr, i32 0, i32 3 ; [#uses=1] - %tmp53 = load i16, i16* %tmp52, align 4 ; [#uses=1] + %tmp52 = getelementptr %struct.BoundaryAlignment, ptr %str_addr, i32 0, i32 3 ; [#uses=1] + %tmp53 = load i16, ptr %tmp52, align 4 ; [#uses=1] %tmp54 = shl i16 %tmp53, 7 ; [#uses=1] %tmp55 = ashr i16 %tmp54, 7 ; [#uses=1] %sextl56 = shl i16 %tmp55, 7 ; [#uses=1] @@ -160,7 +156,7 @@ bb51: ; preds = %bb35 %sextr59 = ashr i16 %sextl58, 7 ; [#uses=0] %sextl60 = shl i16 %sextr57, 7 ; [#uses=1] %sextr61 = ashr i16 %sextl60, 7 ; [#uses=1] - %tmp62 = load i16, i16* %u_addr, align 2 ; [#uses=1] + %tmp62 = load i16, ptr %u_addr, align 2 ; [#uses=1] %tmp63 = icmp ne i16 %sextr61, %tmp62 ; [#uses=1] %tmp6364 = zext i1 %tmp63 to i8 ; [#uses=1] %toBool65 = icmp ne i8 %tmp6364, 0 ; [#uses=1] @@ -171,9 +167,9 @@ bb66: ; preds = %bb51 unreachable bb67: ; preds = %bb51 - %tmp68 = getelementptr %struct.BoundaryAlignment, %struct.BoundaryAlignment* %str_addr, i32 0, i32 4 ; [#uses=1] - %tmp69 = load i8, i8* %tmp68, align 4 ; [#uses=1] - %tmp70 = load i8, i8* %d_addr, align 1 ; [#uses=1] + %tmp68 = getelementptr %struct.BoundaryAlignment, ptr %str_addr, i32 0, i32 4 ; [#uses=1] + %tmp69 = load i8, ptr %tmp68, align 4 ; [#uses=1] + %tmp70 = load i8, ptr %d_addr, align 1 ; [#uses=1] %tmp71 = icmp ne i8 %tmp69, %tmp70 ; [#uses=1] %tmp7172 = zext i1 %tmp71 to i8 ; [#uses=1] %toBool73 = icmp ne i8 %tmp7172, 0 ; [#uses=1] diff --git a/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll index 976e17e9b90bc..58d626f5866e7 100644 --- a/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll @@ -4,73 +4,73 @@ %llvm.dbg.anchor.type = type { i32, i32 } %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.VEC_basic_block_base = type { i32, i32, [1 x %struct.basic_block_def*] } + %struct.VEC_basic_block_base = type { i32, i32, [1 x ptr] } %struct.VEC_basic_block_gc = type { %struct.VEC_basic_block_base } - %struct.VEC_edge_base = type { i32, i32, [1 x %struct.edge_def*] } + %struct.VEC_edge_base = type { i32, i32, [1 x ptr] } %struct.VEC_edge_gc = type { %struct.VEC_edge_base } - %struct.VEC_rtx_base = type { i32, i32, [1 x %struct.rtx_def*] } + %struct.VEC_rtx_base = type { i32, i32, [1 x ptr] } %struct.VEC_rtx_gc = type { %struct.VEC_rtx_base } - %struct.VEC_temp_slot_p_base = type { i32, i32, [1 x %struct.temp_slot*] } + %struct.VEC_temp_slot_p_base = type { i32, i32, [1 x ptr] } %struct.VEC_temp_slot_p_gc = type { %struct.VEC_temp_slot_p_base } - %struct.VEC_tree_base = type { i32, i32, [1 x %struct.tree_node*] } + %struct.VEC_tree_base = type { i32, i32, [1 x ptr] } %struct.VEC_tree_gc = type { %struct.VEC_tree_base } - %struct.__sbuf = type { i8*, i32 } - %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] } - %struct.basic_block_def = type { %struct.tree_node*, %struct.VEC_edge_gc*, %struct.VEC_edge_gc*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_il_dependent, %struct.tree_node*, %struct.edge_prediction*, i64, i32, i32, i32, i32 } - %struct.basic_block_il_dependent = type { %struct.rtl_bb_info* } - %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] } - %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* } - %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack } - %struct.block_symbol = type { [3 x %struct.cfg_stats_d], %struct.object_block*, i64 } + %struct.__sbuf = type { ptr, i32 } + %struct._obstack_chunk = type { ptr, ptr, [4 x i8] } + %struct.basic_block_def = type { ptr, ptr, ptr, ptr, ptr, [2 x ptr], ptr, ptr, %struct.basic_block_il_dependent, ptr, ptr, i64, i32, i32, i32, i32 } + %struct.basic_block_il_dependent = type { ptr } + %struct.bitmap_element_def = type { ptr, ptr, i32, [4 x i32] } + %struct.bitmap_head_def = type { ptr, ptr, i32, ptr } + %struct.bitmap_obstack = type { ptr, ptr, %struct.obstack } + %struct.block_symbol = type { [3 x %struct.cfg_stats_d], ptr, i64 } %struct.cfg_stats_d = type { i32 } - %struct.control_flow_graph = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.VEC_basic_block_gc*, i32, i32, i32, %struct.VEC_basic_block_gc*, i32 } - %struct.def_optype_d = type { %struct.def_optype_d*, %struct.tree_node** } - %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.__sbuf*, i32, i32, i64, i32 } - %struct.edge_def_insns = type { %struct.rtx_def* } - %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 } + %struct.control_flow_graph = type { ptr, ptr, ptr, i32, i32, i32, ptr, i32 } + %struct.def_optype_d = type { ptr, ptr } + %struct.edge_def = type { ptr, ptr, %struct.edge_def_insns, ptr, ptr, i32, i32, i64, i32 } + %struct.edge_def_insns = type { ptr } + %struct.edge_prediction = type { ptr, ptr, i32, i32 } %struct.eh_status = type opaque - %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.__sbuf, i32, i8*, %struct.rtx_def** } + %struct.emit_status = type { i32, i32, ptr, ptr, ptr, i32, %struct.__sbuf, i32, ptr, ptr } %struct.et_node = type opaque - %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } - %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.control_flow_graph*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.VEC_temp_slot_p_gc*, %struct.temp_slot*, %struct.var_refs_queue*, i32, i32, i32, i32, %struct.machine_function*, i32, i32, %struct.language_function*, %struct.htab*, %struct.rtx_def*, i32, i32, i32, %struct.__sbuf, %struct.VEC_tree_gc*, %struct.tree_node*, i8*, i8*, i8*, i8*, i8*, %struct.tree_node*, i8, i8, i8, i8, i8, i8 } - %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i32, i32, i32, i32, i32, i8* (i32, i32)*, void (i8*)*, i8*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i32 } + %struct.expr_status = type { i32, i32, i32, ptr, ptr, ptr } + %struct.function = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, %struct.CUMULATIVE_ARGS, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i8, i32, i64, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, i32, i32, ptr, ptr, ptr, i32, i32, i32, %struct.__sbuf, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i8, i8, i8, i8, i8, i8 } + %struct.htab = type { ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 } %struct.initial_value_struct = type opaque %struct.lang_decl = type opaque %struct.language_function = type opaque - %struct.loop = type { i32, %struct.basic_block_def*, %struct.basic_block_def*, %llvm.dbg.anchor.type, i32, i32, i32, i32, %struct.loop**, i32, %struct.loop*, %struct.loop*, %struct.loop*, %struct.loop*, i8*, %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound*, %struct.edge_def*, i32 } + %struct.loop = type { i32, ptr, ptr, %llvm.dbg.anchor.type, i32, i32, i32, i32, ptr, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32 } %struct.machine_function = type opaque - %struct.maydef_optype_d = type { %struct.maydef_optype_d*, %struct.tree_node*, %struct.tree_node*, %struct.ssa_use_operand_d } - %struct.nb_iter_bound = type { %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound* } - %struct.object_block = type { %struct.section*, i32, i64, %struct.VEC_rtx_gc*, %struct.VEC_rtx_gc* } - %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 } - %struct.rtl_bb_info = type { %struct.rtx_def*, %struct.rtx_def*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, %struct.rtx_def*, %struct.rtx_def*, i32 } + %struct.maydef_optype_d = type { ptr, ptr, ptr, %struct.ssa_use_operand_d } + %struct.nb_iter_bound = type { ptr, ptr, ptr } + %struct.object_block = type { ptr, i32, i64, ptr, ptr } + %struct.obstack = type { i32, ptr, ptr, ptr, ptr, i32, i32, ptr, ptr, ptr, i8 } + %struct.rtl_bb_info = type { ptr, ptr, ptr, ptr, ptr, ptr, i32 } %struct.rtx_def = type { i16, i8, i8, %struct.u } %struct.section = type { %struct.unnamed_section } - %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } - %struct.ssa_use_operand_d = type { %struct.ssa_use_operand_d*, %struct.ssa_use_operand_d*, %struct.tree_node*, %struct.tree_node** } - %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.bitmap_head_def*, i32, i8* } - %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.use_optype_d*, %struct.maydef_optype_d*, %struct.vuse_optype_d*, %struct.maydef_optype_d* } + %struct.sequence_stack = type { ptr, ptr, ptr } + %struct.ssa_use_operand_d = type { ptr, ptr, ptr, ptr } + %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, ptr, %struct.stmt_operands_d, ptr, i32, ptr } + %struct.stmt_operands_d = type { ptr, ptr, ptr, ptr, ptr } %struct.temp_slot = type opaque - %struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* } + %struct.tree_ann_common_d = type { i32, ptr, ptr } %struct.tree_ann_d = type { %struct.stmt_ann_d } - %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 } - %struct.tree_decl_common = type { %struct.tree_decl_minimal, %struct.tree_node*, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* } - %struct.tree_decl_minimal = type { %struct.tree_common, %struct.__sbuf, i32, %struct.tree_node*, %struct.tree_node* } - %struct.tree_decl_non_common = type { %struct.tree_decl_with_vis, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* } + %struct.tree_common = type { ptr, ptr, ptr, i8, i8, i8, i8, i8 } + %struct.tree_decl_common = type { %struct.tree_decl_minimal, ptr, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, ptr, ptr, ptr, ptr, i64, ptr } + %struct.tree_decl_minimal = type { %struct.tree_common, %struct.__sbuf, i32, ptr, ptr } + %struct.tree_decl_non_common = type { %struct.tree_decl_with_vis, ptr, ptr, ptr, ptr } %struct.tree_decl_u1 = type { i64 } - %struct.tree_decl_with_rtl = type { %struct.tree_decl_common, %struct.rtx_def*, i32 } - %struct.tree_decl_with_vis = type { %struct.tree_decl_with_rtl, %struct.tree_node*, %struct.tree_node*, i8, i8, i8 } - %struct.tree_function_decl = type { %struct.tree_decl_non_common, i8, i8, i64, %struct.function* } + %struct.tree_decl_with_rtl = type { %struct.tree_decl_common, ptr, i32 } + %struct.tree_decl_with_vis = type { %struct.tree_decl_with_rtl, ptr, ptr, i8, i8, i8 } + %struct.tree_function_decl = type { %struct.tree_decl_non_common, i8, i8, i64, ptr } %struct.tree_node = type { %struct.tree_function_decl } %struct.u = type { %struct.block_symbol } - %struct.unnamed_section = type { %struct.cfg_stats_d, void (i8*)*, i8*, %struct.section* } - %struct.use_optype_d = type { %struct.use_optype_d*, %struct.ssa_use_operand_d } - %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* } + %struct.unnamed_section = type { %struct.cfg_stats_d, ptr, ptr, ptr } + %struct.use_optype_d = type { ptr, %struct.ssa_use_operand_d } + %struct.var_refs_queue = type { ptr, i32, i32, ptr } %struct.varasm_status = type opaque - %struct.vuse_optype_d = type { %struct.vuse_optype_d*, %struct.tree_node*, %struct.ssa_use_operand_d } -@llvm.used = appending global [1 x i8*] [ i8* bitcast (%struct.edge_def* (%struct.edge_def*, %struct.basic_block_def*)* @tree_redirect_edge_and_branch to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] + %struct.vuse_optype_d = type { ptr, ptr, %struct.ssa_use_operand_d } +@llvm.used = appending global [1 x ptr] [ ptr @tree_redirect_edge_and_branch ], section "llvm.metadata" ; [#uses=0] -define %struct.edge_def* @tree_redirect_edge_and_branch(%struct.edge_def* %e1, %struct.basic_block_def* %dest2) nounwind { +define ptr @tree_redirect_edge_and_branch(ptr %e1, ptr %dest2) nounwind { ; CHECK-LABEL: tree_redirect_edge_and_branch: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: pushl %esi @@ -102,12 +102,12 @@ entry: br label %bb497 bb483: ; preds = %bb497 - %tmp496 = load %struct.tree_node*, %struct.tree_node** null, align 4 ; <%struct.tree_node*> [#uses=1] + %tmp496 = load ptr, ptr null, align 4 ; [#uses=1] br label %bb497 bb497: ; preds = %bb483, %entry - %cases.0 = phi %struct.tree_node* [ %tmp496, %bb483 ], [ null, %entry ] ; <%struct.tree_node*> [#uses=1] - %last.0 = phi %struct.tree_node* [ %cases.0, %bb483 ], [ undef, %entry ] ; <%struct.tree_node*> [#uses=1] + %cases.0 = phi ptr [ %tmp496, %bb483 ], [ null, %entry ] ; [#uses=1] + %last.0 = phi ptr [ %cases.0, %bb483 ], [ undef, %entry ] ; [#uses=1] %foo = phi i1 [ 0, %bb483 ], [ 1, %entry ] br i1 %foo, label %bb483, label %bb502 @@ -115,10 +115,9 @@ bb502: ; preds = %bb497 br i1 %foo, label %bb507, label %bb841 bb507: ; preds = %bb502 - %tmp517 = getelementptr %struct.tree_node, %struct.tree_node* %last.0, i32 0, i32 0 ; <%struct.tree_function_decl*> [#uses=1] - %tmp517518 = bitcast %struct.tree_function_decl* %tmp517 to %struct.tree_common* ; <%struct.tree_common*> [#uses=1] - %tmp519 = getelementptr %struct.tree_common, %struct.tree_common* %tmp517518, i32 0, i32 0 ; <%struct.tree_node**> [#uses=1] - store %struct.tree_node* null, %struct.tree_node** %tmp519, align 4 + %tmp517 = getelementptr %struct.tree_node, ptr %last.0, i32 0, i32 0 ; [#uses=1] + %tmp519 = getelementptr %struct.tree_common, ptr %tmp517, i32 0, i32 0 ; [#uses=1] + store ptr null, ptr %tmp519, align 4 br label %bb841 bb841: ; preds = %bb507, %bb502 diff --git a/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll b/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll index 9c3ab06d8cab0..5383268ef532d 100644 --- a/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll +++ b/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll @@ -1,10 +1,10 @@ ; RUN: llc < %s -mtriple=i686-- -mcpu=penryn | FileCheck %s -define void @a(<4 x float>* %x) nounwind { +define void @a(ptr %x) nounwind { entry: - %tmp2 = load <4 x float>, <4 x float>* %x, align 1 + %tmp2 = load <4 x float>, ptr %x, align 1 %inv = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %tmp2) - store <4 x float> %inv, <4 x float>* %x, align 1 + store <4 x float> %inv, ptr %x, align 1 ret void } diff --git a/llvm/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll b/llvm/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll index 7ddedacbabd9b..dcce33b0bf307 100644 --- a/llvm/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll +++ b/llvm/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll @@ -1,12 +1,12 @@ ; RUN: llc < %s -mtriple=i386-apple-darwin -regalloc=fast -optimize-regalloc=0 -@_ZTVN10Evaluation10GridOutputILi3EEE = external constant [5 x i32 (...)*] ; <[5 x i32 (...)*]*> [#uses=1] +@_ZTVN10Evaluation10GridOutputILi3EEE = external constant [5 x ptr] ; [#uses=1] -declare i8* @_Znwm(i32) +declare ptr @_Znwm(i32) -declare i8* @__cxa_begin_catch(i8*) nounwind +declare ptr @__cxa_begin_catch(ptr) nounwind -define i32 @main(i32 %argc, i8** %argv) personality i32 (...)* @__gxx_personality_v0 { +define i32 @main(i32 %argc, ptr %argv) personality ptr @__gxx_personality_v0 { entry: br i1 false, label %bb37, label %bb34 @@ -14,18 +14,18 @@ bb34: ; preds = %entry ret i32 1 bb37: ; preds = %entry - %tmp12.i.i.i.i.i66 = invoke i8* @_Znwm( i32 12 ) - to label %tmp12.i.i.i.i.i.noexc65 unwind label %lpad243 ; [#uses=0] + %tmp12.i.i.i.i.i66 = invoke ptr @_Znwm( i32 12 ) + to label %tmp12.i.i.i.i.i.noexc65 unwind label %lpad243 ; [#uses=0] tmp12.i.i.i.i.i.noexc65: ; preds = %bb37 unreachable lpad243: ; preds = %bb37 - %exn = landingpad {i8*, i32} + %exn = landingpad {ptr, i32} cleanup - %eh_ptr244 = extractvalue { i8*, i32 } %exn, 0 - store i32 (...)** getelementptr ([5 x i32 (...)*], [5 x i32 (...)*]* @_ZTVN10Evaluation10GridOutputILi3EEE, i32 0, i32 2), i32 (...)*** null, align 8 - %tmp133 = call i8* @__cxa_begin_catch( i8* %eh_ptr244 ) nounwind ; [#uses=0] + %eh_ptr244 = extractvalue { ptr, i32 } %exn, 0 + store ptr getelementptr ([5 x ptr], ptr @_ZTVN10Evaluation10GridOutputILi3EEE, i32 0, i32 2), ptr null, align 8 + %tmp133 = call ptr @__cxa_begin_catch( ptr %eh_ptr244 ) nounwind ; [#uses=0] unreachable } diff --git a/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll b/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll index e2b2af2ebb0c8..de3da956cd5a2 100644 --- a/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll +++ b/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll @@ -8,18 +8,18 @@ ; BWON: movzwl ; CHECK: addw -@atomic = global double 0.000000e+00 ; [#uses=1] -@atomic2 = global double 0.000000e+00 ; [#uses=1] -@ioport = global i32 0 ; [#uses=1] -@ioport2 = global i32 0 ; [#uses=1] +@atomic = global double 0.000000e+00 ; [#uses=1] +@atomic2 = global double 0.000000e+00 ; [#uses=1] +@ioport = global i32 0 ; [#uses=1] +@ioport2 = global i32 0 ; [#uses=1] define i16 @f(i64 %x) { %b = bitcast i64 %x to double ; [#uses=1] - store double %b, double* @atomic - store double 0.000000e+00, double* @atomic2 - %l = load i32, i32* @ioport ; [#uses=1] + store double %b, ptr @atomic + store double 0.000000e+00, ptr @atomic2 + %l = load i32, ptr @ioport ; [#uses=1] %t = trunc i32 %l to i16 ; [#uses=1] - %l2 = load i32, i32* @ioport2 ; [#uses=1] + %l2 = load i32, ptr @ioport2 ; [#uses=1] %tmp = lshr i32 %l2, 16 ; [#uses=1] %t2 = trunc i32 %tmp to i16 ; [#uses=1] %f = add i16 %t, %t2 ; [#uses=1] diff --git a/llvm/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll b/llvm/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll index e9059c0c6232c..bf309f0156684 100644 --- a/llvm/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll +++ b/llvm/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll @@ -1,10 +1,10 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | FileCheck %s -@atomic = global double 0.000000e+00 ; [#uses=1] -@atomic2 = global double 0.000000e+00 ; [#uses=1] -@anything = global i64 0 ; [#uses=1] -@ioport = global i32 0 ; [#uses=2] +@atomic = global double 0.000000e+00 ; [#uses=1] +@atomic2 = global double 0.000000e+00 ; [#uses=1] +@anything = global i64 0 ; [#uses=1] +@ioport = global i32 0 ; [#uses=2] define i16 @f(i64 %x, double %y) { ; CHECK-LABEL: f: @@ -22,13 +22,13 @@ define i16 @f(i64 %x, double %y) { ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax ; CHECK-NEXT: retl %b = bitcast i64 %x to double ; [#uses=1] - store volatile double %b, double* @atomic ; one processor operation only - store volatile double 0.000000e+00, double* @atomic2 ; one processor operation only + store volatile double %b, ptr @atomic ; one processor operation only + store volatile double 0.000000e+00, ptr @atomic2 ; one processor operation only %b2 = bitcast double %y to i64 ; [#uses=1] - store volatile i64 %b2, i64* @anything ; may transform to store of double - %l = load volatile i32, i32* @ioport ; must not narrow + store volatile i64 %b2, ptr @anything ; may transform to store of double + %l = load volatile i32, ptr @ioport ; must not narrow %t = trunc i32 %l to i16 ; [#uses=1] - %l2 = load volatile i32, i32* @ioport ; must not narrow + %l2 = load volatile i32, ptr @ioport ; must not narrow %tmp = lshr i32 %l2, 16 ; [#uses=1] %t2 = trunc i32 %tmp to i16 ; [#uses=1] %f = add i16 %t, %t2 ; [#uses=1] diff --git a/llvm/test/CodeGen/X86/2008-06-16-SubregsBug.ll b/llvm/test/CodeGen/X86/2008-06-16-SubregsBug.ll index c56be8314dd8e..feaa38a7600a2 100644 --- a/llvm/test/CodeGen/X86/2008-06-16-SubregsBug.ll +++ b/llvm/test/CodeGen/X86/2008-06-16-SubregsBug.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s -define i16 @test(i16* %tmp179) nounwind { +define i16 @test(ptr %tmp179) nounwind { ; CHECK-LABEL: test: ; CHECK: ## %bb.0: ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax @@ -16,7 +16,7 @@ define i16 @test(i16* %tmp179) nounwind { ; CHECK-NEXT: LBB0_2: ## %bb288 ; CHECK-NEXT: movw $32, %ax ; CHECK-NEXT: retl - %tmp180 = load i16, i16* %tmp179, align 2 ; [#uses=2] + %tmp180 = load i16, ptr %tmp179, align 2 ; [#uses=2] %tmp184 = and i16 %tmp180, -1024 ; [#uses=1] %tmp186 = icmp eq i16 %tmp184, -32768 ; [#uses=1] br i1 %tmp186, label %bb189, label %bb288 diff --git a/llvm/test/CodeGen/X86/2008-06-25-VecISelBug.ll b/llvm/test/CodeGen/X86/2008-06-25-VecISelBug.ll index 35140a211421c..d56f526cd156a 100644 --- a/llvm/test/CodeGen/X86/2008-06-25-VecISelBug.ll +++ b/llvm/test/CodeGen/X86/2008-06-25-VecISelBug.ll @@ -9,6 +9,6 @@ define void @t() nounwind { entry: %tmp1 = shufflevector <4 x float> zeroinitializer, <4 x float> < float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00 >, <4 x i32> < i32 0, i32 1, i32 4, i32 5 > %tmp2 = insertelement <4 x float> %tmp1, float 1.000000e+00, i32 3 - store <4 x float> %tmp2, <4 x float>* null, align 16 + store <4 x float> %tmp2, ptr null, align 16 unreachable } diff --git a/llvm/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll b/llvm/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll index c92768c91d79b..440452bdfc061 100644 --- a/llvm/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll +++ b/llvm/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll @@ -1,12 +1,12 @@ ; RUN: llc < %s -mtriple=i386-apple-darwin9 - %struct.ogg_stream_state = type { i8*, i32, i32, i32, i32*, i64*, i32, i32, i32, i32, [282 x i8], i32, i32, i32, i32, i32, i64, i64 } - %struct.res_state = type { i32, i32, i32, i32, float*, float*, i32, i32 } - %struct.vorbis_comment = type { i8**, i32*, i32, i8* } + %struct.ogg_stream_state = type { ptr, i32, i32, i32, ptr, ptr, i32, i32, i32, i32, [282 x i8], i32, i32, i32, i32, i32, i64, i64 } + %struct.res_state = type { i32, i32, i32, i32, ptr, ptr, i32, i32 } + %struct.vorbis_comment = type { ptr, ptr, i32, ptr } -declare i32 @strlen(i8*) nounwind readonly +declare i32 @strlen(ptr) nounwind readonly -define i32 @res_init(%struct.res_state* %state, i32 %channels, i32 %outfreq, i32 %infreq, i32 %op1, ...) nounwind { +define i32 @res_init(ptr %state, i32 %channels, i32 %outfreq, i32 %infreq, i32 %op1, ...) nounwind { entry: br i1 false, label %bb95, label %bb @@ -27,28 +27,28 @@ bb39: ; preds = %bb39, %bb40.preheader br i1 false, label %bb39, label %bb49.outer bb49.outer: ; preds = %bb39, %bb40.preheader - getelementptr %struct.res_state, %struct.res_state* %state, i32 0, i32 3 ; :1 [#uses=0] - getelementptr %struct.res_state, %struct.res_state* %state, i32 0, i32 7 ; :2 [#uses=0] - %base10.1 = select i1 false, float* null, float* null ; [#uses=1] + getelementptr %struct.res_state, ptr %state, i32 0, i32 3 ; :1 [#uses=0] + getelementptr %struct.res_state, ptr %state, i32 0, i32 7 ; :2 [#uses=0] + %base10.1 = select i1 false, ptr null, ptr null ; [#uses=1] br label %bb74 bb69: ; preds = %bb74 br label %bb71 bb71: ; preds = %bb74, %bb69 - store float 0.000000e+00, float* null, align 4 + store float 0.000000e+00, ptr null, align 4 add i32 0, 1 ; :3 [#uses=1] %indvar.next137 = add i32 %indvar136, 1 ; [#uses=1] br i1 false, label %bb74, label %bb73 bb73: ; preds = %bb71 %.rec = add i32 %base10.2.ph.rec, 1 ; [#uses=2] - getelementptr float, float* %base10.1, i32 %.rec ; :4 [#uses=1] + getelementptr float, ptr %base10.1, i32 %.rec ; :4 [#uses=1] br label %bb74 bb74: ; preds = %bb73, %bb71, %bb49.outer %N13.1.ph = phi i32 [ 0, %bb49.outer ], [ 0, %bb73 ], [ %N13.1.ph, %bb71 ] ; [#uses=1] - %dest12.2.ph = phi float* [ null, %bb49.outer ], [ %4, %bb73 ], [ %dest12.2.ph, %bb71 ] ; [#uses=1] + %dest12.2.ph = phi ptr [ null, %bb49.outer ], [ %4, %bb73 ], [ %dest12.2.ph, %bb71 ] ; [#uses=1] %x8.0.ph = phi i32 [ 0, %bb49.outer ], [ %3, %bb73 ], [ %x8.0.ph, %bb71 ] ; [#uses=1] %base10.2.ph.rec = phi i32 [ 0, %bb49.outer ], [ %.rec, %bb73 ], [ %base10.2.ph.rec, %bb71 ] ; [#uses=2] %indvar136 = phi i32 [ %indvar.next137, %bb71 ], [ 0, %bb73 ], [ 0, %bb49.outer ] ; [#uses=1] @@ -58,12 +58,12 @@ bb95: ; preds = %bb, %entry ret i32 -1 } -define i32 @read_resampled(i8* %d, float** %buffer, i32 %samples) nounwind { +define i32 @read_resampled(ptr %d, ptr %buffer, i32 %samples) nounwind { entry: br i1 false, label %bb17.preheader, label %bb30 bb17.preheader: ; preds = %entry - load i32, i32* null, align 4 ; :0 [#uses=0] + load i32, ptr null, align 4 ; :0 [#uses=0] br label %bb16 bb16: ; preds = %bb16, %bb17.preheader @@ -76,24 +76,24 @@ bb30: ; preds = %entry ret i32 0 } -define i32 @ogg_stream_reset_serialno(%struct.ogg_stream_state* %os, i32 %serialno) nounwind { +define i32 @ogg_stream_reset_serialno(ptr %os, i32 %serialno) nounwind { entry: unreachable } -define void @vorbis_lsp_to_curve(float* %curve, i32* %map, i32 %n, i32 %ln, float* %lsp, i32 %m, float %amp, float %ampoffset) nounwind { +define void @vorbis_lsp_to_curve(ptr %curve, ptr %map, i32 %n, i32 %ln, ptr %lsp, i32 %m, float %amp, float %ampoffset) nounwind { entry: unreachable } -define i32 @vorbis_comment_query_count(%struct.vorbis_comment* %vc, i8* %tag) nounwind { +define i32 @vorbis_comment_query_count(ptr %vc, ptr %tag) nounwind { entry: - %strlen = call i32 @strlen( i8* null ) ; [#uses=1] - %endptr = getelementptr i8, i8* null, i32 %strlen ; [#uses=0] + %strlen = call i32 @strlen( ptr null ) ; [#uses=1] + %endptr = getelementptr i8, ptr null, i32 %strlen ; [#uses=0] unreachable } -define fastcc i32 @push(%struct.res_state* %state, float* %pool, i32* %poolfill, i32* %offset, float* %dest, i32 %dststep, float* %source, i32 %srcstep, i32 %srclen) nounwind { +define fastcc i32 @push(ptr %state, ptr %pool, ptr %poolfill, ptr %offset, ptr %dest, i32 %dststep, ptr %source, i32 %srcstep, i32 %srclen) nounwind { entry: unreachable } diff --git a/llvm/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll b/llvm/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll index a1b9d9d5ab938..91b9c1c816eaf 100644 --- a/llvm/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll +++ b/llvm/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll @@ -1,18 +1,18 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin - %struct.SV = type { i8*, i64, i64 } -@"\01LC25" = external constant [8 x i8] ; <[8 x i8]*> [#uses=1] + %struct.SV = type { ptr, i64, i64 } +@"\01LC25" = external constant [8 x i8] ; [#uses=1] -declare void @Perl_sv_catpvf(%struct.SV*, i8*, ...) nounwind +declare void @Perl_sv_catpvf(ptr, ptr, ...) nounwind -declare fastcc i64 @Perl_utf8n_to_uvuni(i8*, i64, i64*, i64) nounwind +declare fastcc i64 @Perl_utf8n_to_uvuni(ptr, i64, ptr, i64) nounwind -define fastcc i8* @Perl_pv_uni_display(%struct.SV* %dsv, i8* %spv, i64 %len, i64 %pvlim, i64 %flags) nounwind { +define fastcc ptr @Perl_pv_uni_display(ptr %dsv, ptr %spv, i64 %len, i64 %pvlim, i64 %flags) nounwind { entry: br i1 false, label %bb, label %bb40 bb: ; preds = %entry - tail call fastcc i64 @Perl_utf8n_to_uvuni( i8* null, i64 13, i64* null, i64 255 ) nounwind ; :0 [#uses=1] + tail call fastcc i64 @Perl_utf8n_to_uvuni( ptr null, i64 13, ptr null, i64 255 ) nounwind ; :0 [#uses=1] br i1 false, label %bb6, label %bb33 bb6: ; preds = %bb @@ -26,9 +26,9 @@ bb31: ; preds = %bb6 br label %bb33 bb33: ; preds = %bb31, %bb - tail call void (%struct.SV*, i8*, ...) @Perl_sv_catpvf( %struct.SV* %dsv, i8* getelementptr ([8 x i8], [8 x i8]* @"\01LC25", i32 0, i64 0), i64 %0 ) nounwind + tail call void (ptr, ptr, ...) @Perl_sv_catpvf( ptr %dsv, ptr @"\01LC25", i64 %0 ) nounwind unreachable bb40: ; preds = %entry - ret i8* null + ret ptr null } diff --git a/llvm/test/CodeGen/X86/2008-07-19-movups-spills.ll b/llvm/test/CodeGen/X86/2008-07-19-movups-spills.ll index 58376c410f346..01ebca1f4bf1d 100644 --- a/llvm/test/CodeGen/X86/2008-07-19-movups-spills.ll +++ b/llvm/test/CodeGen/X86/2008-07-19-movups-spills.ll @@ -4,38 +4,38 @@ ; Verify that movups is still generated with an aligned stack for the globals ; that must be accessed unaligned -@0 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:0 [#uses=2] -@1 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:1 [#uses=1] -@2 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:2 [#uses=1] -@3 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:3 [#uses=1] -@4 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:4 [#uses=1] -@5 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:5 [#uses=1] -@6 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:6 [#uses=1] -@7 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:7 [#uses=1] -@8 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:8 [#uses=1] -@9 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:9 [#uses=1] -@10 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:10 [#uses=1] -@11 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:11 [#uses=1] -@12 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:12 [#uses=1] -@13 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:13 [#uses=1] -@14 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:14 [#uses=1] -@15 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:15 [#uses=1] -@16 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:16 [#uses=1] -@17 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:17 [#uses=1] -@18 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:18 [#uses=1] -@19 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:19 [#uses=1] -@20 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:20 [#uses=1] -@21 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:21 [#uses=1] -@22 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:22 [#uses=1] -@23 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:23 [#uses=1] -@24 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:24 [#uses=1] -@25 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:25 [#uses=1] -@26 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:26 [#uses=1] -@27 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:27 [#uses=1] -@28 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:28 [#uses=1] -@29 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:29 [#uses=1] -@30 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:30 [#uses=1] -@31 = external dso_local global <4 x float>, align 1 ; <<4 x float>*>:31 [#uses=1] +@0 = external dso_local global <4 x float>, align 1 ; :0 [#uses=2] +@1 = external dso_local global <4 x float>, align 1 ; :1 [#uses=1] +@2 = external dso_local global <4 x float>, align 1 ; :2 [#uses=1] +@3 = external dso_local global <4 x float>, align 1 ; :3 [#uses=1] +@4 = external dso_local global <4 x float>, align 1 ; :4 [#uses=1] +@5 = external dso_local global <4 x float>, align 1 ; :5 [#uses=1] +@6 = external dso_local global <4 x float>, align 1 ; :6 [#uses=1] +@7 = external dso_local global <4 x float>, align 1 ; :7 [#uses=1] +@8 = external dso_local global <4 x float>, align 1 ; :8 [#uses=1] +@9 = external dso_local global <4 x float>, align 1 ; :9 [#uses=1] +@10 = external dso_local global <4 x float>, align 1 ; :10 [#uses=1] +@11 = external dso_local global <4 x float>, align 1 ; :11 [#uses=1] +@12 = external dso_local global <4 x float>, align 1 ; :12 [#uses=1] +@13 = external dso_local global <4 x float>, align 1 ; :13 [#uses=1] +@14 = external dso_local global <4 x float>, align 1 ; :14 [#uses=1] +@15 = external dso_local global <4 x float>, align 1 ; :15 [#uses=1] +@16 = external dso_local global <4 x float>, align 1 ; :16 [#uses=1] +@17 = external dso_local global <4 x float>, align 1 ; :17 [#uses=1] +@18 = external dso_local global <4 x float>, align 1 ; :18 [#uses=1] +@19 = external dso_local global <4 x float>, align 1 ; :19 [#uses=1] +@20 = external dso_local global <4 x float>, align 1 ; :20 [#uses=1] +@21 = external dso_local global <4 x float>, align 1 ; :21 [#uses=1] +@22 = external dso_local global <4 x float>, align 1 ; :22 [#uses=1] +@23 = external dso_local global <4 x float>, align 1 ; :23 [#uses=1] +@24 = external dso_local global <4 x float>, align 1 ; :24 [#uses=1] +@25 = external dso_local global <4 x float>, align 1 ; :25 [#uses=1] +@26 = external dso_local global <4 x float>, align 1 ; :26 [#uses=1] +@27 = external dso_local global <4 x float>, align 1 ; :27 [#uses=1] +@28 = external dso_local global <4 x float>, align 1 ; :28 [#uses=1] +@29 = external dso_local global <4 x float>, align 1 ; :29 [#uses=1] +@30 = external dso_local global <4 x float>, align 1 ; :30 [#uses=1] +@31 = external dso_local global <4 x float>, align 1 ; :31 [#uses=1] declare void @abort() @@ -75,38 +75,38 @@ define void @test1() { ; CHECK: movups ; CHECK: movups ; CHECK-NOT: movups - load <4 x float>, <4 x float>* @0, align 1 ; <<4 x float>>:1 [#uses=2] - load <4 x float>, <4 x float>* @1, align 1 ; <<4 x float>>:2 [#uses=3] - load <4 x float>, <4 x float>* @2, align 1 ; <<4 x float>>:3 [#uses=4] - load <4 x float>, <4 x float>* @3, align 1 ; <<4 x float>>:4 [#uses=5] - load <4 x float>, <4 x float>* @4, align 1 ; <<4 x float>>:5 [#uses=6] - load <4 x float>, <4 x float>* @5, align 1 ; <<4 x float>>:6 [#uses=7] - load <4 x float>, <4 x float>* @6, align 1 ; <<4 x float>>:7 [#uses=8] - load <4 x float>, <4 x float>* @7, align 1 ; <<4 x float>>:8 [#uses=9] - load <4 x float>, <4 x float>* @8, align 1 ; <<4 x float>>:9 [#uses=10] - load <4 x float>, <4 x float>* @9, align 1 ; <<4 x float>>:10 [#uses=11] - load <4 x float>, <4 x float>* @10, align 1 ; <<4 x float>>:11 [#uses=12] - load <4 x float>, <4 x float>* @11, align 1 ; <<4 x float>>:12 [#uses=13] - load <4 x float>, <4 x float>* @12, align 1 ; <<4 x float>>:13 [#uses=14] - load <4 x float>, <4 x float>* @13, align 1 ; <<4 x float>>:14 [#uses=15] - load <4 x float>, <4 x float>* @14, align 1 ; <<4 x float>>:15 [#uses=16] - load <4 x float>, <4 x float>* @15, align 1 ; <<4 x float>>:16 [#uses=17] - load <4 x float>, <4 x float>* @16, align 1 ; <<4 x float>>:17 [#uses=18] - load <4 x float>, <4 x float>* @17, align 1 ; <<4 x float>>:18 [#uses=19] - load <4 x float>, <4 x float>* @18, align 1 ; <<4 x float>>:19 [#uses=20] - load <4 x float>, <4 x float>* @19, align 1 ; <<4 x float>>:20 [#uses=21] - load <4 x float>, <4 x float>* @20, align 1 ; <<4 x float>>:21 [#uses=22] - load <4 x float>, <4 x float>* @21, align 1 ; <<4 x float>>:22 [#uses=23] - load <4 x float>, <4 x float>* @22, align 1 ; <<4 x float>>:23 [#uses=24] - load <4 x float>, <4 x float>* @23, align 1 ; <<4 x float>>:24 [#uses=25] - load <4 x float>, <4 x float>* @24, align 1 ; <<4 x float>>:25 [#uses=26] - load <4 x float>, <4 x float>* @25, align 1 ; <<4 x float>>:26 [#uses=27] - load <4 x float>, <4 x float>* @26, align 1 ; <<4 x float>>:27 [#uses=28] - load <4 x float>, <4 x float>* @27, align 1 ; <<4 x float>>:28 [#uses=29] - load <4 x float>, <4 x float>* @28, align 1 ; <<4 x float>>:29 [#uses=30] - load <4 x float>, <4 x float>* @29, align 1 ; <<4 x float>>:30 [#uses=31] - load <4 x float>, <4 x float>* @30, align 1 ; <<4 x float>>:31 [#uses=32] - load <4 x float>, <4 x float>* @31, align 1 ; <<4 x float>>:32 [#uses=33] + load <4 x float>, ptr @0, align 1 ; <<4 x float>>:1 [#uses=2] + load <4 x float>, ptr @1, align 1 ; <<4 x float>>:2 [#uses=3] + load <4 x float>, ptr @2, align 1 ; <<4 x float>>:3 [#uses=4] + load <4 x float>, ptr @3, align 1 ; <<4 x float>>:4 [#uses=5] + load <4 x float>, ptr @4, align 1 ; <<4 x float>>:5 [#uses=6] + load <4 x float>, ptr @5, align 1 ; <<4 x float>>:6 [#uses=7] + load <4 x float>, ptr @6, align 1 ; <<4 x float>>:7 [#uses=8] + load <4 x float>, ptr @7, align 1 ; <<4 x float>>:8 [#uses=9] + load <4 x float>, ptr @8, align 1 ; <<4 x float>>:9 [#uses=10] + load <4 x float>, ptr @9, align 1 ; <<4 x float>>:10 [#uses=11] + load <4 x float>, ptr @10, align 1 ; <<4 x float>>:11 [#uses=12] + load <4 x float>, ptr @11, align 1 ; <<4 x float>>:12 [#uses=13] + load <4 x float>, ptr @12, align 1 ; <<4 x float>>:13 [#uses=14] + load <4 x float>, ptr @13, align 1 ; <<4 x float>>:14 [#uses=15] + load <4 x float>, ptr @14, align 1 ; <<4 x float>>:15 [#uses=16] + load <4 x float>, ptr @15, align 1 ; <<4 x float>>:16 [#uses=17] + load <4 x float>, ptr @16, align 1 ; <<4 x float>>:17 [#uses=18] + load <4 x float>, ptr @17, align 1 ; <<4 x float>>:18 [#uses=19] + load <4 x float>, ptr @18, align 1 ; <<4 x float>>:19 [#uses=20] + load <4 x float>, ptr @19, align 1 ; <<4 x float>>:20 [#uses=21] + load <4 x float>, ptr @20, align 1 ; <<4 x float>>:21 [#uses=22] + load <4 x float>, ptr @21, align 1 ; <<4 x float>>:22 [#uses=23] + load <4 x float>, ptr @22, align 1 ; <<4 x float>>:23 [#uses=24] + load <4 x float>, ptr @23, align 1 ; <<4 x float>>:24 [#uses=25] + load <4 x float>, ptr @24, align 1 ; <<4 x float>>:25 [#uses=26] + load <4 x float>, ptr @25, align 1 ; <<4 x float>>:26 [#uses=27] + load <4 x float>, ptr @26, align 1 ; <<4 x float>>:27 [#uses=28] + load <4 x float>, ptr @27, align 1 ; <<4 x float>>:28 [#uses=29] + load <4 x float>, ptr @28, align 1 ; <<4 x float>>:29 [#uses=30] + load <4 x float>, ptr @29, align 1 ; <<4 x float>>:30 [#uses=31] + load <4 x float>, ptr @30, align 1 ; <<4 x float>>:31 [#uses=32] + load <4 x float>, ptr @31, align 1 ; <<4 x float>>:32 [#uses=33] fmul <4 x float> %1, %1 ; <<4 x float>>:33 [#uses=1] fmul <4 x float> %33, %2 ; <<4 x float>>:34 [#uses=1] fmul <4 x float> %34, %3 ; <<4 x float>>:35 [#uses=1] @@ -668,7 +668,7 @@ define void @test1() { fadd <4 x float> %590, %557 ; <<4 x float>>:591 [#uses=1] fadd <4 x float> %591, %559 ; <<4 x float>>:592 [#uses=1] fadd <4 x float> %592, %560 ; <<4 x float>>:593 [#uses=1] - store <4 x float> %593, <4 x float>* @0, align 1 + store <4 x float> %593, ptr @0, align 1 ret void } @@ -708,38 +708,38 @@ define void @test2() "no-realign-stack" { ; CHECK: movups ; CHECK: movups ; CHECK-NOT: movups - load <4 x float>, <4 x float>* @0, align 1 - load <4 x float>, <4 x float>* @1, align 1 - load <4 x float>, <4 x float>* @2, align 1 - load <4 x float>, <4 x float>* @3, align 1 - load <4 x float>, <4 x float>* @4, align 1 - load <4 x float>, <4 x float>* @5, align 1 - load <4 x float>, <4 x float>* @6, align 1 - load <4 x float>, <4 x float>* @7, align 1 - load <4 x float>, <4 x float>* @8, align 1 - load <4 x float>, <4 x float>* @9, align 1 - load <4 x float>, <4 x float>* @10, align 1 - load <4 x float>, <4 x float>* @11, align 1 - load <4 x float>, <4 x float>* @12, align 1 - load <4 x float>, <4 x float>* @13, align 1 - load <4 x float>, <4 x float>* @14, align 1 - load <4 x float>, <4 x float>* @15, align 1 - load <4 x float>, <4 x float>* @16, align 1 - load <4 x float>, <4 x float>* @17, align 1 - load <4 x float>, <4 x float>* @18, align 1 - load <4 x float>, <4 x float>* @19, align 1 - load <4 x float>, <4 x float>* @20, align 1 - load <4 x float>, <4 x float>* @21, align 1 - load <4 x float>, <4 x float>* @22, align 1 - load <4 x float>, <4 x float>* @23, align 1 - load <4 x float>, <4 x float>* @24, align 1 - load <4 x float>, <4 x float>* @25, align 1 - load <4 x float>, <4 x float>* @26, align 1 - load <4 x float>, <4 x float>* @27, align 1 - load <4 x float>, <4 x float>* @28, align 1 - load <4 x float>, <4 x float>* @29, align 1 - load <4 x float>, <4 x float>* @30, align 1 - load <4 x float>, <4 x float>* @31, align 1 + load <4 x float>, ptr @0, align 1 + load <4 x float>, ptr @1, align 1 + load <4 x float>, ptr @2, align 1 + load <4 x float>, ptr @3, align 1 + load <4 x float>, ptr @4, align 1 + load <4 x float>, ptr @5, align 1 + load <4 x float>, ptr @6, align 1 + load <4 x float>, ptr @7, align 1 + load <4 x float>, ptr @8, align 1 + load <4 x float>, ptr @9, align 1 + load <4 x float>, ptr @10, align 1 + load <4 x float>, ptr @11, align 1 + load <4 x float>, ptr @12, align 1 + load <4 x float>, ptr @13, align 1 + load <4 x float>, ptr @14, align 1 + load <4 x float>, ptr @15, align 1 + load <4 x float>, ptr @16, align 1 + load <4 x float>, ptr @17, align 1 + load <4 x float>, ptr @18, align 1 + load <4 x float>, ptr @19, align 1 + load <4 x float>, ptr @20, align 1 + load <4 x float>, ptr @21, align 1 + load <4 x float>, ptr @22, align 1 + load <4 x float>, ptr @23, align 1 + load <4 x float>, ptr @24, align 1 + load <4 x float>, ptr @25, align 1 + load <4 x float>, ptr @26, align 1 + load <4 x float>, ptr @27, align 1 + load <4 x float>, ptr @28, align 1 + load <4 x float>, ptr @29, align 1 + load <4 x float>, ptr @30, align 1 + load <4 x float>, ptr @31, align 1 fmul <4 x float> %1, %1 fmul <4 x float> %33, %2 fmul <4 x float> %34, %3 @@ -1301,6 +1301,6 @@ define void @test2() "no-realign-stack" { fadd <4 x float> %590, %557 ; <<4 x float>>:591 [#uses=1] fadd <4 x float> %591, %559 ; <<4 x float>>:592 [#uses=1] fadd <4 x float> %592, %560 ; <<4 x float>>:593 [#uses=1] - store <4 x float> %593, <4 x float>* @0, align 1 + store <4 x float> %593, ptr @0, align 1 ret void } diff --git a/llvm/test/CodeGen/X86/2008-07-22-CombinerCrash.ll b/llvm/test/CodeGen/X86/2008-07-22-CombinerCrash.ll index af30f65d4e127..71beace3d4d3f 100644 --- a/llvm/test/CodeGen/X86/2008-07-22-CombinerCrash.ll +++ b/llvm/test/CodeGen/X86/2008-07-22-CombinerCrash.ll @@ -1,16 +1,16 @@ ; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 ; PR2566 -@0 = external dso_local global i16 ; :0 [#uses=1] -@1 = external dso_local global <4 x i16> ; <<4 x i16>*>:1 [#uses=1] +@0 = external dso_local global i16 ; :0 [#uses=1] +@1 = external dso_local global <4 x i16> ; :1 [#uses=1] declare void @abort() define void @t() nounwind { - load i16, i16* @0 ; :1 [#uses=1] + load i16, ptr @0 ; :1 [#uses=1] zext i16 %1 to i64 ; :2 [#uses=1] bitcast i64 %2 to <4 x i16> ; <<4 x i16>>:3 [#uses=1] shufflevector <4 x i16> %3, <4 x i16> undef, <4 x i32> zeroinitializer ; <<4 x i16>>:4 [#uses=1] - store <4 x i16> %4, <4 x i16>* @1 + store <4 x i16> %4, ptr @1 ret void } diff --git a/llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll b/llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll index d5ceafbcde7f9..dfe1662492a32 100644 --- a/llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll +++ b/llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll @@ -3,7 +3,7 @@ @.str = internal constant [4 x i8] c"%d\0A\00" -declare i32 @printf(i8* noalias , ...) nounwind +declare i32 @printf(ptr noalias , ...) nounwind define i32 @main() nounwind { ; CHECK-LABEL: main: @@ -31,8 +31,8 @@ forbody: %i.0 = phi i32 [ 0, %entry ], [ %inc, %forbody ] ; [#uses=3] %sub14 = sub i32 1027, %i.0 ; [#uses=1] %mul15 = mul i32 %sub14, 10 ; [#uses=1] - %add166 = or i32 %mul15, 1 ; [#uses=1] * - call i32 (i8*, ...) @printf( i8* noalias getelementptr ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i32 %add166 ) nounwind + %add166 = or i32 %mul15, 1 ; ptr + call i32 (ptr, ...) @printf( ptr noalias @.str, i32 %add166 ) nounwind %inc = add i32 %i.0, 1 ; [#uses=3] %cmp = icmp ne i32 %inc, 1027 ; [#uses=1] br i1 %cmp, label %forbody, label %afterfor diff --git a/llvm/test/CodeGen/X86/2008-08-06-RewriterBug.ll b/llvm/test/CodeGen/X86/2008-08-06-RewriterBug.ll index 201be38d24eee..2c39dc6b4d844 100644 --- a/llvm/test/CodeGen/X86/2008-08-06-RewriterBug.ll +++ b/llvm/test/CodeGen/X86/2008-08-06-RewriterBug.ll @@ -1,19 +1,19 @@ ; RUN: llc < %s -mtriple=i686-- ; PR2596 -@data = external global [400 x i64] ; <[400 x i64]*> [#uses=5] +@data = external global [400 x i64] ; [#uses=5] -define void @foo(double* noalias, double* noalias) { - load i64, i64* getelementptr ([400 x i64], [400 x i64]* @data, i32 0, i64 200), align 4 ; :3 [#uses=1] - load i64, i64* getelementptr ([400 x i64], [400 x i64]* @data, i32 0, i64 199), align 4 ; :4 [#uses=1] - load i64, i64* getelementptr ([400 x i64], [400 x i64]* @data, i32 0, i64 198), align 4 ; :5 [#uses=2] - load i64, i64* getelementptr ([400 x i64], [400 x i64]* @data, i32 0, i64 197), align 4 ; :6 [#uses=1] +define void @foo(ptr noalias, ptr noalias) { + load i64, ptr getelementptr ([400 x i64], ptr @data, i32 0, i64 200), align 4 ; :3 [#uses=1] + load i64, ptr getelementptr ([400 x i64], ptr @data, i32 0, i64 199), align 4 ; :4 [#uses=1] + load i64, ptr getelementptr ([400 x i64], ptr @data, i32 0, i64 198), align 4 ; :5 [#uses=2] + load i64, ptr getelementptr ([400 x i64], ptr @data, i32 0, i64 197), align 4 ; :6 [#uses=1] br i1 false, label %28, label %7 ;