diff --git a/clang/lib/Sema/Sema.cpp b/clang/lib/Sema/Sema.cpp index 76dc77d17092b..b709f920f236c 100644 --- a/clang/lib/Sema/Sema.cpp +++ b/clang/lib/Sema/Sema.cpp @@ -2008,7 +2008,7 @@ void Sema::checkTypeSupport(QualType Ty, SourceLocation Loc, ValueDecl *D) { if (Diag(Loc, PD, FD) << false /*show bit size*/ << 0 << Ty << false /*return*/ - << Context.getTargetInfo().getTriple().str()) { + << TI.getTriple().str()) { if (D) D->setInvalidDecl(); } @@ -2027,7 +2027,7 @@ void Sema::checkTypeSupport(QualType Ty, SourceLocation Loc, ValueDecl *D) { if (Diag(Loc, PD, FD) << false /*show bit size*/ << 0 << Ty << true /*return*/ - << Context.getTargetInfo().getTriple().str()) { + << TI.getTriple().str()) { if (D) D->setInvalidDecl(); } @@ -2037,17 +2037,17 @@ void Sema::checkTypeSupport(QualType Ty, SourceLocation Loc, ValueDecl *D) { // RISC-V vector builtin types (RISCVVTypes.def) if (Ty->isRVVType(/* Bitwidth */ 64, /* IsFloat */ false) && - !Context.getTargetInfo().hasFeature("zve64x")) + !TI.hasFeature("zve64x")) Diag(Loc, diag::err_riscv_type_requires_extension, FD) << Ty << "zve64x"; if (Ty->isRVVType(/* Bitwidth */ 16, /* IsFloat */ true) && - !Context.getTargetInfo().hasFeature("experimental-zvfh")) + !TI.hasFeature("experimental-zvfh")) Diag(Loc, diag::err_riscv_type_requires_extension, FD) << Ty << "zvfh"; if (Ty->isRVVType(/* Bitwidth */ 32, /* IsFloat */ true) && - !Context.getTargetInfo().hasFeature("zve32f")) + !TI.hasFeature("zve32f")) Diag(Loc, diag::err_riscv_type_requires_extension, FD) << Ty << "zve32f"; if (Ty->isRVVType(/* Bitwidth */ 64, /* IsFloat */ true) && - !Context.getTargetInfo().hasFeature("zve64d")) + !TI.hasFeature("zve64d")) Diag(Loc, diag::err_riscv_type_requires_extension, FD) << Ty << "zve64d"; // Don't allow SVE types in functions without a SVE target.