From 32be74b17828ae823ece24b967eae5a9b6a7aaed Mon Sep 17 00:00:00 2001 From: Reed Kotler Date: Mon, 15 Sep 2014 20:30:25 +0000 Subject: [PATCH] Add mips32 r1 to the list of supported targets for Mips fast-isel Summary: Expand list of supported targets for Mips to include mips32 r1. Previously it only include r2. More patches are coming where there is a difference but in the current patches as pushed upstream, r1 and r2 are equivalent. Test Plan: simplestorefp1.ll add new build bots at mips to test this flavor at both -O0 and -O2 Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D5306 llvm-svn: 217821 --- llvm/lib/Target/Mips/MipsFastISel.cpp | 3 +- .../test/CodeGen/Mips/Fast-ISel/loadstore2.ll | 2 ++ .../CodeGen/Mips/Fast-ISel/loadstrconst.ll | 2 ++ llvm/test/CodeGen/Mips/Fast-ISel/nullvoid.ll | 2 ++ .../CodeGen/Mips/Fast-ISel/simplestore.ll | 2 ++ .../CodeGen/Mips/Fast-ISel/simplestorefp1.ll | 34 ++++++++++++++----- .../CodeGen/Mips/Fast-ISel/simplestorei.ll | 2 ++ 7 files changed, 37 insertions(+), 10 deletions(-) diff --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp index 9dde1d8e5e8f8..e5857a0100e4d 100644 --- a/llvm/lib/Target/Mips/MipsFastISel.cpp +++ b/llvm/lib/Target/Mips/MipsFastISel.cpp @@ -61,7 +61,8 @@ class MipsFastISel final : public FastISel { MFI = funcInfo.MF->getInfo(); Context = &funcInfo.Fn->getContext(); TargetSupported = ((Subtarget->getRelocationModel() == Reloc::PIC_) && - (Subtarget->hasMips32r2() && (Subtarget->isABI_O32()))); + ((Subtarget->hasMips32r2() || Subtarget->hasMips32()) && + (Subtarget->isABI_O32()))); } bool fastSelectInstruction(const Instruction *I) override; diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll b/llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll index f113a0eb1d542..d84478b9c5a9f 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll @@ -6,6 +6,8 @@ target triple = "mips--linux-gnu" @c1 = common global i8 0, align 1 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s +; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \ +; RUN: < %s | FileCheck %s @s2 = common global i16 0, align 2 @s1 = common global i16 0, align 2 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll b/llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll index b32e85751da53..93cf4c15a2f5c 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll @@ -1,5 +1,7 @@ ; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s +; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \ +; RUN: < %s | FileCheck %s @.str = private unnamed_addr constant [6 x i8] c"hello\00", align 1 @s = common global i8* null, align 4 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/nullvoid.ll b/llvm/test/CodeGen/Mips/Fast-ISel/nullvoid.ll index eeaff878bf549..c847561d0278c 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/nullvoid.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/nullvoid.ll @@ -1,5 +1,7 @@ ; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s +; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \ +; RUN: < %s | FileCheck %s ; Function Attrs: nounwind define void @foo() { diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll b/llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll index 5d52481dfdf3c..83e3f3f242747 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll @@ -1,5 +1,7 @@ ; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s +; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \ +; RUN: < %s | FileCheck %s @abcd = external global i32 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll b/llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll index 6759c01c774bc..74723ae1beeb6 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll @@ -1,5 +1,11 @@ ; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \ +; RUN: < %s | FileCheck %s +; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \ ; RUN: < %s | FileCheck %s +; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \ +; RUN: < %s | FileCheck %s -check-prefix=mips32r2 +; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \ +; RUN: < %s | FileCheck %s -check-prefix=mips32 @f = common global float 0.000000e+00, align 4 @de = common global double 0.000000e+00, align 8 @@ -23,15 +29,25 @@ entry: define void @d1() #0 { entry: store double 1.234567e+00, double* @de, align 8 -; CHECK: .ent d1 -; CHECK: lui $[[REG1a:[0-9]+]], 16371 -; CHECK: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353 -; CHECK: lui $[[REG1b:[0-9]+]], 21403 -; CHECK: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951 -; CHECK: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]] -; CHECK: mthc1 $[[REG2a]], $f[[REG3]] -; CHECK: sdc1 $f[[REG3]], 0(${{[0-9]+}}) -; CHECK: .end d1 +; mip32r2: .ent d1 +; mips32r2: lui $[[REG1a:[0-9]+]], 16371 +; mips32r2: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353 +; mips32r2: lui $[[REG1b:[0-9]+]], 21403 +; mips32r2: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951 +; mips32r2: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]] +; mips32r2: mthc1 $[[REG2a]], $f[[REG3]] +; mips32r2: sdc1 $f[[REG3]], 0(${{[0-9]+}}) +; mips32r2: .end d1 +; mips32: .ent d1 +; mips32: lui $[[REG1a:[0-9]+]], 16371 +; mips32: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353 +; mips32: lui $[[REG1b:[0-9]+]], 21403 +; mips32: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951 +; mips32: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]] +; mips32: mtc1 $[[REG2a]], $f{{[0-9]+}} +; mips32: sdc1 $f[[REG3]], 0(${{[0-9]+}}) +; mips32: .end d1 + ret void } diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll b/llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll index 7d2c8e73c352e..128e1de9cad05 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll @@ -1,5 +1,7 @@ ; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s +; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \ +; RUN: < %s | FileCheck %s @ijk = external global i32