diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index ccfa016778946c..027e2c2d45afba 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -2648,8 +2648,8 @@ bool X86FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
       ResultReg = fastEmitInst_extractsubreg(MVT::i16, ResultReg, true, RegIdx);
     } else {
       assert(Op->getType()->isIntegerTy(16) && "Expected a 16-bit integer!");
-      // Explicitly sign-extend the input to 32-bit.
-      InputReg = fastEmit_r(MVT::i16, MVT::i32, ISD::SIGN_EXTEND, InputReg,
+      // Explicitly zero-extend the input to 32-bit.
+      InputReg = fastEmit_r(MVT::i16, MVT::i32, ISD::ZERO_EXTEND, InputReg,
                             /*Kill=*/false);
 
       // The following SCALAR_TO_VECTOR will be expanded into a VMOVDI2PDIrr.
diff --git a/llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll b/llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll
index db892fc8ee98ef..43a26c123e78ff 100644
--- a/llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll
@@ -15,7 +15,7 @@ entry:
 
 define float @test_fp16_to_fp32(i32 %a) {
 ; CHECK-LABEL: test_fp16_to_fp32:
-; CHECK: movswl %di, %eax
+; CHECK: movzwl %di, %eax
 ; CHECK-NEXT: vmovd %eax, %xmm0
 ; CHECK-NEXT: vcvtph2ps %xmm0, %xmm0
 ; CHECK-NEXT: retq