diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
index d33e4e1e4aeed..f81d2233ce471 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
@@ -24,7 +24,7 @@ tablegen("AMDGPUGenGlobalISel") {
   td_file = "AMDGPUGISel.td"
 }
 
-tablegen("AMDGPUGenGICombiner") {
+tablegen("AMDGPUGenPreLegalizeGICombiner") {
   visibility = [ ":LLVMAMDGPUCodeGen" ]
   args = [
     "-gen-global-isel-combiner",
@@ -33,6 +33,15 @@ tablegen("AMDGPUGenGICombiner") {
   td_file = "AMDGPUGISel.td"
 }
 
+tablegen("AMDGPUGenPostLegalizeGICombiner") {
+  visibility = [ ":LLVMAMDGPUCodeGen" ]
+  args = [
+    "-gen-global-isel-combiner",
+    "-combiners=AMDGPUPostLegalizerCombinerHelper",
+  ]
+  td_file = "AMDGPUGISel.td"
+}
+
 tablegen("AMDGPUGenMCPseudoLowering") {
   visibility = [ ":LLVMAMDGPUCodeGen" ]
   args = [ "-gen-pseudo-lowering" ]
@@ -68,7 +77,8 @@ static_library("LLVMAMDGPUCodeGen") {
     ":AMDGPUGenAsmMatcher",
     ":AMDGPUGenCallingConv",
     ":AMDGPUGenDAGISel",
-    ":AMDGPUGenGICombiner",
+    ":AMDGPUGenPostLegalizeGICombiner",
+    ":AMDGPUGenPreLegalizeGICombiner",
     ":AMDGPUGenGlobalISel",
     ":AMDGPUGenMCPseudoLowering",
     ":AMDGPUGenRegisterBank",
@@ -125,6 +135,7 @@ static_library("LLVMAMDGPUCodeGen") {
     "AMDGPUMacroFusion.cpp",
     "AMDGPUOpenCLEnqueuedBlockLowering.cpp",
     "AMDGPUPerfHintAnalysis.cpp",
+    "AMDGPUPostLegalizerCombiner.cpp",
     "AMDGPUPreLegalizerCombiner.cpp",
     "AMDGPUPrintfRuntimeBinding.cpp",
     "AMDGPUPromoteAlloca.cpp",