diff --git a/llvm/test/CodeGen/X86/half-darwin.ll b/llvm/test/CodeGen/X86/half-darwin.ll
index 1d2f4eb39bbe6..cdc188b3039c2 100644
--- a/llvm/test/CodeGen/X86/half-darwin.ll
+++ b/llvm/test/CodeGen/X86/half-darwin.ll
@@ -94,7 +94,7 @@ define float @extendhfsf(ptr %ptr) nounwind {
   ret float %float
 }
 
-define void @strict_truncsfhf(float %in, ptr %ptr) nounwind strictfp {
+define void @strict_truncsfhf(float %in, ptr %ptr) nounwind {
 ; CHECK-SOFT-LABEL: strict_truncsfhf:
 ; CHECK-SOFT:       ## %bb.0:
 ; CHECK-SOFT-NEXT:    pushq %rbx
@@ -126,7 +126,7 @@ define void @strict_truncsfhf(float %in, ptr %ptr) nounwind strictfp {
   ret void
 }
 
-define void @strict_truncdfhf(double %in, ptr %ptr) nounwind strictfp {
+define void @strict_truncdfhf(double %in, ptr %ptr) nounwind {
 ; CHECK-SOFT-LABEL: strict_truncdfhf:
 ; CHECK-SOFT:       ## %bb.0:
 ; CHECK-SOFT-NEXT:    pushq %rbx
@@ -157,7 +157,7 @@ define void @strict_truncdfhf(double %in, ptr %ptr) nounwind strictfp {
   ret void
 }
 
-define float @strict_extendhfsf(ptr %ptr) nounwind strictfp {
+define float @strict_extendhfsf(ptr %ptr) nounwind {
 ; CHECK-SOFT-LABEL: strict_extendhfsf:
 ; CHECK-SOFT:       ## %bb.0:
 ; CHECK-SOFT-NEXT:    pushq %rax
diff --git a/llvm/test/CodeGen/X86/i128-fpconv-win64-strict.ll b/llvm/test/CodeGen/X86/i128-fpconv-win64-strict.ll
index 49a2a6b0d19be..7f7ea09dbc0c2 100644
--- a/llvm/test/CodeGen/X86/i128-fpconv-win64-strict.ll
+++ b/llvm/test/CodeGen/X86/i128-fpconv-win64-strict.ll
@@ -2,7 +2,7 @@
 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
 ; RUN: llc < %s -mtriple=x86_64-mingw32 | FileCheck %s -check-prefix=WIN64
 
-define i64 @double_to_i128(double %d) nounwind strictfp {
+define i64 @double_to_i128(double %d) nounwind {
 ; WIN64-LABEL: double_to_i128:
 ; WIN64:       # %bb.0:
 ; WIN64-NEXT:    subq $40, %rsp
@@ -15,7 +15,7 @@ define i64 @double_to_i128(double %d) nounwind strictfp {
   ret i64 %2
 }
 
-define i64 @double_to_ui128(double %d) nounwind strictfp {
+define i64 @double_to_ui128(double %d) nounwind {
 ; WIN64-LABEL: double_to_ui128:
 ; WIN64:       # %bb.0:
 ; WIN64-NEXT:    subq $40, %rsp
@@ -28,7 +28,7 @@ define i64 @double_to_ui128(double %d) nounwind strictfp {
   ret i64 %2
 }
 
-define i64 @float_to_i128(float %d) nounwind strictfp {
+define i64 @float_to_i128(float %d) nounwind {
 ; WIN64-LABEL: float_to_i128:
 ; WIN64:       # %bb.0:
 ; WIN64-NEXT:    subq $40, %rsp
@@ -41,7 +41,7 @@ define i64 @float_to_i128(float %d) nounwind strictfp {
   ret i64 %2
 }
 
-define i64 @float_to_ui128(float %d) nounwind strictfp {
+define i64 @float_to_ui128(float %d) nounwind {
 ; WIN64-LABEL: float_to_ui128:
 ; WIN64:       # %bb.0:
 ; WIN64-NEXT:    subq $40, %rsp
@@ -54,7 +54,7 @@ define i64 @float_to_ui128(float %d) nounwind strictfp {
   ret i64 %2
 }
 
-define i64 @longdouble_to_i128(ptr nocapture readonly %0) nounwind strictfp {
+define i64 @longdouble_to_i128(ptr nocapture readonly %0) nounwind {
 ; WIN64-LABEL: longdouble_to_i128:
 ; WIN64:       # %bb.0:
 ; WIN64-NEXT:    subq $56, %rsp
@@ -71,7 +71,7 @@ define i64 @longdouble_to_i128(ptr nocapture readonly %0) nounwind strictfp {
   ret i64 %4
 }
 
-define i64 @longdouble_to_ui128(ptr nocapture readonly %0) nounwind strictfp {
+define i64 @longdouble_to_ui128(ptr nocapture readonly %0) nounwind {
 ; WIN64-LABEL: longdouble_to_ui128:
 ; WIN64:       # %bb.0:
 ; WIN64-NEXT:    subq $56, %rsp
@@ -88,7 +88,7 @@ define i64 @longdouble_to_ui128(ptr nocapture readonly %0) nounwind strictfp {
   ret i64 %4
 }
 
-define double @i128_to_double(ptr nocapture readonly %0) nounwind strictfp {
+define double @i128_to_double(ptr nocapture readonly %0) nounwind {
 ; WIN64-LABEL: i128_to_double:
 ; WIN64:       # %bb.0:
 ; WIN64-NEXT:    subq $56, %rsp
@@ -103,7 +103,7 @@ define double @i128_to_double(ptr nocapture readonly %0) nounwind strictfp {
   ret double %3
 }
 
-define double @ui128_to_double(ptr nocapture readonly %0) nounwind strictfp {
+define double @ui128_to_double(ptr nocapture readonly %0) nounwind {
 ; WIN64-LABEL: ui128_to_double:
 ; WIN64:       # %bb.0:
 ; WIN64-NEXT:    subq $56, %rsp
@@ -118,7 +118,7 @@ define double @ui128_to_double(ptr nocapture readonly %0) nounwind strictfp {
   ret double %3
 }
 
-define float @i128_to_float(ptr nocapture readonly %0) nounwind strictfp {
+define float @i128_to_float(ptr nocapture readonly %0) nounwind {
 ; WIN64-LABEL: i128_to_float:
 ; WIN64:       # %bb.0:
 ; WIN64-NEXT:    subq $56, %rsp
@@ -133,7 +133,7 @@ define float @i128_to_float(ptr nocapture readonly %0) nounwind strictfp {
   ret float %3
 }
 
-define float @ui128_to_float(ptr nocapture readonly %0) nounwind strictfp {
+define float @ui128_to_float(ptr nocapture readonly %0) nounwind {
 ; WIN64-LABEL: ui128_to_float:
 ; WIN64:       # %bb.0:
 ; WIN64-NEXT:    subq $56, %rsp
@@ -148,7 +148,7 @@ define float @ui128_to_float(ptr nocapture readonly %0) nounwind strictfp {
   ret float %3
 }
 
-define void @i128_to_longdouble(ptr noalias nocapture sret(x86_fp80) align 16 %agg.result, ptr nocapture readonly %0) nounwind strictfp {
+define void @i128_to_longdouble(ptr noalias nocapture sret(x86_fp80) align 16 %agg.result, ptr nocapture readonly %0) nounwind {
 ; WIN64-LABEL: i128_to_longdouble:
 ; WIN64:       # %bb.0:
 ; WIN64-NEXT:    pushq %rsi
@@ -171,7 +171,7 @@ define void @i128_to_longdouble(ptr noalias nocapture sret(x86_fp80) align 16 %a
   ret void
 }
 
-define void @ui128_to_longdouble(ptr noalias nocapture sret(x86_fp80) align 16 %agg.result, ptr nocapture readonly %0) nounwind strictfp {
+define void @ui128_to_longdouble(ptr noalias nocapture sret(x86_fp80) align 16 %agg.result, ptr nocapture readonly %0) nounwind {
 ; WIN64-LABEL: ui128_to_longdouble:
 ; WIN64:       # %bb.0:
 ; WIN64-NEXT:    pushq %rsi
diff --git a/llvm/test/CodeGen/X86/is_fpclass-fp80.ll b/llvm/test/CodeGen/X86/is_fpclass-fp80.ll
index ec2323ac2250c..5803d9dfb43d2 100644
--- a/llvm/test/CodeGen/X86/is_fpclass-fp80.ll
+++ b/llvm/test/CodeGen/X86/is_fpclass-fp80.ll
@@ -70,7 +70,7 @@ define i1 @is_nan_f80_strict(x86_fp80 %x) strictfp {
 ; CHECK-64-NEXT:    orb %dl, %al
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call i1 @llvm.is.fpclass.f80(x86_fp80 %x, i32 3) strictfp ; "nan"
+  %0 = tail call i1 @llvm.is.fpclass.f80(x86_fp80 %x, i32 3)  ; "nan"
   ret i1 %0
 }
 
@@ -197,7 +197,7 @@ define i1 @is_zero_f80_strict(x86_fp80 %x) strictfp {
 ; CHECK-64-NEXT:    sete %al
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call i1 @llvm.is.fpclass.f80(x86_fp80 %x, i32 96) strictfp ; 0x60 = "zero"
+  %0 = tail call i1 @llvm.is.fpclass.f80(x86_fp80 %x, i32 96)  ; 0x60 = "zero"
   ret i1 %0
 }
 
diff --git a/llvm/test/CodeGen/X86/is_fpclass.ll b/llvm/test/CodeGen/X86/is_fpclass.ll
index 2046d790cc57e..47cf85d17ece8 100644
--- a/llvm/test/CodeGen/X86/is_fpclass.ll
+++ b/llvm/test/CodeGen/X86/is_fpclass.ll
@@ -986,7 +986,7 @@ define i1 @isnan_f_strictfp(float %x) strictfp {
 ; CHECK-64-NEXT:    setge %al
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 3) strictfp ; "nan"
+  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 3)  ; "nan"
   ret i1 %0
 }
 
@@ -1007,7 +1007,7 @@ define i1 @not_isnan_f_strictfp(float %x) strictfp {
 ; CHECK-64-NEXT:    setl %al
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1020) strictfp ; ~"nan"
+  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1020)  ; ~"nan"
   ret i1 %0
 }
 
@@ -1028,7 +1028,7 @@ define i1 @isfinite_f_strictfp(float %x) strictfp {
 ; CHECK-64-NEXT:    setl %al
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 504) strictfp ; 0x1f8 = "finite"
+  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 504)  ; 0x1f8 = "finite"
   ret i1 %0
 }
 
@@ -1049,7 +1049,7 @@ define i1 @not_isfinite_f_strictfp(float %x) strictfp {
 ; CHECK-64-NEXT:    setge %al
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 519) strictfp ; ~0x1f8 = ~"finite"
+  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 519)  ; ~0x1f8 = ~"finite"
   ret i1 %0
 }
 
@@ -1067,7 +1067,7 @@ define i1 @iszero_f_strictfp(float %x) strictfp {
 ; CHECK-64-NEXT:    sete %al
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 96) strictfp ; 0x60 = "zero"
+  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 96)  ; 0x60 = "zero"
   ret i1 %0
 }
 
@@ -1085,7 +1085,7 @@ define i1 @not_iszero_f_strictfp(float %x) strictfp {
 ; CHECK-64-NEXT:    setne %al
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 927) strictfp ; ~0x60 = ~"zero"
+  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 927)  ; ~0x60 = ~"zero"
   ret i1 %0
 }
 
@@ -1311,7 +1311,7 @@ define i1 @isnan_d_strictfp(double %x) strictfp {
 ; CHECK-64-NEXT:    setg %al
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 3) strictfp ; "nan"
+  %0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 3)  ; "nan"
   ret i1 %0
 }
 
@@ -1332,7 +1332,7 @@ define i1 @iszero_d_strictfp(double %x) strictfp {
 ; CHECK-64-NEXT:    sete %al
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 96) strictfp ; 0x60 = "zero"
+  %0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 96)  ; 0x60 = "zero"
   ret i1 %0
 }
 
@@ -1376,7 +1376,7 @@ define <1 x i1> @isnan_v1f_strictfp(<1 x float> %x) strictfp {
 ; CHECK-64-NEXT:    setge %al
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call <1 x i1> @llvm.is.fpclass.v1f32(<1 x float> %x, i32 3) strictfp ; "nan"
+  %0 = tail call <1 x i1> @llvm.is.fpclass.v1f32(<1 x float> %x, i32 3)  ; "nan"
   ret <1 x i1> %0
 }
 
@@ -1457,7 +1457,7 @@ define <2 x i1> @isnan_v2f_strictfp(<2 x float> %x) strictfp {
 ; CHECK-64-NEXT:    pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 3) strictfp ; "nan"
+  %0 = tail call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 3)  ; "nan"
   ret <2 x i1> %0
 }
 
@@ -1548,7 +1548,7 @@ define <4 x i1> @isnan_v4f_strictfp(<4 x float> %x) strictfp {
 ; CHECK-64-NEXT:    pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
 ; CHECK-64-NEXT:    retq
 entry:
-  %0 = tail call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> %x, i32 3) strictfp ; "nan"
+  %0 = tail call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> %x, i32 3)  ; "nan"
   ret <4 x i1> %0
 }