diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index 5bbeb42b446557..3e39dc673d79e0 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -3701,6 +3701,7 @@ bool InstCombinerImpl::sinkNotIntoOtherHandOfLogicalOp(Instruction &I) {
   freelyInvertAllUsersOf(NotOpToInvert, /*IgnoredUser=*/&I);
   *OpToInvert = NotOpToInvert;
 
+  Builder.SetInsertPoint(&*I.getInsertionPointAfterDef());
   Value *NewBinOp;
   if (IsBinaryOp)
     NewBinOp = Builder.CreateBinOp(NewOpc, Op0, Op1, I.getName() + ".not");
diff --git a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll
index 71537cdd2a72d2..ccb88f8c6fa960 100644
--- a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll
+++ b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll
@@ -28,8 +28,8 @@ define i8 @t1(i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t1(
 ; CHECK-NEXT:    [[I0:%.*]] = icmp eq i8 [[V0:%.*]], [[V1:%.*]]
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V2:%.*]], [[V3:%.*]]
-; CHECK-NEXT:    [[I3_NOT:%.*]] = or i1 [[I1]], [[I0]]
 ; CHECK-NEXT:    call void @use1(i1 [[I0]])
+; CHECK-NEXT:    [[I3_NOT:%.*]] = or i1 [[I1]], [[I0]]
 ; CHECK-NEXT:    [[I4:%.*]] = select i1 [[I3_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I4]]
 ;
@@ -78,9 +78,9 @@ define i8 @n3(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3) {
 define i8 @t4(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t4(
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V0:%.*]], [[V1:%.*]]
-; CHECK-NEXT:    [[I4_NOT:%.*]] = or i1 [[I1]], [[I0:%.*]]
 ; CHECK-NEXT:    [[I2:%.*]] = select i1 [[I1]], i8 [[V3:%.*]], i8 [[V2:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[I2]])
+; CHECK-NEXT:    [[I4_NOT:%.*]] = or i1 [[I1]], [[I0:%.*]]
 ; CHECK-NEXT:    [[I5:%.*]] = select i1 [[I4_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I5]]
 ;
@@ -95,9 +95,9 @@ define i8 @t4(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 define i8 @t4_commutative(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t4_commutative(
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V0:%.*]], [[V1:%.*]]
-; CHECK-NEXT:    [[I4_NOT:%.*]] = or i1 [[I1]], [[I0:%.*]]
 ; CHECK-NEXT:    [[I2:%.*]] = select i1 [[I1]], i8 [[V3:%.*]], i8 [[V2:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[I2]])
+; CHECK-NEXT:    [[I4_NOT:%.*]] = or i1 [[I1]], [[I0:%.*]]
 ; CHECK-NEXT:    [[I5:%.*]] = select i1 [[I4_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I5]]
 ;
diff --git a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-logical-and.ll b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-logical-and.ll
index 0866fc2c81f9d6..0605828938064b 100644
--- a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-logical-and.ll
+++ b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-logical-and.ll
@@ -41,8 +41,8 @@ define i8 @t1(i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t1(
 ; CHECK-NEXT:    [[I0:%.*]] = icmp eq i8 [[V0:%.*]], [[V1:%.*]]
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V2:%.*]], [[V3:%.*]]
-; CHECK-NEXT:    [[I3_NOT:%.*]] = select i1 [[I0]], i1 true, i1 [[I1]]
 ; CHECK-NEXT:    call void @use1(i1 [[I0]])
+; CHECK-NEXT:    [[I3_NOT:%.*]] = select i1 [[I0]], i1 true, i1 [[I1]]
 ; CHECK-NEXT:    [[I4:%.*]] = select i1 [[I3_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I4]]
 ;
@@ -58,8 +58,8 @@ define i8 @t1_commutative(i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t1_commutative(
 ; CHECK-NEXT:    [[I0:%.*]] = icmp eq i8 [[V0:%.*]], [[V1:%.*]]
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V2:%.*]], [[V3:%.*]]
-; CHECK-NEXT:    [[I3_NOT:%.*]] = select i1 [[I1]], i1 true, i1 [[I0]]
 ; CHECK-NEXT:    call void @use1(i1 [[I0]])
+; CHECK-NEXT:    [[I3_NOT:%.*]] = select i1 [[I1]], i1 true, i1 [[I0]]
 ; CHECK-NEXT:    [[I4:%.*]] = select i1 [[I3_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I4]]
 ;
@@ -108,9 +108,9 @@ define i8 @n3(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3) {
 define i8 @t4(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t4(
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V0:%.*]], [[V1:%.*]]
-; CHECK-NEXT:    [[I4_NOT:%.*]] = select i1 [[I0:%.*]], i1 true, i1 [[I1]]
 ; CHECK-NEXT:    [[I2:%.*]] = select i1 [[I1]], i8 [[V3:%.*]], i8 [[V2:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[I2]])
+; CHECK-NEXT:    [[I4_NOT:%.*]] = select i1 [[I0:%.*]], i1 true, i1 [[I1]]
 ; CHECK-NEXT:    [[I5:%.*]] = select i1 [[I4_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I5]]
 ;
@@ -125,9 +125,9 @@ define i8 @t4(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 define i8 @t4_commutative(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t4_commutative(
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V0:%.*]], [[V1:%.*]]
-; CHECK-NEXT:    [[I4_NOT:%.*]] = select i1 [[I1]], i1 true, i1 [[I0:%.*]]
 ; CHECK-NEXT:    [[I2:%.*]] = select i1 [[I1]], i8 [[V3:%.*]], i8 [[V2:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[I2]])
+; CHECK-NEXT:    [[I4_NOT:%.*]] = select i1 [[I1]], i1 true, i1 [[I0:%.*]]
 ; CHECK-NEXT:    [[I5:%.*]] = select i1 [[I4_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I5]]
 ;
diff --git a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-logical-or.ll b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-logical-or.ll
index b6c9d24a169512..3985118ab085fa 100644
--- a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-logical-or.ll
+++ b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-logical-or.ll
@@ -41,8 +41,8 @@ define i8 @t1(i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t1(
 ; CHECK-NEXT:    [[I0:%.*]] = icmp eq i8 [[V0:%.*]], [[V1:%.*]]
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V2:%.*]], [[V3:%.*]]
-; CHECK-NEXT:    [[I3_NOT:%.*]] = select i1 [[I0]], i1 [[I1]], i1 false
 ; CHECK-NEXT:    call void @use1(i1 [[I0]])
+; CHECK-NEXT:    [[I3_NOT:%.*]] = select i1 [[I0]], i1 [[I1]], i1 false
 ; CHECK-NEXT:    [[I4:%.*]] = select i1 [[I3_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I4]]
 ;
@@ -58,8 +58,8 @@ define i8 @t1_commutative(i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t1_commutative(
 ; CHECK-NEXT:    [[I0:%.*]] = icmp eq i8 [[V0:%.*]], [[V1:%.*]]
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V2:%.*]], [[V3:%.*]]
-; CHECK-NEXT:    [[I3_NOT:%.*]] = select i1 [[I1]], i1 [[I0]], i1 false
 ; CHECK-NEXT:    call void @use1(i1 [[I0]])
+; CHECK-NEXT:    [[I3_NOT:%.*]] = select i1 [[I1]], i1 [[I0]], i1 false
 ; CHECK-NEXT:    [[I4:%.*]] = select i1 [[I3_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I4]]
 ;
@@ -108,9 +108,9 @@ define i8 @n3(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3) {
 define i8 @t4(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t4(
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V0:%.*]], [[V1:%.*]]
-; CHECK-NEXT:    [[I4_NOT:%.*]] = select i1 [[I0:%.*]], i1 [[I1]], i1 false
 ; CHECK-NEXT:    [[I2:%.*]] = select i1 [[I1]], i8 [[V3:%.*]], i8 [[V2:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[I2]])
+; CHECK-NEXT:    [[I4_NOT:%.*]] = select i1 [[I0:%.*]], i1 [[I1]], i1 false
 ; CHECK-NEXT:    [[I5:%.*]] = select i1 [[I4_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I5]]
 ;
@@ -125,9 +125,9 @@ define i8 @t4(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 define i8 @t4_commutative(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t4_commutative(
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V0:%.*]], [[V1:%.*]]
-; CHECK-NEXT:    [[I4_NOT:%.*]] = select i1 [[I1]], i1 [[I0:%.*]], i1 false
 ; CHECK-NEXT:    [[I2:%.*]] = select i1 [[I1]], i8 [[V3:%.*]], i8 [[V2:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[I2]])
+; CHECK-NEXT:    [[I4_NOT:%.*]] = select i1 [[I1]], i1 [[I0:%.*]], i1 false
 ; CHECK-NEXT:    [[I5:%.*]] = select i1 [[I4_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I5]]
 ;
diff --git a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll
index 6777720605f5f9..0da7c8fbd8db31 100644
--- a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll
+++ b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll
@@ -28,8 +28,8 @@ define i8 @t1(i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t1(
 ; CHECK-NEXT:    [[I0:%.*]] = icmp eq i8 [[V0:%.*]], [[V1:%.*]]
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V2:%.*]], [[V3:%.*]]
-; CHECK-NEXT:    [[I3_NOT:%.*]] = and i1 [[I1]], [[I0]]
 ; CHECK-NEXT:    call void @use1(i1 [[I0]])
+; CHECK-NEXT:    [[I3_NOT:%.*]] = and i1 [[I1]], [[I0]]
 ; CHECK-NEXT:    [[I4:%.*]] = select i1 [[I3_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I4]]
 ;
@@ -78,9 +78,9 @@ define i8 @n3(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3) {
 define i8 @t4(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t4(
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V0:%.*]], [[V1:%.*]]
-; CHECK-NEXT:    [[I4_NOT:%.*]] = and i1 [[I1]], [[I0:%.*]]
 ; CHECK-NEXT:    [[I2:%.*]] = select i1 [[I1]], i8 [[V3:%.*]], i8 [[V2:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[I2]])
+; CHECK-NEXT:    [[I4_NOT:%.*]] = and i1 [[I1]], [[I0:%.*]]
 ; CHECK-NEXT:    [[I5:%.*]] = select i1 [[I4_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I5]]
 ;
@@ -95,9 +95,9 @@ define i8 @t4(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 define i8 @t4_commutative(i1 %i0, i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8 %v4, i8 %v5) {
 ; CHECK-LABEL: @t4_commutative(
 ; CHECK-NEXT:    [[I1:%.*]] = icmp ne i8 [[V0:%.*]], [[V1:%.*]]
-; CHECK-NEXT:    [[I4_NOT:%.*]] = and i1 [[I1]], [[I0:%.*]]
 ; CHECK-NEXT:    [[I2:%.*]] = select i1 [[I1]], i8 [[V3:%.*]], i8 [[V2:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[I2]])
+; CHECK-NEXT:    [[I4_NOT:%.*]] = and i1 [[I1]], [[I0:%.*]]
 ; CHECK-NEXT:    [[I5:%.*]] = select i1 [[I4_NOT]], i8 [[V5:%.*]], i8 [[V4:%.*]]
 ; CHECK-NEXT:    ret i8 [[I5]]
 ;