diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index 7dd9fc45f10dd..2c2b767b2ced1 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -1554,14 +1554,6 @@ Instruction *InstCombinerImpl::visitAdd(BinaryOperator &I) {
   if (Instruction *Ashr = foldAddToAshr(I))
     return Ashr;
 
-  // min(A, B) + max(A, B) => A + B.
-  if (match(&I,
-            match_combine_or(m_c_Add(m_SMax(m_Value(A), m_Value(B)),
-                                     m_c_SMin(m_Deferred(A), m_Deferred(B))),
-                             m_c_Add(m_UMax(m_Value(A), m_Value(B)),
-                                     m_c_UMin(m_Deferred(A), m_Deferred(B))))))
-    return BinaryOperator::CreateWithCopiedFlags(Instruction::Add, A, B, &I);
-
   // TODO(jingyue): Consider willNotOverflowSignedAdd and
   // willNotOverflowUnsignedAdd to reduce the number of invocations of
   // computeKnownBits.
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index a3baff33739d6..5768f71265ccd 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -471,14 +471,6 @@ Instruction *InstCombinerImpl::visitMul(BinaryOperator &I) {
   if (Instruction *Ext = narrowMathIfNoOverflow(I))
     return Ext;
 
-  // min(X, Y) * max(X, Y) => X * Y.
-  if (match(&I,
-            match_combine_or(m_c_Mul(m_SMax(m_Value(X), m_Value(Y)),
-                                     m_c_SMin(m_Deferred(X), m_Deferred(Y))),
-                             m_c_Mul(m_UMax(m_Value(X), m_Value(Y)),
-                                     m_c_UMin(m_Deferred(X), m_Deferred(Y))))))
-    return BinaryOperator::CreateWithCopiedFlags(Instruction::Mul, X, Y, &I);
-
   bool Changed = false;
   if (!HasNSW && willNotOverflowSignedMul(Op0, Op1, I)) {
     Changed = true;
diff --git a/llvm/test/Transforms/InstCombine/add-min-max.ll b/llvm/test/Transforms/InstCombine/add-min-max.ll
index 2117a55e2a490..d077d18f6ee97 100644
--- a/llvm/test/Transforms/InstCombine/add-min-max.ll
+++ b/llvm/test/Transforms/InstCombine/add-min-max.ll
@@ -9,7 +9,9 @@ declare i32 @llvm.umin.i32(i32 %a, i32 %b)
 define i32 @uadd_min_max(i32 %a, i32 %b) {
 ; CHECK-LABEL: @uadd_min_max(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES:%.*]] = add i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[MAX:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT:    [[MIN:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = add i32 [[MIN]], [[MAX]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry:
@@ -22,7 +24,9 @@ entry:
 define i32 @uadd_min_max_comm(i32 %a, i32 %b) {
 ; CHECK-LABEL: @uadd_min_max_comm(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES:%.*]] = add i32 [[B:%.*]], [[A:%.*]]
+; CHECK-NEXT:    [[MAX:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[A:%.*]])
+; CHECK-NEXT:    [[MIN:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = add i32 [[MIN]], [[MAX]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry:
@@ -35,7 +39,9 @@ entry:
 define i32 @uadd_min_max_nuw_nsw(i32 %a, i32 %b) {
 ; CHECK-LABEL: @uadd_min_max_nuw_nsw(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES:%.*]] = add nuw nsw i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[MAX:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT:    [[MIN:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = add nuw nsw i32 [[MIN]], [[MAX]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry:
@@ -48,7 +54,9 @@ entry:
 define i32 @sadd_min_max(i32 %a, i32 %b) {
 ; CHECK-LABEL: @sadd_min_max(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES:%.*]] = add i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT:    [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = add i32 [[MIN]], [[MAX]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry:
@@ -61,7 +69,9 @@ entry:
 define i32 @sadd_min_max_comm(i32 %a, i32 %b) {
 ; CHECK-LABEL: @sadd_min_max_comm(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES:%.*]] = add i32 [[B:%.*]], [[A:%.*]]
+; CHECK-NEXT:    [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[B:%.*]], i32 [[A:%.*]])
+; CHECK-NEXT:    [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = add i32 [[MIN]], [[MAX]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry:
@@ -74,7 +84,9 @@ entry:
 define i32 @sadd_min_max_nuw_nsw(i32 %a, i32 %b) {
 ; CHECK-LABEL: @sadd_min_max_nuw_nsw(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES:%.*]] = add nuw nsw i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT:    [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = add nuw nsw i32 [[MIN]], [[MAX]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry:
diff --git a/llvm/test/Transforms/InstCombine/mul-min-max.ll b/llvm/test/Transforms/InstCombine/mul-min-max.ll
index fce6b9576dc3f..e6808ffa18a5d 100644
--- a/llvm/test/Transforms/InstCombine/mul-min-max.ll
+++ b/llvm/test/Transforms/InstCombine/mul-min-max.ll
@@ -9,7 +9,9 @@ declare i32 @llvm.umin.i32(i32 %a, i32 %b)
 define i32 @umul_min_max(i32 %a, i32 %b) {
 ; CHECK-LABEL: @umul_min_max(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES:%.*]] = mul i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[MAX:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT:    [[MIN:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = mul i32 [[MIN]], [[MAX]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry:
@@ -22,7 +24,9 @@ entry:
 define i32 @umul_min_max_comm(i32 %a, i32 %b) {
 ; CHECK-LABEL: @umul_min_max_comm(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES:%.*]] = mul i32 [[B:%.*]], [[A:%.*]]
+; CHECK-NEXT:    [[MAX:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[A:%.*]])
+; CHECK-NEXT:    [[MIN:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = mul i32 [[MIN]], [[MAX]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry:
@@ -35,7 +39,9 @@ entry:
 define i32 @umul_min_max_nuw_nsw(i32 %a, i32 %b) {
 ; CHECK-LABEL: @umul_min_max_nuw_nsw(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES:%.*]] = mul nuw nsw i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[MAX:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT:    [[MIN:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = mul nuw nsw i32 [[MIN]], [[MAX]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry:
@@ -48,7 +54,9 @@ entry:
 define i32 @smul_min_max(i32 %a, i32 %b) {
 ; CHECK-LABEL: @smul_min_max(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES:%.*]] = mul i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT:    [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = mul i32 [[MIN]], [[MAX]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry:
@@ -61,7 +69,9 @@ entry:
 define i32 @smul_min_max_comm(i32 %a, i32 %b) {
 ; CHECK-LABEL: @smul_min_max_comm(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES:%.*]] = mul i32 [[B:%.*]], [[A:%.*]]
+; CHECK-NEXT:    [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[B:%.*]], i32 [[A:%.*]])
+; CHECK-NEXT:    [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = mul i32 [[MIN]], [[MAX]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry:
@@ -74,7 +84,9 @@ entry:
 define i32 @smul_min_max_nuw_nsw(i32 %a, i32 %b) {
 ; CHECK-LABEL: @smul_min_max_nuw_nsw(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[RES:%.*]] = mul nuw nsw i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT:    [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = mul nuw nsw i32 [[MIN]], [[MAX]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
 entry: