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Send SVE vg register in custom expedited registerset
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This patch ovverides GetExpeditedRegisterSet for
NativeRegisterContextLinux_arm64 to send vector granule register in
expedited register set if SVE mode is selected.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D82855
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omjavaid committed Nov 30, 2020
1 parent b69c09b commit 4e8aeb9
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Showing 6 changed files with 55 additions and 2 deletions.
Expand Up @@ -992,6 +992,13 @@ def find_generic_register_with_name(self, reg_infos, generic_name):
return reg_info
return None

def find_register_with_name_and_dwarf_regnum(self, reg_infos, name, dwarf_num):
self.assertIsNotNone(reg_infos)
for reg_info in reg_infos:
if (reg_info["name"] == name) and (reg_info["dwarf"] == dwarf_num):
return reg_info
return None

def decode_gdbremote_binary(self, encoded_bytes):
decoded_bytes = ""
i = 0
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Expand Up @@ -1125,4 +1125,14 @@ void *NativeRegisterContextLinux_arm64::GetSVEBuffer() {
return m_sve_ptrace_payload.data();
}

std::vector<uint32_t> NativeRegisterContextLinux_arm64::GetExpeditedRegisters(
ExpeditedRegs expType) const {
std::vector<uint32_t> expedited_reg_nums =
NativeRegisterContext::GetExpeditedRegisters(expType);
if (m_sve_state == SVEState::FPSIMD || m_sve_state == SVEState::Full)
expedited_reg_nums.push_back(GetRegisterInfo().GetRegNumSVEVG());

return expedited_reg_nums;
}

#endif // defined (__arm64__) || defined (__aarch64__)
Expand Up @@ -44,6 +44,9 @@ class NativeRegisterContextLinux_arm64 : public NativeRegisterContextLinux {

void InvalidateAllRegisters() override;

std::vector<uint32_t>
GetExpeditedRegisters(ExpeditedRegs expType) const override;

// Hardware breakpoints/watchpoint management functions

uint32_t NumSupportedHardwareBreakpoints() override;
Expand Down
Expand Up @@ -342,3 +342,5 @@ uint32_t RegisterInfoPOSIX_arm64::GetRegNumSVEFFR() const { return sve_ffr; }
uint32_t RegisterInfoPOSIX_arm64::GetRegNumFPCR() const { return fpu_fpcr; }

uint32_t RegisterInfoPOSIX_arm64::GetRegNumFPSR() const { return fpu_fpsr; }

uint32_t RegisterInfoPOSIX_arm64::GetRegNumSVEVG() const { return sve_vg; }
Expand Up @@ -101,6 +101,7 @@ class RegisterInfoPOSIX_arm64
uint32_t GetRegNumSVEFFR() const;
uint32_t GetRegNumFPCR() const;
uint32_t GetRegNumFPSR() const;
uint32_t GetRegNumSVEVG() const;

private:
typedef std::map<uint32_t, std::vector<lldb_private::RegisterInfo>>
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34 changes: 32 additions & 2 deletions lldb/test/API/tools/lldb-server/TestGdbRemoteExpeditedRegisters.py
Expand Up @@ -8,8 +8,8 @@ class TestGdbRemoteExpeditedRegisters(
gdbremote_testcase.GdbRemoteTestCaseBase):

mydir = TestBase.compute_mydir(__file__)
@skipIfDarwinEmbedded # <rdar://problem/34539270> lldb-server tests not updated to work on ios etc yet

# <rdar://problem/34539270> lldb-server tests not updated to work on ios etc yet
@skipIfDarwinEmbedded
def gather_expedited_registers(self):
# Setup the stub and set the gdb remote command stream.
procs = self.prep_debug_monitor_and_inferior(inferior_args=["sleep:2"])
Expand Down Expand Up @@ -58,6 +58,25 @@ def stop_notification_contains_generic_register(
self.assertTrue(reg_info["lldb_register_index"] in expedited_registers)
self.trace("{} reg_info:{}".format(generic_register_name, reg_info))

def stop_notification_contains_aarch64_vg_register(self):
# Generate a stop reply, parse out expedited registers from stop
# notification.
expedited_registers = self.gather_expedited_registers()
self.assertIsNotNone(expedited_registers)
self.assertTrue(len(expedited_registers) > 0)

# Gather target register infos.
reg_infos = self.gather_register_infos()

# Find the vg register.
reg_info = self.find_register_with_name_and_dwarf_regnum(
reg_infos, 'vg', '46')
self.assertIsNotNone(reg_info)

# Ensure the expedited registers contained it.
self.assertTrue(reg_info["lldb_register_index"] in expedited_registers)
self.trace("{} reg_info:{}".format('vg', reg_info))

def stop_notification_contains_any_registers(self):
# Generate a stop reply, parse out expedited registers from stop
# notification.
Expand Down Expand Up @@ -157,3 +176,14 @@ def test_stop_notification_contains_sp_register_llgs(self):
self.build()
self.set_inferior_startup_launch()
self.stop_notification_contains_sp_register()

@llgs_test
@skipIf(archs=no_match(["aarch64"]))
@skipIf(oslist=no_match(['linux']))
def test_stop_notification_contains_vg_register_llgs(self):
if not self.isAArch64SVE():
self.skipTest('SVE registers must be supported.')
self.init_llgs_test()
self.build()
self.set_inferior_startup_launch()
self.stop_notification_contains_aarch64_vg_register()

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