[Clang][RISCV] Add description for test case . NFC

llvm · May 26, 2023 · 52d3255 · 52d3255
1 parent e4284a7
commit 52d3255
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-tuple-type.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-tuple-type.c
@@ -5,6 +5,7 @@
 // RUN: %clang_cc1 -triple riscv64 -target-feature +zve32x -disable-O0-optnone \
 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | FileCheck %s --check-prefix=AFTER_MEM2REG
 
+// This test case tests the lowering of RVV tuple types into LLVM IR.
 
 #include <riscv_vector.h>