diff --git a/llvm/test/CodeGen/X86/pr63430.ll b/llvm/test/CodeGen/X86/pr63430.ll
new file mode 100644
index 0000000000000..5e9c627f01ff8
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr63430.ll
@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --version 2
+; RUN: llc -mtriple=x86_64-unknown-linux < %s | FileCheck %s
+
+; TODO: This is a miscompile.
+define i1 @test(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5, i128 %x) {
+; CHECK-LABEL: test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq 8(%rsp), %rax
+; CHECK-NEXT:    xorps %xmm0, %xmm0
+; CHECK-NEXT:    movaps %xmm0, 8(%rsp)
+; CHECK-NEXT:    andq 16(%rsp), %rax
+; CHECK-NEXT:    cmpq $-1, %rax
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    retq
+  %alloca = alloca i128
+  store i128 %x, ptr %alloca
+  store i128 0, ptr %alloca
+  %cmp = icmp eq i128 %x, -1
+  ret i1 %cmp
+}