From 59d2ba2a3de976798a82cfd9d66e426907480ecf Mon Sep 17 00:00:00 2001 From: Quinn Pham Date: Tue, 20 Jul 2021 09:42:14 -0500 Subject: [PATCH] [PowerPC] Semachecking for XL compat builtin icbt This patch is in a series of patches to provide builtins for compatibility with the XL compiler. This patch adds semachecking for an already implemented builtin, `__icbt`. `__icbt` is only valid for Power8 and up. Reviewed By: #powerpc, nemanjai Differential Revision: https://reviews.llvm.org/D105834 --- clang/lib/Sema/SemaChecking.cpp | 3 + .../test/CodeGen/builtins-ppc-xlcompat-pwr8.c | 33 +++ .../test/CodeGen/builtins-ppc-xlcompat-sync.c | 203 +++++------------- llvm/include/llvm/IR/IntrinsicsPowerPC.td | 1 - .../PowerPC/builtins-ppc-xlcompat-sync-32.ll | 15 -- .../PowerPC/builtins-ppc-xlcompat-sync-64.ll | 1 - 6 files changed, 92 insertions(+), 164 deletions(-) create mode 100644 clang/test/CodeGen/builtins-ppc-xlcompat-pwr8.c diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp index e6f79227979dc..1b39393eb5e98 100644 --- a/clang/lib/Sema/SemaChecking.cpp +++ b/clang/lib/Sema/SemaChecking.cpp @@ -3433,6 +3433,9 @@ bool Sema::CheckPPCBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, return SemaBuiltinConstantArgPower2(TheCall, 0); case PPC::BI__builtin_ppc_rdlam: return SemaValueIsRunOfOnes(TheCall, 2); + case PPC::BI__builtin_ppc_icbt: + return SemaFeatureCheck(*this, TheCall, "isa-v207-instructions", + diag::err_ppc_builtin_only_on_arch, "8"); #define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \ case PPC::BI__builtin_##Name: \ return SemaBuiltinPPCMMACall(TheCall, Types); diff --git a/clang/test/CodeGen/builtins-ppc-xlcompat-pwr8.c b/clang/test/CodeGen/builtins-ppc-xlcompat-pwr8.c new file mode 100644 index 0000000000000..c57302d996005 --- /dev/null +++ b/clang/test/CodeGen/builtins-ppc-xlcompat-pwr8.c @@ -0,0 +1,33 @@ +// REQUIRES: powerpc-registered-target +// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s \ +// RUN: -target-cpu pwr8 -o - | FileCheck %s -check-prefix=CHECK-PWR8 +// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \ +// RUN: -target-cpu pwr8 -o - | FileCheck %s -check-prefix=CHECK-PWR8 +// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \ +// RUN: -target-cpu pwr8 -o - | FileCheck %s -check-prefix=CHECK-PWR8 +// RUN: %clang_cc1 -triple powerpc-unknown-aix %s -emit-llvm %s \ +// RUN: -target-cpu pwr8 -o - | FileCheck %s -check-prefix=CHECK-PWR8 +// RUN: not %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s \ +// RUN: -target-cpu pwr7 2>&1 | FileCheck %s -check-prefix=CHECK-NOPWR8 +// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \ +// RUN: -target-cpu pwr7 2>&1 | FileCheck %s -check-prefix=CHECK-NOPWR8 +// RUN: not %clang_cc1 -triple powerpc-unknown-aix %s -emit-llvm %s \ +// RUN: -target-cpu pwr7 2>&1 | FileCheck %s -check-prefix=CHECK-NOPWR8 + +extern void *a; + +void test_icbt() { +// CHECK-LABEL: @test_icbt( + + __icbt(a); +// CHECK-PWR8: call void @llvm.ppc.icbt(i8* %0) +// CHECK-NOPWR8: error: this builtin is only valid on POWER8 or later CPUs +} + +void test_builtin_ppc_icbt() { +// CHECK-LABEL: @test_builtin_ppc_icbt( + + __builtin_ppc_icbt(a); +// CHECK-PWR8: call void @llvm.ppc.icbt(i8* %0) +// CHECK-NOPWR8: error: this builtin is only valid on POWER8 or later CPUs +} diff --git a/clang/test/CodeGen/builtins-ppc-xlcompat-sync.c b/clang/test/CodeGen/builtins-ppc-xlcompat-sync.c index 1aeec57151b7c..cd35222ca35ad 100644 --- a/clang/test/CodeGen/builtins-ppc-xlcompat-sync.c +++ b/clang/test/CodeGen/builtins-ppc-xlcompat-sync.c @@ -1,4 +1,3 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: powerpc-registered-target // RUN: %clang_cc1 -triple powerpc64-unknown-unknown \ // RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s @@ -14,15 +13,13 @@ extern const void *b; extern void *c; // CHECK-LABEL: @test_popcntb( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @a, align 8 +// CHECK: [[TMP0:%.*]] = load i64, i64* @a, align 8 // CHECK-NEXT: [[TMP1:%.*]] = load i64, i64* @a, align 8 // CHECK-NEXT: [[POPCNTB:%.*]] = call i64 @llvm.ppc.popcntb.i64.i64(i64 [[TMP0]]) // CHECK-NEXT: ret i64 [[POPCNTB]] // // CHECK-32-LABEL: @test_popcntb( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-32: [[TMP0:%.*]] = load i32, i32* @a, align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 // CHECK-32-NEXT: [[POPCNTB:%.*]] = call i32 @llvm.ppc.popcntb.i32.i32(i32 [[TMP0]]) // CHECK-32-NEXT: ret i32 [[POPCNTB]] @@ -32,13 +29,11 @@ unsigned long test_popcntb() { } // CHECK-LABEL: @test_eieio( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.eieio() +// CHECK: call void @llvm.ppc.eieio() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_eieio( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.eieio() +// CHECK-32: call void @llvm.ppc.eieio() // CHECK-32-NEXT: ret void // void test_eieio() { @@ -46,13 +41,11 @@ void test_eieio() { } // CHECK-LABEL: @test_iospace_eieio( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.iospace.eieio() +// CHECK: call void @llvm.ppc.iospace.eieio() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_iospace_eieio( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.iospace.eieio() +// CHECK-32: call void @llvm.ppc.iospace.eieio() // CHECK-32-NEXT: ret void // void test_iospace_eieio() { @@ -60,13 +53,11 @@ void test_iospace_eieio() { } // CHECK-LABEL: @test_isync( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.isync() +// CHECK: call void @llvm.ppc.isync() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_isync( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.isync() +// CHECK-32: call void @llvm.ppc.isync() // CHECK-32-NEXT: ret void // void test_isync() { @@ -74,13 +65,11 @@ void test_isync() { } // CHECK-LABEL: @test_lwsync( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.lwsync() +// CHECK: call void @llvm.ppc.lwsync() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_lwsync( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.lwsync() +// CHECK-32: call void @llvm.ppc.lwsync() // CHECK-32-NEXT: ret void // void test_lwsync() { @@ -88,13 +77,11 @@ void test_lwsync() { } // CHECK-LABEL: @test_iospace_lwsync( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.iospace.lwsync() +// CHECK: call void @llvm.ppc.iospace.lwsync() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_iospace_lwsync( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.iospace.lwsync() +// CHECK-32: call void @llvm.ppc.iospace.lwsync() // CHECK-32-NEXT: ret void // void test_iospace_lwsync() { @@ -102,13 +89,11 @@ void test_iospace_lwsync() { } // CHECK-LABEL: @test_sync( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.sync() +// CHECK: call void @llvm.ppc.sync() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_sync( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.sync() +// CHECK-32: call void @llvm.ppc.sync() // CHECK-32-NEXT: ret void // void test_sync() { @@ -116,13 +101,11 @@ void test_sync() { } // CHECK-LABEL: @test_iospace_sync( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.iospace.sync() +// CHECK: call void @llvm.ppc.iospace.sync() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_iospace_sync( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.iospace.sync() +// CHECK-32: call void @llvm.ppc.iospace.sync() // CHECK-32-NEXT: ret void // void test_iospace_sync() { @@ -130,14 +113,12 @@ void test_iospace_sync() { } // CHECK-LABEL: @test_dcbfl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @b, align 8 +// CHECK: [[TMP0:%.*]] = load i8*, i8** @b, align 8 // CHECK-NEXT: call void @llvm.ppc.dcbfl(i8* [[TMP0]]) // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_dcbfl( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @b, align 4 +// CHECK-32: [[TMP0:%.*]] = load i8*, i8** @b, align 4 // CHECK-32-NEXT: call void @llvm.ppc.dcbfl(i8* [[TMP0]]) // CHECK-32-NEXT: ret void // @@ -146,14 +127,12 @@ void test_dcbfl() { } // CHECK-LABEL: @test_dcbflp( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @b, align 8 +// CHECK: [[TMP0:%.*]] = load i8*, i8** @b, align 8 // CHECK-NEXT: call void @llvm.ppc.dcbflp(i8* [[TMP0]]) // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_dcbflp( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @b, align 4 +// CHECK-32: [[TMP0:%.*]] = load i8*, i8** @b, align 4 // CHECK-32-NEXT: call void @llvm.ppc.dcbflp(i8* [[TMP0]]) // CHECK-32-NEXT: ret void // @@ -162,14 +141,12 @@ void test_dcbflp() { } // CHECK-LABEL: @test_dcbst( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @b, align 8 +// CHECK: [[TMP0:%.*]] = load i8*, i8** @b, align 8 // CHECK-NEXT: call void @llvm.ppc.dcbst(i8* [[TMP0]]) // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_dcbst( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @b, align 4 +// CHECK-32: [[TMP0:%.*]] = load i8*, i8** @b, align 4 // CHECK-32-NEXT: call void @llvm.ppc.dcbst(i8* [[TMP0]]) // CHECK-32-NEXT: ret void // @@ -178,14 +155,12 @@ void test_dcbst() { } // CHECK-LABEL: @test_dcbt( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 8 +// CHECK: [[TMP0:%.*]] = load i8*, i8** @c, align 8 // CHECK-NEXT: call void @llvm.ppc.dcbt(i8* [[TMP0]]) // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_dcbt( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 4 +// CHECK-32: [[TMP0:%.*]] = load i8*, i8** @c, align 4 // CHECK-32-NEXT: call void @llvm.ppc.dcbt(i8* [[TMP0]]) // CHECK-32-NEXT: ret void // @@ -194,14 +169,12 @@ void test_dcbt() { } // CHECK-LABEL: @test_dcbtst( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 8 +// CHECK: [[TMP0:%.*]] = load i8*, i8** @c, align 8 // CHECK-NEXT: call void @llvm.ppc.dcbtst(i8* [[TMP0]]) // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_dcbtst( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 4 +// CHECK-32: [[TMP0:%.*]] = load i8*, i8** @c, align 4 // CHECK-32-NEXT: call void @llvm.ppc.dcbtst(i8* [[TMP0]]) // CHECK-32-NEXT: ret void // @@ -210,14 +183,12 @@ void test_dcbtst() { } // CHECK-LABEL: @test_dcbz( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 8 +// CHECK: [[TMP0:%.*]] = load i8*, i8** @c, align 8 // CHECK-NEXT: call void @llvm.ppc.dcbz(i8* [[TMP0]]) // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_dcbz( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 4 +// CHECK-32: [[TMP0:%.*]] = load i8*, i8** @c, align 4 // CHECK-32-NEXT: call void @llvm.ppc.dcbz(i8* [[TMP0]]) // CHECK-32-NEXT: ret void // @@ -225,33 +196,14 @@ void test_dcbz() { __dcbz(c); } -// FIXME: __icbt is only valid for pwr8 and up. -// CHECK-LABEL: @test_icbt( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 8 -// CHECK-NEXT: call void @llvm.ppc.icbt(i8* [[TMP0]]) -// CHECK-NEXT: ret void -// -// CHECK-32-LABEL: @test_icbt( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 4 -// CHECK-32-NEXT: call void @llvm.ppc.icbt(i8* [[TMP0]]) -// CHECK-32-NEXT: ret void -// -void test_icbt() { - __icbt(c); -} - // CHECK-LABEL: @test_builtin_ppc_popcntb( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @a, align 8 +// CHECK: [[TMP0:%.*]] = load i64, i64* @a, align 8 // CHECK-NEXT: [[TMP1:%.*]] = load i64, i64* @a, align 8 // CHECK-NEXT: [[POPCNTB:%.*]] = call i64 @llvm.ppc.popcntb.i64.i64(i64 [[TMP0]]) // CHECK-NEXT: ret i64 [[POPCNTB]] // // CHECK-32-LABEL: @test_builtin_ppc_popcntb( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-32: [[TMP0:%.*]] = load i32, i32* @a, align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 // CHECK-32-NEXT: [[POPCNTB:%.*]] = call i32 @llvm.ppc.popcntb.i32.i32(i32 [[TMP0]]) // CHECK-32-NEXT: ret i32 [[POPCNTB]] @@ -261,13 +213,11 @@ unsigned long test_builtin_ppc_popcntb() { } // CHECK-LABEL: @test_builtin_ppc_eieio( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.eieio() +// CHECK: call void @llvm.ppc.eieio() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_eieio( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.eieio() +// CHECK-32: call void @llvm.ppc.eieio() // CHECK-32-NEXT: ret void // void test_builtin_ppc_eieio() { @@ -275,13 +225,11 @@ void test_builtin_ppc_eieio() { } // CHECK-LABEL: @test_builtin_ppc_iospace_eieio( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.iospace.eieio() +// CHECK: call void @llvm.ppc.iospace.eieio() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_iospace_eieio( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.iospace.eieio() +// CHECK-32: call void @llvm.ppc.iospace.eieio() // CHECK-32-NEXT: ret void // void test_builtin_ppc_iospace_eieio() { @@ -289,13 +237,11 @@ void test_builtin_ppc_iospace_eieio() { } // CHECK-LABEL: @test_builtin_ppc_isync( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.isync() +// CHECK: call void @llvm.ppc.isync() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_isync( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.isync() +// CHECK-32: call void @llvm.ppc.isync() // CHECK-32-NEXT: ret void // void test_builtin_ppc_isync() { @@ -303,13 +249,11 @@ void test_builtin_ppc_isync() { } // CHECK-LABEL: @test_builtin_ppc_lwsync( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.lwsync() +// CHECK: call void @llvm.ppc.lwsync() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_lwsync( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.lwsync() +// CHECK-32: call void @llvm.ppc.lwsync() // CHECK-32-NEXT: ret void // void test_builtin_ppc_lwsync() { @@ -317,13 +261,11 @@ void test_builtin_ppc_lwsync() { } // CHECK-LABEL: @test_builtin_ppc_iospace_lwsync( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.iospace.lwsync() +// CHECK: call void @llvm.ppc.iospace.lwsync() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_iospace_lwsync( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.iospace.lwsync() +// CHECK-32: call void @llvm.ppc.iospace.lwsync() // CHECK-32-NEXT: ret void // void test_builtin_ppc_iospace_lwsync() { @@ -331,13 +273,11 @@ void test_builtin_ppc_iospace_lwsync() { } // CHECK-LABEL: @test_builtin_ppc_sync( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.sync() +// CHECK: call void @llvm.ppc.sync() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_sync( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.sync() +// CHECK-32: call void @llvm.ppc.sync() // CHECK-32-NEXT: ret void // void test_builtin_ppc_sync() { @@ -345,13 +285,11 @@ void test_builtin_ppc_sync() { } // CHECK-LABEL: @test_builtin_ppc_iospace_sync( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.ppc.iospace.sync() +// CHECK: call void @llvm.ppc.iospace.sync() // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_iospace_sync( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: call void @llvm.ppc.iospace.sync() +// CHECK-32: call void @llvm.ppc.iospace.sync() // CHECK-32-NEXT: ret void // void test_builtin_ppc_iospace_sync() { @@ -359,14 +297,12 @@ void test_builtin_ppc_iospace_sync() { } // CHECK-LABEL: @test_builtin_ppc_dcbfl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @b, align 8 +// CHECK: [[TMP0:%.*]] = load i8*, i8** @b, align 8 // CHECK-NEXT: call void @llvm.ppc.dcbfl(i8* [[TMP0]]) // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_dcbfl( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @b, align 4 +// CHECK-32: [[TMP0:%.*]] = load i8*, i8** @b, align 4 // CHECK-32-NEXT: call void @llvm.ppc.dcbfl(i8* [[TMP0]]) // CHECK-32-NEXT: ret void // @@ -375,14 +311,12 @@ void test_builtin_ppc_dcbfl() { } // CHECK-LABEL: @test_builtin_ppc_dcbflp( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @b, align 8 +// CHECK: [[TMP0:%.*]] = load i8*, i8** @b, align 8 // CHECK-NEXT: call void @llvm.ppc.dcbflp(i8* [[TMP0]]) // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_dcbflp( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @b, align 4 +// CHECK-32: [[TMP0:%.*]] = load i8*, i8** @b, align 4 // CHECK-32-NEXT: call void @llvm.ppc.dcbflp(i8* [[TMP0]]) // CHECK-32-NEXT: ret void // @@ -391,14 +325,12 @@ void test_builtin_ppc_dcbflp() { } // CHECK-LABEL: @test_builtin_ppc_dcbst( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @b, align 8 +// CHECK: [[TMP0:%.*]] = load i8*, i8** @b, align 8 // CHECK-NEXT: call void @llvm.ppc.dcbst(i8* [[TMP0]]) // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_dcbst( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @b, align 4 +// CHECK-32: [[TMP0:%.*]] = load i8*, i8** @b, align 4 // CHECK-32-NEXT: call void @llvm.ppc.dcbst(i8* [[TMP0]]) // CHECK-32-NEXT: ret void // @@ -407,14 +339,12 @@ void test_builtin_ppc_dcbst() { } // CHECK-LABEL: @test_builtin_ppc_dcbt( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 8 +// CHECK: [[TMP0:%.*]] = load i8*, i8** @c, align 8 // CHECK-NEXT: call void @llvm.ppc.dcbt(i8* [[TMP0]]) // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_dcbt( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 4 +// CHECK-32: [[TMP0:%.*]] = load i8*, i8** @c, align 4 // CHECK-32-NEXT: call void @llvm.ppc.dcbt(i8* [[TMP0]]) // CHECK-32-NEXT: ret void // @@ -423,14 +353,12 @@ void test_builtin_ppc_dcbt() { } // CHECK-LABEL: @test_builtin_ppc_dcbtst( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 8 +// CHECK: [[TMP0:%.*]] = load i8*, i8** @c, align 8 // CHECK-NEXT: call void @llvm.ppc.dcbtst(i8* [[TMP0]]) // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_dcbtst( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 4 +// CHECK-32: [[TMP0:%.*]] = load i8*, i8** @c, align 4 // CHECK-32-NEXT: call void @llvm.ppc.dcbtst(i8* [[TMP0]]) // CHECK-32-NEXT: ret void // @@ -439,34 +367,15 @@ void test_builtin_ppc_dcbtst() { } // CHECK-LABEL: @test_builtin_ppc_dcbz( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 8 +// CHECK: [[TMP0:%.*]] = load i8*, i8** @c, align 8 // CHECK-NEXT: call void @llvm.ppc.dcbz(i8* [[TMP0]]) // CHECK-NEXT: ret void // // CHECK-32-LABEL: @test_builtin_ppc_dcbz( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 4 +// CHECK-32: [[TMP0:%.*]] = load i8*, i8** @c, align 4 // CHECK-32-NEXT: call void @llvm.ppc.dcbz(i8* [[TMP0]]) // CHECK-32-NEXT: ret void // void test_builtin_ppc_dcbz() { __builtin_ppc_dcbz(c); } - -// FIXME: __icbt is only valid for pwr8 and up. -// CHECK-LABEL: @test_builtin_ppc_icbt( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 8 -// CHECK-NEXT: call void @llvm.ppc.icbt(i8* [[TMP0]]) -// CHECK-NEXT: ret void -// -// CHECK-32-LABEL: @test_builtin_ppc_icbt( -// CHECK-32-NEXT: entry: -// CHECK-32-NEXT: [[TMP0:%.*]] = load i8*, i8** @c, align 4 -// CHECK-32-NEXT: call void @llvm.ppc.icbt(i8* [[TMP0]]) -// CHECK-32-NEXT: ret void -// -void test_builtin_ppc_icbt() { - __builtin_ppc_icbt(c); -} diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td index f494da3944344..4a83227cc7097 100644 --- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td +++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td @@ -1534,7 +1534,6 @@ let TargetPrefix = "ppc" in { [IntrArgMemOnly, NoCapture>]>; def int_ppc_dcbz : GCCBuiltin<"__builtin_ppc_dcbz">, Intrinsic<[], [llvm_ptr_ty], []>; -// FIXME: __icbt is only valid for pwr8 and up. def int_ppc_icbt : GCCBuiltin<"__builtin_ppc_icbt">, Intrinsic<[], [llvm_ptr_ty], []>; diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll index 74cc1a0c7842c..58e7b729cd436 100644 --- a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll +++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll @@ -60,18 +60,3 @@ entry: ret void } declare void @llvm.ppc.iospace.sync() - -; FIXME: __icbt is only valid for pwr8 and up. -define dso_local void @test_builtin_ppc_icbt() { -; CHECK-LABEL: test_builtin_ppc_icbt: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: lwz 3, -8(1) -; CHECK-NEXT: icbt 0, 0, 3 -; CHECK-NEXT: blr -entry: - %a = alloca i8*, align 8 - %0 = load i8*, i8** %a, align 8 - call void @llvm.ppc.icbt(i8* %0) - ret void -} -declare void @llvm.ppc.icbt(i8*) diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll index 750039d66a3ce..c31c53402e631 100644 --- a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll +++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll @@ -94,7 +94,6 @@ entry: } declare void @llvm.ppc.iospace.sync() -; FIXME: __icbt is only valid for pwr8 and up. define dso_local void @test_builtin_ppc_icbt() { ; CHECK-LABEL: test_builtin_ppc_icbt: ; CHECK: # %bb.0: # %entry