From 63233da7230a9c7c674483ccc75976aba07197cb Mon Sep 17 00:00:00 2001
From: "Luo, Yuanke" <yuanke.luo@intel.com>
Date: Thu, 10 Jun 2021 22:36:17 +0800
Subject: [PATCH] [X86][NFC] Fix typo.

---
 llvm/lib/Target/X86/X86FastTileConfig.cpp |  2 +-
 llvm/lib/Target/X86/X86LowerAMXType.cpp   | 12 ++++++------
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/Target/X86/X86FastTileConfig.cpp b/llvm/lib/Target/X86/X86FastTileConfig.cpp
index d254928fa1dd8..baf45917d3208 100644
--- a/llvm/lib/Target/X86/X86FastTileConfig.cpp
+++ b/llvm/lib/Target/X86/X86FastTileConfig.cpp
@@ -10,7 +10,7 @@
 /// AMX register need to be configured before use. Before FastRegAllocation pass
 /// the ldtilecfg instruction is inserted, however at that time we don't
 /// know the shape of each physical tile registers, because the register
-/// allocation is not done yet. This pass runs after egister allocation
+/// allocation is not done yet. This pass runs after register allocation
 /// pass. It collects the shape information of each physical tile register
 /// and store the shape in the stack slot that is allocated for load config
 /// to tile config register.
diff --git a/llvm/lib/Target/X86/X86LowerAMXType.cpp b/llvm/lib/Target/X86/X86LowerAMXType.cpp
index 378ebc84c733e..f0c35fa37a46b 100644
--- a/llvm/lib/Target/X86/X86LowerAMXType.cpp
+++ b/llvm/lib/Target/X86/X86LowerAMXType.cpp
@@ -457,7 +457,7 @@ class X86VolatileTileData {
 public:
   X86VolatileTileData(Function &Func) : F(Func) {}
   Value *updatePhiIncomings(BasicBlock *BB,
-                            SmallVector<Instruction *, 2> &Imcomings);
+                            SmallVector<Instruction *, 2> &Incomings);
   void replacePhiDefWithLoad(Instruction *PHI, Value *StorePtr);
   bool volatileTileData();
   void volatileTilePHI(PHINode *Inst);
@@ -465,10 +465,10 @@ class X86VolatileTileData {
 };
 
 Value *X86VolatileTileData::updatePhiIncomings(
-    BasicBlock *BB, SmallVector<Instruction *, 2> &Imcomings) {
+    BasicBlock *BB, SmallVector<Instruction *, 2> &Incomings) {
   Value *I8Ptr = getAllocaPos(BB);
 
-  for (auto *I : Imcomings) {
+  for (auto *I : Incomings) {
     User *Store = createTileStore(I, I8Ptr);
 
     // All its uses (except phi) should load from stored mem.
@@ -546,16 +546,16 @@ void X86VolatileTileData::replacePhiDefWithLoad(Instruction *PHI,
 // ------------------------------------------------------
 void X86VolatileTileData::volatileTilePHI(PHINode *PHI) {
   BasicBlock *BB = PHI->getParent();
-  SmallVector<Instruction *, 2> Imcomings;
+  SmallVector<Instruction *, 2> Incomings;
 
   for (unsigned I = 0, E = PHI->getNumIncomingValues(); I != E; ++I) {
     Value *Op = PHI->getIncomingValue(I);
     Instruction *Inst = dyn_cast<Instruction>(Op);
     assert(Inst && "We shouldn't fold AMX instrution!");
-    Imcomings.push_back(Inst);
+    Incomings.push_back(Inst);
   }
 
-  Value *StorePtr = updatePhiIncomings(BB, Imcomings);
+  Value *StorePtr = updatePhiIncomings(BB, Incomings);
   replacePhiDefWithLoad(PHI, StorePtr);
 }