diff --git a/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp b/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
index 169d1866df583..62154c737da03 100644
--- a/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
+++ b/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
@@ -198,6 +198,7 @@ static bool hasAllWUsers(const MachineInstr &OrigMI, MachineRegisterInfo &MRI) {
       case RISCV::XORI:
 
       case RISCV::ANDN:
+      case RISCV::BREV8:
       case RISCV::CLMUL:
       case RISCV::ORC_B:
       case RISCV::ORN: