From 6bfe28e92f6e46ddb07430a177a6be1250a99878 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Tue, 11 Sep 2018 11:32:54 +0700 Subject: [PATCH] AMDGPU: Fix annotate kernel features through casted calls I thought I was testing this before, but the workitem id x case isn't great since it's mandatory in the parent kernel. --- .../AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 3 ++- .../AMDGPU/annotate-kernel-features-hsa-call.ll | 15 +++++++++++++++ 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp index 8aafcd40e1cfe..1755ec14369ce 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp @@ -289,7 +289,8 @@ bool AMDGPUAnnotateKernelFeatures::addFeatureAttributes(Function &F) { for (Instruction &I : BB) { CallSite CS(&I); if (CS) { - Function *Callee = CS.getCalledFunction(); + const Function *Callee + = dyn_cast(CS.getCalledValue()->stripPointerCasts()); // TODO: Do something with indirect calls. if (!Callee) { diff --git a/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll b/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll index 9ae7cc84167bc..cec9c49de5b79 100644 --- a/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll +++ b/llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll @@ -295,6 +295,20 @@ define amdgpu_kernel void @func_kern_defined() #3 { ret void } +; HSA: define i32 @use_dispatch_ptr_ret_type() #20 { +define i32 @use_dispatch_ptr_ret_type() #1 { + %dispatch.ptr = call i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr() + store volatile i8 addrspace(4)* %dispatch.ptr, i8 addrspace(4)* addrspace(1)* undef + ret i32 0 +} + +; HSA: define float @func_indirect_use_dispatch_ptr_constexpr_cast_func() #20 { +define float @func_indirect_use_dispatch_ptr_constexpr_cast_func() #1 { + %f = call float bitcast (i32()* @use_dispatch_ptr_ret_type to float()*)() + %fadd = fadd float %f, 1.0 + ret float %fadd +} + attributes #0 = { nounwind readnone speculatable } attributes #1 = { nounwind "target-cpu"="fiji" } attributes #2 = { nounwind "target-cpu"="gfx900" } @@ -320,3 +334,4 @@ attributes #3 = { nounwind } ; HSA: attributes #17 = { nounwind "uniform-work-group-size"="false" } ; HSA: attributes #18 = { nounwind } ; HSA: attributes #19 = { nounwind "amdgpu-calls" "uniform-work-group-size"="false" } +; HSA: attributes #20 = { nounwind "amdgpu-dispatch-ptr" "target-cpu"="fiji" }