Skip to content

Commit

Permalink
[Power9] Processor Model for Scheduling
Browse files Browse the repository at this point in the history
PWR9 processor model for instruction scheduling. A subsequent patch will migrate
PWR9 to Post RA MIScheduler.
https://reviews.llvm.org/D24525

llvm-svn: 290102
  • Loading branch information
Ehsan Amiri committed Dec 19, 2016
1 parent c0eb996 commit 6c17bb0
Show file tree
Hide file tree
Showing 4 changed files with 1,145 additions and 3 deletions.
Loading

0 comments on commit 6c17bb0

Please sign in to comment.