diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp index 41cb511ad9b47..d08d05d4b2edb 100644 --- a/llvm/lib/CodeGen/TargetPassConfig.cpp +++ b/llvm/lib/CodeGen/TargetPassConfig.cpp @@ -956,6 +956,12 @@ void TargetPassConfig::addMachinePasses() { if (getOptLevel() != CodeGenOpt::None) addBlockPlacement(); + // Insert before XRay Instrumentation. + addPass(&FEntryInserterID, false); + + addPass(&XRayInstrumentationID, false); + addPass(&PatchableFunctionID, false); + addPreEmitPass(); if (TM->Options.EnableIPRA) @@ -968,12 +974,6 @@ void TargetPassConfig::addMachinePasses() { addPass(&StackMapLivenessID, false); addPass(&LiveDebugValuesID, false); - // Insert before XRay Instrumentation. - addPass(&FEntryInserterID, false); - - addPass(&XRayInstrumentationID, false); - addPass(&PatchableFunctionID, false); - if (TM->Options.EnableMachineOutliner && getOptLevel() != CodeGenOpt::None && EnableMachineOutliner != NeverOutline) { bool RunOnAllFunctions = (EnableMachineOutliner == AlwaysOutline); diff --git a/llvm/test/CodeGen/AArch64/O0-pipeline.ll b/llvm/test/CodeGen/AArch64/O0-pipeline.ll index 07170fa686312..9b7e2f6dd2882 100644 --- a/llvm/test/CodeGen/AArch64/O0-pipeline.ll +++ b/llvm/test/CodeGen/AArch64/O0-pipeline.ll @@ -63,14 +63,14 @@ ; CHECK-NEXT: AArch64 pseudo instruction expansion pass ; CHECK-NEXT: AArch64 speculation hardening pass ; CHECK-NEXT: Analyze Machine Code For Garbage Collection +; CHECK-NEXT: Insert fentry calls +; CHECK-NEXT: Insert XRay ops +; CHECK-NEXT: Implement the 'patchable-function' attribute ; CHECK-NEXT: AArch64 Branch Targets ; CHECK-NEXT: Branch relaxation pass ; CHECK-NEXT: Contiguously Lay Out Funclets ; CHECK-NEXT: StackMap Liveness Analysis ; CHECK-NEXT: Live DEBUG_VALUE analysis -; CHECK-NEXT: Insert fentry calls -; CHECK-NEXT: Insert XRay ops -; CHECK-NEXT: Implement the 'patchable-function' attribute ; CHECK-NEXT: Lazy Machine Block Frequency Analysis ; CHECK-NEXT: Machine Optimization Remark Emitter ; CHECK-NEXT: AArch64 Assembly Printer diff --git a/llvm/test/CodeGen/AArch64/O3-pipeline.ll b/llvm/test/CodeGen/AArch64/O3-pipeline.ll index 96f39f0d3d19f..bf489cbbae657 100644 --- a/llvm/test/CodeGen/AArch64/O3-pipeline.ll +++ b/llvm/test/CodeGen/AArch64/O3-pipeline.ll @@ -171,6 +171,9 @@ ; CHECK-NEXT: Machine Block Frequency Analysis ; CHECK-NEXT: MachinePostDominator Tree Construction ; CHECK-NEXT: Branch Probability Basic Block Placement +; CHECK-NEXT: Insert fentry calls +; CHECK-NEXT: Insert XRay ops +; CHECK-NEXT: Implement the 'patchable-function' attribute ; CHECK-NEXT: AArch64 load / store optimization pass ; CHECK-NEXT: AArch64 Branch Targets ; CHECK-NEXT: Branch relaxation pass @@ -178,9 +181,6 @@ ; CHECK-NEXT: Contiguously Lay Out Funclets ; CHECK-NEXT: StackMap Liveness Analysis ; CHECK-NEXT: Live DEBUG_VALUE analysis -; CHECK-NEXT: Insert fentry calls -; CHECK-NEXT: Insert XRay ops -; CHECK-NEXT: Implement the 'patchable-function' attribute ; CHECK-NEXT: Machine Outliner ; CHECK-NEXT: FunctionPass Manager ; CHECK-NEXT: Lazy Machine Block Frequency Analysis diff --git a/llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll b/llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll new file mode 100644 index 0000000000000..9b406d45da6eb --- /dev/null +++ b/llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll @@ -0,0 +1,24 @@ +; RUN: llc -mtriple=aarch64 %s -o - | FileCheck --check-prefixes=CHECK %s + +define i32 @f0() "patchable-function-entry"="0" "branch-target-enforcement" { +; CHECK-LABEL: f0: +; CHECK-NEXT: .Lfunc_begin0: +; CHECK: hint #34 +; CHECK-NEXT: mov w0, wzr +; CHECK: .section __patchable_function_entries,"awo",@progbits,f0,unique,0 +; CHECK-NEXT: .p2align 3 +; CHECK-NEXT: .xword .Lfunc_begin0 + ret i32 0 +} + +define i32 @f1() "patchable-function-entry"="1" "branch-target-enforcement" { +; CHECK-LABEL: f1: +; CHECK-NEXT: .Lfunc_begin1: +; CHECK: hint #34 +; CHECK-NEXT: nop +; CHECK-NEXT: mov w0, wzr +; CHECK: .section __patchable_function_entries,"awo",@progbits,f0,unique,0 +; CHECK-NEXT: .p2align 3 +; CHECK-NEXT: .xword .Lfunc_begin1 + ret i32 0 +} diff --git a/llvm/test/CodeGen/ARM/O3-pipeline.ll b/llvm/test/CodeGen/ARM/O3-pipeline.ll index 42bad7c748754..8a9f84d3fd577 100644 --- a/llvm/test/CodeGen/ARM/O3-pipeline.ll +++ b/llvm/test/CodeGen/ARM/O3-pipeline.ll @@ -156,6 +156,9 @@ ; CHECK-NEXT: Machine Block Frequency Analysis ; CHECK-NEXT: MachinePostDominator Tree Construction ; CHECK-NEXT: Branch Probability Basic Block Placement +; CHECK-NEXT: Insert fentry calls +; CHECK-NEXT: Insert XRay ops +; CHECK-NEXT: Implement the 'patchable-function' attribute ; CHECK-NEXT: Thumb2 instruction size reduce pass ; CHECK-NEXT: Unpack machine instruction bundles ; CHECK-NEXT: optimise barriers pass @@ -168,9 +171,6 @@ ; CHECK-NEXT: Contiguously Lay Out Funclets ; CHECK-NEXT: StackMap Liveness Analysis ; CHECK-NEXT: Live DEBUG_VALUE analysis -; CHECK-NEXT: Insert fentry calls -; CHECK-NEXT: Insert XRay ops -; CHECK-NEXT: Implement the 'patchable-function' attribute ; CHECK-NEXT: Lazy Machine Block Frequency Analysis ; CHECK-NEXT: Machine Optimization Remark Emitter ; CHECK-NEXT: ARM Assembly Printer diff --git a/llvm/test/CodeGen/X86/O0-pipeline.ll b/llvm/test/CodeGen/X86/O0-pipeline.ll index 33ecad677a63c..d6f2fef13fec9 100644 --- a/llvm/test/CodeGen/X86/O0-pipeline.ll +++ b/llvm/test/CodeGen/X86/O0-pipeline.ll @@ -61,6 +61,9 @@ ; CHECK-NEXT: Post-RA pseudo instruction expansion pass ; CHECK-NEXT: X86 pseudo instruction expansion pass ; CHECK-NEXT: Analyze Machine Code For Garbage Collection +; CHECK-NEXT: Insert fentry calls +; CHECK-NEXT: Insert XRay ops +; CHECK-NEXT: Implement the 'patchable-function' attribute ; CHECK-NEXT: X86 Indirect Branch Tracking ; CHECK-NEXT: X86 vzeroupper inserter ; CHECK-NEXT: X86 Discriminate Memory Operands @@ -68,9 +71,6 @@ ; CHECK-NEXT: Contiguously Lay Out Funclets ; CHECK-NEXT: StackMap Liveness Analysis ; CHECK-NEXT: Live DEBUG_VALUE analysis -; CHECK-NEXT: Insert fentry calls -; CHECK-NEXT: Insert XRay ops -; CHECK-NEXT: Implement the 'patchable-function' attribute ; CHECK-NEXT: X86 Retpoline Thunks ; CHECK-NEXT: Check CFA info and insert CFI instructions if needed ; CHECK-NEXT: Lazy Machine Block Frequency Analysis diff --git a/llvm/test/CodeGen/X86/O3-pipeline.ll b/llvm/test/CodeGen/X86/O3-pipeline.ll index 575b704b8b4cb..c645bb63639a3 100644 --- a/llvm/test/CodeGen/X86/O3-pipeline.ll +++ b/llvm/test/CodeGen/X86/O3-pipeline.ll @@ -159,6 +159,9 @@ ; CHECK-NEXT: Machine Block Frequency Analysis ; CHECK-NEXT: MachinePostDominator Tree Construction ; CHECK-NEXT: Branch Probability Basic Block Placement +; CHECK-NEXT: Insert fentry calls +; CHECK-NEXT: Insert XRay ops +; CHECK-NEXT: Implement the 'patchable-function' attribute ; CHECK-NEXT: ReachingDefAnalysis ; CHECK-NEXT: X86 Execution Dependency Fix ; CHECK-NEXT: BreakFalseDeps @@ -177,9 +180,6 @@ ; CHECK-NEXT: Contiguously Lay Out Funclets ; CHECK-NEXT: StackMap Liveness Analysis ; CHECK-NEXT: Live DEBUG_VALUE analysis -; CHECK-NEXT: Insert fentry calls -; CHECK-NEXT: Insert XRay ops -; CHECK-NEXT: Implement the 'patchable-function' attribute ; CHECK-NEXT: X86 Retpoline Thunks ; CHECK-NEXT: Check CFA info and insert CFI instructions if needed ; CHECK-NEXT: Lazy Machine Block Frequency Analysis