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[lldb] [Process/NetBSD] Add register info for missing register sets

Add info for all register sets supported in NetBSD, particularly for all
registers 'expected' by LLDB.  This is necessary in order to fix
python_api/lldbutil/iter/TestRegistersIterator.py test that currently
fails due to missing names of register sets (None).

This copies fpreg descriptions from Linux, and combines Linux' AVX
and MPX registers into a single XState group, to fit NetBSD register
group design.  Technically, we do not support MPX registers
at the moment but gdb-remote insists on passing their errors anyway,
and if we do not include it in any group, they end up in a separate
anonymous group that breaks the test.

While at it, swap the enums for XState and DBRegs to match register set
ordering.

This also adds a few consts to the lldb-x86-register-enums.h to provide
more consistency between user registers and debug registers.

Differential Revision: https://reviews.llvm.org/D69667
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mgorny committed Oct 31, 2019
1 parent bd14bb4 commit 6eca4f46912a8318d7a5888506c3f26c20bdc012
@@ -59,7 +59,6 @@ def test_register_commands(self):
@skipIfTargetAndroid(archs=["i386"])
@skipIf(archs=no_match(['amd64', 'arm', 'i386', 'x86_64']))
@expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr37995")
@expectedFailureNetBSD
def test_fp_register_write(self):
"""Test commands that write to registers, in particular floating-point registers."""
self.build()
@@ -84,13 +84,71 @@ static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) -
k_num_gpr_registers_x86_64,
"g_gpr_regnums_x86_64 has wrong number of register infos");

// x86 64-bit floating point registers.
static const uint32_t g_fpu_regnums_x86_64[] = {
lldb_fctrl_x86_64, lldb_fstat_x86_64, lldb_ftag_x86_64,
lldb_fop_x86_64, lldb_fiseg_x86_64, lldb_fioff_x86_64,
lldb_foseg_x86_64, lldb_fooff_x86_64, lldb_mxcsr_x86_64,
lldb_mxcsrmask_x86_64, lldb_st0_x86_64, lldb_st1_x86_64,
lldb_st2_x86_64, lldb_st3_x86_64, lldb_st4_x86_64,
lldb_st5_x86_64, lldb_st6_x86_64, lldb_st7_x86_64,
lldb_mm0_x86_64, lldb_mm1_x86_64, lldb_mm2_x86_64,
lldb_mm3_x86_64, lldb_mm4_x86_64, lldb_mm5_x86_64,
lldb_mm6_x86_64, lldb_mm7_x86_64, lldb_xmm0_x86_64,
lldb_xmm1_x86_64, lldb_xmm2_x86_64, lldb_xmm3_x86_64,
lldb_xmm4_x86_64, lldb_xmm5_x86_64, lldb_xmm6_x86_64,
lldb_xmm7_x86_64, lldb_xmm8_x86_64, lldb_xmm9_x86_64,
lldb_xmm10_x86_64, lldb_xmm11_x86_64, lldb_xmm12_x86_64,
lldb_xmm13_x86_64, lldb_xmm14_x86_64, lldb_xmm15_x86_64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_fpu_regnums_x86_64) / sizeof(g_fpu_regnums_x86_64[0])) -
1 ==
k_num_fpr_registers_x86_64,
"g_fpu_regnums_x86_64 has wrong number of register infos");

// x86 64-bit registers available via XState.
static const uint32_t g_xstate_regnums_x86_64[] = {
lldb_ymm0_x86_64, lldb_ymm1_x86_64, lldb_ymm2_x86_64, lldb_ymm3_x86_64,
lldb_ymm4_x86_64, lldb_ymm5_x86_64, lldb_ymm6_x86_64, lldb_ymm7_x86_64,
lldb_ymm8_x86_64, lldb_ymm9_x86_64, lldb_ymm10_x86_64, lldb_ymm11_x86_64,
lldb_ymm12_x86_64, lldb_ymm13_x86_64, lldb_ymm14_x86_64, lldb_ymm15_x86_64,
// Note: we currently do not provide them but this is needed to avoid
// unnamed groups in SBFrame::GetRegisterContext().
lldb_bnd0_x86_64, lldb_bnd1_x86_64, lldb_bnd2_x86_64,
lldb_bnd3_x86_64, lldb_bndcfgu_x86_64, lldb_bndstatus_x86_64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_xstate_regnums_x86_64) / sizeof(g_xstate_regnums_x86_64[0])) -
1 ==
k_num_avx_registers_x86_64 + k_num_mpx_registers_x86_64,
"g_xstate_regnums_x86_64 has wrong number of register infos");

// x86 debug registers.
static const uint32_t g_dbr_regnums_x86_64[] = {
lldb_dr0_x86_64, lldb_dr1_x86_64, lldb_dr2_x86_64, lldb_dr3_x86_64,
lldb_dr4_x86_64, lldb_dr5_x86_64, lldb_dr6_x86_64, lldb_dr7_x86_64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_dbr_regnums_x86_64) / sizeof(g_dbr_regnums_x86_64[0])) -
1 ==
k_num_dbr_registers_x86_64,
"g_dbr_regnums_x86_64 has wrong number of register infos");

// Number of register sets provided by this context.
enum { k_num_extended_register_sets = 2, k_num_register_sets = 4 };
enum { k_num_register_sets = 4 };

// Register sets for x86 64-bit.
static const RegisterSet g_reg_sets_x86_64[k_num_register_sets] = {
{"General Purpose Registers", "gpr", k_num_gpr_registers_x86_64,
g_gpr_regnums_x86_64},
{"Floating Point Registers", "fpu", k_num_fpr_registers_x86_64,
g_fpu_regnums_x86_64},
{"Extended State Registers", "xstate",
k_num_avx_registers_x86_64 + k_num_mpx_registers_x86_64,
g_xstate_regnums_x86_64},
{"Debug Registers", "dbr", k_num_dbr_registers_x86_64,
g_dbr_regnums_x86_64},
};

#define REG_CONTEXT_SIZE (GetRegisterInfoInterface().GetGPRSize())
@@ -73,7 +73,7 @@ class NativeRegisterContextNetBSD_x86_64 : public NativeRegisterContextNetBSD {

private:
// Private member types.
enum { GPRegSet, FPRegSet, DBRegSet, XStateRegSet };
enum { GPRegSet, FPRegSet, XStateRegSet, DBRegSet };

// Private member variables.
struct reg m_gpr_x86_64;
@@ -294,14 +294,16 @@ enum {
lldb_bndstatus_x86_64,
k_last_mpxc_x86_64 = lldb_bndstatus_x86_64,

lldb_dr0_x86_64,
k_first_dbr_x86_64,
lldb_dr0_x86_64 = k_first_dbr_x86_64,
lldb_dr1_x86_64,
lldb_dr2_x86_64,
lldb_dr3_x86_64,
lldb_dr4_x86_64,
lldb_dr5_x86_64,
lldb_dr6_x86_64,
lldb_dr7_x86_64,
k_last_dbr_x86_64 = lldb_dr7_x86_64,

k_num_registers_x86_64,
k_num_gpr_registers_x86_64 = k_last_gpr_x86_64 - k_first_gpr_x86_64 + 1,
@@ -312,6 +314,7 @@ enum {
k_num_fpr_registers_x86_64 +
k_num_avx_registers_x86_64 +
k_num_mpx_registers_x86_64,
k_num_dbr_registers_x86_64 = k_last_dbr_x86_64 - k_first_dbr_x86_64 + 1,
};
}

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