diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index c79ff5b1590a4..95c80e55fc90f 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -45453,6 +45453,7 @@ static unsigned convertIntLogicToFPLogicOpcode(unsigned Opcode) { /// types, try to convert this into a floating point logic node to avoid /// unnecessary moves from SSE to integer registers. static SDValue convertIntLogicToFPLogic(SDNode *N, SelectionDAG &DAG, + TargetLowering::DAGCombinerInfo &DCI, const X86Subtarget &Subtarget) { EVT VT = N->getValueType(0); SDValue N0 = N->getOperand(0); @@ -45462,6 +45463,9 @@ static SDValue convertIntLogicToFPLogic(SDNode *N, SelectionDAG &DAG, if (N0.getOpcode() != ISD::BITCAST || N1.getOpcode() != ISD::BITCAST) return SDValue(); + if (DCI.isBeforeLegalizeOps()) + return SDValue(); + SDValue N00 = N0.getOperand(0); SDValue N10 = N1.getOperand(0); EVT N00Type = N00.getValueType(); @@ -45787,15 +45791,15 @@ static SDValue combineAnd(SDNode *N, SelectionDAG &DAG, if (SDValue R = combineBitOpWithMOVMSK(N, DAG)) return R; + if (SDValue FPLogic = convertIntLogicToFPLogic(N, DAG, DCI, Subtarget)) + return FPLogic; + if (DCI.isBeforeLegalizeOps()) return SDValue(); if (SDValue R = combineCompareEqual(N, DAG, DCI, Subtarget)) return R; - if (SDValue FPLogic = convertIntLogicToFPLogic(N, DAG, Subtarget)) - return FPLogic; - if (SDValue R = combineANDXORWithAllOnesIntoANDNP(N, DAG)) return R; @@ -46153,15 +46157,15 @@ static SDValue combineOr(SDNode *N, SelectionDAG &DAG, if (SDValue R = combineBitOpWithMOVMSK(N, DAG)) return R; + if (SDValue FPLogic = convertIntLogicToFPLogic(N, DAG, DCI, Subtarget)) + return FPLogic; + if (DCI.isBeforeLegalizeOps()) return SDValue(); if (SDValue R = combineCompareEqual(N, DAG, DCI, Subtarget)) return R; - if (SDValue FPLogic = convertIntLogicToFPLogic(N, DAG, Subtarget)) - return FPLogic; - if (SDValue R = canonicalizeBitSelect(N, DAG, Subtarget)) return R; @@ -48564,6 +48568,9 @@ static SDValue combineXor(SDNode *N, SelectionDAG &DAG, if (SDValue R = combineBitOpWithMOVMSK(N, DAG)) return R; + if (SDValue FPLogic = convertIntLogicToFPLogic(N, DAG, DCI, Subtarget)) + return FPLogic; + if (DCI.isBeforeLegalizeOps()) return SDValue(); @@ -48612,9 +48619,6 @@ static SDValue combineXor(SDNode *N, SelectionDAG &DAG, } } - if (SDValue FPLogic = convertIntLogicToFPLogic(N, DAG, Subtarget)) - return FPLogic; - return combineFneg(N, DAG, DCI, Subtarget); }