diff --git a/llvm/lib/Target/AMDGPU/AMDGPUGISel.td b/llvm/lib/Target/AMDGPU/AMDGPUGISel.td index 76406f3184900..820aa42c65b78 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUGISel.td +++ b/llvm/lib/Target/AMDGPU/AMDGPUGISel.td @@ -305,16 +305,16 @@ foreach Ty = [i64, p0, p1, p4] in { defm : SMRD_Pattern <"S_LOAD_DWORDX2", Ty>; } -def gi_as_i32timm : GICustomOperandRenderer<"renderTruncTImm32">, +def gi_as_i32timm : GICustomOperandRenderer<"renderTruncTImm">, GISDNodeXFormEquiv; -def gi_as_i16timm : GICustomOperandRenderer<"renderTruncTImm16">, +def gi_as_i16timm : GICustomOperandRenderer<"renderTruncTImm">, GISDNodeXFormEquiv; -def gi_as_i8timm : GICustomOperandRenderer<"renderTruncTImm8">, +def gi_as_i8timm : GICustomOperandRenderer<"renderTruncTImm">, GISDNodeXFormEquiv; -def gi_as_i1timm : GICustomOperandRenderer<"renderTruncTImm1">, +def gi_as_i1timm : GICustomOperandRenderer<"renderTruncTImm">, GISDNodeXFormEquiv; def gi_NegateImm : GICustomOperandRenderer<"renderNegateImm">, diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h index b25039078450e..ea561deb5f61d 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h @@ -275,26 +275,6 @@ class AMDGPUInstructionSelector final : public InstructionSelector { void renderTruncTImm(MachineInstrBuilder &MIB, const MachineInstr &MI, int OpIdx) const; - void renderTruncTImm1(MachineInstrBuilder &MIB, const MachineInstr &MI, - int OpIdx) const { - renderTruncTImm(MIB, MI, OpIdx); - } - - void renderTruncTImm8(MachineInstrBuilder &MIB, const MachineInstr &MI, - int OpIdx) const { - renderTruncTImm(MIB, MI, OpIdx); - } - - void renderTruncTImm16(MachineInstrBuilder &MIB, const MachineInstr &MI, - int OpIdx) const { - renderTruncTImm(MIB, MI, OpIdx); - } - - void renderTruncTImm32(MachineInstrBuilder &MIB, const MachineInstr &MI, - int OpIdx) const { - renderTruncTImm(MIB, MI, OpIdx); - } - void renderNegateImm(MachineInstrBuilder &MIB, const MachineInstr &MI, int OpIdx) const; diff --git a/llvm/test/TableGen/GlobalISelEmitter.td b/llvm/test/TableGen/GlobalISelEmitter.td index 6cae35fb49895..ef5c25ac4b5f1 100644 --- a/llvm/test/TableGen/GlobalISelEmitter.td +++ b/llvm/test/TableGen/GlobalISelEmitter.td @@ -51,9 +51,11 @@ def cimm8_xform : SDNodeXForm, ImmLeaf(Imm);}], cimm8_xform>; -def gi_cimm8 : GICustomOperandRenderer<"renderImm8">, +def gi_cimm8 : GICustomOperandRenderer<"renderImm">, GISDNodeXFormEquiv; +def gi_cimm9 : GICustomOperandRenderer<"renderImm">; + def m1 : OperandWithDefaultOps ; def Z : OperandWithDefaultOps ; def m1Z : OperandWithDefaultOps ; @@ -206,12 +208,12 @@ def HasC : Predicate<"Subtarget->hasC()"> { let RecomputePerFunction = 1; } // CHECK-LABEL: // Custom renderers. // CHECK-NEXT: enum { // CHECK-NEXT: GICR_Invalid, -// CHECK-NEXT: GICR_renderImm8, +// CHECK-NEXT: GICR_renderImm, // CHECK-NEXT: }; // CHECK-NEXT: MyTargetInstructionSelector::CustomRendererFn // CHECK-NEXT: MyTargetInstructionSelector::CustomRenderers[] = { // CHECK-NEXT: nullptr, // GICR_Invalid -// CHECK-NEXT: &MyTargetInstructionSelector::renderImm8, // gi_cimm8 +// CHECK-NEXT: &MyTargetInstructionSelector::renderImm, // CHECK-NEXT: }; // CHECK: bool MyTargetInstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const { @@ -906,7 +908,7 @@ def MOVimm9 : I<(outs GPR32:$dst), (ins i32imm:$imm), [(set GPR32:$dst, simm9:$i // NOOPT-NEXT: // (imm:{ *:[i32] })<><>:$imm => (MOVcimm8:{ *:[i32] } (cimm8_xform:{ *:[i32] } (imm:{ *:[i32] }):$imm)) // NOOPT-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/MyTarget::MOVcimm8, // NOOPT-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst -// NOOPT-NEXT: GIR_CustomRenderer, /*InsnID*/0, /*OldInsnID*/0, /*Renderer*/GICR_renderImm8, // imm +// NOOPT-NEXT: GIR_CustomRenderer, /*InsnID*/0, /*OldInsnID*/0, /*Renderer*/GICR_renderImm, // imm // NOOPT-NEXT: GIR_EraseFromParent, /*InsnID*/0, // NOOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0, // NOOPT-NEXT: // GIR_Coverage, 10, diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp index 0a6985a3eac23..843583aac468a 100644 --- a/llvm/utils/TableGen/GlobalISelEmitter.cpp +++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp @@ -5595,9 +5595,17 @@ void GlobalISelEmitter::run(raw_ostream &OS) { RK.getAllDerivedDefinitions("GIComplexOperandMatcher"); llvm::sort(ComplexPredicates, orderByName); - std::vector CustomRendererFns = - RK.getAllDerivedDefinitions("GICustomOperandRenderer"); - llvm::sort(CustomRendererFns, orderByName); + std::vector CustomRendererFns; + transform(RK.getAllDerivedDefinitions("GICustomOperandRenderer"), + std::back_inserter(CustomRendererFns), [](const auto &Record) { + return Record->getValueAsString("RendererFn"); + }); + // Sort and remove duplicates to get a list of unique renderer functions, in + // case some were mentioned more than once. + llvm::sort(CustomRendererFns); + CustomRendererFns.erase( + std::unique(CustomRendererFns.begin(), CustomRendererFns.end()), + CustomRendererFns.end()); unsigned MaxTemporaries = 0; for (const auto &Rule : Rules) @@ -5791,17 +5799,15 @@ void GlobalISelEmitter::run(raw_ostream &OS) { OS << "// Custom renderers.\n" << "enum {\n" << " GICR_Invalid,\n"; - for (const auto &Record : CustomRendererFns) - OS << " GICR_" << Record->getValueAsString("RendererFn") << ",\n"; + for (const auto &Fn : CustomRendererFns) + OS << " GICR_" << Fn << ",\n"; OS << "};\n"; OS << Target.getName() << "InstructionSelector::CustomRendererFn\n" << Target.getName() << "InstructionSelector::CustomRenderers[] = {\n" << " nullptr, // GICR_Invalid\n"; - for (const auto &Record : CustomRendererFns) - OS << " &" << Target.getName() - << "InstructionSelector::" << Record->getValueAsString("RendererFn") - << ", // " << Record->getName() << "\n"; + for (const auto &Fn : CustomRendererFns) + OS << " &" << Target.getName() << "InstructionSelector::" << Fn << ",\n"; OS << "};\n\n"; llvm::stable_sort(Rules, [&](const RuleMatcher &A, const RuleMatcher &B) {