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Revert "[AArch64] Add the pipeline model for Exynos M5"

as it's causing test failures in llvm-mca.

This reverts commit 9bdfee2.
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echristo committed Nov 21, 2019
1 parent 714aaba commit 8259182e51ccf23c13d670f6f0401ce33f6c742f
Showing with 35 additions and 3,349 deletions.
  1. +1 −2 llvm/lib/Target/AArch64/AArch64.td
  2. +0 −1,012 llvm/lib/Target/AArch64/AArch64SchedExynosM5.td
  3. +0 −57 llvm/test/tools/llvm-mca/AArch64/Exynos/aes.s
  4. +0 −189 llvm/test/tools/llvm-mca/AArch64/Exynos/asimd-ld1.s
  5. +0 −118 llvm/test/tools/llvm-mca/AArch64/Exynos/asimd-ld2.s
  6. +0 −118 llvm/test/tools/llvm-mca/AArch64/Exynos/asimd-ld3.s
  7. +0 −118 llvm/test/tools/llvm-mca/AArch64/Exynos/asimd-ld4.s
  8. +0 −169 llvm/test/tools/llvm-mca/AArch64/Exynos/asimd-st1.s
  9. +0 −97 llvm/test/tools/llvm-mca/AArch64/Exynos/asimd-st2.s
  10. +0 −97 llvm/test/tools/llvm-mca/AArch64/Exynos/asimd-st3.s
  11. +0 −97 llvm/test/tools/llvm-mca/AArch64/Exynos/asimd-st4.s
  12. +0 −58 llvm/test/tools/llvm-mca/AArch64/Exynos/crc.s
  13. +0 −8 llvm/test/tools/llvm-mca/AArch64/Exynos/direct-branch.s
  14. +0 −67 llvm/test/tools/llvm-mca/AArch64/Exynos/divide-multiply.s
  15. +0 −66 llvm/test/tools/llvm-mca/AArch64/Exynos/double-recp.s
  16. +0 −78 llvm/test/tools/llvm-mca/AArch64/Exynos/double-rsqrt.s
  17. +0 −79 llvm/test/tools/llvm-mca/AArch64/Exynos/double-sqrt.s
  18. +0 −16 llvm/test/tools/llvm-mca/AArch64/Exynos/extended-register.s
  19. +0 −94 llvm/test/tools/llvm-mca/AArch64/Exynos/float-divide-multiply.s
  20. +0 −114 llvm/test/tools/llvm-mca/AArch64/Exynos/float-integer.s
  21. +0 −153 llvm/test/tools/llvm-mca/AArch64/Exynos/float-load.s
  22. +0 −62 llvm/test/tools/llvm-mca/AArch64/Exynos/float-recp.s
  23. +0 −72 llvm/test/tools/llvm-mca/AArch64/Exynos/float-rsqrt.s
  24. +0 −73 llvm/test/tools/llvm-mca/AArch64/Exynos/float-sqrt.s
  25. +0 −142 llvm/test/tools/llvm-mca/AArch64/Exynos/float-store.s
  26. +0 −66 llvm/test/tools/llvm-mca/AArch64/Exynos/load.s
  27. +0 −6 llvm/test/tools/llvm-mca/AArch64/Exynos/scheduler-queue-usage.s
  28. +3 −19 llvm/test/tools/llvm-mca/AArch64/Exynos/shifted-register.s
  29. +0 −82 llvm/test/tools/llvm-mca/AArch64/Exynos/store.s
  30. +31 −20 llvm/test/tools/llvm-mca/AArch64/Exynos/zero-latency-move.s
@@ -450,7 +450,6 @@ include "AArch64SchedFalkor.td"
include "AArch64SchedKryo.td"
include "AArch64SchedExynosM3.td"
include "AArch64SchedExynosM4.td"
include "AArch64SchedExynosM5.td"
include "AArch64SchedThunderX.td"
include "AArch64SchedThunderX2T99.td"

@@ -791,7 +790,7 @@ def : ProcessorModel<"neoverse-n1", CortexA57Model, [ProcNeoverseN1]>;
def : ProcessorModel<"cyclone", CycloneModel, [ProcCyclone]>;
def : ProcessorModel<"exynos-m3", ExynosM3Model, [ProcExynosM3]>;
def : ProcessorModel<"exynos-m4", ExynosM4Model, [ProcExynosM4]>;
def : ProcessorModel<"exynos-m5", ExynosM5Model, [ProcExynosM4]>;
def : ProcessorModel<"exynos-m5", ExynosM4Model, [ProcExynosM4]>;
def : ProcessorModel<"falkor", FalkorModel, [ProcFalkor]>;
def : ProcessorModel<"saphira", FalkorModel, [ProcSaphira]>;
def : ProcessorModel<"kryo", KryoModel, [ProcKryo]>;

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