diff --git a/llvm/test/tools/llvm-mca/ARM/m4-int.s b/llvm/test/tools/llvm-mca/ARM/m4-int.s new file mode 100644 index 00000000000000..3dedacdeb2a3b0 --- /dev/null +++ b/llvm/test/tools/llvm-mca/ARM/m4-int.s @@ -0,0 +1,1321 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=thumbv7-m-none-none-eabi -mcpu=cortex-m4 -instruction-tables < %s | FileCheck %s + +adc r0, r1, #0 +adcs r0, r1, #0 +adcs r0, r1 +adc.w r0, r1, r2 +adcs.w r0, r1, r2 +adc.w r0, r1, r2, LSL #1 +adcs.w r0, r1, r2, LSL #1 +add r0, sp, #1 +add sp, #1 +add.w r0, sp, #1 +adds.w r0, sp, #1 +addw r0, sp, #1 +add r0, sp, r0 +add sp, r1 +add.w r0, sp, r1 +adds.w r0, sp, r1 +add.w r0, sp, r1, LSL #1 +adds.w r0, sp, r1, LSL #1 +adds r0, r1, #1 +adds r0, #42 +add.w r0, r1, #1 +adds.w r0, r1, #1 +addw r0, r1, #1 +adds r0, r1, r2 +add r0, r1 +add.w r0, r1, r2 +adds.w r0, r1, r2 +add.w r0, r1, r2, LSL #1 +adds.w r0, r1, r2, LSL #1 +adr r0, #-6 +adr r8, #-6 +adr.w r0, #-6 +and r0, r1, #1 +ands r0, r1, #1 +ands r1, r0 +and.w r0, r1, r2 +ands.w r0, r1, r2 +and.w r0, r1, r2, LSL #1 +ands.w r0, r1, r2, LSL #1 +asrs r0, r1, #1 +asr.w r0, r1, #1 +asrs.w r0, r1, #1 +asrs r0, r1 +asr.w r0, r1, r2 +asrs.w r0, r1, r2 +bfc r0, #1, #2 +bfi r0, r1, #1, #2 +bic r0, r1, #1 +bics r0, r1, #1 +bics r0, r1 +bic.w r0, r1, r2 +bics.w r0, r1, r2 +bic.w r0, r1, r2, LSL #1 +bics.w r0, r1, r2, LSL #1 +bkpt #1 +clrex +clz r0, r1 +cmn r0, #1 +cmn r0, r1 +cmn.w r0, r1 +cmn.w r0, r1, LSL #1 +cmp r0, #1 +cmp.w r0, #1 +cmp r0, r1 +cmp r0, r10 +cmp.w r0, r1 +cmp.w r0, r1, LSL #1 +#cpsdb 1 +#cpsie if +#dbg #1 +dmb +dsb +eor r0, r1, #1 +eors r0, r1, #1 +eors r0, r1 +eor.w r0, r1, r2 +eors.w r0, r1, r2 +eor.w r0, r1, r2, LSL #1 +eors.w r0, r1, r2, LSL #1 +isb +ldm r0!, {r1} +ldm r0, {r1} +ldm.w r0, {r1} +ldm.w r0!, {r1} +ldmdb r0, {r1} +ldmdb r0!, {r1} +ldr r0, [r1, #4] +ldr r0, [sp, #4] +ldr.w r0, [r1, #4] +ldr r0, [r1, #-1] +ldr r0, [r1], #1 +ldr r0, [r1, #1]! +ldr r0, #4 +ldr.w r0, #4 +ldr r0, next +ldr.w r0, next +ldr r0, [r1, r2] +ldr.w r0, [r1, r2] +ldr.w r0, [r1, r2, LSL #1] +ldrb r0, [r1, #1] +ldrb.w r0, [r1, #1] +ldrb r0, [r1, #-1] +ldrb r0, [r1], #1 +ldrb r0, [r1, #1]! +ldrb r0, #4 +ldrb r0, next +ldrb r0, [r1, r2] +ldrb.w r0, [r1, r2] +ldrb.w r0, [r1, r2, LSL #1] +ldrbt r0, [r1, #1] +ldrd r0, r2, [r1] +ldrd r0, r2, [r1, #-4] +ldrd r0, r2, [r1], #4 +ldrd r0, r2, [r1, #4]! +ldrd r0, r2, next +next: +ldrex r0, [r1] +ldrex r0, [r1, #4] +ldrexb r0, [r1] +ldrexh r0, [r1] +ldrh r0, [r1, #2] +ldrh.w r0, [r1, #1] +ldrh r0, [r1, #-1] +ldrh r0, [r1], #1 +ldrh r0, [r1, #1]! +ldrh r0, #4 +ldrh r0, next +ldrh r0, [r1, r2] +ldrh.w r0, [r1, r2] +ldrh.w r0, [r1, r2, LSL #1] +ldrht r0, [r1, #1] +ldrsb r0, [r1, #1] +ldrsb r0, [r1, #-1] +ldrsb r0, [r1], #1 +ldrsb r0, [r1, #1]! +ldrsb r0, #4 +ldrsb r0, next +ldrsb r0, [r1, r2] +ldrsb.w r0, [r1, r2] +ldrsb.w r0, [r1, r2, LSL #1] +ldrsbt r0, [r1, #1] +ldrsh r0, [r1, #2] +ldrsh r0, [r1, #-1] +ldrsh r0, [r1], #1 +ldrsh r0, [r1, #1]! +ldrsh r0, #4 +ldrsh r0, next +ldrsh r0, [r1, r2] +ldrsh.w r0, [r1, r2] +ldrsh.w r0, [r1, r2, LSL #1] +ldrsht r0, [r1, #1] +ldrt r0, [r1, #1] +lsls r0, r1, #1 +lsl.w r0, r1, #1 +lsls.w r0, r1, #1 +lsls r0, r1 +lsl.w r0, r1, r2 +lsls.w r0, r1, r2 +lsrs r0, r1, #1 +lsr.w r0, r1, #1 +lsrs.w r0, r1, #1 +lsrs r0, r1 +lsr.w r0, r1, r2 +lsrs.w r0, r1, r2 +mla r0, r1, r2, r3 +mls r0, r1, r2, r3 +movs r0, #1 +mov.w r0, #1 +movs.w r0, #1 +movw r0, #1 +mov r0, r1 +#movs r0, r1 +mov.w r0, r1 +movs.w r0, r1 +movt r0, #1 +mrs r0, apsr +msr apsr, r0 +muls r1, r2, r1 +mul r0, r1, r2 +mvn r0, #1 +mvns r0, #1 +mvns r0, r1 +mvn.w r0, r1 +mvns.w r0, r1 +mvn.w r0, r1, LSL #1 +mvns.w r0, r1, LSL #1 +nop +orn r0, r1, #1 +orns r0, r1, #1 +orn r0, r1, r2 +orns r0, r1, r2 +orn r0, r1, r2, LSL #1 +orns r0, r1, r2, LSL #1 +orr r0, r1, #1 +orrs r0, r1, #1 +orrs r0, r1 +orr r0, r1, r2 +orrs r0, r1, r2 +orr r0, r1, r2, LSL #1 +orrs r0, r1, r2, LSL #1 +pkhbt r0, r1, r2 +pkhbt r0, r1, r2, LSL #1 +pkhtb r0, r1, r2 +pkhtb r0, r1, r2, ASR #1 +pop { r0 } +pop.w { r0, r1 } +pop.w { r0 } +pssbb +push { r0 } +push.w { r0, r1 } +push.w { r0 } +qadd r0, r1, r2 +qadd16 r0, r1, r2 +qadd8 r0, r1, r2 +qasx r0, r1, r2 +qdadd r0, r1, r2 +qdsub r0, r1, r2 +qsax r0, r1, r2 +qsub r0, r1, r2 +qsub16 r0, r1, r2 +qsub8 r0, r1, r2 +rbit r0, r1 +rev r0, r1 +rev.w r0, r1 +rev16 r0, r1 +rev16.w r0, r1 +revsh r0, r1 +revsh.w r0, r1 +ror r0, r1, #1 +rors r0, r1, #1 +rors r0, r1 +ror.w r0, r1, r2 +rors.w r0, r1, r2 +rrx r0, r1 +rrxs r0, r1 +rsbs r0, r1, #0 +rsb.w r0, r1, #1 +rsbs.w r0, r1, #1 +rsb r0, r1, r2 +rsbs r0, r1, r2 +rsb r0, r1, r2, LSL #1 +rsbs r0, r1, r2, LSL #1 +sadd16 r0, r1, r2 +sadd8 r0, r1, r2 +sasx r0, r1, r2 +sbc r0, r1, #1 +sbcs r0, r1, #1 +sbcs r0, r1 +sbc r0, r1, r2 +sbcs r0, r1, r2 +sbc r0, r1, r2, LSL #1 +sbcs r0, r1, r2, LSL #1 +sbfx r0, r1, #1, #2 +sdiv r0, r1, r2 +sel r0, r1, r2 +sev +#sg +shadd16 r0, r1, r2 +shadd8 r0, r1, r2 +shasx r0, r1, r2 +shsax r0, r1, r2 +shsub16 r0, r1, r2 +shsub8 r0, r1, r2 +smlabb r0, r1, r2, r3 +smlabt r0, r1, r2, r3 +smlatb r0, r1, r2, r3 +smlatt r0, r1, r2, r3 +smlad r0, r1, r2, r3 +smladx r0, r1, r2, r3 +smlal r0, r1, r2, r3 +smlalbb r0, r1, r2, r3 +smlalbt r0, r1, r2, r3 +smlaltb r0, r1, r2, r3 +smlaltt r0, r1, r2, r3 +smlald r0, r1, r2, r3 +smlaldx r0, r1, r2, r3 +smlawb r0, r1, r2, r3 +smlawt r0, r1, r2, r3 +smlsd r0, r1, r2, r3 +smlsdx r0, r1, r2, r3 +smlsld r0, r1, r2, r3 +smlsldx r0, r1, r2, r3 +smmla r0, r1, r2, r3 +smmlar r0, r1, r2, r3 +smmls r0, r1, r2, r3 +smmlsr r0, r1, r2, r3 +smmul r0, r1, r2 +smmulr r0, r1, r2 +smuad r0, r1, r2 +smuadx r0, r1, r2 +smulbb r0, r1, r2 +smulbt r0, r1, r2 +smultb r0, r1, r2 +smultt r0, r1, r2 +smull r0, r1, r2, r3 +smulwb r0, r1, r2 +smulwt r0, r1, r2 +smusd r0, r1, r2 +smusdx r0, r1, r2 +ssat r0, #1, r2 +ssat r0, #1, r2, LSL #1 +ssat16 r0, #1, r1 +ssax r0, r1, r2 +ssbb +ssub16 r0, r1, r2 +ssub8 r0, r1, r2 +stm r0!, { r1 } +stm.w r0, { r1 } +stm.w r0!, { r1 } +stmdb r0, { r1 } +stmdb r0!, { r1 } +str r0, [ r1 ] +str r0, [ r1, #4 ] +str r0, [ sp, #4 ] +str.w r0, [ r1, #1 ] +str r0, [ r1, #-1 ] +str r0, [ r1 ], #1 +#str r0, [ r1, #1 ]! +str r0, [ r1, r2 ] +str.w r0, [ r1, r2 ] +str.w r0, [ r1, r2, LSL #1 ] +strb r0, [ r1 ] +strb r0, [ r1, #1 ] +strb.w r0, [ r1, #1 ] +strb r0, [ r1, #-1 ] +strb r0, [ r1 ], #1 +strb r0, [ r1, #1 ]! +strb r0, [ r1, r2 ] +strb.w r0, [ r1, r2 ] +strb.w r0, [ r1, r2, LSL #1 ] +strbt r0, [ r1, #1 ] +strd r0, r1, [ r2, #4 ] +strd r0, r1, [ r2 ], #4 +strd r0, r1, [ r2, #4 ]! +strex r0, r1, [ r2 ] +strex r0, r1, [ r2, #4 ] +strexb r0, r1, [ r2 ] +strexh r0, r1, [ r2 ] +strh r0, [ r1 ] +strh r0, [ r1, #2 ] +strh.w r0, [ r1, #2 ] +strh r0, [ r1, #-1 ] +strh r0, [ r1 ], #1 +strh r0, [ r1, #1 ]! +strh r0, [ r1, r2 ] +strh.w r0, [ r1, r2 ] +strh.w r0, [ r1, r2, LSL #1 ] +strht r0, [r1, #1 ] +strt r0, [r1, #1 ] +sub sp, sp, #4 +sub.w r0, sp, #1 +subs.w r0, sp, #1 +subw r0, sp, #1 +sub r0, sp, r1 +subs r0, sp, r1 +sub r0, sp, r1, LSL #1 +subs r0, sp, r1, LSL #1 +subs r0, r1, #1 +subs r0, #1 +sub.w r0, r1, #1 +subs.w r0, r1, #1 +subw r0, r1, #1 +subs r0, r1, r2 +sub.w r0, r1, r2 +subs.w r0, r1, r2 +sub.w r0, r1, r2, LSL #1 +subs.w r0, r1, r2, LSL #1 +#svc #1 ; treated as a call +sxtab r0, r1, r2 +sxtab r0, r1, r2, ROR #8 +sxtab16 r0, r1, r2 +sxtab16 r0, r1, r2, ROR #8 +sxtah r0, r1, r2 +sxtah r0, r1, r2, ROR #8 +sxtb r0, r1 +sxtb.w r0, r1 +sxtb.w r0, r1, ROR #8 +sxtb16 r0, r1 +sxtb16 r0, r1, ROR #8 +sxth r0, r1 +sxth.w r0, r1 +sxth.w r0, r1, ROR #8 +tbb [r0, r1] +tbh [r0, r1, LSL #1] +teq r0, #1 +teq r0, r1 +teq r0, r1, LSL #1 +tst r0, #1 +tst r0, r1 +tst.w r0, r1 +tst.w r0, r1, LSL #1 +#tt r0, r1 +#ttt r0, r1 +#tta r0, r1 +#ttat r0, r1 +uadd16 r0, r1, r2 +uadd8 r0, r1, r2 +uasx r0, r1, r2 +ubfx r0, r1, #1, #2 +#udf #1 +udiv r0, r1, r2 +uhadd16 r0, r1, r2 +uhadd8 r0, r1, r2 +uhasx r0, r1, r2 +uhsax r0, r1, r2 +uhsub16 r0, r1, r2 +uhsub8 r0, r1, r2 +umaal r0, r1, r2, r3 +umlal r0, r1, r2, r3 +umull r0, r1, r2, r3 +uqadd16 r0, r1, r2 +uqadd8 r0, r1, r2 +uqasx r0, r1, r2 +uqsax r0, r1, r2 +uqsub16 r0, r1, r2 +uqsub8 r0, r1, r2 +usad8 r0, r1, r2 +usada8 r0, r1, r2, r3 +usat r0, #1, r1 +usat r0, #1, r1, LSL #1 +usat16 r0, #1, r1 +usax r0, r1, r2 +usub16 r0, r1, r2 +usub8 r0, r1, r2 +uxtab r0, r1, r2 +uxtab r0, r1, r2, ROR #8 +uxtab16 r0, r1, r2 +uxtab16 r0, r1, r2, ROR #8 +uxtah r0, r1, r2 +uxtah r0, r1, r2, ROR #8 +uxtb r0, r1 +uxtb.w r0, r1 +uxtb.w r0, r1, ROR #8 +uxtb16 r0, r1 +uxtb16 r0, r1, ROR #8 +uxth r0, r1 +uxth.w r0, r1 +uxth.w r0, r1, ROR #8 +wfe +wfi +forward: +yield + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 1.00 adc r0, r1, #0 +# CHECK-NEXT: 1 1 1.00 adcs r0, r1, #0 +# CHECK-NEXT: 1 1 1.00 U adcs r0, r1 +# CHECK-NEXT: 1 1 1.00 adc.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 adcs.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 adc.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 adcs.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 add.w r0, sp, #1 +# CHECK-NEXT: 1 1 1.00 U add.w sp, sp, #1 +# CHECK-NEXT: 1 1 1.00 add.w r0, sp, #1 +# CHECK-NEXT: 1 1 1.00 adds.w r0, sp, #1 +# CHECK-NEXT: 1 1 1.00 addw r0, sp, #1 +# CHECK-NEXT: 1 1 1.00 U add r0, sp, r0 +# CHECK-NEXT: 1 1 1.00 U add sp, r1 +# CHECK-NEXT: 1 1 1.00 add.w r0, sp, r1 +# CHECK-NEXT: 1 1 1.00 adds.w r0, sp, r1 +# CHECK-NEXT: 1 1 1.00 add.w r0, sp, r1, lsl #1 +# CHECK-NEXT: 1 1 1.00 adds.w r0, sp, r1, lsl #1 +# CHECK-NEXT: 1 1 1.00 adds r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 adds r0, #42 +# CHECK-NEXT: 1 1 1.00 add.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 adds.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 addw r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 adds r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 add r0, r1 +# CHECK-NEXT: 1 1 1.00 add.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 adds.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 add.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 adds.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 U adr.w r0, #-6 +# CHECK-NEXT: 1 1 1.00 U adr.w r8, #-6 +# CHECK-NEXT: 1 1 1.00 U adr.w r0, #-6 +# CHECK-NEXT: 1 1 1.00 and r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 ands r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 ands r1, r0 +# CHECK-NEXT: 1 1 1.00 and.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 ands.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 and.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 ands.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 asrs r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 asr.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 asrs.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 asrs r0, r1 +# CHECK-NEXT: 1 1 1.00 asr.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 asrs.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 bfc r0, #1, #2 +# CHECK-NEXT: 1 1 1.00 bfi r0, r1, #1, #2 +# CHECK-NEXT: 1 1 1.00 bic r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 bics r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 bics r0, r1 +# CHECK-NEXT: 1 1 1.00 bic.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 bics.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 bic.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 bics.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 U bkpt #1 +# CHECK-NEXT: 1 1 1.00 * * U clrex +# CHECK-NEXT: 1 1 1.00 clz r0, r1 +# CHECK-NEXT: 1 1 1.00 cmn.w r0, #1 +# CHECK-NEXT: 1 1 1.00 cmn r0, r1 +# CHECK-NEXT: 1 1 1.00 cmn.w r0, r1 +# CHECK-NEXT: 1 1 1.00 cmn.w r0, r1, lsl #1 +# CHECK-NEXT: 1 1 1.00 cmp r0, #1 +# CHECK-NEXT: 1 1 1.00 cmp.w r0, #1 +# CHECK-NEXT: 1 1 1.00 cmp r0, r1 +# CHECK-NEXT: 1 1 1.00 U cmp r0, r10 +# CHECK-NEXT: 1 1 1.00 cmp.w r0, r1 +# CHECK-NEXT: 1 1 1.00 cmp.w r0, r1, lsl #1 +# CHECK-NEXT: 1 1 1.00 * * U dmb sy +# CHECK-NEXT: 1 1 1.00 * * U dsb sy +# CHECK-NEXT: 1 1 1.00 eor r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 eors r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 eors r0, r1 +# CHECK-NEXT: 1 1 1.00 eor.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 eors.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 eor.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 eors.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 * * U isb sy +# CHECK-NEXT: 1 2 1.00 * ldm r0!, {r1} +# CHECK-NEXT: 1 2 1.00 * ldm.w r0, {r1} +# CHECK-NEXT: 1 2 1.00 * ldm.w r0, {r1} +# CHECK-NEXT: 1 2 1.00 * ldr r1, [r0], #4 +# CHECK-NEXT: 1 2 1.00 * ldmdb r0, {r1} +# CHECK-NEXT: 1 2 1.00 * ldmdb r0!, {r1} +# CHECK-NEXT: 1 2 1.00 * ldr r0, [r1, #4] +# CHECK-NEXT: 1 2 1.00 * ldr r0, [sp, #4] +# CHECK-NEXT: 1 2 1.00 * ldr.w r0, [r1, #4] +# CHECK-NEXT: 1 2 1.00 * ldr r0, [r1, #-1] +# CHECK-NEXT: 1 2 1.00 * ldr r0, [r1], #1 +# CHECK-NEXT: 1 2 1.00 * ldr r0, [r1, #1]! +# CHECK-NEXT: 1 2 1.00 * ldr r0, [pc, #4] +# CHECK-NEXT: 1 2 1.00 * ldr.w r0, [pc, #4] +# CHECK-NEXT: 1 2 1.00 * ldr r0, next +# CHECK-NEXT: 1 2 1.00 * ldr.w r0, next +# CHECK-NEXT: 1 2 1.00 * ldr r0, [r1, r2] +# CHECK-NEXT: 1 2 1.00 * ldr.w r0, [r1, r2] +# CHECK-NEXT: 1 2 1.00 * ldr.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1 2 1.00 * ldrb r0, [r1, #1] +# CHECK-NEXT: 1 2 1.00 * ldrb.w r0, [r1, #1] +# CHECK-NEXT: 1 2 1.00 * ldrb r0, [r1, #-1] +# CHECK-NEXT: 1 2 1.00 * ldrb r0, [r1], #1 +# CHECK-NEXT: 1 2 1.00 * ldrb r0, [r1, #1]! +# CHECK-NEXT: 1 2 1.00 * ldrb.w r0, [pc, #4] +# CHECK-NEXT: 1 2 1.00 * ldrb.w r0, next +# CHECK-NEXT: 1 2 1.00 * ldrb r0, [r1, r2] +# CHECK-NEXT: 1 2 1.00 * ldrb.w r0, [r1, r2] +# CHECK-NEXT: 1 2 1.00 * ldrb.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1 2 1.00 U ldrbt r0, [r1, #1] +# CHECK-NEXT: 1 2 1.00 * ldrd r0, r2, [r1] +# CHECK-NEXT: 1 2 1.00 * ldrd r0, r2, [r1, #-4] +# CHECK-NEXT: 1 2 1.00 * U ldrd r0, r2, [r1], #4 +# CHECK-NEXT: 1 2 1.00 * U ldrd r0, r2, [r1, #4]! +# CHECK-NEXT: 1 2 1.00 * ldrd r0, r2, next +# CHECK-NEXT: 1 2 1.00 * * U ldrex r0, [r1] +# CHECK-NEXT: 1 2 1.00 * * U ldrex r0, [r1, #4] +# CHECK-NEXT: 1 2 1.00 * * U ldrexb r0, [r1] +# CHECK-NEXT: 1 2 1.00 * * U ldrexh r0, [r1] +# CHECK-NEXT: 1 2 1.00 * ldrh r0, [r1, #2] +# CHECK-NEXT: 1 2 1.00 * ldrh.w r0, [r1, #1] +# CHECK-NEXT: 1 2 1.00 * ldrh r0, [r1, #-1] +# CHECK-NEXT: 1 2 1.00 * ldrh r0, [r1], #1 +# CHECK-NEXT: 1 2 1.00 * ldrh r0, [r1, #1]! +# CHECK-NEXT: 1 2 1.00 * ldrh.w r0, [pc, #4] +# CHECK-NEXT: 1 2 1.00 * ldrh.w r0, next +# CHECK-NEXT: 1 2 1.00 * ldrh r0, [r1, r2] +# CHECK-NEXT: 1 2 1.00 * ldrh.w r0, [r1, r2] +# CHECK-NEXT: 1 2 1.00 * ldrh.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1 2 1.00 U ldrht r0, [r1, #1] +# CHECK-NEXT: 1 2 1.00 * ldrsb.w r0, [r1, #1] +# CHECK-NEXT: 1 2 1.00 * ldrsb r0, [r1, #-1] +# CHECK-NEXT: 1 2 1.00 * ldrsb r0, [r1], #1 +# CHECK-NEXT: 1 2 1.00 * ldrsb r0, [r1, #1]! +# CHECK-NEXT: 1 2 1.00 * ldrsb.w r0, [pc, #4] +# CHECK-NEXT: 1 2 1.00 * ldrsb.w r0, next +# CHECK-NEXT: 1 2 1.00 * ldrsb r0, [r1, r2] +# CHECK-NEXT: 1 2 1.00 * ldrsb.w r0, [r1, r2] +# CHECK-NEXT: 1 2 1.00 * ldrsb.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1 2 1.00 U ldrsbt r0, [r1, #1] +# CHECK-NEXT: 1 2 1.00 * ldrsh.w r0, [r1, #2] +# CHECK-NEXT: 1 2 1.00 * ldrsh r0, [r1, #-1] +# CHECK-NEXT: 1 2 1.00 * ldrsh r0, [r1], #1 +# CHECK-NEXT: 1 2 1.00 * ldrsh r0, [r1, #1]! +# CHECK-NEXT: 1 2 1.00 * ldrsh.w r0, [pc, #4] +# CHECK-NEXT: 1 2 1.00 * ldrsh.w r0, next +# CHECK-NEXT: 1 2 1.00 * ldrsh r0, [r1, r2] +# CHECK-NEXT: 1 2 1.00 * ldrsh.w r0, [r1, r2] +# CHECK-NEXT: 1 2 1.00 * ldrsh.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1 2 1.00 U ldrsht r0, [r1, #1] +# CHECK-NEXT: 1 2 1.00 U ldrt r0, [r1, #1] +# CHECK-NEXT: 1 1 1.00 lsls r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 lsl.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 lsls.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 lsls r0, r1 +# CHECK-NEXT: 1 1 1.00 lsl.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 lsls.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 lsrs r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 lsr.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 lsrs.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 lsrs r0, r1 +# CHECK-NEXT: 1 1 1.00 lsr.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 lsrs.w r0, r1, r2 +# CHECK-NEXT: 1 2 1.00 mla r0, r1, r2, r3 +# CHECK-NEXT: 1 2 1.00 mls r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 movs r0, #1 +# CHECK-NEXT: 1 1 1.00 mov.w r0, #1 +# CHECK-NEXT: 1 1 1.00 movs.w r0, #1 +# CHECK-NEXT: 1 1 1.00 movw r0, #1 +# CHECK-NEXT: 1 1 1.00 mov r0, r1 +# CHECK-NEXT: 1 1 1.00 mov.w r0, r1 +# CHECK-NEXT: 1 1 1.00 movs.w r0, r1 +# CHECK-NEXT: 1 1 1.00 movt r0, #1 +# CHECK-NEXT: 1 1 1.00 U mrs r0, apsr +# CHECK-NEXT: 1 1 1.00 U msr apsr_nzcvq, r0 +# CHECK-NEXT: 1 1 1.00 muls r1, r2, r1 +# CHECK-NEXT: 1 1 1.00 mul r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 mvn r0, #1 +# CHECK-NEXT: 1 1 1.00 mvns r0, #1 +# CHECK-NEXT: 1 1 1.00 mvns r0, r1 +# CHECK-NEXT: 1 1 1.00 mvn.w r0, r1 +# CHECK-NEXT: 1 1 1.00 mvns.w r0, r1 +# CHECK-NEXT: 1 1 1.00 mvn.w r0, r1, lsl #1 +# CHECK-NEXT: 1 1 1.00 mvns.w r0, r1, lsl #1 +# CHECK-NEXT: 1 1 1.00 * * U nop +# CHECK-NEXT: 1 1 1.00 orn r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 orns r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 orn r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 orns r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 orn r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 orns r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 orr r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 orrs r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 orrs r0, r1 +# CHECK-NEXT: 1 1 1.00 orr.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 orrs.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 orr.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 orrs.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 pkhbt r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 pkhbt r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 pkhbt r0, r2, r1 +# CHECK-NEXT: 1 1 1.00 pkhtb r0, r1, r2, asr #1 +# CHECK-NEXT: 1 2 1.00 * U pop {r0} +# CHECK-NEXT: 1 2 1.00 * pop.w {r0, r1} +# CHECK-NEXT: 1 2 1.00 * ldr r0, [sp], #4 +# CHECK-NEXT: 1 1 1.00 * * U pssbb +# CHECK-NEXT: 1 1 1.00 * U push {r0} +# CHECK-NEXT: 1 1 1.00 * push.w {r0, r1} +# CHECK-NEXT: 1 1 1.00 * str r0, [sp, #-4]! +# CHECK-NEXT: 1 1 1.00 qadd r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 qadd16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 qadd8 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 qasx r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 qdadd r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 qdsub r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 qsax r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 qsub r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 qsub16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 qsub8 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 rbit r0, r1 +# CHECK-NEXT: 1 1 1.00 rev r0, r1 +# CHECK-NEXT: 1 1 1.00 rev.w r0, r1 +# CHECK-NEXT: 1 1 1.00 rev16 r0, r1 +# CHECK-NEXT: 1 1 1.00 rev16.w r0, r1 +# CHECK-NEXT: 1 1 1.00 revsh r0, r1 +# CHECK-NEXT: 1 1 1.00 revsh.w r0, r1 +# CHECK-NEXT: 1 1 1.00 ror.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 rors.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 rors r0, r1 +# CHECK-NEXT: 1 1 1.00 ror.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 rors.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 rrx r0, r1 +# CHECK-NEXT: 1 1 1.00 rrxs r0, r1 +# CHECK-NEXT: 1 1 1.00 rsbs r0, r1, #0 +# CHECK-NEXT: 1 1 1.00 rsb.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 rsbs.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 U rsb r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 U rsbs r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 rsb r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 rsbs r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 * * U sadd16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 * * U sadd8 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 * * U sasx r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 sbc r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 sbcs r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 U sbcs r0, r1 +# CHECK-NEXT: 1 1 1.00 sbc.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 sbcs.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 sbc.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 sbcs.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 U sbfx r0, r1, #1, #2 +# CHECK-NEXT: 1 2 1.00 sdiv r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 * sel r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 * * U sev +# CHECK-NEXT: 1 1 1.00 shadd16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 shadd8 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 shasx r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 shsax r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 shsub16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 shsub8 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 smlabb r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlabt r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlatb r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlatt r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlad r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smladx r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlal r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlalbb r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlalbt r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlaltb r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlaltt r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlald r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlaldx r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlawb r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlawt r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlsd r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlsdx r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlsld r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smlsldx r0, r1, r2, r3 +# CHECK-NEXT: 1 2 1.00 smmla r0, r1, r2, r3 +# CHECK-NEXT: 1 2 1.00 smmlar r0, r1, r2, r3 +# CHECK-NEXT: 1 2 1.00 U smmls r0, r1, r2, r3 +# CHECK-NEXT: 1 2 1.00 smmlsr r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smmul r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 smmulr r0, r1, r2 +# CHECK-NEXT: 1 2 1.00 smuad r0, r1, r2 +# CHECK-NEXT: 1 2 1.00 smuadx r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 smulbb r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 smulbt r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 smultb r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 smultt r0, r1, r2 +# CHECK-NEXT: 2 1 2.00 smull r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 smulwb r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 smulwt r0, r1, r2 +# CHECK-NEXT: 1 2 1.00 smusd r0, r1, r2 +# CHECK-NEXT: 1 2 1.00 smusdx r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 U ssat r0, #1, r2 +# CHECK-NEXT: 1 1 1.00 U ssat r0, #1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 U ssat16 r0, #1, r1 +# CHECK-NEXT: 1 1 1.00 * * U ssax r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 * * U ssbb +# CHECK-NEXT: 1 1 1.00 * * U ssub16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 * * U ssub8 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 * stm r0!, {r1} +# CHECK-NEXT: 1 1 1.00 * stm.w r0, {r1} +# CHECK-NEXT: 1 1 1.00 * stm.w r0!, {r1} +# CHECK-NEXT: 1 1 1.00 * stmdb r0, {r1} +# CHECK-NEXT: 1 1 1.00 * str r1, [r0, #-4]! +# CHECK-NEXT: 1 1 1.00 * str r0, [r1] +# CHECK-NEXT: 1 1 1.00 * str r0, [r1, #4] +# CHECK-NEXT: 1 1 1.00 * str r0, [sp, #4] +# CHECK-NEXT: 1 1 1.00 * str.w r0, [r1, #1] +# CHECK-NEXT: 1 1 1.00 * str r0, [r1, #-1] +# CHECK-NEXT: 1 1 1.00 * str r0, [r1], #1 +# CHECK-NEXT: 1 1 1.00 * str r0, [r1, r2] +# CHECK-NEXT: 1 1 1.00 * str.w r0, [r1, r2] +# CHECK-NEXT: 1 1 1.00 * str.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1 1 1.00 * strb r0, [r1] +# CHECK-NEXT: 1 1 1.00 * strb r0, [r1, #1] +# CHECK-NEXT: 1 1 1.00 * strb.w r0, [r1, #1] +# CHECK-NEXT: 1 1 1.00 * strb r0, [r1, #-1] +# CHECK-NEXT: 1 1 1.00 * strb r0, [r1], #1 +# CHECK-NEXT: 1 1 1.00 * strb r0, [r1, #1]! +# CHECK-NEXT: 1 1 1.00 * strb r0, [r1, r2] +# CHECK-NEXT: 1 1 1.00 * strb.w r0, [r1, r2] +# CHECK-NEXT: 1 1 1.00 * strb.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1 1 1.00 U strbt r0, [r1, #1] +# CHECK-NEXT: 1 1 1.00 * strd r0, r1, [r2, #4] +# CHECK-NEXT: 1 1 1.00 * U strd r0, r1, [r2], #4 +# CHECK-NEXT: 1 1 1.00 * U strd r0, r1, [r2, #4]! +# CHECK-NEXT: 1 1 1.00 * * U strex r0, r1, [r2] +# CHECK-NEXT: 1 1 1.00 * * U strex r0, r1, [r2, #4] +# CHECK-NEXT: 1 1 1.00 * * U strexb r0, r1, [r2] +# CHECK-NEXT: 1 1 1.00 * * U strexh r0, r1, [r2] +# CHECK-NEXT: 1 1 1.00 * strh r0, [r1] +# CHECK-NEXT: 1 1 1.00 * strh r0, [r1, #2] +# CHECK-NEXT: 1 1 1.00 * strh.w r0, [r1, #2] +# CHECK-NEXT: 1 1 1.00 * strh r0, [r1, #-1] +# CHECK-NEXT: 1 1 1.00 * strh r0, [r1], #1 +# CHECK-NEXT: 1 1 1.00 * strh r0, [r1, #1]! +# CHECK-NEXT: 1 1 1.00 * strh r0, [r1, r2] +# CHECK-NEXT: 1 1 1.00 * strh.w r0, [r1, r2] +# CHECK-NEXT: 1 1 1.00 * strh.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1 1 1.00 U strht r0, [r1, #1] +# CHECK-NEXT: 1 1 1.00 U strt r0, [r1, #1] +# CHECK-NEXT: 1 1 1.00 U sub sp, #4 +# CHECK-NEXT: 1 1 1.00 sub.w r0, sp, #1 +# CHECK-NEXT: 1 1 1.00 subs.w r0, sp, #1 +# CHECK-NEXT: 1 1 1.00 subw r0, sp, #1 +# CHECK-NEXT: 1 1 1.00 sub.w r0, sp, r1 +# CHECK-NEXT: 1 1 1.00 subs.w r0, sp, r1 +# CHECK-NEXT: 1 1 1.00 sub.w r0, sp, r1, lsl #1 +# CHECK-NEXT: 1 1 1.00 subs.w r0, sp, r1, lsl #1 +# CHECK-NEXT: 1 1 1.00 subs r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 subs r0, #1 +# CHECK-NEXT: 1 1 1.00 sub.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 subs.w r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 subw r0, r1, #1 +# CHECK-NEXT: 1 1 1.00 subs r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 sub.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 subs.w r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 sub.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 subs.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1 1 1.00 sxtab r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 sxtab r0, r1, r2, ror #8 +# CHECK-NEXT: 1 1 1.00 sxtab16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 sxtab16 r0, r1, r2, ror #8 +# CHECK-NEXT: 1 1 1.00 sxtah r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 sxtah r0, r1, r2, ror #8 +# CHECK-NEXT: 1 1 1.00 sxtb r0, r1 +# CHECK-NEXT: 1 1 1.00 sxtb.w r0, r1 +# CHECK-NEXT: 1 1 1.00 sxtb.w r0, r1, ror #8 +# CHECK-NEXT: 1 1 1.00 sxtb16 r0, r1 +# CHECK-NEXT: 1 1 1.00 sxtb16 r0, r1, ror #8 +# CHECK-NEXT: 1 1 1.00 sxth r0, r1 +# CHECK-NEXT: 1 1 1.00 sxth.w r0, r1 +# CHECK-NEXT: 1 1 1.00 sxth.w r0, r1, ror #8 +# CHECK-NEXT: 1 1 1.00 U tbb [r0, r1] +# CHECK-NEXT: 1 1 1.00 U tbh [r0, r1, lsl #1] +# CHECK-NEXT: 1 1 1.00 teq.w r0, #1 +# CHECK-NEXT: 1 1 1.00 teq.w r0, r1 +# CHECK-NEXT: 1 1 1.00 teq.w r0, r1, lsl #1 +# CHECK-NEXT: 1 1 1.00 tst.w r0, #1 +# CHECK-NEXT: 1 1 1.00 tst r0, r1 +# CHECK-NEXT: 1 1 1.00 tst.w r0, r1 +# CHECK-NEXT: 1 1 1.00 tst.w r0, r1, lsl #1 +# CHECK-NEXT: 1 1 1.00 * * U uadd16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 * * U uadd8 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 * * U uasx r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 U ubfx r0, r1, #1, #2 +# CHECK-NEXT: 1 2 1.00 udiv r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uhadd16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uhadd8 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uhasx r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uhsax r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uhsub16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uhsub8 r0, r1, r2 +# CHECK-NEXT: 2 2 2.00 umaal r0, r1, r2, r3 +# CHECK-NEXT: 2 2 2.00 umlal r0, r1, r2, r3 +# CHECK-NEXT: 2 1 2.00 umull r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 uqadd16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uqadd8 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uqasx r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uqsax r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uqsub16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uqsub8 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 usad8 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 usada8 r0, r1, r2, r3 +# CHECK-NEXT: 1 1 1.00 U usat r0, #1, r1 +# CHECK-NEXT: 1 1 1.00 U usat r0, #1, r1, lsl #1 +# CHECK-NEXT: 1 1 1.00 U usat16 r0, #1, r1 +# CHECK-NEXT: 1 1 1.00 * * U usax r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 * * U usub16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 * * U usub8 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uxtab r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uxtab r0, r1, r2, ror #8 +# CHECK-NEXT: 1 1 1.00 uxtab16 r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uxtab16 r0, r1, r2, ror #8 +# CHECK-NEXT: 1 1 1.00 uxtah r0, r1, r2 +# CHECK-NEXT: 1 1 1.00 uxtah r0, r1, r2, ror #8 +# CHECK-NEXT: 1 1 1.00 uxtb r0, r1 +# CHECK-NEXT: 1 1 1.00 uxtb.w r0, r1 +# CHECK-NEXT: 1 1 1.00 uxtb.w r0, r1, ror #8 +# CHECK-NEXT: 1 1 1.00 uxtb16 r0, r1 +# CHECK-NEXT: 1 1 1.00 uxtb16 r0, r1, ror #8 +# CHECK-NEXT: 1 1 1.00 uxth r0, r1 +# CHECK-NEXT: 1 1 1.00 uxth.w r0, r1 +# CHECK-NEXT: 1 1 1.00 uxth.w r0, r1, ror #8 +# CHECK-NEXT: 1 1 1.00 * * U wfe +# CHECK-NEXT: 1 1 1.00 * * U wfi +# CHECK-NEXT: 1 1 1.00 * * U yield + +# CHECK: Resources: +# CHECK-NEXT: [0] - M4Unit + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] +# CHECK-NEXT: 432.00 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] Instructions: +# CHECK-NEXT: 1.00 adc r0, r1, #0 +# CHECK-NEXT: 1.00 adcs r0, r1, #0 +# CHECK-NEXT: 1.00 adcs r0, r1 +# CHECK-NEXT: 1.00 adc.w r0, r1, r2 +# CHECK-NEXT: 1.00 adcs.w r0, r1, r2 +# CHECK-NEXT: 1.00 adc.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 adcs.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 add.w r0, sp, #1 +# CHECK-NEXT: 1.00 add.w sp, sp, #1 +# CHECK-NEXT: 1.00 add.w r0, sp, #1 +# CHECK-NEXT: 1.00 adds.w r0, sp, #1 +# CHECK-NEXT: 1.00 addw r0, sp, #1 +# CHECK-NEXT: 1.00 add r0, sp, r0 +# CHECK-NEXT: 1.00 add sp, r1 +# CHECK-NEXT: 1.00 add.w r0, sp, r1 +# CHECK-NEXT: 1.00 adds.w r0, sp, r1 +# CHECK-NEXT: 1.00 add.w r0, sp, r1, lsl #1 +# CHECK-NEXT: 1.00 adds.w r0, sp, r1, lsl #1 +# CHECK-NEXT: 1.00 adds r0, r1, #1 +# CHECK-NEXT: 1.00 adds r0, #42 +# CHECK-NEXT: 1.00 add.w r0, r1, #1 +# CHECK-NEXT: 1.00 adds.w r0, r1, #1 +# CHECK-NEXT: 1.00 addw r0, r1, #1 +# CHECK-NEXT: 1.00 adds r0, r1, r2 +# CHECK-NEXT: 1.00 add r0, r1 +# CHECK-NEXT: 1.00 add.w r0, r1, r2 +# CHECK-NEXT: 1.00 adds.w r0, r1, r2 +# CHECK-NEXT: 1.00 add.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 adds.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 adr.w r0, #-6 +# CHECK-NEXT: 1.00 adr.w r8, #-6 +# CHECK-NEXT: 1.00 adr.w r0, #-6 +# CHECK-NEXT: 1.00 and r0, r1, #1 +# CHECK-NEXT: 1.00 ands r0, r1, #1 +# CHECK-NEXT: 1.00 ands r1, r0 +# CHECK-NEXT: 1.00 and.w r0, r1, r2 +# CHECK-NEXT: 1.00 ands.w r0, r1, r2 +# CHECK-NEXT: 1.00 and.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 ands.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 asrs r0, r1, #1 +# CHECK-NEXT: 1.00 asr.w r0, r1, #1 +# CHECK-NEXT: 1.00 asrs.w r0, r1, #1 +# CHECK-NEXT: 1.00 asrs r0, r1 +# CHECK-NEXT: 1.00 asr.w r0, r1, r2 +# CHECK-NEXT: 1.00 asrs.w r0, r1, r2 +# CHECK-NEXT: 1.00 bfc r0, #1, #2 +# CHECK-NEXT: 1.00 bfi r0, r1, #1, #2 +# CHECK-NEXT: 1.00 bic r0, r1, #1 +# CHECK-NEXT: 1.00 bics r0, r1, #1 +# CHECK-NEXT: 1.00 bics r0, r1 +# CHECK-NEXT: 1.00 bic.w r0, r1, r2 +# CHECK-NEXT: 1.00 bics.w r0, r1, r2 +# CHECK-NEXT: 1.00 bic.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 bics.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 bkpt #1 +# CHECK-NEXT: 1.00 clrex +# CHECK-NEXT: 1.00 clz r0, r1 +# CHECK-NEXT: 1.00 cmn.w r0, #1 +# CHECK-NEXT: 1.00 cmn r0, r1 +# CHECK-NEXT: 1.00 cmn.w r0, r1 +# CHECK-NEXT: 1.00 cmn.w r0, r1, lsl #1 +# CHECK-NEXT: 1.00 cmp r0, #1 +# CHECK-NEXT: 1.00 cmp.w r0, #1 +# CHECK-NEXT: 1.00 cmp r0, r1 +# CHECK-NEXT: 1.00 cmp r0, r10 +# CHECK-NEXT: 1.00 cmp.w r0, r1 +# CHECK-NEXT: 1.00 cmp.w r0, r1, lsl #1 +# CHECK-NEXT: 1.00 dmb sy +# CHECK-NEXT: 1.00 dsb sy +# CHECK-NEXT: 1.00 eor r0, r1, #1 +# CHECK-NEXT: 1.00 eors r0, r1, #1 +# CHECK-NEXT: 1.00 eors r0, r1 +# CHECK-NEXT: 1.00 eor.w r0, r1, r2 +# CHECK-NEXT: 1.00 eors.w r0, r1, r2 +# CHECK-NEXT: 1.00 eor.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 eors.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 isb sy +# CHECK-NEXT: 1.00 ldm r0!, {r1} +# CHECK-NEXT: 1.00 ldm.w r0, {r1} +# CHECK-NEXT: 1.00 ldm.w r0, {r1} +# CHECK-NEXT: 1.00 ldr r1, [r0], #4 +# CHECK-NEXT: 1.00 ldmdb r0, {r1} +# CHECK-NEXT: 1.00 ldmdb r0!, {r1} +# CHECK-NEXT: 1.00 ldr r0, [r1, #4] +# CHECK-NEXT: 1.00 ldr r0, [sp, #4] +# CHECK-NEXT: 1.00 ldr.w r0, [r1, #4] +# CHECK-NEXT: 1.00 ldr r0, [r1, #-1] +# CHECK-NEXT: 1.00 ldr r0, [r1], #1 +# CHECK-NEXT: 1.00 ldr r0, [r1, #1]! +# CHECK-NEXT: 1.00 ldr r0, [pc, #4] +# CHECK-NEXT: 1.00 ldr.w r0, [pc, #4] +# CHECK-NEXT: 1.00 ldr r0, next +# CHECK-NEXT: 1.00 ldr.w r0, next +# CHECK-NEXT: 1.00 ldr r0, [r1, r2] +# CHECK-NEXT: 1.00 ldr.w r0, [r1, r2] +# CHECK-NEXT: 1.00 ldr.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1.00 ldrb r0, [r1, #1] +# CHECK-NEXT: 1.00 ldrb.w r0, [r1, #1] +# CHECK-NEXT: 1.00 ldrb r0, [r1, #-1] +# CHECK-NEXT: 1.00 ldrb r0, [r1], #1 +# CHECK-NEXT: 1.00 ldrb r0, [r1, #1]! +# CHECK-NEXT: 1.00 ldrb.w r0, [pc, #4] +# CHECK-NEXT: 1.00 ldrb.w r0, next +# CHECK-NEXT: 1.00 ldrb r0, [r1, r2] +# CHECK-NEXT: 1.00 ldrb.w r0, [r1, r2] +# CHECK-NEXT: 1.00 ldrb.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1.00 ldrbt r0, [r1, #1] +# CHECK-NEXT: 1.00 ldrd r0, r2, [r1] +# CHECK-NEXT: 1.00 ldrd r0, r2, [r1, #-4] +# CHECK-NEXT: 1.00 ldrd r0, r2, [r1], #4 +# CHECK-NEXT: 1.00 ldrd r0, r2, [r1, #4]! +# CHECK-NEXT: 1.00 ldrd r0, r2, next +# CHECK-NEXT: 1.00 ldrex r0, [r1] +# CHECK-NEXT: 1.00 ldrex r0, [r1, #4] +# CHECK-NEXT: 1.00 ldrexb r0, [r1] +# CHECK-NEXT: 1.00 ldrexh r0, [r1] +# CHECK-NEXT: 1.00 ldrh r0, [r1, #2] +# CHECK-NEXT: 1.00 ldrh.w r0, [r1, #1] +# CHECK-NEXT: 1.00 ldrh r0, [r1, #-1] +# CHECK-NEXT: 1.00 ldrh r0, [r1], #1 +# CHECK-NEXT: 1.00 ldrh r0, [r1, #1]! +# CHECK-NEXT: 1.00 ldrh.w r0, [pc, #4] +# CHECK-NEXT: 1.00 ldrh.w r0, next +# CHECK-NEXT: 1.00 ldrh r0, [r1, r2] +# CHECK-NEXT: 1.00 ldrh.w r0, [r1, r2] +# CHECK-NEXT: 1.00 ldrh.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1.00 ldrht r0, [r1, #1] +# CHECK-NEXT: 1.00 ldrsb.w r0, [r1, #1] +# CHECK-NEXT: 1.00 ldrsb r0, [r1, #-1] +# CHECK-NEXT: 1.00 ldrsb r0, [r1], #1 +# CHECK-NEXT: 1.00 ldrsb r0, [r1, #1]! +# CHECK-NEXT: 1.00 ldrsb.w r0, [pc, #4] +# CHECK-NEXT: 1.00 ldrsb.w r0, next +# CHECK-NEXT: 1.00 ldrsb r0, [r1, r2] +# CHECK-NEXT: 1.00 ldrsb.w r0, [r1, r2] +# CHECK-NEXT: 1.00 ldrsb.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1.00 ldrsbt r0, [r1, #1] +# CHECK-NEXT: 1.00 ldrsh.w r0, [r1, #2] +# CHECK-NEXT: 1.00 ldrsh r0, [r1, #-1] +# CHECK-NEXT: 1.00 ldrsh r0, [r1], #1 +# CHECK-NEXT: 1.00 ldrsh r0, [r1, #1]! +# CHECK-NEXT: 1.00 ldrsh.w r0, [pc, #4] +# CHECK-NEXT: 1.00 ldrsh.w r0, next +# CHECK-NEXT: 1.00 ldrsh r0, [r1, r2] +# CHECK-NEXT: 1.00 ldrsh.w r0, [r1, r2] +# CHECK-NEXT: 1.00 ldrsh.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1.00 ldrsht r0, [r1, #1] +# CHECK-NEXT: 1.00 ldrt r0, [r1, #1] +# CHECK-NEXT: 1.00 lsls r0, r1, #1 +# CHECK-NEXT: 1.00 lsl.w r0, r1, #1 +# CHECK-NEXT: 1.00 lsls.w r0, r1, #1 +# CHECK-NEXT: 1.00 lsls r0, r1 +# CHECK-NEXT: 1.00 lsl.w r0, r1, r2 +# CHECK-NEXT: 1.00 lsls.w r0, r1, r2 +# CHECK-NEXT: 1.00 lsrs r0, r1, #1 +# CHECK-NEXT: 1.00 lsr.w r0, r1, #1 +# CHECK-NEXT: 1.00 lsrs.w r0, r1, #1 +# CHECK-NEXT: 1.00 lsrs r0, r1 +# CHECK-NEXT: 1.00 lsr.w r0, r1, r2 +# CHECK-NEXT: 1.00 lsrs.w r0, r1, r2 +# CHECK-NEXT: 1.00 mla r0, r1, r2, r3 +# CHECK-NEXT: 1.00 mls r0, r1, r2, r3 +# CHECK-NEXT: 1.00 movs r0, #1 +# CHECK-NEXT: 1.00 mov.w r0, #1 +# CHECK-NEXT: 1.00 movs.w r0, #1 +# CHECK-NEXT: 1.00 movw r0, #1 +# CHECK-NEXT: 1.00 mov r0, r1 +# CHECK-NEXT: 1.00 mov.w r0, r1 +# CHECK-NEXT: 1.00 movs.w r0, r1 +# CHECK-NEXT: 1.00 movt r0, #1 +# CHECK-NEXT: 1.00 mrs r0, apsr +# CHECK-NEXT: 1.00 msr apsr_nzcvq, r0 +# CHECK-NEXT: 1.00 muls r1, r2, r1 +# CHECK-NEXT: 1.00 mul r0, r1, r2 +# CHECK-NEXT: 1.00 mvn r0, #1 +# CHECK-NEXT: 1.00 mvns r0, #1 +# CHECK-NEXT: 1.00 mvns r0, r1 +# CHECK-NEXT: 1.00 mvn.w r0, r1 +# CHECK-NEXT: 1.00 mvns.w r0, r1 +# CHECK-NEXT: 1.00 mvn.w r0, r1, lsl #1 +# CHECK-NEXT: 1.00 mvns.w r0, r1, lsl #1 +# CHECK-NEXT: 1.00 nop +# CHECK-NEXT: 1.00 orn r0, r1, #1 +# CHECK-NEXT: 1.00 orns r0, r1, #1 +# CHECK-NEXT: 1.00 orn r0, r1, r2 +# CHECK-NEXT: 1.00 orns r0, r1, r2 +# CHECK-NEXT: 1.00 orn r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 orns r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 orr r0, r1, #1 +# CHECK-NEXT: 1.00 orrs r0, r1, #1 +# CHECK-NEXT: 1.00 orrs r0, r1 +# CHECK-NEXT: 1.00 orr.w r0, r1, r2 +# CHECK-NEXT: 1.00 orrs.w r0, r1, r2 +# CHECK-NEXT: 1.00 orr.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 orrs.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 pkhbt r0, r1, r2 +# CHECK-NEXT: 1.00 pkhbt r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 pkhbt r0, r2, r1 +# CHECK-NEXT: 1.00 pkhtb r0, r1, r2, asr #1 +# CHECK-NEXT: 1.00 pop {r0} +# CHECK-NEXT: 1.00 pop.w {r0, r1} +# CHECK-NEXT: 1.00 ldr r0, [sp], #4 +# CHECK-NEXT: 1.00 pssbb +# CHECK-NEXT: 1.00 push {r0} +# CHECK-NEXT: 1.00 push.w {r0, r1} +# CHECK-NEXT: 1.00 str r0, [sp, #-4]! +# CHECK-NEXT: 1.00 qadd r0, r1, r2 +# CHECK-NEXT: 1.00 qadd16 r0, r1, r2 +# CHECK-NEXT: 1.00 qadd8 r0, r1, r2 +# CHECK-NEXT: 1.00 qasx r0, r1, r2 +# CHECK-NEXT: 1.00 qdadd r0, r1, r2 +# CHECK-NEXT: 1.00 qdsub r0, r1, r2 +# CHECK-NEXT: 1.00 qsax r0, r1, r2 +# CHECK-NEXT: 1.00 qsub r0, r1, r2 +# CHECK-NEXT: 1.00 qsub16 r0, r1, r2 +# CHECK-NEXT: 1.00 qsub8 r0, r1, r2 +# CHECK-NEXT: 1.00 rbit r0, r1 +# CHECK-NEXT: 1.00 rev r0, r1 +# CHECK-NEXT: 1.00 rev.w r0, r1 +# CHECK-NEXT: 1.00 rev16 r0, r1 +# CHECK-NEXT: 1.00 rev16.w r0, r1 +# CHECK-NEXT: 1.00 revsh r0, r1 +# CHECK-NEXT: 1.00 revsh.w r0, r1 +# CHECK-NEXT: 1.00 ror.w r0, r1, #1 +# CHECK-NEXT: 1.00 rors.w r0, r1, #1 +# CHECK-NEXT: 1.00 rors r0, r1 +# CHECK-NEXT: 1.00 ror.w r0, r1, r2 +# CHECK-NEXT: 1.00 rors.w r0, r1, r2 +# CHECK-NEXT: 1.00 rrx r0, r1 +# CHECK-NEXT: 1.00 rrxs r0, r1 +# CHECK-NEXT: 1.00 rsbs r0, r1, #0 +# CHECK-NEXT: 1.00 rsb.w r0, r1, #1 +# CHECK-NEXT: 1.00 rsbs.w r0, r1, #1 +# CHECK-NEXT: 1.00 rsb r0, r1, r2 +# CHECK-NEXT: 1.00 rsbs r0, r1, r2 +# CHECK-NEXT: 1.00 rsb r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 rsbs r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 sadd16 r0, r1, r2 +# CHECK-NEXT: 1.00 sadd8 r0, r1, r2 +# CHECK-NEXT: 1.00 sasx r0, r1, r2 +# CHECK-NEXT: 1.00 sbc r0, r1, #1 +# CHECK-NEXT: 1.00 sbcs r0, r1, #1 +# CHECK-NEXT: 1.00 sbcs r0, r1 +# CHECK-NEXT: 1.00 sbc.w r0, r1, r2 +# CHECK-NEXT: 1.00 sbcs.w r0, r1, r2 +# CHECK-NEXT: 1.00 sbc.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 sbcs.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 sbfx r0, r1, #1, #2 +# CHECK-NEXT: 1.00 sdiv r0, r1, r2 +# CHECK-NEXT: 1.00 sel r0, r1, r2 +# CHECK-NEXT: 1.00 sev +# CHECK-NEXT: 1.00 shadd16 r0, r1, r2 +# CHECK-NEXT: 1.00 shadd8 r0, r1, r2 +# CHECK-NEXT: 1.00 shasx r0, r1, r2 +# CHECK-NEXT: 1.00 shsax r0, r1, r2 +# CHECK-NEXT: 1.00 shsub16 r0, r1, r2 +# CHECK-NEXT: 1.00 shsub8 r0, r1, r2 +# CHECK-NEXT: 1.00 smlabb r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlabt r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlatb r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlatt r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlad r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smladx r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlal r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlalbb r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlalbt r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlaltb r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlaltt r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlald r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlaldx r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlawb r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlawt r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlsd r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlsdx r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlsld r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smlsldx r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smmla r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smmlar r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smmls r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smmlsr r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smmul r0, r1, r2 +# CHECK-NEXT: 1.00 smmulr r0, r1, r2 +# CHECK-NEXT: 1.00 smuad r0, r1, r2 +# CHECK-NEXT: 1.00 smuadx r0, r1, r2 +# CHECK-NEXT: 1.00 smulbb r0, r1, r2 +# CHECK-NEXT: 1.00 smulbt r0, r1, r2 +# CHECK-NEXT: 1.00 smultb r0, r1, r2 +# CHECK-NEXT: 1.00 smultt r0, r1, r2 +# CHECK-NEXT: 2.00 smull r0, r1, r2, r3 +# CHECK-NEXT: 1.00 smulwb r0, r1, r2 +# CHECK-NEXT: 1.00 smulwt r0, r1, r2 +# CHECK-NEXT: 1.00 smusd r0, r1, r2 +# CHECK-NEXT: 1.00 smusdx r0, r1, r2 +# CHECK-NEXT: 1.00 ssat r0, #1, r2 +# CHECK-NEXT: 1.00 ssat r0, #1, r2, lsl #1 +# CHECK-NEXT: 1.00 ssat16 r0, #1, r1 +# CHECK-NEXT: 1.00 ssax r0, r1, r2 +# CHECK-NEXT: 1.00 ssbb +# CHECK-NEXT: 1.00 ssub16 r0, r1, r2 +# CHECK-NEXT: 1.00 ssub8 r0, r1, r2 +# CHECK-NEXT: 1.00 stm r0!, {r1} +# CHECK-NEXT: 1.00 stm.w r0, {r1} +# CHECK-NEXT: 1.00 stm.w r0!, {r1} +# CHECK-NEXT: 1.00 stmdb r0, {r1} +# CHECK-NEXT: 1.00 str r1, [r0, #-4]! +# CHECK-NEXT: 1.00 str r0, [r1] +# CHECK-NEXT: 1.00 str r0, [r1, #4] +# CHECK-NEXT: 1.00 str r0, [sp, #4] +# CHECK-NEXT: 1.00 str.w r0, [r1, #1] +# CHECK-NEXT: 1.00 str r0, [r1, #-1] +# CHECK-NEXT: 1.00 str r0, [r1], #1 +# CHECK-NEXT: 1.00 str r0, [r1, r2] +# CHECK-NEXT: 1.00 str.w r0, [r1, r2] +# CHECK-NEXT: 1.00 str.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1.00 strb r0, [r1] +# CHECK-NEXT: 1.00 strb r0, [r1, #1] +# CHECK-NEXT: 1.00 strb.w r0, [r1, #1] +# CHECK-NEXT: 1.00 strb r0, [r1, #-1] +# CHECK-NEXT: 1.00 strb r0, [r1], #1 +# CHECK-NEXT: 1.00 strb r0, [r1, #1]! +# CHECK-NEXT: 1.00 strb r0, [r1, r2] +# CHECK-NEXT: 1.00 strb.w r0, [r1, r2] +# CHECK-NEXT: 1.00 strb.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1.00 strbt r0, [r1, #1] +# CHECK-NEXT: 1.00 strd r0, r1, [r2, #4] +# CHECK-NEXT: 1.00 strd r0, r1, [r2], #4 +# CHECK-NEXT: 1.00 strd r0, r1, [r2, #4]! +# CHECK-NEXT: 1.00 strex r0, r1, [r2] +# CHECK-NEXT: 1.00 strex r0, r1, [r2, #4] +# CHECK-NEXT: 1.00 strexb r0, r1, [r2] +# CHECK-NEXT: 1.00 strexh r0, r1, [r2] +# CHECK-NEXT: 1.00 strh r0, [r1] +# CHECK-NEXT: 1.00 strh r0, [r1, #2] +# CHECK-NEXT: 1.00 strh.w r0, [r1, #2] +# CHECK-NEXT: 1.00 strh r0, [r1, #-1] +# CHECK-NEXT: 1.00 strh r0, [r1], #1 +# CHECK-NEXT: 1.00 strh r0, [r1, #1]! +# CHECK-NEXT: 1.00 strh r0, [r1, r2] +# CHECK-NEXT: 1.00 strh.w r0, [r1, r2] +# CHECK-NEXT: 1.00 strh.w r0, [r1, r2, lsl #1] +# CHECK-NEXT: 1.00 strht r0, [r1, #1] +# CHECK-NEXT: 1.00 strt r0, [r1, #1] +# CHECK-NEXT: 1.00 sub sp, #4 +# CHECK-NEXT: 1.00 sub.w r0, sp, #1 +# CHECK-NEXT: 1.00 subs.w r0, sp, #1 +# CHECK-NEXT: 1.00 subw r0, sp, #1 +# CHECK-NEXT: 1.00 sub.w r0, sp, r1 +# CHECK-NEXT: 1.00 subs.w r0, sp, r1 +# CHECK-NEXT: 1.00 sub.w r0, sp, r1, lsl #1 +# CHECK-NEXT: 1.00 subs.w r0, sp, r1, lsl #1 +# CHECK-NEXT: 1.00 subs r0, r1, #1 +# CHECK-NEXT: 1.00 subs r0, #1 +# CHECK-NEXT: 1.00 sub.w r0, r1, #1 +# CHECK-NEXT: 1.00 subs.w r0, r1, #1 +# CHECK-NEXT: 1.00 subw r0, r1, #1 +# CHECK-NEXT: 1.00 subs r0, r1, r2 +# CHECK-NEXT: 1.00 sub.w r0, r1, r2 +# CHECK-NEXT: 1.00 subs.w r0, r1, r2 +# CHECK-NEXT: 1.00 sub.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 subs.w r0, r1, r2, lsl #1 +# CHECK-NEXT: 1.00 sxtab r0, r1, r2 +# CHECK-NEXT: 1.00 sxtab r0, r1, r2, ror #8 +# CHECK-NEXT: 1.00 sxtab16 r0, r1, r2 +# CHECK-NEXT: 1.00 sxtab16 r0, r1, r2, ror #8 +# CHECK-NEXT: 1.00 sxtah r0, r1, r2 +# CHECK-NEXT: 1.00 sxtah r0, r1, r2, ror #8 +# CHECK-NEXT: 1.00 sxtb r0, r1 +# CHECK-NEXT: 1.00 sxtb.w r0, r1 +# CHECK-NEXT: 1.00 sxtb.w r0, r1, ror #8 +# CHECK-NEXT: 1.00 sxtb16 r0, r1 +# CHECK-NEXT: 1.00 sxtb16 r0, r1, ror #8 +# CHECK-NEXT: 1.00 sxth r0, r1 +# CHECK-NEXT: 1.00 sxth.w r0, r1 +# CHECK-NEXT: 1.00 sxth.w r0, r1, ror #8 +# CHECK-NEXT: 1.00 tbb [r0, r1] +# CHECK-NEXT: 1.00 tbh [r0, r1, lsl #1] +# CHECK-NEXT: 1.00 teq.w r0, #1 +# CHECK-NEXT: 1.00 teq.w r0, r1 +# CHECK-NEXT: 1.00 teq.w r0, r1, lsl #1 +# CHECK-NEXT: 1.00 tst.w r0, #1 +# CHECK-NEXT: 1.00 tst r0, r1 +# CHECK-NEXT: 1.00 tst.w r0, r1 +# CHECK-NEXT: 1.00 tst.w r0, r1, lsl #1 +# CHECK-NEXT: 1.00 uadd16 r0, r1, r2 +# CHECK-NEXT: 1.00 uadd8 r0, r1, r2 +# CHECK-NEXT: 1.00 uasx r0, r1, r2 +# CHECK-NEXT: 1.00 ubfx r0, r1, #1, #2 +# CHECK-NEXT: 1.00 udiv r0, r1, r2 +# CHECK-NEXT: 1.00 uhadd16 r0, r1, r2 +# CHECK-NEXT: 1.00 uhadd8 r0, r1, r2 +# CHECK-NEXT: 1.00 uhasx r0, r1, r2 +# CHECK-NEXT: 1.00 uhsax r0, r1, r2 +# CHECK-NEXT: 1.00 uhsub16 r0, r1, r2 +# CHECK-NEXT: 1.00 uhsub8 r0, r1, r2 +# CHECK-NEXT: 2.00 umaal r0, r1, r2, r3 +# CHECK-NEXT: 2.00 umlal r0, r1, r2, r3 +# CHECK-NEXT: 2.00 umull r0, r1, r2, r3 +# CHECK-NEXT: 1.00 uqadd16 r0, r1, r2 +# CHECK-NEXT: 1.00 uqadd8 r0, r1, r2 +# CHECK-NEXT: 1.00 uqasx r0, r1, r2 +# CHECK-NEXT: 1.00 uqsax r0, r1, r2 +# CHECK-NEXT: 1.00 uqsub16 r0, r1, r2 +# CHECK-NEXT: 1.00 uqsub8 r0, r1, r2 +# CHECK-NEXT: 1.00 usad8 r0, r1, r2 +# CHECK-NEXT: 1.00 usada8 r0, r1, r2, r3 +# CHECK-NEXT: 1.00 usat r0, #1, r1 +# CHECK-NEXT: 1.00 usat r0, #1, r1, lsl #1 +# CHECK-NEXT: 1.00 usat16 r0, #1, r1 +# CHECK-NEXT: 1.00 usax r0, r1, r2 +# CHECK-NEXT: 1.00 usub16 r0, r1, r2 +# CHECK-NEXT: 1.00 usub8 r0, r1, r2 +# CHECK-NEXT: 1.00 uxtab r0, r1, r2 +# CHECK-NEXT: 1.00 uxtab r0, r1, r2, ror #8 +# CHECK-NEXT: 1.00 uxtab16 r0, r1, r2 +# CHECK-NEXT: 1.00 uxtab16 r0, r1, r2, ror #8 +# CHECK-NEXT: 1.00 uxtah r0, r1, r2 +# CHECK-NEXT: 1.00 uxtah r0, r1, r2, ror #8 +# CHECK-NEXT: 1.00 uxtb r0, r1 +# CHECK-NEXT: 1.00 uxtb.w r0, r1 +# CHECK-NEXT: 1.00 uxtb.w r0, r1, ror #8 +# CHECK-NEXT: 1.00 uxtb16 r0, r1 +# CHECK-NEXT: 1.00 uxtb16 r0, r1, ror #8 +# CHECK-NEXT: 1.00 uxth r0, r1 +# CHECK-NEXT: 1.00 uxth.w r0, r1 +# CHECK-NEXT: 1.00 uxth.w r0, r1, ror #8 +# CHECK-NEXT: 1.00 wfe +# CHECK-NEXT: 1.00 wfi +# CHECK-NEXT: 1.00 yield