diff --git a/llvm/include/llvm/Target/GlobalISel/Combine.td b/llvm/include/llvm/Target/GlobalISel/Combine.td
index add2cd704329d9..d2868d86741a49 100644
--- a/llvm/include/llvm/Target/GlobalISel/Combine.td
+++ b/llvm/include/llvm/Target/GlobalISel/Combine.td
@@ -241,6 +241,12 @@ def binop_right_undef_to_undef: GICombineRule<
          [{ return Helper.matchOperandIsUndef(*${root}, 2); }]),
   (apply [{ Helper.replaceInstWithUndef(*${root}); }])>;
 
+def unary_undef_to_zero: GICombineRule<
+  (defs root:$root),
+  (match (wip_match_opcode G_ABS):$root,
+         [{ return Helper.matchOperandIsUndef(*${root}, 1); }]),
+  (apply [{ Helper.replaceInstWithConstant(*${root}, 0); }])>;
+
 // Instructions where if any source operand is undef, the instruction can be
 // replaced with undef.
 def propagate_undef_any_op: GICombineRule<
@@ -955,6 +961,7 @@ def undef_combines : GICombineGroup<[undef_to_fp_zero, undef_to_int_zero,
                                      undef_to_negative_one,
                                      binop_left_undef_to_zero,
                                      binop_right_undef_to_undef,
+                                     unary_undef_to_zero,
                                      propagate_undef_any_op,
                                      propagate_undef_all_ops,
                                      propagate_undef_shuffle_mask,
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-unary-undef-to-zero.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-unary-undef-to-zero.mir
new file mode 100644
index 00000000000000..1c5f5cbd17b3b0
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-unary-undef-to-zero.mir
@@ -0,0 +1,41 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -o - %s | FileCheck %s
+
+# Test unary_op(undef) -> 0 combines
+
+...
+---
+name:            abs_scalar
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $w0
+    ; CHECK-LABEL: name: abs_scalar
+    ; CHECK: liveins: $w0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %abs:_(s32) = G_CONSTANT i32 0
+    ; CHECK-NEXT: $w0 = COPY %abs(s32)
+    ; CHECK-NEXT: RET_ReallyLR implicit $w0
+    %undef:_(s32) = G_IMPLICIT_DEF
+    %abs:_(s32) = G_ABS %undef
+    $w0 = COPY %abs(s32)
+    RET_ReallyLR implicit $w0
+...
+---
+name:            abs_vector
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $d0
+    ; CHECK-LABEL: name: abs_vector
+    ; CHECK: liveins: $d0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+    ; CHECK-NEXT: %abs:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
+    ; CHECK-NEXT: $d0 = COPY %abs(<2 x s32>)
+    ; CHECK-NEXT: RET_ReallyLR implicit $d0
+    %undef:_(<2 x s32>) = G_IMPLICIT_DEF
+    %abs:_(<2 x s32>) = G_ABS %undef
+    $d0 = COPY %abs(<2 x s32>)
+    RET_ReallyLR implicit $d0
+...