diff --git a/llvm/test/CodeGen/PowerPC/and-extend-combine.ll b/llvm/test/CodeGen/PowerPC/and-extend-combine.ll
index b05d0097154a5..50604d8ef32af 100644
--- a/llvm/test/CodeGen/PowerPC/and-extend-combine.ll
+++ b/llvm/test/CodeGen/PowerPC/and-extend-combine.ll
@@ -1,6 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
 ; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown -ppc-asm-full-reg-names \
 ; RUN:   -mcpu=pwr8 -verify-machineinstrs | FileCheck %s
+
 define dso_local ptr @foo(i32 noundef zeroext %arg, ptr nocapture noundef readonly %arg1, ptr noundef writeonly %arg2) local_unnamed_addr {
 ; CHECK-LABEL: foo:
 ; CHECK:       # %bb.0: # %bb
@@ -21,3 +22,17 @@ bb:
   %i8 = getelementptr inbounds i8, ptr %arg2, i64 %i7
   ret ptr %i8
 }
+
+; FIXME: This is a miscompile.
+define void @pr68783(i32 %x, ptr %p) {
+; CHECK-LABEL: pr68783:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    rlwinm r3, r3, 31, 24, 31
+; CHECK-NEXT:    stw r3, 0(r4)
+; CHECK-NEXT:    blr
+  %lshr = lshr i32 %x, 1
+  %zext = zext i32 %lshr to i48
+  %and = and i48 %zext, 255
+  store i48 %and, ptr %p
+  ret void
+}